From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 06/12] drm/i915: Simplify watermark state checker calling convention
Date: Wed, 4 Oct 2023 20:18:58 +0300 [thread overview]
Message-ID: <ZR2egmdflimqIpu3@intel.com> (raw)
In-Reply-To: <877co2e36j.fsf@intel.com>
On Wed, Oct 04, 2023 at 07:57:08PM +0300, Jani Nikula wrote:
> On Wed, 04 Oct 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > There is never any reason to pass in both the crtc and its state
> > as one can always dig out the crtc from its state.
>
> I'm wondering whether we shouldn't just always pass
>
> struct intel_atomic_state *state, struct intel_crtc *crtc
>
> to the checker, everywhere, even if that's excessive in some cases. I
> think some of the confusion you're fixing in this series comes from
> people cargo culting the conventions, and then adding some new
> parameters as needed, deviating from the state, crtc pair.
Yeah, I guess that makes sense. I can respin with that.
>
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_modeset_verify.c | 2 +-
> > drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++--
> > drivers/gpu/drm/i915/display/skl_watermark.h | 3 +--
> > 3 files changed, 4 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> > index 47d45ba1e707..bbee79aad0cd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> > +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> > @@ -233,7 +233,7 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc,
> > !intel_crtc_needs_fastset(new_crtc_state))
> > return;
> >
> > - intel_wm_state_verify(crtc, new_crtc_state);
> > + intel_wm_state_verify(new_crtc_state);
> > verify_connector_state(state, crtc);
> > verify_crtc_state(state, crtc);
> > intel_shared_dpll_state_verify(state, crtc);
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index d51cf92c96ae..e7a9fb4b1f6b 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -3134,9 +3134,9 @@ static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915)
> > skl_wm_sanitize(i915);
> > }
> >
> > -void intel_wm_state_verify(struct intel_crtc *crtc,
> > - const struct intel_crtc_state *new_crtc_state)
> > +void intel_wm_state_verify(const struct intel_crtc_state *new_crtc_state)
> > {
> > + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
> > struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > struct skl_hw_state {
> > struct skl_ddb_entry ddb[I915_MAX_PLANES];
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
> > index 18e4b0661cbb..ca4312bf7012 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.h
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.h
> > @@ -38,8 +38,7 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> > const struct skl_ddb_entry *entries,
> > int num_entries, int ignore_idx);
> >
> > -void intel_wm_state_verify(struct intel_crtc *crtc,
> > - const struct intel_crtc_state *new_crtc_state);
> > +void intel_wm_state_verify(const struct intel_crtc_state *new_crtc_state);
> >
> > void skl_watermark_ipc_init(struct drm_i915_private *i915);
> > void skl_watermark_ipc_update(struct drm_i915_private *i915);
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2023-10-04 17:19 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-04 15:55 [Intel-gfx] [PATCH 00/12] drm/i915: Display state checker cleanup Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 01/12] drm/i915/psr: Unify PSR pre/post plane update hooks Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 02/12] drm/i915: Stop clobbering old crtc state during state check Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 03/12] drm/i915: Constify the crtc states in the DPLL checker Ville Syrjala
2023-10-04 15:55 ` [Intel-gfx] [PATCH 04/12] drm/i915: Simplify DPLL state checker calling convention Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 05/12] drm/i915: Constify watermark state checker Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 06/12] drm/i915: Simplify watermark state checker calling convention Ville Syrjala
2023-10-04 16:57 ` Jani Nikula
2023-10-04 17:18 ` Ville Syrjälä [this message]
2023-10-05 12:27 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2023-10-05 13:08 ` Jani Nikula
2023-10-04 15:56 ` [Intel-gfx] [PATCH 07/12] drm/i915: Constify the snps/c10x PLL state checkers Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 08/12] drm/i915: Simplify snps/c10x DPLL state checker calling convetion Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 09/12] drm/i915: Constify remainder of the state checker Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 10/12] drm/i915: Simplify the state checker calling convetions Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 11/12] drm/i915: s/pipe_config/crtc_state/ in the state checker Ville Syrjala
2023-10-04 15:56 ` [Intel-gfx] [PATCH 12/12] drm/i915: s/dev_priv/i915/ " Ville Syrjala
2023-10-04 16:58 ` [Intel-gfx] [PATCH 00/12] drm/i915: Display state checker cleanup Jani Nikula
2023-10-04 22:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2023-10-04 22:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-04 23:00 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-05 3:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Display state checker cleanup (rev2) Patchwork
2023-10-05 3:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-05 3:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-05 23:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Display state checker cleanup (rev3) Patchwork
2023-10-05 23:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-05 23:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-06 13:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZR2egmdflimqIpu3@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox