From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, ankit.k.nautiyal@intel.com,
jani.nikula@intel.com
Subject: [PATCH v12 8/9] drm/i915/display: Add support for pack and unpack
Date: Wed, 5 Jun 2024 17:58:01 +0530 [thread overview]
Message-ID: <20240605122802.488124-9-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20240605122802.488124-1-mitulkumar.ajitkumar.golani@intel.com>
Add support of pack and unpack for target_rr_divider.
--v2:
- Set Target Refresh Rate Divider bit when related
AS SDP bit is set (Ankit).
--v3:
- target_rr_divider is bools so set accordingly (Ankit).
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index fd054e16850d..ac81b172b1ec 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4232,6 +4232,9 @@ static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *as_sdp,
sdp->db[3] = as_sdp->target_rr & 0xFF;
sdp->db[4] = (as_sdp->target_rr >> 8) & 0x3;
+ if (as_sdp->target_rr_divider)
+ sdp->db[4] |= 0x20;
+
return length;
}
@@ -4413,6 +4416,7 @@ int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
as_sdp->mode = sdp->db[0] & DP_ADAPTIVE_SYNC_SDP_OPERATION_MODE;
as_sdp->vtotal = (sdp->db[2] << 8) | sdp->db[1];
as_sdp->target_rr = (u64)sdp->db[3] | ((u64)sdp->db[4] & 0x3);
+ as_sdp->target_rr_divider = sdp->db[4] & 0x20 ? true : false;
return 0;
}
--
2.25.1
next prev parent reply other threads:[~2024-06-05 12:38 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-05 12:27 [PATCH v12 0/9] Implement CMRR Support Mitul Golani
2024-06-05 12:27 ` [PATCH v12 1/9] drm/i915: Protect CRC reg macro arguments for consistency Mitul Golani
2024-06-05 12:49 ` Golani, Mitulkumar Ajitkumar
2024-06-05 12:27 ` [PATCH v12 2/9] drm-tip: 2024y-06m-05d-09h-52m-50s UTC integration manifest Mitul Golani
2024-06-05 12:50 ` Golani, Mitulkumar Ajitkumar
2024-06-05 12:27 ` [PATCH v12 3/9] gpu/drm/i915: Update indentation for VRR registers and bits Mitul Golani
2024-06-05 12:27 ` [PATCH v12 4/9] drm/i915: Separate VRR related register definitions Mitul Golani
2024-06-05 12:27 ` [PATCH v12 5/9] drm/i915: Define and compute Transcoder CMRR registers Mitul Golani
2024-06-05 12:27 ` [PATCH v12 6/9] drm/i915: Update trans_vrr_ctl flag when cmrr is computed Mitul Golani
2024-06-05 12:28 ` [PATCH v12 7/9] drm/dp: Add refresh rate divider to struct representing AS SDP Mitul Golani
2024-06-05 12:28 ` Mitul Golani [this message]
2024-06-05 12:28 ` [PATCH v12 9/9] drm/i915/display: Compute Adaptive sync SDP params Mitul Golani
2024-06-05 14:38 ` ✗ Fi.CI.BUILD: failure for Implement CMRR Support (rev12) Patchwork
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