From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: animesh.manna@intel.com, mika.kahola@intel.com,
"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 1/9] drm/i915/psr: Set SU area width as pipe src width
Date: Tue, 18 Jun 2024 08:30:18 +0300 [thread overview]
Message-ID: <20240618053026.3268759-2-jouni.hogander@intel.com> (raw)
In-Reply-To: <20240618053026.3268759-1-jouni.hogander@intel.com>
Currently SU area width is set as MAX_INT. This is causing
problems. Instead set it as pipe src width.
Fixes: 86b26b6aeac7 ("drm/i915/psr: Carry su area in crtc_state")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 920186c2264d..3f36b94020ff 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2316,7 +2316,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
crtc_state->psr2_su_area.x1 = 0;
crtc_state->psr2_su_area.y1 = -1;
- crtc_state->psr2_su_area.x2 = INT_MAX;
+ crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src);
crtc_state->psr2_su_area.y2 = -1;
/*
--
2.34.1
next prev parent reply other threads:[~2024-06-18 5:30 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-18 5:30 [PATCH 0/9] Panel Replay eDP more prepare patches Jouni Högander
2024-06-18 5:30 ` Jouni Högander [this message]
2024-06-18 10:23 ` [PATCH 1/9] drm/i915/psr: Set SU area width as pipe src width Kahola, Mika
2024-06-18 5:30 ` [PATCH 2/9] drm/i915/display: Wa 16021440873 is writing wrong register Jouni Högander
2024-06-18 13:29 ` Kahola, Mika
2024-06-19 9:51 ` Jani Nikula
2024-06-19 12:11 ` Hogander, Jouni
2024-06-18 5:30 ` [PATCH 3/9] drm/i915/alpm: Fix port clock usage in AUX Less wake time calculation Jouni Högander
2024-06-18 5:30 ` [PATCH 4/9] drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameter Jouni Högander
2024-06-18 12:00 ` Manna, Animesh
2024-06-18 5:30 ` [PATCH 5/9] drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is set Jouni Högander
2024-06-18 12:03 ` Manna, Animesh
2024-06-18 5:30 ` [PATCH 6/9] drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR only Jouni Högander
2024-06-18 5:30 ` [PATCH 7/9] drm/i915/psr: Add new debug bit to disable Panel Replay Jouni Högander
2024-06-18 5:30 ` [PATCH 8/9] Revert "drm/i915/psr: Disable early transport by default" Jouni Högander
2024-06-18 5:30 ` [PATCH 9/9] intel_alpm: Fix wrong offset for PORT_ALPM_* registers Jouni Högander
2024-06-18 11:58 ` Manna, Animesh
2024-06-18 6:06 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP more prepare patches Patchwork
2024-06-18 6:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-18 6:14 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-18 10:26 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-06-19 5:16 ` Hogander, Jouni
2024-06-19 5:24 ` [PATCH 0/9] " Hogander, Jouni
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