From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: animesh.manna@intel.com, mika.kahola@intel.com,
"Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 2/9] drm/i915/display: Wa 16021440873 is writing wrong register
Date: Tue, 18 Jun 2024 08:30:19 +0300 [thread overview]
Message-ID: <20240618053026.3268759-3-jouni.hogander@intel.com> (raw)
In-Reply-To: <20240618053026.3268759-1-jouni.hogander@intel.com>
Wa 16021440873 is writing wrong register. Instead of PIPE_SRCSZ_ERLY_TPT
write CURPOS_ERLY_TPT.
v2: use right offset as well
Fixes: 29cdef8539c3 ("drm/i915/display: Implement Wa_16021440873")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_cursor.c | 4 ++--
drivers/gpu/drm/i915/display/intel_psr.c | 12 +++---------
2 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 7f7fc710350c..66436e526021 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -524,8 +524,8 @@ static void wa_16021440873(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SEL_FETCH_CUR_CTL(pipe), ctl);
- intel_de_write(dev_priv, PIPE_SRCSZ_ERLY_TPT(pipe),
- PIPESRC_HEIGHT(et_y_position));
+ intel_de_write(dev_priv, CURPOS_ERLY_TPT(dev_priv, pipe),
+ CURSOR_POS_Y(et_y_position));
}
static void i9xx_cursor_update_sel_fetch_arm(struct intel_plane *plane,
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 3f36b94020ff..2a33e35ceeff 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2164,19 +2164,14 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
crtc_state->psr2_man_track_ctl = val;
}
-static u32
-psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
- bool full_update, bool cursor_in_su_area)
+static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
+ bool full_update)
{
int width, height;
if (!crtc_state->enable_psr2_su_region_et || full_update)
return 0;
- if (!cursor_in_su_area)
- return PIPESRC_WIDTH(0) |
- PIPESRC_HEIGHT(drm_rect_height(&crtc_state->pipe_src));
-
width = drm_rect_width(&crtc_state->psr2_su_area);
height = drm_rect_height(&crtc_state->psr2_su_area);
@@ -2485,8 +2480,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
skip_sel_fetch_set_loop:
psr2_man_trk_ctl_calc(crtc_state, full_update);
crtc_state->pipe_srcsz_early_tpt =
- psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update,
- cursor_in_su_area);
+ psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);
return 0;
}
--
2.34.1
next prev parent reply other threads:[~2024-06-18 5:31 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-18 5:30 [PATCH 0/9] Panel Replay eDP more prepare patches Jouni Högander
2024-06-18 5:30 ` [PATCH 1/9] drm/i915/psr: Set SU area width as pipe src width Jouni Högander
2024-06-18 10:23 ` Kahola, Mika
2024-06-18 5:30 ` Jouni Högander [this message]
2024-06-18 13:29 ` [PATCH 2/9] drm/i915/display: Wa 16021440873 is writing wrong register Kahola, Mika
2024-06-19 9:51 ` Jani Nikula
2024-06-19 12:11 ` Hogander, Jouni
2024-06-18 5:30 ` [PATCH 3/9] drm/i915/alpm: Fix port clock usage in AUX Less wake time calculation Jouni Högander
2024-06-18 5:30 ` [PATCH 4/9] drm/i915/psr: Disable Panel Replay if PSR mode is set via module parameter Jouni Högander
2024-06-18 12:00 ` Manna, Animesh
2024-06-18 5:30 ` [PATCH 5/9] drm/i915/psr: Disable PSR2 SU Region ET if enable_psr module parameter is set Jouni Högander
2024-06-18 12:03 ` Manna, Animesh
2024-06-18 5:30 ` [PATCH 6/9] drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR only Jouni Högander
2024-06-18 5:30 ` [PATCH 7/9] drm/i915/psr: Add new debug bit to disable Panel Replay Jouni Högander
2024-06-18 5:30 ` [PATCH 8/9] Revert "drm/i915/psr: Disable early transport by default" Jouni Högander
2024-06-18 5:30 ` [PATCH 9/9] intel_alpm: Fix wrong offset for PORT_ALPM_* registers Jouni Högander
2024-06-18 11:58 ` Manna, Animesh
2024-06-18 6:06 ` ✗ Fi.CI.CHECKPATCH: warning for Panel Replay eDP more prepare patches Patchwork
2024-06-18 6:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-18 6:14 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-18 10:26 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-06-19 5:16 ` Hogander, Jouni
2024-06-19 5:24 ` [PATCH 0/9] " Hogander, Jouni
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