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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Subject: [PATCH v5 3/8] drm/i915/dp: Initialize the source OUI write timestamp always
Date: Fri, 25 Oct 2024 19:02:54 +0300	[thread overview]
Message-ID: <20241025160259.3088727-4-imre.deak@intel.com> (raw)
In-Reply-To: <20241025160259.3088727-1-imre.deak@intel.com>

If the source OUI DPCD register value matches the expected Intel OUI
value, the write timestamp doesn't get updated leaving it at the 0
initial value if the OUI wasn't written before. This can lead to an
incorrect wait duration in intel_dp_wait_source_oui(), since jiffies is
not inited to 0 in general (on a 32 bit system INITIAL_JIFFIES is set to
5 minutes ahead of wrap-around). Fix this by intializing the write
timestamp in the above case as well.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 69a4e9c86d386..778cc33d3c690 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3415,8 +3415,11 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
 		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
 			drm_err(&i915->drm, "Failed to read source OUI\n");
 
-		if (memcmp(oui, buf, sizeof(oui)) == 0)
+		if (memcmp(oui, buf, sizeof(oui)) == 0) {
+			/* Assume the OUI was written now. */
+			intel_dp->last_oui_write = jiffies;
 			return;
+		}
 	}
 
 	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
-- 
2.44.2


  parent reply	other threads:[~2024-10-25 16:02 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25 16:02 [PATCH v5 0/8] drm/i915: Write source OUI for non-eDP sinks Imre Deak
2024-10-25 16:02 ` [PATCH v5 1/8] drm/i915/dp: Flush modeset commits during connector detection Imre Deak
2024-10-25 16:02 ` [PATCH v5 2/8] drm/i915/dp: Ensure panel power remains enabled " Imre Deak
2024-10-25 16:02 ` Imre Deak [this message]
2024-10-25 16:02 ` [PATCH v5 4/8] drm/i915/dp: Track source OUI validity explicitly Imre Deak
2024-10-25 16:02 ` [PATCH v5 5/8] drm/i915/dp: Reuse intel_dp_detect_dsc_caps() for eDP Imre Deak
2024-10-25 16:02 ` [PATCH v5 6/8] drm/i915/dp: Write the source OUI for eDP before detecting sink capabilities Imre Deak
2024-10-25 16:02 ` [PATCH v5 7/8] drm/i915/dp: Write the source OUI during connector detection Imre Deak
2024-10-25 16:02 ` [PATCH v5 8/8] drm/i915/dp: Write the source OUI for non-eDP sinks as well Imre Deak
2024-10-28 15:20   ` Ville Syrjälä
2024-10-25 16:52 ` ✗ Fi.CI.SPARSE: warning for drm/i915: Write source OUI for non-eDP sinks (rev4) Patchwork
2024-10-25 17:09 ` ✓ Fi.CI.BAT: success " Patchwork
2024-10-25 22:12 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-10-31 17:00   ` Imre Deak

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