From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, ankit.k.nautiyal@intel.com,
jani.nikula@linux.intel.com
Subject: [PATCH v7 10/18] drm/i915: Extract vrr_vblank_start()
Date: Tue, 24 Jun 2025 13:19:40 +0530 [thread overview]
Message-ID: <20250624074948.671761-11-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20250624074948.671761-1-mitulkumar.ajitkumar.golani@intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Initialise delayed vblank position for evasion logic.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vblank.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 70ba7aa26bf4..d544e274bcfa 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -642,6 +642,14 @@ intel_pre_commit_crtc_state(struct intel_atomic_state *state,
return pre_commit_crtc_state(old_crtc_state, new_crtc_state);
}
+static int vrr_vblank_start(const struct intel_crtc_state *crtc_state)
+{
+ if (intel_vrr_is_push_sent(crtc_state))
+ return intel_vrr_vmin_vblank_start(crtc_state);
+ else
+ return intel_vrr_vmax_vblank_start(crtc_state);
+}
+
void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
const struct intel_crtc_state *new_crtc_state,
struct intel_vblank_evade_ctx *evade)
@@ -668,10 +676,7 @@ void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
drm_WARN_ON(crtc->base.dev, intel_crtc_needs_modeset(new_crtc_state) ||
new_crtc_state->update_m_n || new_crtc_state->update_lrr);
- if (intel_vrr_is_push_sent(crtc_state))
- evade->vblank_start = intel_vrr_vmin_vblank_start(crtc_state);
- else
- evade->vblank_start = intel_vrr_vmax_vblank_start(crtc_state);
+ evade->vblank_start = vrr_vblank_start(crtc_state);
vblank_delay = intel_vrr_vblank_delay(crtc_state);
} else {
--
2.48.1
next prev parent reply other threads:[~2025-06-24 7:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 7:49 [PATCH v7 00/18] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-06-24 7:49 ` [PATCH v7 01/18] drm/i915/vrr: Refactor vmin/vmax stuff Mitul Golani
2025-06-24 7:49 ` [PATCH v7 02/18] drm/i915/display: Add source param for dc balance Mitul Golani
2025-06-24 7:49 ` [PATCH v7 03/18] drm/i915/display: Add pipe dmc registers and bits for DC Balance Mitul Golani
2025-06-24 7:49 ` [PATCH v7 04/18] drm/i915/display: Add VRR DC balance registers Mitul Golani
2025-06-24 8:13 ` Jani Nikula
2025-06-24 7:49 ` [PATCH v7 05/18] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
2025-06-24 7:49 ` [PATCH v7 06/18] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
2025-06-24 8:14 ` Jani Nikula
2025-06-24 7:49 ` [PATCH v7 07/18] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
2025-06-24 7:49 ` [PATCH v7 08/18] drm/i915/vrr: Add compute config " Mitul Golani
2025-06-24 7:49 ` [PATCH v7 09/18] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
2025-06-24 7:49 ` Mitul Golani [this message]
2025-06-24 7:49 ` [PATCH v7 11/18] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
2025-06-24 7:49 ` [PATCH v7 12/18] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-06-24 8:25 ` Jani Nikula
2025-06-24 7:49 ` [PATCH v7 13/18] drm/i915/vrr: Restructure VRR enablement bit Mitul Golani
2025-06-24 7:49 ` [PATCH v7 14/18] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
2025-06-24 7:49 ` [PATCH v7 15/18] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
2025-06-24 7:49 ` [PATCH v7 16/18] drm/i915/display: Add function to configure PIPEDMC_EVT_CTL Mitul Golani
2025-06-24 7:49 ` [PATCH v7 17/18] drm/i915/vrr: Enable Adaptive sync counter bit Mitul Golani
2025-06-24 7:49 ` [PATCH v7 18/18] drm/i915/vrr: Enable DC Balance Mitul Golani
2025-06-24 8:54 ` ✓ i915.CI.BAT: success for Enable/Disable DC balance along with VRR DSB (rev7) Patchwork
2025-06-24 12:40 ` ✗ i915.CI.Full: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250624074948.671761-11-mitulkumar.ajitkumar.golani@intel.com \
--to=mitulkumar.ajitkumar.golani@intel.com \
--cc=ankit.k.nautiyal@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jani.nikula@linux.intel.com \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox