From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 1/8] drm/i915/dram: Populate PNV memory type accurately
Date: Tue, 2 Sep 2025 16:31:06 +0300 [thread overview]
Message-ID: <20250902133113.18778-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20250902133113.18778-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
If PNV doesn't have DDR3 then it has DDR2. Add the appropriate memory
type for it.
No functional change since we currently only care about the
DDR3 vs. not difference.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/soc/intel_dram.c | 10 ++++++----
drivers/gpu/drm/i915/soc/intel_dram.h | 1 +
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 3eb748ab44d9..7d8b8f81e215 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -35,6 +35,7 @@ static const char *intel_dram_type_str(enum intel_dram_type type)
{
static const char * const str[] = {
DRAM_TYPE_STR(UNKNOWN),
+ DRAM_TYPE_STR(DDR2),
DRAM_TYPE_STR(DDR3),
DRAM_TYPE_STR(DDR4),
DRAM_TYPE_STR(LPDDR3),
@@ -55,9 +56,10 @@ static const char *intel_dram_type_str(enum intel_dram_type type)
#undef DRAM_TYPE_STR
-static bool pnv_is_ddr3(struct drm_i915_private *i915)
+static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
{
- return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3;
+ return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
+ INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
}
static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
@@ -252,8 +254,8 @@ static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *d
if (dram_info->mem_freq)
drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
- if (IS_PINEVIEW(i915) && pnv_is_ddr3(i915))
- dram_info->type = INTEL_DRAM_DDR3;
+ if (IS_PINEVIEW(i915))
+ dram_info->type = pnv_dram_type(i915);
return 0;
}
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/soc/intel_dram.h
index 97d21894abdc..7e3b3d961fcb 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.h
+++ b/drivers/gpu/drm/i915/soc/intel_dram.h
@@ -17,6 +17,7 @@ struct dram_info {
bool symmetric_memory;
enum intel_dram_type {
INTEL_DRAM_UNKNOWN,
+ INTEL_DRAM_DDR2,
INTEL_DRAM_DDR3,
INTEL_DRAM_DDR4,
INTEL_DRAM_LPDDR3,
--
2.49.1
next prev parent reply other threads:[~2025-09-02 13:31 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-02 13:31 [PATCH 0/8] drm/i915/dram: DRAM detection stuff Ville Syrjala
2025-09-02 13:31 ` Ville Syrjala [this message]
2025-09-02 13:45 ` [PATCH 1/8] drm/i915/dram: Populate PNV memory type accurately Jani Nikula
2025-09-02 13:31 ` [PATCH 2/8] drm/i915/dram: Use intel_dram_type_str() for pnv Ville Syrjala
2025-09-02 13:46 ` Jani Nikula
2025-09-02 13:31 ` [PATCH 3/8] drm/i915/dram: Pack dram_info better Ville Syrjala
2025-09-02 13:46 ` Jani Nikula
2025-09-02 13:31 ` [PATCH 4/8] drm/i915/dram: s/wm_lv0.../has_16gb_dimms/ Ville Syrjala
2025-09-05 9:56 ` Jani Nikula
2025-09-02 13:31 ` [PATCH 5/8] drm/i915/dram: Move 16Gb DIMM detection fully to the skl/icl codepaths Ville Syrjala
2025-09-02 13:56 ` Jani Nikula
2025-09-02 14:18 ` Ville Syrjälä
2025-09-02 14:21 ` Jani Nikula
2025-09-02 13:31 ` [PATCH 6/8] drm/i915/dram: Fix some spelling aroynd the 16Gb DIMM w/a Ville Syrjala
2025-09-02 13:58 ` Jani Nikula
2025-09-02 14:03 ` Jani Nikula
2025-09-02 13:31 ` [PATCH 7/8] drm/i915/dram: Don't call skl_get_dram_info()/skl_get_dram_type() on icl Ville Syrjala
2025-09-02 14:02 ` Jani Nikula
2025-09-02 13:31 ` [PATCH 8/8] drm/i915/dram: Print memory details even if something went wrong Ville Syrjala
2025-09-02 14:03 ` Jani Nikula
2025-09-02 17:15 ` ✓ i915.CI.BAT: success for drm/i915/dram: DRAM detection stuff Patchwork
2025-09-03 1:34 ` ✗ i915.CI.Full: failure " Patchwork
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