From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: mitulkumar.ajitkumar.golani@intel.com,
ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com
Subject: [PATCH v1 3/8] drm/i915/display: Introduce CMRR fraction level to vrr crtc state
Date: Tue, 19 May 2026 10:33:17 +0530 [thread overview]
Message-ID: <20260519050322.3677451-4-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20260519050322.3677451-1-mitulkumar.ajitkumar.golani@intel.com>
CMRR (Content Match Refresh Rate) requires fractional multipliers
applied to vtotal to precisely match the target refresh rate. Introduce
enum cmrr_level to encode three distinct fraction cases:
CMRR_DEFAULT: No fractional adjustment; use the fixed refresh rate
timings as-is.
CMRR_HIGH: Apply a 1001/1000 multiplier to vtotal, targeting a
slightly higher effective refresh rate (e.g. 60.06 Hz
for a 60 Hz mode). Used for video content playback.
CMRR_LOW: Apply a 1000/1001 multiplier to vtotal, targeting a
slightly lower effective refresh rate. Used when the
pixel clock needs to be pulled down to match content.
Add the level field to the vrr.cmrr crtc state and state dump so it
can be tracked.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 7 +++++++
drivers/gpu/drm/i915/display/intel_vrr.c | 12 ++++++++++++
drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++
3 files changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ce280349622b..1d5aee13afb1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -999,6 +999,12 @@ struct intel_casf {
bool enable;
};
+enum cmrr_level {
+ CMRR_DEFAULT,
+ CMRR_LOW,
+ CMRR_HIGH,
+};
+
struct intel_crtc_state {
/*
* uapi (drm) state. This is the software state shown to userspace.
@@ -1400,6 +1406,7 @@ struct intel_crtc_state {
struct {
bool enable;
u64 cmrr_n, cmrr_m;
+ enum cmrr_level level;
} cmrr;
} vrr;
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 87d52b206bdb..8d79d289378b 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1228,3 +1228,15 @@ int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_st
return intel_vrr_vblank_start(crtc_state, VRR_DCB_VMAX(tmp) + 1);
}
+
+char *intel_vrr_cmrr_level_to_string(enum cmrr_level level)
+{
+ switch (level) {
+ case CMRR_LOW:
+ return "Low";
+ case CMRR_HIGH:
+ return "High";
+ default:
+ return "Default";
+ }
+}
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 4f16ca4af91f..86707b8af2e3 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -7,6 +7,7 @@
#define __INTEL_VRR_H__
#include <linux/types.h>
+#include "intel_display_types.h"
struct drm_connector_state;
struct intel_atomic_state;
@@ -53,5 +54,6 @@ int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_sta
int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state);
int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state);
int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state);
+char *intel_vrr_cmrr_level_to_string(enum cmrr_level level);
#endif /* __INTEL_VRR_H__ */
--
2.48.1
next prev parent reply other threads:[~2026-05-19 5:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-19 5:03 [PATCH v1 0/8] Enable CMRR in fixed-RR VRR path Mitul Golani
2026-05-19 5:03 ` [PATCH v1 1/8] drm/i915/display: Move CMRR crtc state into vrr state Mitul Golani
2026-05-19 5:03 ` [PATCH v1 2/8] drm/i915/vrr: Move CMRR register writes to fix refresh rate path Mitul Golani
2026-05-19 5:03 ` Mitul Golani [this message]
2026-06-02 13:10 ` [PATCH v1 3/8] drm/i915/display: Introduce CMRR fraction level to vrr crtc state Borah, Chaitanya Kumar
2026-05-19 5:03 ` [PATCH v1 4/8] drm/i915/display: Add state dump for CMRR params Mitul Golani
2026-05-19 5:03 ` [PATCH v1 5/8] i915/display/vrr: Compute CMRR params along with fixed refresh rate params Mitul Golani
2026-05-19 5:03 ` [PATCH v1 6/8] drm/i915/display: Add per-CRTC debugfs interface for CMRR fraction level Mitul Golani
2026-06-02 13:11 ` Borah, Chaitanya Kumar
2026-05-19 5:03 ` [PATCH v1 7/8] drm/i915/vrr: Compute CMRR vtotal based on configured scaling level Mitul Golani
2026-05-19 5:03 ` [PATCH v1 8/8] i915/display/vrr: Enable CMRR Mitul Golani
2026-06-02 13:16 ` Borah, Chaitanya Kumar
2026-05-19 6:25 ` ✓ i915.CI.BAT: success for Enable CMRR in fixed-RR VRR path Patchwork
2026-05-20 0:06 ` ✗ i915.CI.Full: failure " Patchwork
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