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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: mitulkumar.ajitkumar.golani@intel.com,
	ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com
Subject: [PATCH v1 7/8] drm/i915/vrr: Compute CMRR vtotal based on configured scaling level
Date: Tue, 19 May 2026 10:33:21 +0530	[thread overview]
Message-ID: <20260519050322.3677451-8-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20260519050322.3677451-1-mitulkumar.ajitkumar.golani@intel.com>

Compute mode timings based on direct inspection of
crtc_state->vrr.cmrr.level instead of hardcoding it.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 57 +++++++++---------------
 1 file changed, 21 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index e31778367245..975c87c4ffbb 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -22,9 +22,6 @@
 
 #include "linux/debugfs.h"
 
-#define FIXED_POINT_PRECISION		100
-#define CMRR_PRECISION_TOLERANCE	10
-
 /*
  * Tunable parameters for DC Balance correction.
  * These are captured based on experimentations.
@@ -184,42 +181,27 @@ int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state)
 	return intel_vrr_vmax_vtotal(crtc_state) - crtc_state->vrr.guardband;
 }
 
-static bool
-is_cmrr_frac_required(struct intel_crtc_state *crtc_state)
+static unsigned int
+cmrr_get_vtotal(struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
-	int calculated_refresh_k, actual_refresh_k, pixel_clock_per_line;
 	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
-
-	/* Avoid CMRR for now till we have VRR with fixed timings working */
-	if (!HAS_CMRR(display) || true)
-		return false;
-
-	actual_refresh_k =
-		drm_mode_vrefresh(adjusted_mode) * FIXED_POINT_PRECISION;
-	pixel_clock_per_line =
-		adjusted_mode->crtc_clock * 1000 / adjusted_mode->crtc_htotal;
-	calculated_refresh_k =
-		pixel_clock_per_line * FIXED_POINT_PRECISION / adjusted_mode->crtc_vtotal;
-
-	if ((actual_refresh_k - calculated_refresh_k) < CMRR_PRECISION_TOLERANCE)
-		return false;
-
-	return true;
-}
-
-static unsigned int
-cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
-{
-	int multiplier_m = 1, multiplier_n = 1, vtotal, desired_refresh_rate;
 	u64 adjusted_pixel_rate;
-	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
-
-	desired_refresh_rate = drm_mode_vrefresh(adjusted_mode);
+	int multiplier_m = 1, multiplier_n = 1, vtotal;
+	int desired_refresh_rate = drm_mode_vrefresh(adjusted_mode);
 
-	if (video_mode_required) {
+	if (crtc_state->vrr.cmrr.level == CMRR_HIGH) {
 		multiplier_m = 1001;
 		multiplier_n = 1000;
+	} else if (crtc_state->vrr.cmrr.level == CMRR_LOW) {
+		multiplier_m = 1000;
+		multiplier_n = 1001;
+	} else if (crtc_state->vrr.cmrr.level == CMRR_DEFAULT) {
+		multiplier_m = 1000;
+		multiplier_n = 1000;
+	} else {
+		drm_WARN_ON_ONCE(display->drm, 1);
+		return crtc_state->hw.adjusted_mode.crtc_vtotal;
 	}
 
 	crtc_state->vrr.cmrr.cmrr_n = mul_u32_u32(desired_refresh_rate * adjusted_mode->crtc_htotal,
@@ -227,7 +209,8 @@ cmrr_get_vtotal(struct intel_crtc_state *crtc_state, bool video_mode_required)
 	vtotal = DIV_ROUND_UP_ULL(mul_u32_u32(adjusted_mode->crtc_clock * 1000, multiplier_n),
 				  crtc_state->vrr.cmrr.cmrr_n);
 	adjusted_pixel_rate = mul_u32_u32(adjusted_mode->crtc_clock * 1000, multiplier_m);
-	crtc_state->vrr.cmrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->vrr.cmrr.cmrr_n);
+	crtc_state->vrr.cmrr.cmrr_m = do_div(adjusted_pixel_rate,
+					     crtc_state->vrr.cmrr.cmrr_n);
 
 	return vtotal;
 }
@@ -248,9 +231,11 @@ static
 void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state,
 					bool is_edp)
 {
-	if (is_cmrr_frac_required(crtc_state) && is_edp) {
-		/* For CMRR, vmin = vmax = flipline = Dethered Vtotal */
-		crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state, false);
+	struct intel_display *display = to_intel_display(crtc_state);
+
+	if (HAS_CMRR(display) && is_edp) {
+		/* For CMRR, vmin = vmax = flipline = Dithered Vtotal */
+		crtc_state->vrr.vmax = cmrr_get_vtotal(crtc_state);
 	} else {
 		/* For fixed rr,  vmin = vmax = flipline */
 		crtc_state->vrr.vmax = crtc_state->hw.adjusted_mode.crtc_vtotal;
-- 
2.48.1


  parent reply	other threads:[~2026-05-19  5:14 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-19  5:03 [PATCH v1 0/8] Enable CMRR in fixed-RR VRR path Mitul Golani
2026-05-19  5:03 ` [PATCH v1 1/8] drm/i915/display: Move CMRR crtc state into vrr state Mitul Golani
2026-05-19  5:03 ` [PATCH v1 2/8] drm/i915/vrr: Move CMRR register writes to fix refresh rate path Mitul Golani
2026-05-19  5:03 ` [PATCH v1 3/8] drm/i915/display: Introduce CMRR fraction level to vrr crtc state Mitul Golani
2026-06-02 13:10   ` Borah, Chaitanya Kumar
2026-05-19  5:03 ` [PATCH v1 4/8] drm/i915/display: Add state dump for CMRR params Mitul Golani
2026-05-19  5:03 ` [PATCH v1 5/8] i915/display/vrr: Compute CMRR params along with fixed refresh rate params Mitul Golani
2026-05-19  5:03 ` [PATCH v1 6/8] drm/i915/display: Add per-CRTC debugfs interface for CMRR fraction level Mitul Golani
2026-06-02 13:11   ` Borah, Chaitanya Kumar
2026-05-19  5:03 ` Mitul Golani [this message]
2026-05-19  5:03 ` [PATCH v1 8/8] i915/display/vrr: Enable CMRR Mitul Golani
2026-06-02 13:16   ` Borah, Chaitanya Kumar
2026-05-19  6:25 ` ✓ i915.CI.BAT: success for Enable CMRR in fixed-RR VRR path Patchwork
2026-05-20  0:06 ` ✗ i915.CI.Full: failure " Patchwork

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