[v4 0/4] drm/i915/display: Enable AS SDP Skip Frames

[v4 0/4] drm/i915/display: Enable AS SDP Skip Frames

[Uma Shankar]

When Panel Replay is active the transcoder timing generator runs at the
panel's maximum refresh rate, but content is often presented at a lower
rate. In that case the Adaptive-Sync SDP (AS SDP) only needs to reach the
panel often enough to satisfy its maximum frame time, so transmitting it
on every frame is redundant and shows up as repeated SDPs on the link.

Xe3LPD adds a HW skip-frame counter in PR_ALPM_CTL that lets the source
send a single AS SDP and then suppress it for a programmed number of
frames. Program this counter so that one AS SDP is followed by
(max_vrefresh / flip_rate - 1) idle frames, matching the effective
content rate and allowing the link to be driven down to as low as 1Hz
when the hardware supports it.

v4:
 - Fix Sashiko review comments

v3:
 - Add module parameter
 - Fix Skip count clearing issue (Dibin)
 - Add DC3Co checks and enabling conditions

Uma Shankar (4):
  drm/i915/display: Enable periodic AS SDP skip frames
  drm/i915/display: Force disable DC3co when AS SDP skip frames is
    enabled
  drm/i915/display: Reprogram AS SDP skip frames on seamless VRR
    transitions
  drm/i915/display: Gate periodic AS SDP skip frames behind a module
    parameter

 drivers/gpu/drm/i915/display/intel_alpm.c     | 154 ++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_alpm.h     |   3 +
 drivers/gpu/drm/i915/display/intel_display.c  |  18 ++
 .../drm/i915/display/intel_display_params.c   |   6 +
 .../drm/i915/display/intel_display_params.h   |   1 +
 .../drm/i915/display/intel_display_power.c    |   9 +
 drivers/gpu/drm/i915/display/intel_psr_regs.h |   2 +
 7 files changed, 177 insertions(+), 16 deletions(-)

-- 
2.50.1

[v4 1/4] drm/i915/display: Enable periodic AS SDP skip frames

[Uma Shankar]

When Panel Replay is active the transcoder timing generator runs at the
panel's maximum refresh rate. To drive the panel down to its minimum
refresh rate the Adaptive-Sync SDP (AS SDP) only needs to reach the panel
once per minimum-rate frame, so transmitting it on every (maximum-rate)
frame is redundant and shows up as repeated SDPs on the link.

Xe3p_LPD adds a HW skip-frame counter in PR_ALPM_CTL that lets the source
send a single AS SDP and then suppress it for a programmed number of
frames. Program this counter so that one AS SDP is followed by
(max_vrefresh / min_vrefresh - 1) idle frames, i.e. one AS SDP per
slowest panel frame, allowing the link to be driven down to as low as
1Hz when the hardware supports it.

The maximum and minimum refresh rates come from the panel's adaptive-sync
monitor range, so the skip count is a function of the sink's capabilities
and independent of the current content/flip rate. If the panel does not
advertise a usable range the skip counter is left at zero, i.e. the
feature is a no-op and AS SDP continues to be sent on every frame.

Periodic AS SDP drives the panel down to its minimum refresh rate on its
own, so it is only programmed when VRR is not actively driving the
refresh rate.

The skip-frame mechanism relies on the AS SDP still being transmitted
(just less often) while Panel Replay is active, so when a non-zero
skip-frame count is programmed both
PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE and
PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL are left cleared. The previous
behaviour (honouring disable_as_sdp_when_pr_active and the DC3CO idle
protocol) is retained for the non skip-frame case.

v3: Fixed Sashiko review findings

v2: Decoupled CMMRR dependency and using sink refresh rate range for
skip frame claculations. This addresses Dibin's review feedback as well.

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c     | 61 +++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_psr_regs.h |  2 +
 2 files changed, 58 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index f1383764b702..a6838e0fd3aa 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -375,6 +375,35 @@ static u32 get_pr_alpm_as_sdp_transmission_time(const struct intel_crtc_state *c
 	}
 }
 
+/*
+ * Periodic Adaptive-Sync SDP skip frames.
+ *
+ * While Panel Replay is active the transcoder timing generator runs at the
+ * panel's maximum refresh rate. To drive the panel down to its minimum
+ * refresh rate the Adaptive-Sync SDP only needs to reach the panel once per
+ * minimum-rate frame, so transmitting it on every (maximum-rate) frame is
+ * unnecessary and shows up as repeated SDPs on the link. Program the HW skip
+ * counter so that a single AS SDP is followed by
+ * (max_vrefresh / min_vrefresh - 1) idle frames, i.e. one AS SDP per slowest
+ * panel frame.
+ *
+ * The maximum and minimum refresh rates come from the panel's adaptive-sync
+ * monitor range, so this is independent of the current content/flip rate.
+ */
+static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
+{
+	const struct drm_display_info *info =
+		&intel_dp->attached_connector->base.display_info;
+	int max_vrefresh = info->monitor_range.max_vfreq;
+	int min_vrefresh = info->monitor_range.min_vfreq;
+
+	if (min_vrefresh <= 0 || max_vrefresh <= min_vrefresh)
+		return 0;
+
+	return min_t(u32, max_vrefresh / min_vrefresh - 1,
+		     REG_FIELD_MAX(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK));
+}
+
 static void lnl_alpm_configure(struct intel_dp *intel_dp,
 			       const struct intel_crtc_state *crtc_state)
 {
@@ -399,16 +428,38 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 
 		if (intel_dp->as_sdp_supported) {
 			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
+			u32 skip_frames = 0;
+
+			/*
+			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
+			 * periodic AS SDP is a Panel Replay feature that is only
+			 * used when VRR is not actively driving the refresh rate.
+			 */
+			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
+			    !crtc_state->vrr.enable)
+				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
 
 			if (crtc_state->link_off_after_as_sdp_when_pr_active)
 				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
-			if (crtc_state->disable_as_sdp_when_pr_active)
-				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
 
-			if (intel_display_power_dc3co_allowed(display))
-				pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
-			else
+			/*
+			 * Skip frames needs the AS SDP to keep flowing during PR
+			 * active, so it is mutually exclusive with disabling AS SDP
+			 * transmission in active and with the DC3CO idle protocol.
+			 */
+			if (skip_frames) {
+				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
+				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
 				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
+			} else {
+				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
+
+				if (crtc_state->disable_as_sdp_when_pr_active)
+					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
+
+				if (intel_display_power_dc3co_allowed(display))
+					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
+			}
 
 			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
 				       pr_alpm_ctl);
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index 16a9e3af198d..bb577e7e3bbd 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -276,6 +276,8 @@
 #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T1_OR_T2	REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 0)
 #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T1		REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 1)
 #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T2		REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 2)
+#define  PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK			REG_GENMASK(27, 16)
+#define  PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(frames)			REG_FIELD_PREP(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK, (frames))
 
 #define _ALPM_CTL_A	0x60950
 #define ALPM_CTL(dev_priv, tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
-- 
2.50.1

Re: [v4 1/4] drm/i915/display: Enable periodic AS SDP skip frames

[Dibin Moolakadan Subrahmanian]

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> When Panel Replay is active the transcoder timing generator runs at the
> panel's maximum refresh rate. To drive the panel down to its minimum
> refresh rate the Adaptive-Sync SDP (AS SDP) only needs to reach the panel
> once per minimum-rate frame, so transmitting it on every (maximum-rate)
> frame is redundant and shows up as repeated SDPs on the link.
>
> Xe3p_LPD adds a HW skip-frame counter in PR_ALPM_CTL that lets the source
> send a single AS SDP and then suppress it for a programmed number of
> frames. Program this counter so that one AS SDP is followed by
> (max_vrefresh / min_vrefresh - 1) idle frames, i.e. one AS SDP per
> slowest panel frame, allowing the link to be driven down to as low as
> 1Hz when the hardware supports it.
>
> The maximum and minimum refresh rates come from the panel's adaptive-sync
> monitor range, so the skip count is a function of the sink's capabilities
> and independent of the current content/flip rate. If the panel does not
> advertise a usable range the skip counter is left at zero, i.e. the
> feature is a no-op and AS SDP continues to be sent on every frame.
>
> Periodic AS SDP drives the panel down to its minimum refresh rate on its
> own, so it is only programmed when VRR is not actively driving the
> refresh rate.
>
> The skip-frame mechanism relies on the AS SDP still being transmitted
> (just less often) while Panel Replay is active, so when a non-zero
> skip-frame count is programmed both
> PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE and
> PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL are left cleared. The previous
> behaviour (honouring disable_as_sdp_when_pr_active and the DC3CO idle
> protocol) is retained for the non skip-frame case.
>
> v3: Fixed Sashiko review findings
>
> v2: Decoupled CMMRR dependency and using sink refresh rate range for
> skip frame claculations. This addresses Dibin's review feedback as well.
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c     | 61 +++++++++++++++++--
>   drivers/gpu/drm/i915/display/intel_psr_regs.h |  2 +
>   2 files changed, 58 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index f1383764b702..a6838e0fd3aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -375,6 +375,35 @@ static u32 get_pr_alpm_as_sdp_transmission_time(const struct intel_crtc_state *c
>   	}
>   }
>   
> +/*
> + * Periodic Adaptive-Sync SDP skip frames.
> + *
> + * While Panel Replay is active the transcoder timing generator runs at the
> + * panel's maximum refresh rate. To drive the panel down to its minimum
> + * refresh rate the Adaptive-Sync SDP only needs to reach the panel once per
> + * minimum-rate frame, so transmitting it on every (maximum-rate) frame is
> + * unnecessary and shows up as repeated SDPs on the link. Program the HW skip
> + * counter so that a single AS SDP is followed by
> + * (max_vrefresh / min_vrefresh - 1) idle frames, i.e. one AS SDP per slowest
> + * panel frame.
> + *
> + * The maximum and minimum refresh rates come from the panel's adaptive-sync
> + * monitor range, so this is independent of the current content/flip rate.
> + */
> +static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
> +{
> +	const struct drm_display_info *info =
> +		&intel_dp->attached_connector->base.display_info;
> +	int max_vrefresh = info->monitor_range.max_vfreq;
> +	int min_vrefresh = info->monitor_range.min_vfreq;
> +
> +	if (min_vrefresh <= 0 || max_vrefresh <= min_vrefresh)
> +		return 0;
> +
> +	return min_t(u32, max_vrefresh / min_vrefresh - 1,
> +		     REG_FIELD_MAX(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK));
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> @@ -399,16 +428,38 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   
>   		if (intel_dp->as_sdp_supported) {
>   			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> +			u32 skip_frames = 0;
> +
> +			/*
> +			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
> +			 * periodic AS SDP is a Panel Replay feature that is only
> +			 * used when VRR is not actively driving the refresh rate.
> +			 */
> +			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
> +			    !crtc_state->vrr.enable)
> +				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
>   
>   			if (crtc_state->link_off_after_as_sdp_when_pr_active)
>   				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> -			if (crtc_state->disable_as_sdp_when_pr_active)
> -				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
>   
> -			if (intel_display_power_dc3co_allowed(display))
> -				pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			else
> +			/*
> +			 * Skip frames needs the AS SDP to keep flowing during PR
> +			 * active, so it is mutually exclusive with disabling AS SDP
> +			 * transmission in active and with the DC3CO idle protocol.
> +			 */
> +			if (skip_frames) {
> +				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> +				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
>   				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +			} else {
> +				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> +
> +				if (crtc_state->disable_as_sdp_when_pr_active)
> +					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +
> +				if (intel_display_power_dc3co_allowed(display))
> +					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +			}
>   
>   			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
>   				       pr_alpm_ctl);
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 16a9e3af198d..bb577e7e3bbd 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -276,6 +276,8 @@
>   #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T1_OR_T2	REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 0)
>   #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T1		REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 1)
>   #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T2		REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 2)
> +#define  PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK			REG_GENMASK(27, 16)
> +#define  PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(frames)			REG_FIELD_PREP(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK, (frames))
>   
>   #define _ALPM_CTL_A	0x60950
>   #define ALPM_CTL(dev_priv, tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)

LGTM.
Reviewed-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>

Re: [v4 1/4] drm/i915/display: Enable periodic AS SDP skip frames

[Naladala, Ramanaidu]

Hi Uma,

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> When Panel Replay is active the transcoder timing generator runs at the
> panel's maximum refresh rate. To drive the panel down to its minimum
> refresh rate the Adaptive-Sync SDP (AS SDP) only needs to reach the panel
> once per minimum-rate frame, so transmitting it on every (maximum-rate)
> frame is redundant and shows up as repeated SDPs on the link.
>
> Xe3p_LPD adds a HW skip-frame counter in PR_ALPM_CTL that lets the source
> send a single AS SDP and then suppress it for a programmed number of
> frames. Program this counter so that one AS SDP is followed by
> (max_vrefresh / min_vrefresh - 1) idle frames, i.e. one AS SDP per
> slowest panel frame, allowing the link to be driven down to as low as
> 1Hz when the hardware supports it.
>
> The maximum and minimum refresh rates come from the panel's adaptive-sync
> monitor range, so the skip count is a function of the sink's capabilities
> and independent of the current content/flip rate. If the panel does not
> advertise a usable range the skip counter is left at zero, i.e. the
> feature is a no-op and AS SDP continues to be sent on every frame.
>
> Periodic AS SDP drives the panel down to its minimum refresh rate on its
> own, so it is only programmed when VRR is not actively driving the
> refresh rate.
>
> The skip-frame mechanism relies on the AS SDP still being transmitted
> (just less often) while Panel Replay is active, so when a non-zero
> skip-frame count is programmed both
> PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE and
> PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL are left cleared. The previous
> behaviour (honouring disable_as_sdp_when_pr_active and the DC3CO idle
> protocol) is retained for the non skip-frame case.
>
> v3: Fixed Sashiko review findings
>
> v2: Decoupled CMMRR dependency and using sink refresh rate range for
> skip frame claculations. This addresses Dibin's review feedback as well.
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c     | 61 +++++++++++++++++--
>   drivers/gpu/drm/i915/display/intel_psr_regs.h |  2 +
>   2 files changed, 58 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index f1383764b702..a6838e0fd3aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -375,6 +375,35 @@ static u32 get_pr_alpm_as_sdp_transmission_time(const struct intel_crtc_state *c
>   	}
>   }
>   
> +/*
> + * Periodic Adaptive-Sync SDP skip frames.
> + *
> + * While Panel Replay is active the transcoder timing generator runs at the
> + * panel's maximum refresh rate. To drive the panel down to its minimum
> + * refresh rate the Adaptive-Sync SDP only needs to reach the panel once per
> + * minimum-rate frame, so transmitting it on every (maximum-rate) frame is
> + * unnecessary and shows up as repeated SDPs on the link. Program the HW skip
> + * counter so that a single AS SDP is followed by
> + * (max_vrefresh / min_vrefresh - 1) idle frames, i.e. one AS SDP per slowest
> + * panel frame.
> + *
> + * The maximum and minimum refresh rates come from the panel's adaptive-sync
> + * monitor range, so this is independent of the current content/flip rate.
> + */
> +static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
> +{
> +	const struct drm_display_info *info =
> +		&intel_dp->attached_connector->base.display_info;
> +	int max_vrefresh = info->monitor_range.max_vfreq;
> +	int min_vrefresh = info->monitor_range.min_vfreq;
> +
> +	if (min_vrefresh <= 0 || max_vrefresh <= min_vrefresh)
> +		return 0;
> +
> +	return min_t(u32, max_vrefresh / min_vrefresh - 1,
> +		     REG_FIELD_MAX(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK));
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> @@ -399,16 +428,38 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   
>   		if (intel_dp->as_sdp_supported) {
>   			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> +			u32 skip_frames = 0;
> +
> +			/*
> +			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
> +			 * periodic AS SDP is a Panel Replay feature that is only
> +			 * used when VRR is not actively driving the refresh rate.
> +			 */
> +			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
> +			    !crtc_state->vrr.enable)
> +				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
>   
>   			if (crtc_state->link_off_after_as_sdp_when_pr_active)
>   				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> -			if (crtc_state->disable_as_sdp_when_pr_active)
> -				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
>   
> -			if (intel_display_power_dc3co_allowed(display))
> -				pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			else
> +			/*
> +			 * Skip frames needs the AS SDP to keep flowing during PR
> +			 * active, so it is mutually exclusive with disabling AS SDP
> +			 * transmission in active and with the DC3CO idle protocol.
> +			 */
> +			if (skip_frames) {
> +				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> +				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
>   				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +			} else {
> +				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> +
> +				if (crtc_state->disable_as_sdp_when_pr_active)
> +					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +
> +				if (intel_display_power_dc3co_allowed(display))
> +					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +			}
>   
>   			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
>   				       pr_alpm_ctl);
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index 16a9e3af198d..bb577e7e3bbd 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -276,6 +276,8 @@
>   #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T1_OR_T2	REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 0)
>   #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T1		REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 1)
>   #define  PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_T2		REG_FIELD_PREP(PR_ALPM_CTL_ADAPTIVE_SYNC_SDP_POSITION_MASK, 2)
> +#define  PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK			REG_GENMASK(27, 16)
> +#define  PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(frames)			REG_FIELD_PREP(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK, (frames))
>   
>   #define _ALPM_CTL_A	0x60950
>   #define ALPM_CTL(dev_priv, tran)	_MMIO_TRANS2(dev_priv, tran, _ALPM_CTL_A)
Tested-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com>

[v4 2/4] drm/i915/display: Force disable DC3co when AS SDP skip frames is enabled

[Uma Shankar]

Periodic AS SDP (skip frames) relies on the AS SDP still being
transmitted while Panel Replay is active. DC3co uses the idle protocol
which suppresses AS SDP transmission entirely, so the two are mutually
exclusive: leaving DC3co enabled while skip frames is programmed breaks
the periodic AS SDP and the panel never sees the slower refresh.

Add intel_alpm_pr_as_sdp_skip_frames_enabled() as the single predicate
for "skip frames will be programmed" (mirroring the gating in
lnl_alpm_configure(), including that it only applies when VRR is not
active) and use it in intel_display_power_dc3co_compute() to force the
DC3co trigger to NONE. This drops the pipe onto the
DC_STATE_EN_UPTO_DC6 target instead of DC3co whenever skip frames is
active, without touching the DC state module parameter or the allowed
DC mask, and only for the skip-frame case.

v2: Fixed Sashiko review findings

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c     | 23 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_alpm.h     |  2 ++
 .../drm/i915/display/intel_display_power.c    |  9 ++++++++
 3 files changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index a6838e0fd3aa..0a33a89975bc 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -404,6 +404,29 @@ static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
 		     REG_FIELD_MAX(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK));
 }
 
+/*
+ * Whether periodic AS SDP transmission (AS SDP skip frames) will be programmed
+ * for this Panel Replay config. The skip counter needs the AS SDP to keep
+ * flowing during PR active, which is incompatible with DC3co, so this is used
+ * to keep DC3co disabled while skip frames is enabled.
+ */
+bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
+					      const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+
+	/*
+	 * The AS SDP skip frames field only exists on Xe3p_LPD+. Periodic AS SDP
+	 * drives the panel down to its minimum refresh rate on its own, so it is
+	 * only used when VRR is not actively driving the refresh rate.
+	 */
+	if (DISPLAY_VER(display) < 35 || !intel_dp->as_sdp_supported ||
+	    !crtc_state->has_panel_replay || crtc_state->vrr.enable)
+		return false;
+
+	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
+}
+
 static void lnl_alpm_configure(struct intel_dp *intel_dp,
 			       const struct intel_crtc_state *crtc_state)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index 1cf70668ab1b..328920027f1c 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -34,6 +34,8 @@ bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
 bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
 bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
 				 const struct intel_crtc_state *crtc_state);
+bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
+					      const struct intel_crtc_state *crtc_state);
 void intel_alpm_disable(struct intel_dp *intel_dp);
 bool intel_alpm_get_error(struct intel_dp *intel_dp);
 void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 0ebec6e0c240..1b60ce2dd00c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -10,6 +10,7 @@
 #include <drm/intel/intel_pcode_regs.h>
 #include <drm/intel/step.h>
 
+#include "intel_alpm.h"
 #include "intel_backlight_regs.h"
 #include "intel_cdclk.h"
 #include "intel_clock_gating.h"
@@ -488,6 +489,14 @@ void intel_display_power_dc3co_compute(struct intel_atomic_state *state)
 	if (crtc_state->has_sel_update)
 		trigger |= DC3CO_TRIGGER_PSR2;
 
+	/*
+	 * Periodic AS SDP (skip frames) needs the AS SDP to keep flowing during
+	 * PR active, which is incompatible with DC3co. Keep DC3co disabled while
+	 * skip frames is enabled.
+	 */
+	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
+		trigger = DC3CO_TRIGGER_NONE;
+
 done:
 	intel_display_power_dc3co_update(display, trigger);
 }
-- 
2.50.1

Re: [v4 2/4] drm/i915/display: Force disable DC3co when AS SDP skip frames is enabled

[Dibin Moolakadan Subrahmanian]

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> Periodic AS SDP (skip frames) relies on the AS SDP still being
> transmitted while Panel Replay is active. DC3co uses the idle protocol
> which suppresses AS SDP transmission entirely, so the two are mutually
> exclusive: leaving DC3co enabled while skip frames is programmed breaks
> the periodic AS SDP and the panel never sees the slower refresh.
>
> Add intel_alpm_pr_as_sdp_skip_frames_enabled() as the single predicate
> for "skip frames will be programmed" (mirroring the gating in
> lnl_alpm_configure(), including that it only applies when VRR is not
> active) and use it in intel_display_power_dc3co_compute() to force the
> DC3co trigger to NONE. This drops the pipe onto the
> DC_STATE_EN_UPTO_DC6 target instead of DC3co whenever skip frames is
> active, without touching the DC state module parameter or the allowed
> DC mask, and only for the skip-frame case.
>
> v2: Fixed Sashiko review findings
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c     | 23 +++++++++++++++++++
>   drivers/gpu/drm/i915/display/intel_alpm.h     |  2 ++
>   .../drm/i915/display/intel_display_power.c    |  9 ++++++++
>   3 files changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index a6838e0fd3aa..0a33a89975bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -404,6 +404,29 @@ static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
>   		     REG_FIELD_MAX(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK));
>   }
>   
> +/*
> + * Whether periodic AS SDP transmission (AS SDP skip frames) will be programmed
> + * for this Panel Replay config. The skip counter needs the AS SDP to keep
> + * flowing during PR active, which is incompatible with DC3co, so this is used
> + * to keep DC3co disabled while skip frames is enabled.
> + */
> +bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
> +					      const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +
> +	/*
> +	 * The AS SDP skip frames field only exists on Xe3p_LPD+. Periodic AS SDP
> +	 * drives the panel down to its minimum refresh rate on its own, so it is
> +	 * only used when VRR is not actively driving the refresh rate.
> +	 */
> +	if (DISPLAY_VER(display) < 35 || !intel_dp->as_sdp_supported ||
> +	    !crtc_state->has_panel_replay || crtc_state->vrr.enable)
> +		return false;
> +
> +	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 1cf70668ab1b..328920027f1c 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -34,6 +34,8 @@ bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
>   bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
>   bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
>   				 const struct intel_crtc_state *crtc_state);
> +bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
> +					      const struct intel_crtc_state *crtc_state);
>   void intel_alpm_disable(struct intel_dp *intel_dp);
>   bool intel_alpm_get_error(struct intel_dp *intel_dp);
>   void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 0ebec6e0c240..1b60ce2dd00c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -10,6 +10,7 @@
>   #include <drm/intel/intel_pcode_regs.h>
>   #include <drm/intel/step.h>
>   
> +#include "intel_alpm.h"
>   #include "intel_backlight_regs.h"
>   #include "intel_cdclk.h"
>   #include "intel_clock_gating.h"
> @@ -488,6 +489,14 @@ void intel_display_power_dc3co_compute(struct intel_atomic_state *state)
>   	if (crtc_state->has_sel_update)
>   		trigger |= DC3CO_TRIGGER_PSR2;
>   
> +	/*
> +	 * Periodic AS SDP (skip frames) needs the AS SDP to keep flowing during
> +	 * PR active, which is incompatible with DC3co. Keep DC3co disabled while
> +	 * skip frames is enabled.
> +	 */
> +	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
> +		trigger = DC3CO_TRIGGER_NONE;

I think this condition can be moved inside the for loop,
where we already have similar checks:
if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
     goto done;
This aligns with the existing checks for DC3CO entry.

Other than this, LGTM.
Reviewed-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>

> +
>   done:
>   	intel_display_power_dc3co_update(display, trigger);
>   }

Re: [v4 2/4] drm/i915/display: Force disable DC3co when AS SDP skip frames is enabled

[Naladala, Ramanaidu]

Hi Uma,

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> Periodic AS SDP (skip frames) relies on the AS SDP still being
> transmitted while Panel Replay is active. DC3co uses the idle protocol
> which suppresses AS SDP transmission entirely, so the two are mutually
> exclusive: leaving DC3co enabled while skip frames is programmed breaks
> the periodic AS SDP and the panel never sees the slower refresh.
>
> Add intel_alpm_pr_as_sdp_skip_frames_enabled() as the single predicate
> for "skip frames will be programmed" (mirroring the gating in
> lnl_alpm_configure(), including that it only applies when VRR is not
> active) and use it in intel_display_power_dc3co_compute() to force the
> DC3co trigger to NONE. This drops the pipe onto the
> DC_STATE_EN_UPTO_DC6 target instead of DC3co whenever skip frames is
> active, without touching the DC state module parameter or the allowed
> DC mask, and only for the skip-frame case.
>
> v2: Fixed Sashiko review findings
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c     | 23 +++++++++++++++++++
>   drivers/gpu/drm/i915/display/intel_alpm.h     |  2 ++
>   .../drm/i915/display/intel_display_power.c    |  9 ++++++++
>   3 files changed, 34 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index a6838e0fd3aa..0a33a89975bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -404,6 +404,29 @@ static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
>   		     REG_FIELD_MAX(PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK));
>   }
>   
> +/*
> + * Whether periodic AS SDP transmission (AS SDP skip frames) will be programmed
> + * for this Panel Replay config. The skip counter needs the AS SDP to keep
> + * flowing during PR active, which is incompatible with DC3co, so this is used
> + * to keep DC3co disabled while skip frames is enabled.
> + */
> +bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
> +					      const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +
> +	/*
> +	 * The AS SDP skip frames field only exists on Xe3p_LPD+. Periodic AS SDP
> +	 * drives the panel down to its minimum refresh rate on its own, so it is
> +	 * only used when VRR is not actively driving the refresh rate.
> +	 */
> +	if (DISPLAY_VER(display) < 35 || !intel_dp->as_sdp_supported ||
> +	    !crtc_state->has_panel_replay || crtc_state->vrr.enable)
> +		return false;
> +
> +	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 1cf70668ab1b..328920027f1c 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -34,6 +34,8 @@ bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp);
>   bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp);
>   bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
>   				 const struct intel_crtc_state *crtc_state);
> +bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
> +					      const struct intel_crtc_state *crtc_state);
>   void intel_alpm_disable(struct intel_dp *intel_dp);
>   bool intel_alpm_get_error(struct intel_dp *intel_dp);
>   void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 0ebec6e0c240..1b60ce2dd00c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -10,6 +10,7 @@
>   #include <drm/intel/intel_pcode_regs.h>
>   #include <drm/intel/step.h>
>   
> +#include "intel_alpm.h"
>   #include "intel_backlight_regs.h"
>   #include "intel_cdclk.h"
>   #include "intel_clock_gating.h"
> @@ -488,6 +489,14 @@ void intel_display_power_dc3co_compute(struct intel_atomic_state *state)
>   	if (crtc_state->has_sel_update)
>   		trigger |= DC3CO_TRIGGER_PSR2;
>   
> +	/*
> +	 * Periodic AS SDP (skip frames) needs the AS SDP to keep flowing during
> +	 * PR active, which is incompatible with DC3co. Keep DC3co disabled while
> +	 * skip frames is enabled.
> +	 */
> +	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
> +		trigger = DC3CO_TRIGGER_NONE;
> +
>   done:
>   	intel_display_power_dc3co_update(display, trigger);
>   }
Verified locally not seen any issue.
Tested-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com>

[v4 3/4] drm/i915/display: Reprogram AS SDP skip frames on seamless VRR transitions

[Uma Shankar]

The AS SDP skip-frame count is written to PR_ALPM_CTL only from
lnl_alpm_configure(), which runs from intel_psr_enable_locked() on a
Panel Replay disabled->enabled transition. VRR, however, can be enabled
and disabled seamlessly - without a modeset and without cycling Panel
Replay (intel_crtc_vrr_enabling()/disabling() in the pipe update path).

As a result, when a panel comes up with VRR off the non-zero skip count
is programmed, and when VRR is later turned on seamlessly PR stays
enabled, lnl_alpm_configure() is not re-invoked, and the stale skip
count is left in the register. This also leaves the coupled AS SDP
transmission / DC3CO idle-protocol bits inconsistent with the DC3co
state, which is recomputed on every commit.

Factor the PR_ALPM_CTL AS SDP programming out of lnl_alpm_configure()
into intel_alpm_configure_pr_as_sdp() and expose
intel_alpm_pr_as_sdp_update(), which recomputes those fields for the
current VRR state. Call it from the seamless VRR enable and disable
sites (non-modeset only; a modeset re-runs PR enable anyway) so the skip
counter always matches whether VRR is actively driving the refresh rate.

v2: Fixed Sashiko review comments

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c    | 119 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_alpm.h    |   1 +
 drivers/gpu/drm/i915/display/intel_display.c |  18 +++
 3 files changed, 100 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 0a33a89975bc..c784e77f610b 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -427,6 +427,85 @@ bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
 	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
 }
 
+/*
+ * Program the AS SDP portion of PR_ALPM_CTL: the transmission position, the
+ * skip-frame counter and the coupled AS SDP transmission / DC3CO idle-protocol
+ * bits. This is a full recompute of those fields (the base value is built from
+ * scratch, not read back), so it can be called both at PR enable time and when
+ * VRR is toggled seamlessly - which changes whether periodic AS SDP is used.
+ *
+ * Caller must hold intel_dp->alpm.lock.
+ */
+static void intel_alpm_configure_pr_as_sdp(struct intel_dp *intel_dp,
+					   const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
+	u32 skip_frames = 0;
+
+	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
+		skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
+
+	if (crtc_state->link_off_after_as_sdp_when_pr_active)
+		pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
+
+	/*
+	 * Skip frames needs the AS SDP to keep flowing during PR active, so it
+	 * is mutually exclusive with disabling AS SDP transmission in active and
+	 * with the DC3CO idle protocol.
+	 */
+	if (skip_frames) {
+		pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
+		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
+		pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
+	} else {
+		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
+
+		if (crtc_state->disable_as_sdp_when_pr_active)
+			pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
+
+		if (intel_display_power_dc3co_allowed(display))
+			pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
+	}
+
+	intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder), pr_alpm_ctl);
+}
+
+/*
+ * VRR can be enabled or disabled seamlessly, i.e. without a modeset and without
+ * cycling Panel Replay, so the AS SDP skip-frame programming done at PR enable
+ * time would otherwise go stale across a VRR toggle. Reprogram it here so the
+ * skip counter (and the coupled bits) matches the new VRR state.
+ */
+void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	struct intel_encoder *encoder;
+
+	/* AS SDP skip frames field only exists on Xe3p_LPD+ */
+	if (DISPLAY_VER(display) < 35)
+		return;
+
+	for_each_intel_encoder_mask(display->drm, encoder,
+				    crtc_state->uapi.encoder_mask) {
+		struct intel_dp *intel_dp;
+
+		if (!intel_encoder_is_dp(encoder))
+			continue;
+
+		intel_dp = enc_to_intel_dp(encoder);
+
+		if (!intel_dp->as_sdp_supported ||
+		    !intel_alpm_is_alpm_aux_less(intel_dp, crtc_state))
+			continue;
+
+		mutex_lock(&intel_dp->alpm.lock);
+		intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
+		mutex_unlock(&intel_dp->alpm.lock);
+	}
+}
+
 static void lnl_alpm_configure(struct intel_dp *intel_dp,
 			       const struct intel_crtc_state *crtc_state)
 {
@@ -449,44 +528,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
 			ALPM_CTL_AUX_LESS_WAKE_TIME(crtc_state->alpm_state.aux_less_wake_lines);
 
-		if (intel_dp->as_sdp_supported) {
-			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
-			u32 skip_frames = 0;
-
-			/*
-			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
-			 * periodic AS SDP is a Panel Replay feature that is only
-			 * used when VRR is not actively driving the refresh rate.
-			 */
-			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
-			    !crtc_state->vrr.enable)
-				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
-
-			if (crtc_state->link_off_after_as_sdp_when_pr_active)
-				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
-
-			/*
-			 * Skip frames needs the AS SDP to keep flowing during PR
-			 * active, so it is mutually exclusive with disabling AS SDP
-			 * transmission in active and with the DC3CO idle protocol.
-			 */
-			if (skip_frames) {
-				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
-				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
-				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
-			} else {
-				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
-
-				if (crtc_state->disable_as_sdp_when_pr_active)
-					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
-
-				if (intel_display_power_dc3co_allowed(display))
-					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
-			}
-
-			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
-				       pr_alpm_ctl);
-		}
+		if (intel_dp->as_sdp_supported)
+			intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
 
 	} else {
 		alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index 328920027f1c..f8f605d94f96 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -36,6 +36,7 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
 				 const struct intel_crtc_state *crtc_state);
 bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
 					      const struct intel_crtc_state *crtc_state);
+void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state);
 void intel_alpm_disable(struct intel_dp *intel_dp);
 bool intel_alpm_get_error(struct intel_dp *intel_dp);
 void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index fc30a455bed3..9151ea6c15ab 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1232,6 +1232,14 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
 		intel_vrr_disable(old_crtc_state);
 		intel_vrr_dcb_reset(old_crtc_state, crtc);
 		intel_crtc_update_active_timings(old_crtc_state, false);
+
+		/*
+		 * VRR is being disabled seamlessly (no modeset, Panel Replay
+		 * stays enabled), so re-apply the AS SDP skip-frame programming
+		 * for the new (VRR off) state.
+		 */
+		if (!intel_crtc_needs_modeset(new_crtc_state))
+			intel_alpm_pr_as_sdp_update(new_crtc_state);
 	}
 
 	if (audio_disabling(old_crtc_state, new_crtc_state))
@@ -6971,6 +6979,16 @@ static void intel_update_crtc(struct intel_atomic_state *state,
 		intel_crtc_update_active_timings(new_crtc_state,
 						 new_crtc_state->vrr.enable);
 
+	/*
+	 * VRR is being enabled seamlessly (no modeset, Panel Replay stays
+	 * enabled), so re-apply the AS SDP skip-frame programming for the new
+	 * (VRR on) state. Done here, outside the vblank-evasion critical section
+	 * (which runs with interrupts disabled), because it takes alpm.lock.
+	 */
+	if (intel_crtc_vrr_enabling(state, crtc) &&
+	    !intel_crtc_needs_modeset(new_crtc_state))
+		intel_alpm_pr_as_sdp_update(new_crtc_state);
+
 	if (new_crtc_state->vrr.dc_balance.enable)
 		intel_vrr_dcb_increment_flip_count(new_crtc_state, crtc);
 
-- 
2.50.1

Re: [v4 3/4] drm/i915/display: Reprogram AS SDP skip frames on seamless VRR transitions

[Dibin Moolakadan Subrahmanian]

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> The AS SDP skip-frame count is written to PR_ALPM_CTL only from
> lnl_alpm_configure(), which runs from intel_psr_enable_locked() on a
> Panel Replay disabled->enabled transition. VRR, however, can be enabled
> and disabled seamlessly - without a modeset and without cycling Panel
> Replay (intel_crtc_vrr_enabling()/disabling() in the pipe update path).
>
> As a result, when a panel comes up with VRR off the non-zero skip count
> is programmed, and when VRR is later turned on seamlessly PR stays
> enabled, lnl_alpm_configure() is not re-invoked, and the stale skip
> count is left in the register. This also leaves the coupled AS SDP
> transmission / DC3CO idle-protocol bits inconsistent with the DC3co
> state, which is recomputed on every commit.
>
> Factor the PR_ALPM_CTL AS SDP programming out of lnl_alpm_configure()
> into intel_alpm_configure_pr_as_sdp() and expose
> intel_alpm_pr_as_sdp_update(), which recomputes those fields for the
> current VRR state. Call it from the seamless VRR enable and disable
> sites (non-modeset only; a modeset re-runs PR enable anyway) so the skip
> counter always matches whether VRR is actively driving the refresh rate.
>
> v2: Fixed Sashiko review comments
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c    | 119 +++++++++++++------
>   drivers/gpu/drm/i915/display/intel_alpm.h    |   1 +
>   drivers/gpu/drm/i915/display/intel_display.c |  18 +++
>   3 files changed, 100 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 0a33a89975bc..c784e77f610b 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -427,6 +427,85 @@ bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
>   	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
>   }
>   
> +/*
> + * Program the AS SDP portion of PR_ALPM_CTL: the transmission position, the
> + * skip-frame counter and the coupled AS SDP transmission / DC3CO idle-protocol
> + * bits. This is a full recompute of those fields (the base value is built from
> + * scratch, not read back), so it can be called both at PR enable time and when
> + * VRR is toggled seamlessly - which changes whether periodic AS SDP is used.
> + *
> + * Caller must hold intel_dp->alpm.lock.
> + */
> +static void intel_alpm_configure_pr_as_sdp(struct intel_dp *intel_dp,
> +					   const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> +	u32 skip_frames = 0;
> +
> +	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
> +		skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
> +
> +	if (crtc_state->link_off_after_as_sdp_when_pr_active)
> +		pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> +
> +	/*
> +	 * Skip frames needs the AS SDP to keep flowing during PR active, so it
> +	 * is mutually exclusive with disabling AS SDP transmission in active and
> +	 * with the DC3CO idle protocol.
> +	 */
> +	if (skip_frames) {
> +		pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +	} else {
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> +
> +		if (crtc_state->disable_as_sdp_when_pr_active)
> +			pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +
> +		if (intel_display_power_dc3co_allowed(display))
> +			pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +	}
> +
> +	intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder), pr_alpm_ctl);
> +}
> +
> +/*
> + * VRR can be enabled or disabled seamlessly, i.e. without a modeset and without
> + * cycling Panel Replay, so the AS SDP skip-frame programming done at PR enable
> + * time would otherwise go stale across a VRR toggle. Reprogram it here so the
> + * skip counter (and the coupled bits) matches the new VRR state.
> + */
> +void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	struct intel_encoder *encoder;
> +
> +	/* AS SDP skip frames field only exists on Xe3p_LPD+ */
> +	if (DISPLAY_VER(display) < 35)
> +		return;
> +
> +	for_each_intel_encoder_mask(display->drm, encoder,
> +				    crtc_state->uapi.encoder_mask) {
> +		struct intel_dp *intel_dp;
> +
> +		if (!intel_encoder_is_dp(encoder))
> +			continue;
> +
> +		intel_dp = enc_to_intel_dp(encoder);
> +
> +		if (!intel_dp->as_sdp_supported ||
> +		    !intel_alpm_is_alpm_aux_less(intel_dp, crtc_state))
> +			continue;
> +
> +		mutex_lock(&intel_dp->alpm.lock);
> +		intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
> +		mutex_unlock(&intel_dp->alpm.lock);
> +	}
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> @@ -449,44 +528,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
>   			ALPM_CTL_AUX_LESS_WAKE_TIME(crtc_state->alpm_state.aux_less_wake_lines);
>   
> -		if (intel_dp->as_sdp_supported) {
> -			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> -			u32 skip_frames = 0;
> -
> -			/*
> -			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
> -			 * periodic AS SDP is a Panel Replay feature that is only
> -			 * used when VRR is not actively driving the refresh rate.
> -			 */
> -			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
> -			    !crtc_state->vrr.enable)
> -				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
> -
> -			if (crtc_state->link_off_after_as_sdp_when_pr_active)
> -				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> -
> -			/*
> -			 * Skip frames needs the AS SDP to keep flowing during PR
> -			 * active, so it is mutually exclusive with disabling AS SDP
> -			 * transmission in active and with the DC3CO idle protocol.
> -			 */
> -			if (skip_frames) {
> -				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			} else {
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> -
> -				if (crtc_state->disable_as_sdp_when_pr_active)
> -					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> -
> -				if (intel_display_power_dc3co_allowed(display))
> -					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			}
> -
> -			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
> -				       pr_alpm_ctl);
> -		}
> +		if (intel_dp->as_sdp_supported)
> +			intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
>   
>   	} else {
>   		alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 328920027f1c..f8f605d94f96 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -36,6 +36,7 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
>   				 const struct intel_crtc_state *crtc_state);
>   bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
>   					      const struct intel_crtc_state *crtc_state);
> +void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state);
>   void intel_alpm_disable(struct intel_dp *intel_dp);
>   bool intel_alpm_get_error(struct intel_dp *intel_dp);
>   void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index fc30a455bed3..9151ea6c15ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1232,6 +1232,14 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
>   		intel_vrr_disable(old_crtc_state);
>   		intel_vrr_dcb_reset(old_crtc_state, crtc);
>   		intel_crtc_update_active_timings(old_crtc_state, false);
> +
> +		/*
> +		 * VRR is being disabled seamlessly (no modeset, Panel Replay
> +		 * stays enabled), so re-apply the AS SDP skip-frame programming
> +		 * for the new (VRR off) state.
> +		 */
> +		if (!intel_crtc_needs_modeset(new_crtc_state))
> +			intel_alpm_pr_as_sdp_update(new_crtc_state);
>   	}
>   
>   	if (audio_disabling(old_crtc_state, new_crtc_state))
> @@ -6971,6 +6979,16 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>   		intel_crtc_update_active_timings(new_crtc_state,
>   						 new_crtc_state->vrr.enable);
>   
> +	/*
> +	 * VRR is being enabled seamlessly (no modeset, Panel Replay stays
> +	 * enabled), so re-apply the AS SDP skip-frame programming for the new
> +	 * (VRR on) state. Done here, outside the vblank-evasion critical section
> +	 * (which runs with interrupts disabled), because it takes alpm.lock.
> +	 */
> +	if (intel_crtc_vrr_enabling(state, crtc) &&
> +	    !intel_crtc_needs_modeset(new_crtc_state))
> +		intel_alpm_pr_as_sdp_update(new_crtc_state);
> +
>   	if (new_crtc_state->vrr.dc_balance.enable)
>   		intel_vrr_dcb_increment_flip_count(new_crtc_state, crtc);
>   

LGTM.
Reviewed-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>

Re: [v4 3/4] drm/i915/display: Reprogram AS SDP skip frames on seamless VRR transitions

[Naladala, Ramanaidu]

Hi Uma,

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> The AS SDP skip-frame count is written to PR_ALPM_CTL only from
> lnl_alpm_configure(), which runs from intel_psr_enable_locked() on a
> Panel Replay disabled->enabled transition. VRR, however, can be enabled
> and disabled seamlessly - without a modeset and without cycling Panel
> Replay (intel_crtc_vrr_enabling()/disabling() in the pipe update path).
>
> As a result, when a panel comes up with VRR off the non-zero skip count
> is programmed, and when VRR is later turned on seamlessly PR stays
> enabled, lnl_alpm_configure() is not re-invoked, and the stale skip
> count is left in the register. This also leaves the coupled AS SDP
> transmission / DC3CO idle-protocol bits inconsistent with the DC3co
> state, which is recomputed on every commit.
>
> Factor the PR_ALPM_CTL AS SDP programming out of lnl_alpm_configure()
> into intel_alpm_configure_pr_as_sdp() and expose
> intel_alpm_pr_as_sdp_update(), which recomputes those fields for the
> current VRR state. Call it from the seamless VRR enable and disable
> sites (non-modeset only; a modeset re-runs PR enable anyway) so the skip
> counter always matches whether VRR is actively driving the refresh rate.
>
> v2: Fixed Sashiko review comments
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c    | 119 +++++++++++++------
>   drivers/gpu/drm/i915/display/intel_alpm.h    |   1 +
>   drivers/gpu/drm/i915/display/intel_display.c |  18 +++
>   3 files changed, 100 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 0a33a89975bc..c784e77f610b 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -427,6 +427,85 @@ bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
>   	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
>   }
>   
> +/*
> + * Program the AS SDP portion of PR_ALPM_CTL: the transmission position, the
> + * skip-frame counter and the coupled AS SDP transmission / DC3CO idle-protocol
> + * bits. This is a full recompute of those fields (the base value is built from
> + * scratch, not read back), so it can be called both at PR enable time and when
> + * VRR is toggled seamlessly - which changes whether periodic AS SDP is used.
> + *
> + * Caller must hold intel_dp->alpm.lock.
> + */
> +static void intel_alpm_configure_pr_as_sdp(struct intel_dp *intel_dp,
> +					   const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> +	u32 skip_frames = 0;
> +
> +	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
> +		skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
> +
> +	if (crtc_state->link_off_after_as_sdp_when_pr_active)
> +		pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> +
> +	/*
> +	 * Skip frames needs the AS SDP to keep flowing during PR active, so it
> +	 * is mutually exclusive with disabling AS SDP transmission in active and
> +	 * with the DC3CO idle protocol.
> +	 */
> +	if (skip_frames) {
> +		pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +	} else {
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> +
> +		if (crtc_state->disable_as_sdp_when_pr_active)
> +			pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +
> +		if (intel_display_power_dc3co_allowed(display))
> +			pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +	}
> +
> +	intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder), pr_alpm_ctl);
> +}
> +
> +/*
> + * VRR can be enabled or disabled seamlessly, i.e. without a modeset and without
> + * cycling Panel Replay, so the AS SDP skip-frame programming done at PR enable
> + * time would otherwise go stale across a VRR toggle. Reprogram it here so the
> + * skip counter (and the coupled bits) matches the new VRR state.
> + */
> +void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	struct intel_encoder *encoder;
> +
> +	/* AS SDP skip frames field only exists on Xe3p_LPD+ */
> +	if (DISPLAY_VER(display) < 35)
> +		return;
> +
> +	for_each_intel_encoder_mask(display->drm, encoder,
> +				    crtc_state->uapi.encoder_mask) {
> +		struct intel_dp *intel_dp;
> +
> +		if (!intel_encoder_is_dp(encoder))
> +			continue;
> +
> +		intel_dp = enc_to_intel_dp(encoder);
> +
> +		if (!intel_dp->as_sdp_supported ||
> +		    !intel_alpm_is_alpm_aux_less(intel_dp, crtc_state))
> +			continue;
> +
> +		mutex_lock(&intel_dp->alpm.lock);
> +		intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
> +		mutex_unlock(&intel_dp->alpm.lock);
> +	}
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> @@ -449,44 +528,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
>   			ALPM_CTL_AUX_LESS_WAKE_TIME(crtc_state->alpm_state.aux_less_wake_lines);
>   
> -		if (intel_dp->as_sdp_supported) {
> -			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> -			u32 skip_frames = 0;
> -
> -			/*
> -			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
> -			 * periodic AS SDP is a Panel Replay feature that is only
> -			 * used when VRR is not actively driving the refresh rate.
> -			 */
> -			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
> -			    !crtc_state->vrr.enable)
> -				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
> -
> -			if (crtc_state->link_off_after_as_sdp_when_pr_active)
> -				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> -
> -			/*
> -			 * Skip frames needs the AS SDP to keep flowing during PR
> -			 * active, so it is mutually exclusive with disabling AS SDP
> -			 * transmission in active and with the DC3CO idle protocol.
> -			 */
> -			if (skip_frames) {
> -				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			} else {
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> -
> -				if (crtc_state->disable_as_sdp_when_pr_active)
> -					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> -
> -				if (intel_display_power_dc3co_allowed(display))
> -					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			}
> -
> -			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
> -				       pr_alpm_ctl);
> -		}
> +		if (intel_dp->as_sdp_supported)
> +			intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
>   
>   	} else {
>   		alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 328920027f1c..f8f605d94f96 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -36,6 +36,7 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
>   				 const struct intel_crtc_state *crtc_state);
>   bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
>   					      const struct intel_crtc_state *crtc_state);
> +void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state);
>   void intel_alpm_disable(struct intel_dp *intel_dp);
>   bool intel_alpm_get_error(struct intel_dp *intel_dp);
>   void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index fc30a455bed3..9151ea6c15ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1232,6 +1232,14 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
>   		intel_vrr_disable(old_crtc_state);
>   		intel_vrr_dcb_reset(old_crtc_state, crtc);
>   		intel_crtc_update_active_timings(old_crtc_state, false);
> +
> +		/*
> +		 * VRR is being disabled seamlessly (no modeset, Panel Replay
> +		 * stays enabled), so re-apply the AS SDP skip-frame programming
> +		 * for the new (VRR off) state.
> +		 */
> +		if (!intel_crtc_needs_modeset(new_crtc_state))
> +			intel_alpm_pr_as_sdp_update(new_crtc_state);
>   	}
>   
>   	if (audio_disabling(old_crtc_state, new_crtc_state))
> @@ -6971,6 +6979,16 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>   		intel_crtc_update_active_timings(new_crtc_state,
>   						 new_crtc_state->vrr.enable);
>   
> +	/*
> +	 * VRR is being enabled seamlessly (no modeset, Panel Replay stays
> +	 * enabled), so re-apply the AS SDP skip-frame programming for the new
> +	 * (VRR on) state. Done here, outside the vblank-evasion critical section
> +	 * (which runs with interrupts disabled), because it takes alpm.lock.
> +	 */
> +	if (intel_crtc_vrr_enabling(state, crtc) &&
> +	    !intel_crtc_needs_modeset(new_crtc_state))
> +		intel_alpm_pr_as_sdp_update(new_crtc_state);
> +
>   	if (new_crtc_state->vrr.dc_balance.enable)
>   		intel_vrr_dcb_increment_flip_count(new_crtc_state, crtc);

Verified locally. Not seen any issue.

Tested-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com>

>   

Re: [v4 3/4] drm/i915/display: Reprogram AS SDP skip frames on seamless VRR transitions

[Naladala, Ramanaidu]

Hi Uma,

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> The AS SDP skip-frame count is written to PR_ALPM_CTL only from
> lnl_alpm_configure(), which runs from intel_psr_enable_locked() on a
> Panel Replay disabled->enabled transition. VRR, however, can be enabled
> and disabled seamlessly - without a modeset and without cycling Panel
> Replay (intel_crtc_vrr_enabling()/disabling() in the pipe update path).
>
> As a result, when a panel comes up with VRR off the non-zero skip count
> is programmed, and when VRR is later turned on seamlessly PR stays
> enabled, lnl_alpm_configure() is not re-invoked, and the stale skip
> count is left in the register. This also leaves the coupled AS SDP
> transmission / DC3CO idle-protocol bits inconsistent with the DC3co
> state, which is recomputed on every commit.
>
> Factor the PR_ALPM_CTL AS SDP programming out of lnl_alpm_configure()
> into intel_alpm_configure_pr_as_sdp() and expose
> intel_alpm_pr_as_sdp_update(), which recomputes those fields for the
> current VRR state. Call it from the seamless VRR enable and disable
> sites (non-modeset only; a modeset re-runs PR enable anyway) so the skip
> counter always matches whether VRR is actively driving the refresh rate.
>
> v2: Fixed Sashiko review comments
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c    | 119 +++++++++++++------
>   drivers/gpu/drm/i915/display/intel_alpm.h    |   1 +
>   drivers/gpu/drm/i915/display/intel_display.c |  18 +++
>   3 files changed, 100 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 0a33a89975bc..c784e77f610b 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -427,6 +427,85 @@ bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
>   	return intel_pr_as_sdp_skip_frames(intel_dp) > 0;
>   }
>   
> +/*
> + * Program the AS SDP portion of PR_ALPM_CTL: the transmission position, the
> + * skip-frame counter and the coupled AS SDP transmission / DC3CO idle-protocol
> + * bits. This is a full recompute of those fields (the base value is built from
> + * scratch, not read back), so it can be called both at PR enable time and when
> + * VRR is toggled seamlessly - which changes whether periodic AS SDP is used.
> + *
> + * Caller must hold intel_dp->alpm.lock.
> + */
> +static void intel_alpm_configure_pr_as_sdp(struct intel_dp *intel_dp,
> +					   const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(intel_dp);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> +	u32 skip_frames = 0;
> +
> +	if (intel_alpm_pr_as_sdp_skip_frames_enabled(intel_dp, crtc_state))
> +		skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
> +
> +	if (crtc_state->link_off_after_as_sdp_when_pr_active)
> +		pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> +
> +	/*
> +	 * Skip frames needs the AS SDP to keep flowing during PR active, so it
> +	 * is mutually exclusive with disabling AS SDP transmission in active and
> +	 * with the DC3CO idle protocol.
> +	 */
> +	if (skip_frames) {
> +		pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +	} else {
> +		pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> +
> +		if (crtc_state->disable_as_sdp_when_pr_active)
> +			pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> +
> +		if (intel_display_power_dc3co_allowed(display))
> +			pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> +	}
> +
> +	intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder), pr_alpm_ctl);
> +}
> +
> +/*
> + * VRR can be enabled or disabled seamlessly, i.e. without a modeset and without
> + * cycling Panel Replay, so the AS SDP skip-frame programming done at PR enable
> + * time would otherwise go stale across a VRR toggle. Reprogram it here so the
> + * skip counter (and the coupled bits) matches the new VRR state.
> + */
> +void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	struct intel_encoder *encoder;
> +
> +	/* AS SDP skip frames field only exists on Xe3p_LPD+ */
> +	if (DISPLAY_VER(display) < 35)
> +		return;
> +
> +	for_each_intel_encoder_mask(display->drm, encoder,
> +				    crtc_state->uapi.encoder_mask) {
> +		struct intel_dp *intel_dp;
> +
> +		if (!intel_encoder_is_dp(encoder))
> +			continue;
> +
> +		intel_dp = enc_to_intel_dp(encoder);
> +
> +		if (!intel_dp->as_sdp_supported ||
> +		    !intel_alpm_is_alpm_aux_less(intel_dp, crtc_state))
> +			continue;
> +
> +		mutex_lock(&intel_dp->alpm.lock);
> +		intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
> +		mutex_unlock(&intel_dp->alpm.lock);
> +	}
> +}
> +
>   static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			       const struct intel_crtc_state *crtc_state)
>   {
> @@ -449,44 +528,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
>   			ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
>   			ALPM_CTL_AUX_LESS_WAKE_TIME(crtc_state->alpm_state.aux_less_wake_lines);
>   
> -		if (intel_dp->as_sdp_supported) {
> -			u32 pr_alpm_ctl = get_pr_alpm_as_sdp_transmission_time(crtc_state);
> -			u32 skip_frames = 0;
> -
> -			/*
> -			 * AS SDP skip frames field only exists on Xe3p_LPD+, and
> -			 * periodic AS SDP is a Panel Replay feature that is only
> -			 * used when VRR is not actively driving the refresh rate.
> -			 */
> -			if (DISPLAY_VER(display) >= 35 && crtc_state->has_panel_replay &&
> -			    !crtc_state->vrr.enable)
> -				skip_frames = intel_pr_as_sdp_skip_frames(intel_dp);
> -
> -			if (crtc_state->link_off_after_as_sdp_when_pr_active)
> -				pr_alpm_ctl |= PR_ALPM_CTL_ALLOW_LINK_OFF_BETWEEN_AS_SDP_AND_SU;
> -
> -			/*
> -			 * Skip frames needs the AS SDP to keep flowing during PR
> -			 * active, so it is mutually exclusive with disabling AS SDP
> -			 * transmission in active and with the DC3CO idle protocol.
> -			 */
> -			if (skip_frames) {
> -				pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_SKIP_FRAMES(skip_frames);
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			} else {
> -				pr_alpm_ctl &= ~PR_ALPM_CTL_AS_SDP_SKIP_FRAMES_MASK;
> -
> -				if (crtc_state->disable_as_sdp_when_pr_active)
> -					pr_alpm_ctl |= PR_ALPM_CTL_AS_SDP_TRANSMISSION_IN_ACTIVE_DISABLE;
> -
> -				if (intel_display_power_dc3co_allowed(display))
> -					pr_alpm_ctl |= PR_ALPM_CTL_USE_DC3CO_IDLE_PROTOCOL;
> -			}
> -
> -			intel_de_write(display, PR_ALPM_CTL(display, cpu_transcoder),
> -				       pr_alpm_ctl);
> -		}
> +		if (intel_dp->as_sdp_supported)
> +			intel_alpm_configure_pr_as_sdp(intel_dp, crtc_state);
>   
>   	} else {
>   		alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 328920027f1c..f8f605d94f96 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -36,6 +36,7 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
>   				 const struct intel_crtc_state *crtc_state);
>   bool intel_alpm_pr_as_sdp_skip_frames_enabled(struct intel_dp *intel_dp,
>   					      const struct intel_crtc_state *crtc_state);
> +void intel_alpm_pr_as_sdp_update(const struct intel_crtc_state *crtc_state);
>   void intel_alpm_disable(struct intel_dp *intel_dp);
>   bool intel_alpm_get_error(struct intel_dp *intel_dp);
>   void intel_alpm_lobf_compute_config_late(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index fc30a455bed3..9151ea6c15ab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1232,6 +1232,14 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
>   		intel_vrr_disable(old_crtc_state);
>   		intel_vrr_dcb_reset(old_crtc_state, crtc);
>   		intel_crtc_update_active_timings(old_crtc_state, false);
> +
> +		/*
> +		 * VRR is being disabled seamlessly (no modeset, Panel Replay
> +		 * stays enabled), so re-apply the AS SDP skip-frame programming
> +		 * for the new (VRR off) state.
> +		 */
> +		if (!intel_crtc_needs_modeset(new_crtc_state))
> +			intel_alpm_pr_as_sdp_update(new_crtc_state);
>   	}
>   
>   	if (audio_disabling(old_crtc_state, new_crtc_state))
> @@ -6971,6 +6979,16 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>   		intel_crtc_update_active_timings(new_crtc_state,
>   						 new_crtc_state->vrr.enable);
>   
> +	/*
> +	 * VRR is being enabled seamlessly (no modeset, Panel Replay stays
> +	 * enabled), so re-apply the AS SDP skip-frame programming for the new
> +	 * (VRR on) state. Done here, outside the vblank-evasion critical section
> +	 * (which runs with interrupts disabled), because it takes alpm.lock.
> +	 */
> +	if (intel_crtc_vrr_enabling(state, crtc) &&
> +	    !intel_crtc_needs_modeset(new_crtc_state))
> +		intel_alpm_pr_as_sdp_update(new_crtc_state);
> +
>   	if (new_crtc_state->vrr.dc_balance.enable)
>   		intel_vrr_dcb_increment_flip_count(new_crtc_state, crtc);
Tested-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com>
>   

[v4 4/4] drm/i915/display: Gate periodic AS SDP skip frames behind a module parameter

[Uma Shankar]

Periodic AS SDP (skip frames) drives a Panel Replay panel down toward its
minimum refresh rate. It is a new, panel- and platform-sensitive behaviour,
so keep it opt-in rather than enabling it unconditionally.

Add a display module parameter, periodic_assdp_enable, shared by both the
i915 and xe drivers via the intel_display_params infrastructure. It defaults
to false (feature disabled); set it to true to enable periodic AS SDP.

Gate the feature at its single choke point, intel_pr_as_sdp_skip_frames():
returning a zero skip count when the parameter is off makes both the
PR_ALPM_CTL programming (intel_alpm_configure_pr_as_sdp()) and the DC3co
force-disable predicate (intel_alpm_pr_as_sdp_skip_frames_enabled()) a no-op,
so AS SDP continues to be sent on every frame as before.

Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c           | 5 +++++
 drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++++++
 drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
 3 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index c784e77f610b..537cad13f0b4 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -392,11 +392,16 @@ static u32 get_pr_alpm_as_sdp_transmission_time(const struct intel_crtc_state *c
  */
 static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
 {
+	struct intel_display *display = to_intel_display(intel_dp);
 	const struct drm_display_info *info =
 		&intel_dp->attached_connector->base.display_info;
 	int max_vrefresh = info->monitor_range.max_vfreq;
 	int min_vrefresh = info->monitor_range.min_vfreq;
 
+	/* Off by default; gated by the periodic_assdp_enable module parameter. */
+	if (!display->params.periodic_assdp_enable)
+		return 0;
+
 	if (min_vrefresh <= 0 || max_vrefresh <= min_vrefresh)
 		return 0;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 2aed110c5b09..a845d29610cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -139,6 +139,12 @@ intel_display_param_named_unsafe(enable_dmc_wl, int, 0400,
 	"(-1=use per-chip default, 0=disabled, 1=enabled, 2=match any register, 3=always locked) "
 	"Default: -1");
 
+intel_display_param_named_unsafe(periodic_assdp_enable, bool, 0600,
+	"Enable periodic Adaptive-Sync SDP (AS SDP skip frames) for Panel Replay "
+	"to drive the panel down to its minimum refresh rate "
+	"(0=disabled, 1=enabled) "
+	"Default: 0");
+
 __maybe_unused
 static void _param_print_bool(struct drm_printer *p, const char *driver_name,
 			      const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index b95ecf728daa..4d912aab4811 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -50,6 +50,7 @@ struct drm_printer;
 	param(bool, psr_safest_params, false, 0400) \
 	param(bool, enable_psr2_sel_fetch, true, 0400) \
 	param(int, enable_dmc_wl, -1, 0400) \
+	param(bool, periodic_assdp_enable, false, 0600) \
 
 #define MEMBER(T, member, ...) T member;
 struct intel_display_params {
-- 
2.50.1

Re: [v4 4/4] drm/i915/display: Gate periodic AS SDP skip frames behind a module parameter

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The 'periodic_assdp_enable' module parameter is defined with a writable sysfs permission (0600) instead of the required read-only permission (0400), creating a broken runtime interface.
--

commit 717499623e1a0ce1f0b28267e96deb4b7a335eaf
Author: Uma Shankar <uma.shankar@intel.com>

drm/i915/display: Gate periodic AS SDP skip frames behind a module parameter

This commit introduces a new module parameter, periodic_assdp_enable, to
control periodic Adaptive-Sync SDP skip frames for Panel Replay. The
parameter defaults to false and uses the intel_display_params
infrastructure.

> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b090..a845d29610cf1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
[ ... ]
> @@ -139,6 +139,12 @@ intel_display_param_named_unsafe(enable_dmc_wl, int, 0400,
>  	"(-1=use per-chip default, 0=disabled, 1=enabled, 2=match any register, 3=always locked) "
>  	"Default: -1");
>  
> +intel_display_param_named_unsafe(periodic_assdp_enable, bool, 0600,

[Severity: Medium]
Does this parameter need to be writable (0600) at runtime?

Since global module parameters are copied to display->params during driver
initialization, changing this value via sysfs at runtime doesn't appear to
take effect on active displays.

Should this be read-only (0400) like the other intel_display_params to
prevent creating a misleading sysfs interface?

> +	"Enable periodic Adaptive-Sync SDP (AS SDP skip frames) for Panel Replay "
> +	"to drive the panel down to its minimum refresh rate "
> +	"(0=disabled, 1=enabled) "
> +	"Default: 0");
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260831213421.1804635-1-uma.shankar@intel.com?part=4

Re: [v4 4/4] drm/i915/display: Gate periodic AS SDP skip frames behind a module parameter

[Dibin Moolakadan Subrahmanian]

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> Periodic AS SDP (skip frames) drives a Panel Replay panel down toward its
> minimum refresh rate. It is a new, panel- and platform-sensitive behaviour,
> so keep it opt-in rather than enabling it unconditionally.
>
> Add a display module parameter, periodic_assdp_enable, shared by both the
> i915 and xe drivers via the intel_display_params infrastructure. It defaults
> to false (feature disabled); set it to true to enable periodic AS SDP.
>
> Gate the feature at its single choke point, intel_pr_as_sdp_skip_frames():
> returning a zero skip count when the parameter is off makes both the
> PR_ALPM_CTL programming (intel_alpm_configure_pr_as_sdp()) and the DC3co
> force-disable predicate (intel_alpm_pr_as_sdp_skip_frames_enabled()) a no-op,
> so AS SDP continues to be sent on every frame as before.
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c           | 5 +++++
>   drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++++++
>   drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>   3 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index c784e77f610b..537cad13f0b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -392,11 +392,16 @@ static u32 get_pr_alpm_as_sdp_transmission_time(const struct intel_crtc_state *c
>    */
>   static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
>   {
> +	struct intel_display *display = to_intel_display(intel_dp);
>   	const struct drm_display_info *info =
>   		&intel_dp->attached_connector->base.display_info;
>   	int max_vrefresh = info->monitor_range.max_vfreq;
>   	int min_vrefresh = info->monitor_range.min_vfreq;
>   
> +	/* Off by default; gated by the periodic_assdp_enable module parameter. */
> +	if (!display->params.periodic_assdp_enable)
> +		return 0;
> +
>   	if (min_vrefresh <= 0 || max_vrefresh <= min_vrefresh)
>   		return 0;
>   
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b09..a845d29610cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -139,6 +139,12 @@ intel_display_param_named_unsafe(enable_dmc_wl, int, 0400,
>   	"(-1=use per-chip default, 0=disabled, 1=enabled, 2=match any register, 3=always locked) "
>   	"Default: -1");
>   
> +intel_display_param_named_unsafe(periodic_assdp_enable, bool, 0600,
> +	"Enable periodic Adaptive-Sync SDP (AS SDP skip frames) for Panel Replay "
> +	"to drive the panel down to its minimum refresh rate "
> +	"(0=disabled, 1=enabled) "
> +	"Default: 0");
> +
>   __maybe_unused
>   static void _param_print_bool(struct drm_printer *p, const char *driver_name,
>   			      const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index b95ecf728daa..4d912aab4811 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -50,6 +50,7 @@ struct drm_printer;
>   	param(bool, psr_safest_params, false, 0400) \
>   	param(bool, enable_psr2_sel_fetch, true, 0400) \
>   	param(int, enable_dmc_wl, -1, 0400) \
> +	param(bool, periodic_assdp_enable, false, 0600) \
>   
>   #define MEMBER(T, member, ...) T member;
>   struct intel_display_params {

Wondering if we can rename the parameter to|enable_periodic_assdp| to match the existing params.
Also, I assume the|0600| write permission is intentional to allow runtime enable/disable for testing.

Other than this, LGTM.
Reviewed-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>

Re: [v4 4/4] drm/i915/display: Gate periodic AS SDP skip frames behind a module parameter

[Naladala, Ramanaidu]

Hi Uma,

On 9/1/2026 3:04 AM, Uma Shankar wrote:
> Periodic AS SDP (skip frames) drives a Panel Replay panel down toward its
> minimum refresh rate. It is a new, panel- and platform-sensitive behaviour,
> so keep it opt-in rather than enabling it unconditionally.
>
> Add a display module parameter, periodic_assdp_enable, shared by both the
> i915 and xe drivers via the intel_display_params infrastructure. It defaults
> to false (feature disabled); set it to true to enable periodic AS SDP.
>
> Gate the feature at its single choke point, intel_pr_as_sdp_skip_frames():
> returning a zero skip count when the parameter is off makes both the
> PR_ALPM_CTL programming (intel_alpm_configure_pr_as_sdp()) and the DC3co
> force-disable predicate (intel_alpm_pr_as_sdp_skip_frames_enabled()) a no-op,
> so AS SDP continues to be sent on every frame as before.
>
> Assisted-by: Claude:claude-opus-4-8
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_alpm.c           | 5 +++++
>   drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++++++
>   drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>   3 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index c784e77f610b..537cad13f0b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -392,11 +392,16 @@ static u32 get_pr_alpm_as_sdp_transmission_time(const struct intel_crtc_state *c
>    */
>   static u32 intel_pr_as_sdp_skip_frames(struct intel_dp *intel_dp)
>   {
> +	struct intel_display *display = to_intel_display(intel_dp);
>   	const struct drm_display_info *info =
>   		&intel_dp->attached_connector->base.display_info;
>   	int max_vrefresh = info->monitor_range.max_vfreq;
>   	int min_vrefresh = info->monitor_range.min_vfreq;
>   
> +	/* Off by default; gated by the periodic_assdp_enable module parameter. */
> +	if (!display->params.periodic_assdp_enable)
> +		return 0;
> +
>   	if (min_vrefresh <= 0 || max_vrefresh <= min_vrefresh)
>   		return 0;
>   
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b09..a845d29610cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -139,6 +139,12 @@ intel_display_param_named_unsafe(enable_dmc_wl, int, 0400,
>   	"(-1=use per-chip default, 0=disabled, 1=enabled, 2=match any register, 3=always locked) "
>   	"Default: -1");
>   
> +intel_display_param_named_unsafe(periodic_assdp_enable, bool, 0600,
> +	"Enable periodic Adaptive-Sync SDP (AS SDP skip frames) for Panel Replay "
> +	"to drive the panel down to its minimum refresh rate "
> +	"(0=disabled, 1=enabled) "
> +	"Default: 0");
> +
>   __maybe_unused
>   static void _param_print_bool(struct drm_printer *p, const char *driver_name,
>   			      const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index b95ecf728daa..4d912aab4811 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -50,6 +50,7 @@ struct drm_printer;
>   	param(bool, psr_safest_params, false, 0400) \
>   	param(bool, enable_psr2_sel_fetch, true, 0400) \
>   	param(int, enable_dmc_wl, -1, 0400) \
> +	param(bool, periodic_assdp_enable, false, 0600) \
>   
>   #define MEMBER(T, member, ...) T member;
>   struct intel_display_params {
Tested-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com>

✓ i915.CI.BAT: success for drm/i915/display: Enable AS SDP Skip Frames (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1575 bytes --]

== Series Details ==

Series: drm/i915/display: Enable AS SDP Skip Frames (rev4)
URL   : https://patchwork.freedesktop.org/series/162016/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_19064 -> Patchwork_162016v4
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/index.html

Participating hosts (36 -> 34)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_162016v4 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - fi-kbl-7567u:       [PASS][1] -> [DMESG-WARN][2] ([i915#15673]) +51 other tests dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/fi-kbl-7567u/igt@kms_pm_rpm@basic-pci-d3-state.html

  
  [i915#15673]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15673


Build changes
-------------

  * Linux: CI_DRM_19064 -> Patchwork_162016v4

  CI-20190529: 20190529
  CI_DRM_19064: 307e9559fc1b95a477f00a767ea053b78d263548 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_9078: 9078
  Patchwork_162016v4: 307e9559fc1b95a477f00a767ea053b78d263548 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/index.html

[-- Attachment #2: Type: text/html, Size: 2160 bytes --]

✗ i915.CI.Full: failure for drm/i915/display: Enable AS SDP Skip Frames (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 95880 bytes --]

== Series Details ==

Series: drm/i915/display: Enable AS SDP Skip Frames (rev4)
URL   : https://patchwork.freedesktop.org/series/162016/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_19064_full -> Patchwork_162016v4_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_162016v4_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_162016v4_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_162016v4_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_cursor_crc@cursor-rapid-movement-64x64:
    - shard-rkl:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-8/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-7/igt@kms_cursor_crc@cursor-rapid-movement-64x64.html

  * igt@kms_cursor_crc@cursor-rapid-movement-64x64@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [ABORT][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-7/igt@kms_cursor_crc@cursor-rapid-movement-64x64@pipe-c-hdmi-a-2.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-dg1:          [PASS][4] -> [ABORT][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-19/igt@kms_pipe_crc_basic@suspend-read-crc.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-14/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1:
    - shard-dg1:          NOTRUN -> [ABORT][6]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-14/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html

  
Known issues
------------

  Here are the changes found in Patchwork_162016v4_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_bad_reloc@negative-reloc:
    - shard-mtlp:         NOTRUN -> [SKIP][7] ([i915#3281])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@gem_bad_reloc@negative-reloc.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-tglu:         NOTRUN -> [SKIP][8] ([i915#9323])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@suspend-resume:
    - shard-dg2:          [PASS][9] -> [INCOMPLETE][10] ([i915#13356] / [i915#16348]) +1 other test incomplete
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-8/igt@gem_ccs@suspend-resume.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-4/igt@gem_ccs@suspend-resume.html

  * igt@gem_ctx_persistence@file:
    - shard-snb:          NOTRUN -> [SKIP][11] ([i915#1099]) +4 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-snb7/igt@gem_ctx_persistence@file.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-tglu:         NOTRUN -> [SKIP][12] ([i915#280])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_eio@in-flight-suspend:
    - shard-dg1:          [PASS][13] -> [DMESG-WARN][14] ([i915#13390] / [i915#4391] / [i915#4423])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-19/igt@gem_eio@in-flight-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-13/igt@gem_eio@in-flight-suspend.html

  * igt@gem_eio@kms:
    - shard-rkl:          NOTRUN -> [ABORT][15] ([i915#16837])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-8/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-tglu:         NOTRUN -> [SKIP][16] ([i915#4525])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_capture@pi:
    - shard-dg2:          [PASS][17] -> [FAIL][18] ([i915#15587]) +1 other test fail
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-8/igt@gem_exec_capture@pi.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-6/igt@gem_exec_capture@pi.html

  * igt@gem_exec_fence@syncobj-backward-timeline-chain-engines:
    - shard-snb:          NOTRUN -> [SKIP][19] +603 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-snb5/igt@gem_exec_fence@syncobj-backward-timeline-chain-engines.html

  * igt@gem_exec_reloc@basic-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][20] ([i915#3281])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@gem_exec_reloc@basic-cpu.html

  * igt@gem_exec_reloc@basic-softpin:
    - shard-rkl:          NOTRUN -> [SKIP][21] ([i915#3281]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@gem_exec_reloc@basic-softpin.html

  * igt@gem_exec_suspend@basic-s0@smem:
    - shard-dg2:          [PASS][22] -> [INCOMPLETE][23] ([i915#13356])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-4/igt@gem_exec_suspend@basic-s0@smem.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-7/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][24] ([i915#4613])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-rkl:          NOTRUN -> [SKIP][25] ([i915#4613])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@gem_lmem_swapping@massive-random.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-glk:          NOTRUN -> [SKIP][26] ([i915#4613]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk9/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_mmap_gtt@pf-nonblock:
    - shard-dg2:          NOTRUN -> [SKIP][27] ([i915#4077])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@gem_mmap_gtt@pf-nonblock.html

  * igt@gem_pread@exhaustion:
    - shard-rkl:          NOTRUN -> [SKIP][28] ([i915#3282])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@gem_pread@exhaustion.html
    - shard-glk11:        NOTRUN -> [WARN][29] ([i915#2658])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk11/igt@gem_pread@exhaustion.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-snb:          NOTRUN -> [WARN][30] ([i915#2658])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-snb6/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-dg2:          NOTRUN -> [SKIP][31] ([i915#4270])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_render_copy@y-tiled-to-vebox-x-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][32] ([i915#5190] / [i915#8428]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@gem_render_copy@y-tiled-to-vebox-x-tiled.html

  * igt@gem_userptr_blits@coherency-unsync:
    - shard-mtlp:         NOTRUN -> [SKIP][33] ([i915#3297])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@gem_userptr_blits@coherency-unsync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-tglu:         NOTRUN -> [SKIP][34] ([i915#3297])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-rkl:          NOTRUN -> [SKIP][35] ([i915#14544] / [i915#2527])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gpu_buddy@gpu_buddy:
    - shard-rkl:          NOTRUN -> [SKIP][36] ([i915#15678])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@gpu_buddy@gpu_buddy.html

  * igt@i915_module_load@fault-injection@intel_connector_register:
    - shard-glk10:        NOTRUN -> [ABORT][37] ([i915#15342]) +1 other test abort
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@i915_module_load@fault-injection@intel_connector_register.html

  * igt@i915_module_load@fault-injection@intel_gt_init-enodev:
    - shard-glk10:        NOTRUN -> [SKIP][38] +69 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@i915_module_load@fault-injection@intel_gt_init-enodev.html

  * igt@i915_module_load@resize-bar:
    - shard-rkl:          NOTRUN -> [SKIP][39] ([i915#14544] / [i915#6412])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@i915_module_load@resize-bar.html

  * igt@i915_query@query-topology-known-pci-ids:
    - shard-mtlp:         NOTRUN -> [SKIP][40] ([i915#16109])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@i915_query@query-topology-known-pci-ids.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-rkl:          [PASS][41] -> [INCOMPLETE][42] ([i915#4817])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@i915_suspend@fence-restore-tiled2untiled.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][43] ([i915#4817])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@i915_suspend@fence-restore-untiled.html
    - shard-glk:          [PASS][44] -> [INCOMPLETE][45] ([i915#16182] / [i915#4817])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk2/igt@i915_suspend@fence-restore-untiled.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk8/igt@i915_suspend@fence-restore-untiled.html

  * igt@i915_suspend@forcewake:
    - shard-glk:          NOTRUN -> [INCOMPLETE][46] ([i915#16182] / [i915#4817])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk8/igt@i915_suspend@forcewake.html

  * igt@i915_suspend@sysfs-reader:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][47] ([i915#16182] / [i915#4817])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk11/igt@i915_suspend@sysfs-reader.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
    - shard-glk:          [PASS][48] -> [FAIL][49] ([i915#14888])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk8/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk4/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-rkl:          [PASS][50] -> [ABORT][51] ([i915#16881])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1:
    - shard-tglu:         [PASS][52] -> [ABORT][53] ([i915#16837] / [i915#16844]) +1 other test abort
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [ABORT][54] ([i915#16881])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing@pipe-b-hdmi-a-2.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1:
    - shard-tglu:         [PASS][55] -> [FAIL][56] ([i915#15662]) +1 other test fail
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-10/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-9/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-180:
    - shard-tglu:         NOTRUN -> [SKIP][57] ([i915#5286]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-rkl:          NOTRUN -> [SKIP][58] ([i915#5286]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-rkl:          NOTRUN -> [SKIP][59] ([i915#14544] / [i915#3638])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-c-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][60] ([i915#6095]) +4 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs@pipe-c-edp-1.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][61] ([i915#14098] / [i915#14544] / [i915#6095]) +2 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][62] ([i915#6095]) +155 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][63] ([i915#14544] / [i915#6095]) +3 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][64] ([i915#14098] / [i915#6095]) +40 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][65] ([i915#6095]) +16 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][66] ([i915#15582]) +1 other test incomplete
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][67] ([i915#6095]) +9 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][68] ([i915#10307] / [i915#6095]) +75 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][69] ([i915#10307] / [i915#10434] / [i915#6095]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-4/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][70] ([i915#12313])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][71] ([i915#6095]) +77 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [SKIP][72] +176 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk8/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][73] ([i915#14544] / [i915#3742])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#13781]) +3 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-4/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-1.html

  * igt@kms_chamelium_color@ctm-green-to-red:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#14544]) +8 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_chamelium_color@ctm-green-to-red.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
    - shard-rkl:          NOTRUN -> [SKIP][76] ([i915#16471])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html

  * igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
    - shard-tglu:         NOTRUN -> [SKIP][77] ([i915#16471])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html

  * igt@kms_chamelium_frames@hdmi-aspect-ratio:
    - shard-tglu:         NOTRUN -> [SKIP][78] ([i915#11151] / [i915#7828]) +1 other test skip
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_chamelium_frames@hdmi-aspect-ratio.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-rkl:          NOTRUN -> [SKIP][79] ([i915#11151] / [i915#7828]) +2 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-mtlp:         NOTRUN -> [SKIP][80] ([i915#11151] / [i915#7828])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-dg2:          NOTRUN -> [SKIP][81] ([i915#11151] / [i915#7828])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_content_protection@legacy:
    - shard-tglu:         NOTRUN -> [SKIP][82] ([i915#15865])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][83] ([i915#13049])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [FAIL][84] ([i915#13566]) +2 other tests fail
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-mtlp:         NOTRUN -> [SKIP][85] ([i915#13049])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-tglu:         NOTRUN -> [SKIP][86] ([i915#13049])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-rkl:          NOTRUN -> [SKIP][87] ([i915#14544] / [i915#3555]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-rkl:          NOTRUN -> [SKIP][88] ([i915#14544] / [i915#4103])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [SKIP][89] ([i915#3804])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-rkl:          NOTRUN -> [SKIP][90] ([i915#13748])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-tglu:         NOTRUN -> [SKIP][91] ([i915#13748])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback:
    - shard-mtlp:         NOTRUN -> [SKIP][92] ([i915#16867] / [i915#16870])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_dp_linktrain_fallback@uhbr-to-hbr-fallback.html

  * igt@kms_dsc@dsc-with-formats-ultrajoiner:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#14544] / [i915#16361])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_dsc@dsc-with-formats-ultrajoiner.html

  * igt@kms_dsc@dsc-with-output-formats-bigjoiner:
    - shard-tglu:         NOTRUN -> [SKIP][94] ([i915#16361])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_dsc@dsc-with-output-formats-bigjoiner.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner:
    - shard-rkl:          NOTRUN -> [SKIP][95] ([i915#16361]) +1 other test skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][96] ([i915#9878])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@kms_fbcon_fbt@fbc-suspend.html
    - shard-rkl:          [PASS][97] -> [INCOMPLETE][98] ([i915#9878])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-8/igt@kms_fbcon_fbt@fbc-suspend.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr:
    - shard-tglu:         NOTRUN -> [SKIP][99] ([i915#16680])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@hdr:
    - shard-rkl:          NOTRUN -> [SKIP][100] ([i915#16600])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_feature_discovery@hdr.html

  * igt@kms_feature_discovery@psr2:
    - shard-tglu:         NOTRUN -> [SKIP][101] ([i915#658])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-absolute-wf_vblank:
    - shard-mtlp:         NOTRUN -> [SKIP][102] ([i915#3637] / [i915#9934])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_flip@2x-absolute-wf_vblank.html

  * igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][103] ([i915#3637] / [i915#9934])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-glk:          [PASS][104] -> [FAIL][105] ([i915#13027]) +1 other test fail
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-rkl:          NOTRUN -> [SKIP][106] ([i915#14544] / [i915#9934])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-rkl:          [PASS][107] -> [INCOMPLETE][108] ([i915#16276] / [i915#6113])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-8/igt@kms_flip@flip-vs-suspend-interruptible.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][109] ([i915#16276] / [i915#6113])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-hdmi-a1:
    - shard-tglu:         [PASS][110] -> [ABORT][111] ([i915#16876] / [i915#16881]) +1 other test abort
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-5/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-hdmi-a1.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-5/igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset@c-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
    - shard-tglu:         NOTRUN -> [SKIP][112] ([i915#15643])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html

  * igt@kms_force_connector_basic@force-edid:
    - shard-mtlp:         [PASS][113] -> [SKIP][114] ([i915#15672])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-5/igt@kms_force_connector_basic@force-edid.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-1/igt@kms_force_connector_basic@force-edid.html

  * igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][115] ([i915#15989])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-mmap-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][116] ([i915#15989]) +5 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbchdr-tiling-y:
    - shard-mtlp:         NOTRUN -> [SKIP][117] ([i915#10055])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbchdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][118] +20 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-modesetfrombusy:
    - shard-tglu:         NOTRUN -> [SKIP][119] ([i915#15102]) +11 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_frontbuffer_tracking@fbcpsr-modesetfrombusy.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][120] ([i915#5439])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4.html

  * igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-glk:          [PASS][121] -> [SKIP][122] +12 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk8/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk4/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@hdr-2p-primscrn-spr-indfb-onoff:
    - shard-mtlp:         NOTRUN -> [SKIP][123] ([i915#15991]) +3 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@hdr-2p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-cur-indfb-move:
    - shard-tglu:         NOTRUN -> [SKIP][124] +26 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@hdr-farfromfence-mmap-gtt:
    - shard-rkl:          [PASS][125] -> [SKIP][126] ([i915#15989]) +8 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_frontbuffer_tracking@hdr-farfromfence-mmap-gtt.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_frontbuffer_tracking@hdr-farfromfence-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@hdr-shrfb-scaledprimary:
    - shard-tglu:         NOTRUN -> [SKIP][127] ([i915#15989]) +6 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_frontbuffer_tracking@hdr-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#15102]) +8 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][129] ([i915#14544] / [i915#15102]) +5 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt:
    - shard-mtlp:         NOTRUN -> [SKIP][130] ([i915#15991] / [i915#1825])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][131] ([i915#15991] / [i915#5354]) +1 other test skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][132] ([i915#1825])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
    - shard-glk11:        NOTRUN -> [SKIP][133] +143 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk11/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-indfb-draw-render:
    - shard-mtlp:         NOTRUN -> [SKIP][134] ([i915#15989]) +2 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_frontbuffer_tracking@psrhdr-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-pri-shrfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([i915#15991]) +2 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - shard-glk:          NOTRUN -> [INCOMPLETE][136] ([i915#12756] / [i915#13409] / [i915#13476] / [i915#16789])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk9/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][137] ([i915#13409] / [i915#13476] / [i915#16789])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-2.html

  * igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#15709])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
    - shard-tglu:         NOTRUN -> [SKIP][139] ([i915#15709]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html

  * igt@kms_plane_alpha_blend@alpha-opaque-fb:
    - shard-glk:          NOTRUN -> [FAIL][140] ([i915#10647] / [i915#12169])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk9/igt@kms_plane_alpha_blend@alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [FAIL][141] ([i915#10647]) +1 other test fail
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk9/igt@kms_plane_alpha_blend@alpha-opaque-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb:
    - shard-glk10:        NOTRUN -> [FAIL][142] ([i915#10647] / [i915#12177])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
    - shard-glk10:        NOTRUN -> [FAIL][143] ([i915#10647]) +1 other test fail
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-rkl:          NOTRUN -> [SKIP][144] ([i915#13958])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-b:
    - shard-rkl:          [PASS][145] -> [ABORT][146] ([i915#16852]) +1 other test abort
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-b.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-b.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-rkl:          NOTRUN -> [SKIP][147] ([i915#15073])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg1:          [PASS][148] -> [SKIP][149] ([i915#15073])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-13/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-dg1:          [PASS][150] -> [DMESG-WARN][151] ([i915#4423]) +1 other test dmesg-warn
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-15/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-15/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg2:          [PASS][152] -> [SKIP][153] ([i915#15073])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-3/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@system-suspend-idle:
    - shard-dg2:          [PASS][154] -> [INCOMPLETE][155] ([i915#14419])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-3/igt@kms_pm_rpm@system-suspend-idle.html
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-7/igt@kms_pm_rpm@system-suspend-idle.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
    - shard-glk10:        NOTRUN -> [SKIP][156] ([i915#11520]) +1 other test skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk10/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
    - shard-glk11:        NOTRUN -> [SKIP][157] ([i915#11520]) +4 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk11/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][158] ([i915#11520]) +4 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk9/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-rkl:          NOTRUN -> [SKIP][159] ([i915#11520])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][160] ([i915#11520]) +2 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-snb:          NOTRUN -> [SKIP][161] ([i915#11520]) +11 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-snb6/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr@fbc-psr-cursor-plane-move:
    - shard-tglu:         NOTRUN -> [SKIP][162] ([i915#9732]) +4 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_psr@fbc-psr-cursor-plane-move.html

  * igt@kms_psr@fbc-psr-cursor-render@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][163] ([i915#9688]) +1 other test skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_psr@fbc-psr-cursor-render@edp-1.html

  * igt@kms_psr@psr-primary-mmap-cpu:
    - shard-rkl:          NOTRUN -> [SKIP][164] ([i915#1072] / [i915#9732]) +2 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_psr@psr-primary-mmap-cpu.html

  * igt@kms_psr@psr-sprite-mmap-gtt@edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][165] ([i915#4077] / [i915#9688]) +1 other test skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_psr@psr-sprite-mmap-gtt@edp-1.html

  * igt@kms_psr@psr2-cursor-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#1072] / [i915#14544] / [i915#9732])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_psr@psr2-cursor-mmap-gtt.html

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-glk11:        NOTRUN -> [INCOMPLETE][167] ([i915#15492] / [i915#16184])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk11/igt@kms_rotation_crc@multiplane-rotation.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
    - shard-glk:          NOTRUN -> [INCOMPLETE][168] ([i915#15500] / [i915#16184])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk8/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][169] ([i915#12755] / [i915#15867])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_vrr@flip-suspend:
    - shard-mtlp:         NOTRUN -> [SKIP][170] ([i915#3555] / [i915#8808])
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@max-min:
    - shard-tglu:         NOTRUN -> [SKIP][171] ([i915#9906])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_vrr@max-min.html

  * igt@perf_pmu@busy-double-start:
    - shard-mtlp:         [PASS][172] -> [FAIL][173] ([i915#4349]) +2 other tests fail
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-2/igt@perf_pmu@busy-double-start.html
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-7/igt@perf_pmu@busy-double-start.html

  
#### Possible fixes ####

  * igt@i915_pm_freq_api@freq-suspend@gt0:
    - shard-dg2:          [INCOMPLETE][174] ([i915#13356] / [i915#13820]) -> [PASS][175] +1 other test pass
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-7/igt@i915_pm_freq_api@freq-suspend@gt0.html
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html

  * igt@i915_pm_rpm@sysfs-read:
    - shard-dg1:          [SKIP][176] ([i915#4423]) -> [PASS][177]
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@i915_pm_rpm@sysfs-read.html
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@i915_pm_rpm@sysfs-read.html

  * igt@i915_suspend@forcewake:
    - shard-rkl:          [INCOMPLETE][178] ([i915#4817]) -> [PASS][179]
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@i915_suspend@forcewake.html
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-8/igt@i915_suspend@forcewake.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-dg1:          [FAIL][180] ([i915#14888]) -> [PASS][181] +1 other test pass
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-19/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-19/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-rkl:          [INCOMPLETE][182] ([i915#12761]) -> [PASS][183]
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_async_flips@async-flip-suspend-resume.html
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
    - shard-tglu:         [FAIL][184] ([i915#15662]) -> [PASS][185]
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-2/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-4/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [FAIL][186] ([i915#15733] / [i915#5138]) -> [PASS][187] +1 other test pass
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-edp-1:
    - shard-mtlp:         [FAIL][188] -> [PASS][189] +1 other test pass
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-edp-1.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-b-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
    - shard-rkl:          [INCOMPLETE][190] ([i915#14694] / [i915#15582]) -> [PASS][191]
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-tglu:         [FAIL][192] ([i915#15804]) -> [PASS][193]
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@plain-flip-ts-check:
    - shard-dg2:          [FAIL][194] ([i915#14600]) -> [PASS][195] +1 other test pass
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-1/igt@kms_flip@plain-flip-ts-check.html
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-8/igt@kms_flip@plain-flip-ts-check.html

  * igt@kms_force_connector_basic@force-connector-state:
    - shard-mtlp:         [SKIP][196] ([i915#15672]) -> [PASS][197]
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-1/igt@kms_force_connector_basic@force-connector-state.html
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-3/igt@kms_force_connector_basic@force-connector-state.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move:
    - shard-dg1:          [DMESG-WARN][198] ([i915#4423]) -> [PASS][199] +6 other tests pass
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt:
    - shard-rkl:          [SKIP][200] ([i915#15989]) -> [PASS][201] +10 other tests pass
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt.html
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-pwrite:
    - shard-glk:          [SKIP][202] -> [PASS][203] +2 other tests pass
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk2/igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-pwrite.html
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk8/igt@kms_frontbuffer_tracking@fbchdr-rgb565-draw-pwrite.html

  * igt@kms_hdr@bpc-switch:
    - shard-rkl:          [SKIP][204] ([i915#16644] / [i915#3555] / [i915#8228]) -> [PASS][205] +1 other test pass
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-7/igt@kms_hdr@bpc-switch.html
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-1/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane@plane-panning-bottom-right-suspend:
    - shard-mtlp:         [INCOMPLETE][206] ([i915#13026]) -> [PASS][207] +1 other test pass
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-1/igt@kms_plane@plane-panning-bottom-right-suspend.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-4/igt@kms_plane@plane-panning-bottom-right-suspend.html

  * igt@kms_plane_lowres@tiling-none:
    - shard-rkl:          [ABORT][208] ([i915#16922]) -> [PASS][209] +1 other test pass
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_plane_lowres@tiling-none.html
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@kms_plane_lowres@tiling-none.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-dg1:          [SKIP][210] ([i915#15073]) -> [PASS][211] +1 other test pass
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-19/igt@kms_pm_rpm@dpms-lpsp.html
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-14/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-dg2:          [SKIP][212] ([i915#15073]) -> [PASS][213]
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg2-5/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg2-4/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [SKIP][214] ([i915#15073]) -> [PASS][215] +1 other test pass
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp.html
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@perf_pmu@rc6-suspend:
    - shard-rkl:          [INCOMPLETE][216] ([i915#13520]) -> [PASS][217]
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@perf_pmu@rc6-suspend.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-2/igt@perf_pmu@rc6-suspend.html

  
#### Warnings ####

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-rkl:          [SKIP][218] ([i915#14544] / [i915#6335]) -> [SKIP][219] ([i915#6335])
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@gem_create@create-ext-cpu-access-big.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          [SKIP][220] ([i915#280]) -> [SKIP][221] ([i915#14544] / [i915#280])
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@gem_ctx_sseu@invalid-args.html
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_eio@kms:
    - shard-dg1:          [ABORT][222] ([i915#16837] / [i915#16931]) -> [ABORT][223] ([i915#16837] / [i915#16912] / [i915#16931])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-12/igt@gem_eio@kms.html
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-14/igt@gem_eio@kms.html
    - shard-tglu:         [ABORT][224] ([i915#16837] / [i915#16844] / [i915#16881]) -> [ABORT][225] ([i915#16837])
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-9/igt@gem_eio@kms.html
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-9/igt@gem_eio@kms.html

  * igt@gem_exec_reloc@basic-cpu-gtt:
    - shard-rkl:          [SKIP][226] ([i915#3281]) -> [SKIP][227] ([i915#14544] / [i915#3281]) +2 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@gem_exec_reloc@basic-cpu-gtt.html
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gem_exec_reloc@basic-cpu-gtt.html

  * igt@gem_exec_reloc@basic-write-wc-noreloc:
    - shard-rkl:          [SKIP][228] ([i915#14544] / [i915#3281]) -> [SKIP][229] ([i915#3281]) +3 other tests skip
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@gem_exec_reloc@basic-write-wc-noreloc.html
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@gem_exec_reloc@basic-write-wc-noreloc.html

  * igt@gem_lmem_swapping@basic:
    - shard-rkl:          [SKIP][230] ([i915#4613]) -> [SKIP][231] ([i915#14544] / [i915#4613])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@gem_lmem_swapping@basic.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@random-engines:
    - shard-rkl:          [SKIP][232] ([i915#14544] / [i915#4613]) -> [SKIP][233] ([i915#4613])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@gem_lmem_swapping@random-engines.html
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_partial_pwrite_pread@reads:
    - shard-rkl:          [SKIP][234] ([i915#14544] / [i915#3282]) -> [SKIP][235] ([i915#3282]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@gem_partial_pwrite_pread@reads.html
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@gem_partial_pwrite_pread@reads.html

  * igt@gem_set_tiling_vs_pwrite:
    - shard-rkl:          [SKIP][236] ([i915#3282]) -> [SKIP][237] ([i915#14544] / [i915#3282]) +3 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@gem_set_tiling_vs_pwrite.html
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gem_set_tiling_vs_pwrite.html

  * igt@gem_userptr_blits@invalid-mmap-offset-unsync:
    - shard-rkl:          [SKIP][238] ([i915#3297]) -> [SKIP][239] ([i915#14544] / [i915#3297])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-rkl:          [SKIP][240] ([i915#14544] / [i915#2527]) -> [SKIP][241] ([i915#2527]) +1 other test skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@gen9_exec_parse@bb-start-far.html
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@gen9_exec_parse@bb-start-far.html

  * igt@gen9_exec_parse@valid-registers:
    - shard-rkl:          [SKIP][242] ([i915#2527]) -> [SKIP][243] ([i915#14544] / [i915#2527]) +2 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@gen9_exec_parse@valid-registers.html

  * igt@intel_hwmon@hwmon-read:
    - shard-rkl:          [SKIP][244] ([i915#14544] / [i915#7707]) -> [SKIP][245] ([i915#7707])
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@intel_hwmon@hwmon-read.html
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-4/igt@intel_hwmon@hwmon-read.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-rkl:          [SKIP][246] ([i915#5286]) -> [SKIP][247] ([i915#14544] / [i915#5286]) +3 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-rkl:          [SKIP][248] ([i915#14544] / [i915#5286]) -> [SKIP][249] ([i915#5286]) +2 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-rkl:          [SKIP][250] ([i915#14544] / [i915#3638]) -> [SKIP][251] ([i915#3638]) +1 other test skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-270.html
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          [SKIP][252] ([i915#3638]) -> [SKIP][253] ([i915#14544] / [i915#3638]) +1 other test skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_big_fb@linear-64bpp-rotate-90.html
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-rkl:          [SKIP][254] ([i915#3828]) -> [SKIP][255] ([i915#14544] / [i915#3828])
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-rkl:          [SKIP][256] ([i915#14544] / [i915#3828]) -> [SKIP][257] ([i915#3828])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-rkl:          [SKIP][258] ([i915#14544]) -> [SKIP][259] +38 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4:
    - shard-dg1:          [SKIP][260] ([i915#4423] / [i915#6095]) -> [SKIP][261] ([i915#6095]) +3 other tests skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-4.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
    - shard-rkl:          [SKIP][262] ([i915#14098] / [i915#6095]) -> [SKIP][263] ([i915#14098] / [i915#14544] / [i915#6095])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-rkl:          [SKIP][264] ([i915#12313] / [i915#14544]) -> [SKIP][265] ([i915#12313])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-rkl:          [SKIP][266] ([i915#12313]) -> [SKIP][267] ([i915#12313] / [i915#14544])
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-rkl:          [INCOMPLETE][268] ([i915#14694] / [i915#15582]) -> [INCOMPLETE][269] ([i915#15582]) +1 other test incomplete
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs:
    - shard-rkl:          [SKIP][270] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][271] ([i915#14098] / [i915#6095]) +10 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-4/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          [SKIP][272] ([i915#14544] / [i915#6095]) -> [SKIP][273] ([i915#6095]) +4 other tests skip
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-2.html
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4-lut1d:
    - shard-rkl:          [SKIP][274] ([i915#16471]) -> [SKIP][275] ([i915#14544] / [i915#16471])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4-lut1d.html
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4-lut1d.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
    - shard-rkl:          [SKIP][276] ([i915#11151] / [i915#7828]) -> [SKIP][277] ([i915#11151] / [i915#14544] / [i915#7828]) +2 other tests skip
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
    - shard-rkl:          [SKIP][278] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][279] ([i915#11151] / [i915#7828]) +5 other tests skip
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-dg1:          [SKIP][280] ([i915#11151] / [i915#4423] / [i915#7828]) -> [SKIP][281] ([i915#11151] / [i915#7828])
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@uevent-hdcp14:
    - shard-rkl:          [SKIP][282] ([i915#14544] / [i915#15865]) -> [SKIP][283] ([i915#15865])
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_content_protection@uevent-hdcp14.html
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_content_protection@uevent-hdcp14.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-rkl:          [SKIP][284] ([i915#14544] / [i915#3555]) -> [SKIP][285] ([i915#3555]) +1 other test skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-rkl:          [SKIP][286] ([i915#3555]) -> [SKIP][287] ([i915#14544] / [i915#3555]) +2 other tests skip
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@kms_cursor_crc@cursor-sliding-32x10.html
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-rkl:          [SKIP][288] -> [SKIP][289] ([i915#14544]) +33 other tests skip
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-rkl:          [SKIP][290] ([i915#14544] / [i915#9067]) -> [SKIP][291] ([i915#9067])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-rkl:          [SKIP][292] ([i915#9723]) -> [SKIP][293] ([i915#14544] / [i915#9723])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-rkl:          [SKIP][294] ([i915#13749]) -> [SKIP][295] ([i915#13749] / [i915#14544])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_dp_link_training@non-uhbr-mst.html
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-rkl:          [SKIP][296] ([i915#14544] / [i915#16361]) -> [SKIP][297] ([i915#16361])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          [SKIP][298] ([i915#16680]) -> [SKIP][299] ([i915#14544] / [i915#16680])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_fbcon_fbt@psr-suspend.html
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@display-2x:
    - shard-rkl:          [SKIP][300] ([i915#14544] / [i915#16081]) -> [SKIP][301] ([i915#16081])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_feature_discovery@display-2x.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_feature_discovery@display-2x.html

  * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
    - shard-rkl:          [SKIP][302] ([i915#9934]) -> [SKIP][303] ([i915#14544] / [i915#9934]) +6 other tests skip
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-rkl:          [SKIP][304] ([i915#14544] / [i915#9934]) -> [SKIP][305] ([i915#9934]) +2 other tests skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-glk:          [INCOMPLETE][306] ([i915#12314] / [i915#12745] / [i915#4839]) -> [INCOMPLETE][307] ([i915#12745] / [i915#4839])
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk8/igt@kms_flip@flip-vs-suspend-interruptible.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk4/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1:
    - shard-glk:          [INCOMPLETE][308] ([i915#12314] / [i915#12745]) -> [INCOMPLETE][309] ([i915#12745])
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-glk8/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-glk4/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-rkl:          [SKIP][310] ([i915#14544] / [i915#15643]) -> [SKIP][311] ([i915#15643]) +1 other test skip
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-rkl:          [SKIP][312] ([i915#15643]) -> [SKIP][313] ([i915#14544] / [i915#15643])
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_force_connector_basic@force-load-detect:
    - shard-mtlp:         [SKIP][314] ([i915#15672]) -> [SKIP][315]
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-mtlp-1/igt@kms_force_connector_basic@force-load-detect.html
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-mtlp-3/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-dg1:          [SKIP][316] ([i915#15990] / [i915#4423]) -> [SKIP][317] ([i915#15990]) +1 other test skip
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-draw-mmap-gtt.html
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbchdr-tiling-4:
    - shard-rkl:          [SKIP][318] ([i915#5439]) -> [SKIP][319] ([i915#14544] / [i915#5439])
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_frontbuffer_tracking@fbchdr-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][320] ([i915#1825]) -> [SKIP][321] ([i915#14544] / [i915#1825]) +2 other tests skip
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][322] ([i915#14544] / [i915#1825]) -> [SKIP][323] ([i915#1825]) +3 other tests skip
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt:
    - shard-rkl:          [SKIP][324] ([i915#15102]) -> [SKIP][325] ([i915#14544] / [i915#15102]) +13 other tests skip
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-rkl:          [SKIP][326] ([i915#14544] / [i915#15102]) -> [SKIP][327] ([i915#15102]) +19 other tests skip
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-cpu.html
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-spr-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-render:
    - shard-dg1:          [SKIP][328] ([i915#4423]) -> [SKIP][329] +2 other tests skip
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-render.html
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-render:
    - shard-dg1:          [SKIP][330] ([i915#15989] / [i915#4423]) -> [SKIP][331] ([i915#15989])
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-render.html
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-indfb-draw-render:
    - shard-dg1:          [SKIP][332] -> [SKIP][333] ([i915#4423]) +1 other test skip
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-19/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-indfb-draw-render.html
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-13/igt@kms_frontbuffer_tracking@hdr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-rgb565-draw-render:
    - shard-dg1:          [SKIP][334] ([i915#15102] / [i915#4423]) -> [SKIP][335] ([i915#15102]) +2 other tests skip
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_frontbuffer_tracking@psrhdr-rgb565-draw-render.html
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_frontbuffer_tracking@psrhdr-rgb565-draw-render.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-rkl:          [SKIP][336] ([i915#14544] / [i915#15459]) -> [SKIP][337] ([i915#15459])
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_joiner@basic-force-big-joiner.html
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-4/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-rkl:          [SKIP][338] ([i915#15458]) -> [SKIP][339] ([i915#14544] / [i915#15458])
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_joiner@basic-force-ultra-joiner.html
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
    - shard-rkl:          [SKIP][340] ([i915#14544] / [i915#15709]) -> [SKIP][341] ([i915#15709])
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-5/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
    - shard-dg1:          [SKIP][342] ([i915#15709] / [i915#4423]) -> [SKIP][343] ([i915#15709])
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-rkl:          [SKIP][344] ([i915#13958] / [i915#14544]) -> [SKIP][345] ([i915#13958])
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_plane_multiple@2x-tiling-yf.html
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
    - shard-rkl:          [SKIP][346] ([i915#15329]) -> [SKIP][347] ([i915#14544] / [i915#15329]) +3 other tests skip
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html

  * igt@kms_pm_dc@dc5-psr-suspend-resume:
    - shard-rkl:          [SKIP][348] ([i915#16914]) -> [SKIP][349] ([i915#14544] / [i915#16914])
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_pm_dc@dc5-psr-suspend-resume.html
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_pm_dc@dc5-psr-suspend-resume.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-tglu:         [FAIL][350] ([i915#16479]) -> [SKIP][351] ([i915#15128])
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-tglu-8/igt@kms_pm_dc@dc6-dpms.html
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-tglu-6/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][352] ([i915#14544] / [i915#15073]) -> [SKIP][353] ([i915#15073])
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_pm_rpm@dpms-lpsp.html
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-dg1:          [DMESG-WARN][354] ([i915#4423]) -> [SKIP][355] ([i915#15073])
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-13/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@pc8-residency:
    - shard-dg1:          [SKIP][356] ([i915#16737] / [i915#4423]) -> [SKIP][357]
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_pm_rpm@pc8-residency.html
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_pm_rpm@pc8-residency.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-rkl:          [SKIP][358] ([i915#11520]) -> [SKIP][359] ([i915#11520] / [i915#14544])
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-rkl:          [SKIP][360] ([i915#11520] / [i915#14544]) -> [SKIP][361] ([i915#11520]) +3 other tests skip
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-pr-sprite-plane-onoff:
    - shard-rkl:          [SKIP][362] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][363] ([i915#1072] / [i915#9732]) +8 other tests skip
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-6/igt@kms_psr@fbc-pr-sprite-plane-onoff.html
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-3/igt@kms_psr@fbc-pr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr-cursor-mmap-gtt:
    - shard-dg1:          [SKIP][364] ([i915#1072] / [i915#4423] / [i915#9732]) -> [SKIP][365] ([i915#1072] / [i915#9732])
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-dg1-18/igt@kms_psr@fbc-psr-cursor-mmap-gtt.html
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-dg1-17/igt@kms_psr@fbc-psr-cursor-mmap-gtt.html

  * igt@kms_psr@pr-cursor-plane-onoff:
    - shard-rkl:          [SKIP][366] ([i915#1072] / [i915#9732]) -> [SKIP][367] ([i915#1072] / [i915#14544] / [i915#9732]) +9 other tests skip
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_psr@pr-cursor-plane-onoff.html
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_psr@pr-cursor-plane-onoff.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][368] ([i915#5289]) -> [SKIP][369] ([i915#14544] / [i915#5289])
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-rkl:          [SKIP][370] ([i915#8623]) -> [SKIP][371] ([i915#14544] / [i915#8623])
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          [SKIP][372] ([i915#11920]) -> [SKIP][373] ([i915#11920] / [i915#14544])
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-4/igt@kms_vrr@lobf.html
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@kms_vrr@lobf.html

  * igt@prime_vgem@coherency-gtt:
    - shard-rkl:          [SKIP][374] ([i915#3708]) -> [SKIP][375] ([i915#14544] / [i915#3708]) +1 other test skip
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_19064/shard-rkl-5/igt@prime_vgem@coherency-gtt.html
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/shard-rkl-6/igt@prime_vgem@coherency-gtt.html

  
  [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
  [i915#12177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12177
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12756]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12756
  [i915#12761]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12761
  [i915#13026]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13026
  [i915#13027]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13027
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
  [i915#13409]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13409
  [i915#13476]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13476
  [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#13781]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13781
  [i915#13820]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13820
  [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14419]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14419
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14600
  [i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
  [i915#14888]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14888
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15128]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15128
  [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
  [i915#15342]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15342
  [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
  [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
  [i915#15492]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15492
  [i915#15500]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15500
  [i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
  [i915#15587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15587
  [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
  [i915#15662]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15662
  [i915#15672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15672
  [i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
  [i915#15709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15709
  [i915#15733]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15733
  [i915#15804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15804
  [i915#15865]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15865
  [i915#15867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15867
  [i915#15989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15989
  [i915#15990]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15990
  [i915#15991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15991
  [i915#16081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16081
  [i915#16109]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16109
  [i915#16182]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16182
  [i915#16184]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16184
  [i915#16276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16276
  [i915#16348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16348
  [i915#16361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16361
  [i915#16471]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16471
  [i915#16479]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16479
  [i915#16600]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16600
  [i915#16644]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16644
  [i915#16680]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16680
  [i915#16737]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16737
  [i915#16789]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16789
  [i915#16837]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16837
  [i915#16844]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16844
  [i915#16852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16852
  [i915#16867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16867
  [i915#16870]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16870
  [i915#16876]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16876
  [i915#16881]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16881
  [i915#16912]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16912
  [i915#16914]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16914
  [i915#16922]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16922
  [i915#16931]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/16931
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4349]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4349
  [i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
  [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
  [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_19064 -> Patchwork_162016v4

  CI-20190529: 20190529
  CI_DRM_19064: 307e9559fc1b95a477f00a767ea053b78d263548 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_9078: 9078
  Patchwork_162016v4: 307e9559fc1b95a477f00a767ea053b78d263548 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_162016v4/index.html

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