* [PATCH] drm/i915/perf: fix ICL perf register offsets
@ 2019-06-10 8:19 Lionel Landwerlin
2019-06-10 12:39 ` ✓ Fi.CI.BAT: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Lionel Landwerlin @ 2019-06-10 8:19 UTC (permalink / raw)
To: intel-gfx
We got the wrong offsets (could they have changed?). New values were
computed off an error state by looking up the register offset in the
context image as written by the HW.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
---
drivers/gpu/drm/i915/i915_perf.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 4a767087de27..6c85191fc6c9 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3612,9 +3612,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
- dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
- dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
-
+ if (IS_GEN(dev_priv, 10)) {
+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
+ } else {
+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
+ }
dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
}
}
--
2.21.0.392.gf8f6787159e
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^ permalink raw reply related [flat|nested] 7+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/perf: fix ICL perf register offsets
2019-06-10 8:19 [PATCH] drm/i915/perf: fix ICL perf register offsets Lionel Landwerlin
@ 2019-06-10 12:39 ` Patchwork
2019-06-10 15:25 ` [PATCH] " Kenneth Graunke
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-06-10 12:39 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/perf: fix ICL perf register offsets
URL : https://patchwork.freedesktop.org/series/61826/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225 -> Patchwork_13216
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/
Known issues
------------
Here are the changes found in Patchwork_13216 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@basic-default:
- fi-icl-u2: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108569])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u2/igt@gem_ctx_switch@basic-default.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-u2/igt@gem_ctx_switch@basic-default.html
* igt@gem_exec_basic@basic-all:
- fi-icl-y: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-y/igt@gem_exec_basic@basic-all.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-y/igt@gem_exec_basic@basic-all.html
* igt@i915_selftest@live_sanitycheck:
- fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html
#### Possible fixes ####
* igt@gem_render_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-icl-u3/igt@gem_render_linear_blits@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-icl-u3/igt@gem_render_linear_blits@basic.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][9] ([fdo#109485]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
Participating hosts (54 -> 45)
------------------------------
Missing (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-guc fi-icl-dsi fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6225 -> Patchwork_13216
CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13216: 6646efae240b479f8024b15fa2d756d4c94ecb97 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6646efae240b drm/i915/perf: fix ICL perf register offsets
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915/perf: fix ICL perf register offsets
2019-06-10 8:19 [PATCH] drm/i915/perf: fix ICL perf register offsets Lionel Landwerlin
2019-06-10 12:39 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2019-06-10 15:25 ` Kenneth Graunke
2019-06-12 6:53 ` Lionel Landwerlin
2019-06-11 4:00 ` ✓ Fi.CI.IGT: success for " Patchwork
2019-06-25 19:15 ` [PATCH] " Umesh Nerlige Ramappa
3 siblings, 1 reply; 7+ messages in thread
From: Kenneth Graunke @ 2019-06-10 15:25 UTC (permalink / raw)
To: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 1459 bytes --]
On Monday, June 10, 2019 1:19:14 AM PDT Lionel Landwerlin wrote:
> We got the wrong offsets (could they have changed?). New values were
> computed off an error state by looking up the register offset in the
> context image as written by the HW.
>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
> ---
> drivers/gpu/drm/i915/i915_perf.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 4a767087de27..6c85191fc6c9 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -3612,9 +3612,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
> dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
> dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
>
> - dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
> - dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
> -
> + if (IS_GEN(dev_priv, 10)) {
> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
> + } else {
> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
> + }
> dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
> }
> }
>
Sounds believable.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
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[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915/perf: fix ICL perf register offsets
2019-06-10 15:25 ` [PATCH] " Kenneth Graunke
@ 2019-06-12 6:53 ` Lionel Landwerlin
2019-06-17 17:23 ` Lionel Landwerlin
0 siblings, 1 reply; 7+ messages in thread
From: Lionel Landwerlin @ 2019-06-12 6:53 UTC (permalink / raw)
To: Kenneth Graunke, intel-gfx
On 10/06/2019 18:25, Kenneth Graunke wrote:
> On Monday, June 10, 2019 1:19:14 AM PDT Lionel Landwerlin wrote:
>> We got the wrong offsets (could they have changed?). New values were
>> computed off an error state by looking up the register offset in the
>> context image as written by the HW.
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>> Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
>> ---
>> drivers/gpu/drm/i915/i915_perf.c | 10 +++++++---
>> 1 file changed, 7 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
>> index 4a767087de27..6c85191fc6c9 100644
>> --- a/drivers/gpu/drm/i915/i915_perf.c
>> +++ b/drivers/gpu/drm/i915/i915_perf.c
>> @@ -3612,9 +3612,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
>> dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
>> dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
>>
>> - dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
>> - dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
>> -
>> + if (IS_GEN(dev_priv, 10)) {
>> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
>> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
>> + } else {
>> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
>> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
>> + }
>> dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
>> }
>> }
>>
> Sounds believable.
>
> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Thanks Ken.
This was confirmed to fix the issue seen in performance queries.
Is a Acked-by enough to land this?
Could someone else maybe review?
Thanks a lot,
-Lionel
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^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915/perf: fix ICL perf register offsets
2019-06-12 6:53 ` Lionel Landwerlin
@ 2019-06-17 17:23 ` Lionel Landwerlin
0 siblings, 0 replies; 7+ messages in thread
From: Lionel Landwerlin @ 2019-06-17 17:23 UTC (permalink / raw)
To: Kenneth Graunke, intel-gfx
On 12/06/2019 09:53, Lionel Landwerlin wrote:
> On 10/06/2019 18:25, Kenneth Graunke wrote:
>> On Monday, June 10, 2019 1:19:14 AM PDT Lionel Landwerlin wrote:
>>> We got the wrong offsets (could they have changed?). New values were
>>> computed off an error state by looking up the register offset in the
>>> context image as written by the HW.
>>>
>>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>>> Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
>>> ---
>>> drivers/gpu/drm/i915/i915_perf.c | 10 +++++++---
>>> 1 file changed, 7 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_perf.c
>>> b/drivers/gpu/drm/i915/i915_perf.c
>>> index 4a767087de27..6c85191fc6c9 100644
>>> --- a/drivers/gpu/drm/i915/i915_perf.c
>>> +++ b/drivers/gpu/drm/i915/i915_perf.c
>>> @@ -3612,9 +3612,13 @@ void i915_perf_init(struct drm_i915_private
>>> *dev_priv)
>>> dev_priv->perf.oa.ops.enable_metric_set =
>>> gen8_enable_metric_set;
>>> dev_priv->perf.oa.ops.disable_metric_set =
>>> gen10_disable_metric_set;
>>> - dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
>>> - dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
>>> -
>>> + if (IS_GEN(dev_priv, 10)) {
>>> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
>>> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
>>> + } else {
>>> + dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
>>> + dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
>>> + }
>>> dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
>>> }
>>> }
>>>
>> Sounds believable.
>>
>> Acked-by: Kenneth Graunke <kenneth@whitecape.org>
>
> Thanks Ken.
>
>
> This was confirmed to fix the issue seen in performance queries.
>
> Is a Acked-by enough to land this?
>
> Could someone else maybe review?
>
>
> Thanks a lot,
>
> -Lionel
>
Ping?
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^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/perf: fix ICL perf register offsets
2019-06-10 8:19 [PATCH] drm/i915/perf: fix ICL perf register offsets Lionel Landwerlin
2019-06-10 12:39 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-06-10 15:25 ` [PATCH] " Kenneth Graunke
@ 2019-06-11 4:00 ` Patchwork
2019-06-25 19:15 ` [PATCH] " Umesh Nerlige Ramappa
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-06-11 4:00 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/perf: fix ICL perf register offsets
URL : https://patchwork.freedesktop.org/series/61826/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6225_full -> Patchwork_13216_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13216_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_engines@execute-one:
- shard-skl: [PASS][1] -> [DMESG-WARN][2] ([fdo#110869])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl4/igt@gem_ctx_engines@execute-one.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl4/igt@gem_ctx_engines@execute-one.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: [PASS][3] -> [DMESG-WARN][4] ([fdo#108566])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-apl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-skl: [PASS][5] -> [INCOMPLETE][6] ([fdo#110741])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic:
- shard-hsw: [PASS][7] -> [FAIL][8] ([fdo#103355])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-modeset-vs-hang:
- shard-iclb: [PASS][11] -> [INCOMPLETE][12] ([fdo#107713])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb4/igt@kms_flip@flip-vs-modeset-vs-hang.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb8/igt@kms_flip@flip-vs-modeset-vs-hang.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite:
- shard-apl: [PASS][15] -> [FAIL][16] ([fdo#103167])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-apl1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite:
- shard-hsw: [PASS][17] -> [SKIP][18] ([fdo#109271]) +16 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-pwrite.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_sysfs_edid_timing:
- shard-hsw: [PASS][21] -> [FAIL][22] ([fdo#100047])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw5/igt@kms_sysfs_edid_timing.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw1/igt@kms_sysfs_edid_timing.html
* igt@perf@blocking:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#110728])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl10/igt@perf@blocking.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl8/igt@perf@blocking.html
* igt@perf@short-reads:
- shard-skl: [PASS][25] -> [FAIL][26] ([fdo#103183])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl10/igt@perf@short-reads.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl1/igt@perf@short-reads.html
#### Possible fixes ####
* igt@gem_eio@in-flight-suspend:
- shard-skl: [INCOMPLETE][27] ([fdo#104108]) -> [PASS][28] +2 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl4/igt@gem_eio@in-flight-suspend.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl10/igt@gem_eio@in-flight-suspend.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-kbl: [DMESG-WARN][29] ([fdo#108566]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-kbl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-kbl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [FAIL][31] ([fdo#105363]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-hsw: [SKIP][33] ([fdo#109271]) -> [PASS][34] +22 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-hsw1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-hsw6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [FAIL][35] ([fdo#105363]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [FAIL][37] ([fdo#103167]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [DMESG-WARN][39] ([fdo#108566]) -> [PASS][40] +6 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][41] ([fdo#108145] / [fdo#110403]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_setmode@basic:
- shard-skl: [FAIL][43] ([fdo#99912]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-skl1/igt@kms_setmode@basic.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-skl1/igt@kms_setmode@basic.html
- shard-kbl: [FAIL][45] ([fdo#99912]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-kbl2/igt@kms_setmode@basic.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-kbl4/igt@kms_setmode@basic.html
* igt@kms_sysfs_edid_timing:
- shard-iclb: [FAIL][47] ([fdo#100047]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb3/igt@kms_sysfs_edid_timing.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb4/igt@kms_sysfs_edid_timing.html
#### Warnings ####
* igt@gem_mmap_gtt@forked-big-copy-xy:
- shard-iclb: [TIMEOUT][49] ([fdo#109673]) -> [INCOMPLETE][50] ([fdo#107713] / [fdo#109100])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6225/shard-iclb1/igt@gem_mmap_gtt@forked-big-copy-xy.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/shard-iclb1/igt@gem_mmap_gtt@forked-big-copy-xy.html
[fdo#100047]: https://bugs.freedesktop.org/show_bug.cgi?id=100047
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103183]: https://bugs.freedesktop.org/show_bug.cgi?id=103183
[fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109673]: https://bugs.freedesktop.org/show_bug.cgi?id=109673
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#110741]: https://bugs.freedesktop.org/show_bug.cgi?id=110741
[fdo#110869]: https://bugs.freedesktop.org/show_bug.cgi?id=110869
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_6225 -> Patchwork_13216
CI_DRM_6225: 39bb7459567aada2e706e4da4a650dc4f7c41abf @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5049: db51cbba5a8f4856d6f56a61aa51fda6e239fa44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13216: 6646efae240b479f8024b15fa2d756d4c94ecb97 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13216/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915/perf: fix ICL perf register offsets
2019-06-10 8:19 [PATCH] drm/i915/perf: fix ICL perf register offsets Lionel Landwerlin
` (2 preceding siblings ...)
2019-06-11 4:00 ` ✓ Fi.CI.IGT: success for " Patchwork
@ 2019-06-25 19:15 ` Umesh Nerlige Ramappa
3 siblings, 0 replies; 7+ messages in thread
From: Umesh Nerlige Ramappa @ 2019-06-25 19:15 UTC (permalink / raw)
To: Lionel Landwerlin; +Cc: intel-gfx
On Mon, Jun 10, 2019 at 11:19:14AM +0300, Lionel Landwerlin wrote:
>We got the wrong offsets (could they have changed?). New values were
>computed off an error state by looking up the register offset in the
>context image as written by the HW.
>
>Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
>Fixes: 1de401c08fa805 ("drm/i915/perf: enable perf support on ICL")
>---
> drivers/gpu/drm/i915/i915_perf.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
>index 4a767087de27..6c85191fc6c9 100644
>--- a/drivers/gpu/drm/i915/i915_perf.c
>+++ b/drivers/gpu/drm/i915/i915_perf.c
>@@ -3612,9 +3612,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv)
> dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
> dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
>
>- dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
>- dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
>-
>+ if (IS_GEN(dev_priv, 10)) {
>+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
>+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
>+ } else {
>+ dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
>+ dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
>+ }
> dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
> }
> }
>--
>2.21.0.392.gf8f6787159e
>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-06-25 19:15 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-06-10 8:19 [PATCH] drm/i915/perf: fix ICL perf register offsets Lionel Landwerlin
2019-06-10 12:39 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-06-10 15:25 ` [PATCH] " Kenneth Graunke
2019-06-12 6:53 ` Lionel Landwerlin
2019-06-17 17:23 ` Lionel Landwerlin
2019-06-11 4:00 ` ✓ Fi.CI.IGT: success for " Patchwork
2019-06-25 19:15 ` [PATCH] " Umesh Nerlige Ramappa
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