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* [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
@ 2013-12-10  7:29 Kenneth Graunke
  2013-12-10  7:29 ` [PATCH 2/2] rendercopy/bdw: Fix length of a bunch of zeroed out packets Kenneth Graunke
  2013-12-10 11:40 ` [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Damien Lespiau
  0 siblings, 2 replies; 5+ messages in thread
From: Kenneth Graunke @ 2013-12-10  7:29 UTC (permalink / raw)
  To: intel-gfx; +Cc: Ben Widawsky

We don't want depth/stencil fast clears or HiZ resolves; we want normal
drawing.  Without this, the pixel pipeline doesn't work.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
---
 lib/gen8_render.h     |  2 ++
 lib/rendercopy_gen8.c | 10 ++++++++++
 2 files changed, 12 insertions(+)

diff --git a/lib/gen8_render.h b/lib/gen8_render.h
index 7b89876..ca53d64 100644
--- a/lib/gen8_render.h
+++ b/lib/gen8_render.h
@@ -22,6 +22,8 @@
 # define GEN8_3DSTATE_MULTISAMPLE_NUMSAMPLES_8			(3 << 1)
 # define GEN9_3DSTATE_MULTISAMPLE_NUMSAMPLES_16			(4 << 1)
 
+#define GEN8_3DSTATE_WM_HZ_OP			GEN6_3D(3, 0, 0x52)
+
 #define GEN8_3DSTATE_VF_INSTANCING		GEN6_3D(3, 0, 0x49)
 #define GEN7_3DSTATE_GS				GEN6_3D(3, 0, 0x11)
 #define GEN7_3DSTATE_CONSTANT_GS		GEN6_3D(3, 0, 0x16)
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 1a137dd..38dc0e7 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -679,7 +679,17 @@ gen8_emit_ds(struct intel_batchbuffer *batch) {
 }
 
 static void
+gen8_emit_wm_hz_op(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+}
+
+static void
 gen8_emit_null_state(struct intel_batchbuffer *batch) {
+	gen8_emit_wm_hz_op(batch);
 	gen8_emit_hs(batch);
 	OUT_BATCH(GEN7_3DSTATE_TE | (4-2));
 	OUT_BATCH(0);
-- 
1.8.4.2

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH 2/2] rendercopy/bdw: Fix length of a bunch of zeroed out packets.
  2013-12-10  7:29 [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Kenneth Graunke
@ 2013-12-10  7:29 ` Kenneth Graunke
  2013-12-10 11:40 ` [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Damien Lespiau
  1 sibling, 0 replies; 5+ messages in thread
From: Kenneth Graunke @ 2013-12-10  7:29 UTC (permalink / raw)
  To: intel-gfx; +Cc: Ben Widawsky

A bunch of packets were too short.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
---
 lib/rendercopy_gen8.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

The test is still broken for me, but I figure these patches are necessary
(if not sufficient)

diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 38dc0e7..45a134c 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -584,7 +584,10 @@ gen8_emit_vs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN6_3DSTATE_VS | (6-2));
+	OUT_BATCH(GEN6_3DSTATE_VS | (9-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -606,7 +609,9 @@ gen8_emit_hs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_HS | (7-2));
+	OUT_BATCH(GEN7_3DSTATE_HS | (9-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -635,7 +640,10 @@ gen8_emit_gs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_GS | (7-2));
+	OUT_BATCH(GEN7_3DSTATE_GS | (10-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -664,7 +672,10 @@ gen8_emit_ds(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_DS | (6-2));
+	OUT_BATCH(GEN7_3DSTATE_DS | (9-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -786,7 +797,8 @@ gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) {
 
 static void
 gen8_emit_depth(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7-2));
+	OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (8-2));
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -937,7 +949,9 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch,
 
 	gen8_emit_null_state(batch);
 
-	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | 1);
+	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-- 
1.8.4.2

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
  2013-12-10  7:29 [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Kenneth Graunke
  2013-12-10  7:29 ` [PATCH 2/2] rendercopy/bdw: Fix length of a bunch of zeroed out packets Kenneth Graunke
@ 2013-12-10 11:40 ` Damien Lespiau
  2013-12-10 17:04   ` Kenneth Graunke
  1 sibling, 1 reply; 5+ messages in thread
From: Damien Lespiau @ 2013-12-10 11:40 UTC (permalink / raw)
  To: Kenneth Graunke; +Cc: intel-gfx, Ben Widawsky

On Mon, Dec 09, 2013 at 11:29:35PM -0800, Kenneth Graunke wrote:
> We don't want depth/stencil fast clears or HiZ resolves; we want normal
> drawing.  Without this, the pixel pipeline doesn't work.
> 
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> Cc: Ben Widawsky <ben@bwidawsk.net>
> Cc: Damien Lespiau <damien.lespiau@intel.com>

Both patches reviewed and pushed, thanks a lot for doing this. Does it
mean rendercopy run for you now? (I don't have silicon to test myself).

I've also taught my command parser to warn harder about instruction
lengths, it was missing the cases you fixed.

-- 
Damien

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
  2013-12-10 11:40 ` [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Damien Lespiau
@ 2013-12-10 17:04   ` Kenneth Graunke
  2013-12-11  1:44     ` Xiang, Haihao
  0 siblings, 1 reply; 5+ messages in thread
From: Kenneth Graunke @ 2013-12-10 17:04 UTC (permalink / raw)
  To: Damien Lespiau; +Cc: intel-gfx, Ben Widawsky

On 12/10/2013 03:40 AM, Damien Lespiau wrote:
> On Mon, Dec 09, 2013 at 11:29:35PM -0800, Kenneth Graunke wrote:
>> We don't want depth/stencil fast clears or HiZ resolves; we want normal
>> drawing.  Without this, the pixel pipeline doesn't work.
>>
>> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
>> Cc: Ben Widawsky <ben@bwidawsk.net>
>> Cc: Damien Lespiau <damien.lespiau@intel.com>
> 
> Both patches reviewed and pushed, thanks a lot for doing this. Does it
> mean rendercopy run for you now? (I don't have silicon to test myself).
> 
> I've also taught my command parser to warn harder about instruction
> lengths, it was missing the cases you fixed.

It still hangs for me.  I also tried Haihao's patch, though I guess I
didn't try both together...

--Ken

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
  2013-12-10 17:04   ` Kenneth Graunke
@ 2013-12-11  1:44     ` Xiang, Haihao
  0 siblings, 0 replies; 5+ messages in thread
From: Xiang, Haihao @ 2013-12-11  1:44 UTC (permalink / raw)
  To: Kenneth Graunke; +Cc: intel-gfx, Ben Widawsky

On Tue, 2013-12-10 at 09:04 -0800, Kenneth Graunke wrote: 
> On 12/10/2013 03:40 AM, Damien Lespiau wrote:
> > On Mon, Dec 09, 2013 at 11:29:35PM -0800, Kenneth Graunke wrote:
> >> We don't want depth/stencil fast clears or HiZ resolves; we want normal
> >> drawing.  Without this, the pixel pipeline doesn't work.
> >>
> >> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> >> Cc: Ben Widawsky <ben@bwidawsk.net>
> >> Cc: Damien Lespiau <damien.lespiau@intel.com>
> > 
> > Both patches reviewed and pushed, thanks a lot for doing this. Does it
> > mean rendercopy run for you now? (I don't have silicon to test myself).
> > 
> > I've also taught my command parser to warn harder about instruction
> > lengths, it was missing the cases you fixed.
> 
> It still hangs for me.  I also tried Haihao's patch, though I guess I
> didn't try both together...

Now gem_render_copy works fine for me without my workaround.

Thanks
Haihao


> 
> --Ken
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-12-11  1:43 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-12-10  7:29 [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Kenneth Graunke
2013-12-10  7:29 ` [PATCH 2/2] rendercopy/bdw: Fix length of a bunch of zeroed out packets Kenneth Graunke
2013-12-10 11:40 ` [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Damien Lespiau
2013-12-10 17:04   ` Kenneth Graunke
2013-12-11  1:44     ` Xiang, Haihao

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