From: Chris Wilson <chris@chris-wilson.co.uk>
To: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Fix KMS regression on Sandybridge/CPT
Date: Fri, 29 Oct 2010 09:52:31 +0100 [thread overview]
Message-ID: <849307$a66648@azsmga001.ch.intel.com> (raw)
In-Reply-To: <20101029023451.GA1005@zhen-devel.sh.intel.com>
On Fri, 29 Oct 2010 10:34:51 +0800, Zhenyu Wang <zhenyuw@linux.intel.com> wrote:
> On 2010.10.28 10:50:04 +0100, Chris Wilson wrote:
> > I've shrunk the patch to just the FDI portion, pushed to staging for
> > review.
>
> Current drm-intel-staging still fails unfortunately..
I'm very interested to know which was the magic bit then. :)
Did we lose the transcoder bpc setting? Is an extra READ masking a missing
delay? Is the break-scanline-wait fouling gen6?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
next prev parent reply other threads:[~2010-10-29 8:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-28 8:38 [PATCH] drm/i915: Fix KMS regression on Sandybridge/CPT Zhenyu Wang
2010-10-28 9:50 ` Chris Wilson
2010-10-29 2:34 ` Zhenyu Wang
2010-10-29 8:52 ` Chris Wilson [this message]
2010-11-02 6:24 ` Zhenyu Wang
2010-11-04 2:23 ` Chris Wilson
[not found] ` <20101104055024.GJ6369@zhen-devel.sh.intel.com>
2010-11-04 6:26 ` Zhenyu Wang
2010-11-04 9:08 ` Chris Wilson
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