From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: "Sundaresan, Sujaritha" <sujaritha.sundaresan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/8] drm/i915/gt: Fix perf limit reasons bit positions
Date: Thu, 08 Sep 2022 08:49:42 -0700 [thread overview]
Message-ID: <875yhxyig9.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <4a2b75d2-4605-07a1-4b06-425aa09b4738@intel.com>
On Thu, 08 Sep 2022 05:37:08 -0700, Sundaresan, Sujaritha wrote:
>
> On 9/8/2022 4:12 PM, Andi Shyti wrote:
> > Hi,
> >
> > On Wed, Sep 07, 2022 at 10:21:53PM -0700, Ashutosh Dixit wrote:
> >> Perf limit reasons bit positions were off by one.
> >>
> >> Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces")
> >> Cc: stable@vger.kernel.org # v5.18+
> >> Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> >> Cc: Andi Shyti <andi.shyti@linux.intel.com>
> >> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > Thanks Ashutosh!
> >
> >> ---
> >> drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++--------
> >> 1 file changed, 8 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> >> index c413eec3373f..24009786f88b 100644
> >> --- a/drivers/gpu/drm/i915/i915_reg.h
> >> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >> @@ -1794,14 +1794,14 @@
> >> #define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8)
> >> #define GT0_PERF_LIMIT_REASONS_MASK 0xde3
> >> -#define PROCHOT_MASK REG_BIT(1)
> >> -#define THERMAL_LIMIT_MASK REG_BIT(2)
> >> -#define RATL_MASK REG_BIT(6)
> >> -#define VR_THERMALERT_MASK REG_BIT(7)
> >> -#define VR_TDC_MASK REG_BIT(8)
> >> -#define POWER_LIMIT_4_MASK REG_BIT(9)
> >> -#define POWER_LIMIT_1_MASK REG_BIT(11)
> >> -#define POWER_LIMIT_2_MASK REG_BIT(12)
> >> +#define PROCHOT_MASK REG_BIT(0)
> >> +#define THERMAL_LIMIT_MASK REG_BIT(1)
> >> +#define RATL_MASK REG_BIT(5)
> >> +#define VR_THERMALERT_MASK REG_BIT(6)
> >> +#define VR_TDC_MASK REG_BIT(7)
> >> +#define POWER_LIMIT_4_MASK REG_BIT(8)
> >> +#define POWER_LIMIT_1_MASK REG_BIT(10)
> >> +#define POWER_LIMIT_2_MASK REG_BIT(11)
> > Sujaritha, could you please check and r-b this one?
> >
> > Thanks,
> > Andi
>
> Looks good. I've checked the reg bits.
>
> Reviewed-by : Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
^
I will fix it so no need to resend but just FYI Patchwork doesn't like the
extra space above so doesn't register the R-b...
next prev parent reply other threads:[~2022-09-08 15:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-08 5:18 [Intel-gfx] [PATCH 0/8] i915: freq caps and perf_limit_reasons changes for MTL Ashutosh Dixit
2022-09-08 5:18 ` [Intel-gfx] [PATCH 1/8] drm/i915: Prepare more multi-GT initialization Ashutosh Dixit
2022-09-08 5:18 ` [Intel-gfx] [PATCH 2/8] drm/i915: Rename and expose common GT early init routine Ashutosh Dixit
2022-09-08 5:18 ` [Intel-gfx] [PATCH 3/8] drm/i915/uncore: Add GSI offset to uncore Ashutosh Dixit
2022-09-08 5:18 ` [Intel-gfx] [PATCH 4/8] drm/i915/xelpmp: Expose media as another GT Ashutosh Dixit
2022-09-08 5:21 ` [Intel-gfx] [PATCH 5/8] drm/i915/gt: Fix perf limit reasons bit positions Ashutosh Dixit
2022-09-08 10:42 ` Andi Shyti
2022-09-08 12:37 ` Sundaresan, Sujaritha
2022-09-08 12:50 ` Andi Shyti
2022-09-08 15:49 ` Dixit, Ashutosh [this message]
2022-09-08 5:22 ` [Intel-gfx] [PATCH 6/8] drm/i915/debugfs: Add perf_limit_reasons in debugfs Ashutosh Dixit
2022-09-09 10:13 ` Rodrigo Vivi
2022-09-09 15:38 ` Dixit, Ashutosh
2022-09-09 16:39 ` Vivi, Rodrigo
2022-09-08 5:23 ` [Intel-gfx] [PATCH 7/8] drm/i915/mtl: PERF_LIMIT_REASONS changes for MTL Ashutosh Dixit
2022-09-09 10:15 ` Rodrigo Vivi
2022-09-08 5:23 ` [Intel-gfx] [PATCH 8/8] drm/i915/rps: Freq caps " Ashutosh Dixit
2022-09-09 10:16 ` Rodrigo Vivi
2022-09-08 5:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: freq caps and perf_limit_reasons changes for MTL (rev2) Patchwork
2022-09-08 5:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-08 6:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-08 11:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-09-09 18:13 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: freq caps and perf_limit_reasons changes for MTL (rev3) Patchwork
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