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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Raag Jadav <raag.jadav@intel.com>,
	joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com,
	matthew.d.roper@intel.com, andi.shyti@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com,
	badal.nilawar@intel.com, riana.tauro@intel.com,
	Raag Jadav <raag.jadav@intel.com>
Subject: Re: [PATCH v2 0/4] Implement Wa_14022698537
Date: Fri, 11 Oct 2024 13:54:01 +0300	[thread overview]
Message-ID: <87bjzq6hbq.fsf@intel.com> (raw)
In-Reply-To: <20241011103250.1035316-1-raag.jadav@intel.com>

On Fri, 11 Oct 2024, Raag Jadav <raag.jadav@intel.com> wrote:
> This series implements Wa_14022698537 along with its prerequisites.
> Detailed description in commit message.

The same workaround is also needed for the xe driver, right?

Please include that in the same series, so that we can unify the
solution in a way that suits everyone. Especially the PCI ID macros need
to match between i915_pciids.h and xe_pciids.h, because my plan is to
merge those two files together soonish.

BR,
Jani.

>
> v2: Introduce DG2_WA subplatform for workaround (Jani)
>     Fix Wa_ID and include it in subject (Badal)
>     Rephrase commit message (Jani)
>     Move CPU whitelist to intel_wa_cpu.c
> v1: https://patchwork.freedesktop.org/series/139628/
>
> Raag Jadav (4):
>   drm/i915/pciids: Refactor DG2 PCI IDs into workaround ranges
>   drm/i915/dg2: Introduce DG2_WA subplatform
>   drm/i915/wa: Introduce intel_wa_cpu.c for CPU specific workarounds
>   drm/i915/dg2: Implement Wa_14022698537
>
>  drivers/gpu/drm/i915/Makefile               |  1 +
>  drivers/gpu/drm/i915/gt/intel_wa_cpu.c      | 34 +++++++++++++++++++++
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 +++++++++++
>  drivers/gpu/drm/i915/gt/intel_workarounds.h |  2 ++
>  drivers/gpu/drm/i915/i915_drv.h             |  2 ++
>  drivers/gpu/drm/i915/i915_reg.h             |  1 +
>  drivers/gpu/drm/i915/intel_device_info.c    | 34 +++++++++++++++------
>  drivers/gpu/drm/i915/intel_device_info.h    |  5 ++-
>  include/drm/intel/i915_pciids.h             | 34 +++++++++++++++------
>  9 files changed, 111 insertions(+), 20 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/gt/intel_wa_cpu.c

-- 
Jani Nikula, Intel

  parent reply	other threads:[~2024-10-11 10:54 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-11 10:32 [PATCH v2 0/4] Implement Wa_14022698537 Raag Jadav
2024-10-11 10:32 ` [PATCH v2 1/4] drm/i915/pciids: Refactor DG2 PCI IDs into workaround ranges Raag Jadav
2024-10-11 10:40   ` Jani Nikula
2024-10-11 10:32 ` [PATCH v2 2/4] drm/i915/dg2: Introduce DG2_WA subplatform Raag Jadav
2024-10-11 10:44   ` Jani Nikula
2024-10-15  9:54     ` Raag Jadav
2024-10-11 10:32 ` [PATCH v2 3/4] drm/i915/wa: Introduce intel_wa_cpu.c for CPU specific workarounds Raag Jadav
2024-10-11 10:52   ` Jani Nikula
2024-10-15 10:26   ` Riana Tauro
2024-10-16  9:01     ` Raag Jadav
2024-10-22  9:53       ` Riana Tauro
2024-10-11 10:32 ` [PATCH v2 4/4] drm/i915/dg2: Implement Wa_14022698537 Raag Jadav
2024-10-15 10:02   ` Riana Tauro
2024-10-22 13:11   ` Nilawar, Badal
2024-10-23  7:09     ` Raag Jadav
2024-10-23  8:25       ` Gupta, Anshuman
2024-10-11 10:54 ` Jani Nikula [this message]
2024-10-11 11:35 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2024-10-11 11:35 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-11 11:39 ` ✗ Fi.CI.BAT: failure " Patchwork

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