From: Jani Nikula <jani.nikula@linux.intel.com>
To: Raag Jadav <raag.jadav@intel.com>,
joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com,
matthew.d.roper@intel.com, andi.shyti@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com,
badal.nilawar@intel.com, riana.tauro@intel.com,
Raag Jadav <raag.jadav@intel.com>
Subject: Re: [PATCH v2 1/4] drm/i915/pciids: Refactor DG2 PCI IDs into workaround ranges
Date: Fri, 11 Oct 2024 13:40:31 +0300 [thread overview]
Message-ID: <87ldyu6hy8.fsf@intel.com> (raw)
In-Reply-To: <20241011103250.1035316-2-raag.jadav@intel.com>
On Fri, 11 Oct 2024, Raag Jadav <raag.jadav@intel.com> wrote:
> Refactor DG2 PCI IDs into device ranges that will be used in a workaround.
Give the PCI ID ranges a name other than "WA". What are they?
BR,
Jani.
>
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
> include/drm/intel/i915_pciids.h | 34 +++++++++++++++++++++++----------
> 1 file changed, 24 insertions(+), 10 deletions(-)
>
> diff --git a/include/drm/intel/i915_pciids.h b/include/drm/intel/i915_pciids.h
> index 2bf03ebfcf73..82f960f625c7 100644
> --- a/include/drm/intel/i915_pciids.h
> +++ b/include/drm/intel/i915_pciids.h
> @@ -724,37 +724,51 @@
> MACRO__(0xA7AB, ## __VA_ARGS__)
>
> /* DG2 */
> +#define INTEL_DG2_G10_WA_IDS(MACRO__, ...) \
> + MACRO__(0x56A0, ## __VA_ARGS__), \
> + MACRO__(0x56A1, ## __VA_ARGS__), \
> + MACRO__(0x56A2, ## __VA_ARGS__)
> +
> #define INTEL_DG2_G10_IDS(MACRO__, ...) \
> + INTEL_DG2_G10_WA_IDS(MACRO__, ## __VA_ARGS__), \
> MACRO__(0x5690, ## __VA_ARGS__), \
> MACRO__(0x5691, ## __VA_ARGS__), \
> MACRO__(0x5692, ## __VA_ARGS__), \
> - MACRO__(0x56A0, ## __VA_ARGS__), \
> - MACRO__(0x56A1, ## __VA_ARGS__), \
> - MACRO__(0x56A2, ## __VA_ARGS__), \
> MACRO__(0x56BE, ## __VA_ARGS__), \
> MACRO__(0x56BF, ## __VA_ARGS__)
>
> +#define INTEL_DG2_G11_WA_IDS(MACRO__, ...) \
> + MACRO__(0x56A5, ## __VA_ARGS__), \
> + MACRO__(0x56A6, ## __VA_ARGS__), \
> + MACRO__(0x56B0, ## __VA_ARGS__), \
> + MACRO__(0x56B1, ## __VA_ARGS__)
> +
> #define INTEL_DG2_G11_IDS(MACRO__, ...) \
> + INTEL_DG2_G11_WA_IDS(MACRO__, ## __VA_ARGS__), \
> MACRO__(0x5693, ## __VA_ARGS__), \
> MACRO__(0x5694, ## __VA_ARGS__), \
> MACRO__(0x5695, ## __VA_ARGS__), \
> - MACRO__(0x56A5, ## __VA_ARGS__), \
> - MACRO__(0x56A6, ## __VA_ARGS__), \
> - MACRO__(0x56B0, ## __VA_ARGS__), \
> - MACRO__(0x56B1, ## __VA_ARGS__), \
> MACRO__(0x56BA, ## __VA_ARGS__), \
> MACRO__(0x56BB, ## __VA_ARGS__), \
> MACRO__(0x56BC, ## __VA_ARGS__), \
> MACRO__(0x56BD, ## __VA_ARGS__)
>
> -#define INTEL_DG2_G12_IDS(MACRO__, ...) \
> - MACRO__(0x5696, ## __VA_ARGS__), \
> - MACRO__(0x5697, ## __VA_ARGS__), \
> +#define INTEL_DG2_G12_WA_IDS(MACRO__, ...) \
> MACRO__(0x56A3, ## __VA_ARGS__), \
> MACRO__(0x56A4, ## __VA_ARGS__), \
> MACRO__(0x56B2, ## __VA_ARGS__), \
> MACRO__(0x56B3, ## __VA_ARGS__)
>
> +#define INTEL_DG2_G12_IDS(MACRO__, ...) \
> + INTEL_DG2_G11_WA_IDS(MACRO__, ## __VA_ARGS__), \
> + MACRO__(0x5696, ## __VA_ARGS__), \
> + MACRO__(0x5697, ## __VA_ARGS__)
> +
> +#define INTEL_DG2_WA_IDS(MACRO__, ...) \
> + INTEL_DG2_G10_WA_IDS(MACRO__, ## __VA_ARGS__), \
> + INTEL_DG2_G11_WA_IDS(MACRO__, ## __VA_ARGS__), \
> + INTEL_DG2_G12_WA_IDS(MACRO__, ## __VA_ARGS__)
> +
> #define INTEL_DG2_IDS(MACRO__, ...) \
> INTEL_DG2_G10_IDS(MACRO__, ## __VA_ARGS__), \
> INTEL_DG2_G11_IDS(MACRO__, ## __VA_ARGS__), \
--
Jani Nikula, Intel
next prev parent reply other threads:[~2024-10-11 10:40 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-11 10:32 [PATCH v2 0/4] Implement Wa_14022698537 Raag Jadav
2024-10-11 10:32 ` [PATCH v2 1/4] drm/i915/pciids: Refactor DG2 PCI IDs into workaround ranges Raag Jadav
2024-10-11 10:40 ` Jani Nikula [this message]
2024-10-11 10:32 ` [PATCH v2 2/4] drm/i915/dg2: Introduce DG2_WA subplatform Raag Jadav
2024-10-11 10:44 ` Jani Nikula
2024-10-15 9:54 ` Raag Jadav
2024-10-11 10:32 ` [PATCH v2 3/4] drm/i915/wa: Introduce intel_wa_cpu.c for CPU specific workarounds Raag Jadav
2024-10-11 10:52 ` Jani Nikula
2024-10-15 10:26 ` Riana Tauro
2024-10-16 9:01 ` Raag Jadav
2024-10-22 9:53 ` Riana Tauro
2024-10-11 10:32 ` [PATCH v2 4/4] drm/i915/dg2: Implement Wa_14022698537 Raag Jadav
2024-10-15 10:02 ` Riana Tauro
2024-10-22 13:11 ` Nilawar, Badal
2024-10-23 7:09 ` Raag Jadav
2024-10-23 8:25 ` Gupta, Anshuman
2024-10-11 10:54 ` [PATCH v2 0/4] " Jani Nikula
2024-10-11 11:35 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2024-10-11 11:35 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-10-11 11:39 ` ✗ Fi.CI.BAT: failure " Patchwork
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