Re: [PATCH 08/22] drm/i915/icl: WaDisCtxReload

[Mika Kuoppala <mika.kuoppala@linux.intel.com>]

Oscar Mateo <oscar.mateo@intel.com> writes:

> Revert to the legacy implementation to avoid a system hang.
>
> v2: Correct the address for GAMW_ECO_DEV_RW_IA_REG
> v3: Renamed to Wa_220166154
> v4: Rebased on top of the WA refactoring
> v5: Added References (Mika)
>
> References: HSDES#220166154
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>

Yeah and me asking for references tag for these workarounds where
we have a hsdes entry as a wa name nowadays was very silly.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h          | 3 +++
>  drivers/gpu/drm/i915/intel_workarounds.c | 6 ++++++
>  2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e8ab663..344509a4 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8273,6 +8273,9 @@ enum {
>  #define   GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MACALLOC	(1 << 9)
>  #define   GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC	(1 << 7)
>  
> +#define GAMW_ECO_DEV_RW_IA_REG			_MMIO(0x4080)
> +#define   GAMW_ECO_DEV_CTX_RELOAD_DISABLE	(1 << 7)
> +
>  /* IVYBRIDGE DPF */
>  #define GEN7_L3CDERRST1(slice)		_MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
>  #define   GEN7_L3CDERRST1_ROW_MASK	(0x7ff<<14)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index 312846e..64f2c9b9 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -733,6 +733,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
>  	I915_WRITE(GEN11_LSN_UNSLCVC, (I915_READ(GEN11_LSN_UNSLCVC) |
>  				       GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC |
>  				       GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MACALLOC));
> +
> +	/* Wa_220166154:icl
> +	 * Formerly known as WaDisCtxReload
> +	 */
> +	I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, (I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
> +					    GAMW_ECO_DEV_CTX_RELOAD_DISABLE));
>  }
>  
>  void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
> -- 
> 1.9.1
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