From: Jani Nikula <jani.nikula@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Matt Roper <matthew.d.roper@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 17/18] drm/i915/display13: Add rc_qp_table for rcparams calculation
Date: Fri, 29 Jan 2021 14:01:32 +0200 [thread overview]
Message-ID: <87eei4hrz7.fsf@intel.com> (raw)
In-Reply-To: <161191892944.12947.12934684852512611563@build.alporthouse.com>
On Fri, 29 Jan 2021, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting Jani Nikula (2021-01-29 11:12:02)
>> On Thu, 28 Jan 2021, Matt Roper <matthew.d.roper@intel.com> wrote:
>> > From: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> >
>> > Add the qp table for 444 formats, for 8bpc, 10bpc and 12bpc, as given by
>> > the VESA C model for DSC 1.1
>> >
>> > Cc: Manasi Navare <manasi.d.navare@intel.com>
>> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>> > ---
>> > .../gpu/drm/i915/display/intel_qp_tables.h | 294 ++++++++++++++++++
>> > drivers/gpu/drm/i915/display/intel_vdsc.c | 22 +-
>> > 2 files changed, 315 insertions(+), 1 deletion(-)
>> > create mode 100644 drivers/gpu/drm/i915/display/intel_qp_tables.h
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_qp_tables.h b/drivers/gpu/drm/i915/display/intel_qp_tables.h
>> > new file mode 100644
>> > index 000000000000..13694d5220d4
>> > --- /dev/null
>> > +++ b/drivers/gpu/drm/i915/display/intel_qp_tables.h
>> > @@ -0,0 +1,294 @@
>> > +/* SPDX-License-Identifier: MIT */
>> > +/*
>> > + * Copyright © 2019 Intel Corporation
>> > + */
>> > +
>>
>> The include guard is missing.
>
> Should we even be putting large tables into a header?
>
> Would this be better as a .c?
Agreed.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-01-29 12:01 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-28 19:23 [Intel-gfx] [PATCH 00/18] Preliminary Display13 support Matt Roper
2021-01-28 19:23 ` [Intel-gfx] [PATCH 01/18] drm/i915/display13: add Display13 characteristics Matt Roper
2021-02-11 0:03 ` Lucas De Marchi
2021-01-28 19:23 ` [Intel-gfx] [PATCH 02/18] drm/i915/display13: Handle proper AUX interrupt bits Matt Roper
2021-02-11 0:10 ` Lucas De Marchi
2021-01-28 19:23 ` [Intel-gfx] [PATCH 03/18] drm/i915/display13: Enhanced pipe underrun reporting Matt Roper
2021-02-11 0:31 ` Lucas De Marchi
2021-02-11 12:25 ` Ville Syrjälä
2021-01-28 19:23 ` [Intel-gfx] [PATCH 04/18] drm/i915/display13: Define plane capabilities Matt Roper
2021-02-11 1:05 ` Lucas De Marchi
2021-01-28 19:24 ` [Intel-gfx] [PATCH 05/18] drm/i915/display13: Support 128k plane stride Matt Roper
2021-02-11 1:17 ` Lucas De Marchi
2021-01-28 19:24 ` [Intel-gfx] [PATCH 06/18] drm/i915/display13: Only enable legacy gamma for now Matt Roper
2021-02-11 1:19 ` Lucas De Marchi
2021-01-28 19:24 ` [Intel-gfx] [PATCH 07/18] drm/i915/display13: Add Display13 power wells Matt Roper
2021-02-11 1:33 ` Lucas De Marchi
2021-01-28 19:24 ` [Intel-gfx] [PATCH 08/18] drm/i915/display13: Handle LPSP for Display 13 Matt Roper
2021-02-11 1:36 ` Lucas De Marchi
2021-01-28 19:24 ` [Intel-gfx] [PATCH 09/18] drm/i915/display13: Handle new location of outputs D and E Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 10/18] drm/i915/display13: Increase maximum watermark lines to 255 Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 11/18] drm/i915/display13: Required bandwidth increases when VT-d is active Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 12/18] drm/i915/display13: Add Wa_14011503030:d13 Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 13/18] drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 14/18] drm/i915/display13: Support DP1.4 compression BPPs Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 15/18] drm/i915/display13: Get slice height before computing rc params Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 16/18] drm/i915/display13: Calculate VDSC RC parameters Matt Roper
2021-01-28 19:24 ` [Intel-gfx] [PATCH 17/18] drm/i915/display13: Add rc_qp_table for rcparams calculation Matt Roper
2021-01-29 11:12 ` Jani Nikula
2021-01-29 11:15 ` Chris Wilson
2021-01-29 12:01 ` Jani Nikula [this message]
2021-02-10 22:24 ` Lucas De Marchi
2021-01-28 19:24 ` [Intel-gfx] [PATCH 18/18] drm/i915/display13: Enabling dithering after the CC1 pipe Matt Roper
2021-02-11 12:29 ` Ville Syrjälä
2021-02-19 3:22 ` Mario Kleiner
2021-02-19 5:44 ` Mario Kleiner
2021-03-01 4:57 ` Varide, Nischal
2021-03-01 5:43 ` Ilia Mirkin
2021-01-28 19:25 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Preliminary Display13 support Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87eei4hrz7.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
--cc=matthew.d.roper@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox