From: Jani Nikula <jani.nikula@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 02/23] drm/i915: Add DISPLAY_VER()
Date: Wed, 17 Mar 2021 19:45:00 +0200 [thread overview]
Message-ID: <87h7l9oesj.fsf@intel.com> (raw)
In-Reply-To: <20210311153415.3024607-3-matthew.d.roper@intel.com>
On Thu, 11 Mar 2021, Matt Roper <matthew.d.roper@intel.com> wrote:
> Although we've long referred to platforms by a single "GEN" number, the
> hardware teams have recommended that we stop doing this since the
> various component IP blocks are going to start using independent number
> schemes with varying cadence. To support this, hardware platforms a bit
> down the road are going to start providing MMIO registers that the
> driver can read to obtain the "graphics version," "media version," and
> "display version" without needing to do a PCI ID -> platform -> version
> translation.
>
> Although our current platforms don't yet expose these registers (and the
> next couple we release probably won't have them yet either), the
> hardware teams would still like to see us move to this independent
> numbering scheme now in preparation. For i915 that means we should try
> to eliminate all usage of INTEL_GEN() throughout our code and instead
> replace it with separate GRAPHICS_VER(), MEDIA_VER(), and DISPLAY_VER()
> constructs in the code. For old platforms, these will all usually give
> the same value for each IP block (aside from a few special cases like
> GLK which we can no more accurately represent as graphics=9 +
> display=10), but future platforms will have more flexibility to bump IP
> version numbers independently.
>
> The next hardware platform we'll be upstreaming (very soon!) will have a
> display version of 13 and a graphics version of 12, so let's just the
> first step of breaking out DISPLAY_VER(), but leaving the rest of
> INTEL_GEN() untouched for now. For now we'll automatically
> derive the display version from the platform's INTEL_GEN() value except
> in cases where an alternative display version is explicitly provided in
> the device info structure.
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/i915_pci.c | 2 +-
> drivers/gpu/drm/i915/intel_device_info.h | 3 +++
> 3 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4fe90a9782e8..5ec0524d3418 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1247,6 +1247,8 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
> #define INTEL_GEN(dev_priv) (INTEL_INFO(dev_priv)->gen)
> #define INTEL_DEVID(dev_priv) (RUNTIME_INFO(dev_priv)->device_id)
>
> +#define DISPLAY_VER(i915) INTEL_INFO(i915)->display_ver
The value needs to be wrapped in parenthesis.
Maybe this should be ->display.version?
> +
> #define REVID_FOREVER 0xff
> #define INTEL_REVID(dev_priv) (to_pci_dev((dev_priv)->drm.dev)->revision)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index a9f24f2bda33..3543611cf0fc 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -36,7 +36,7 @@
> #include "i915_selftest.h"
>
> #define PLATFORM(x) .platform = (x)
> -#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1)
> +#define GEN(x) .gen = (x), .gen_mask = BIT((x) - 1), .display_ver = x
x needs parenthesis.
>
> #define I845_PIPE_OFFSETS \
> .pipe_offsets = { \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index d44f64b57b7a..3c7db9c690f4 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -162,6 +162,9 @@ struct intel_device_info {
>
> u8 gen;
> u8 gt; /* GT number, 0 if undefined */
> +
> + u8 display_ver;
> +
> intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
>
> enum intel_platform platform;
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2021-03-17 17:45 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-11 15:33 [Intel-gfx] [PATCH v2 00/23] Separate display version numbering and add XE_LPD (version 13) Matt Roper
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 01/23] drm/i915/display: Convert gen5/gen6 tests to IS_IRONLAKE/IS_SANDYBRIDGE Matt Roper
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 02/23] drm/i915: Add DISPLAY_VER() Matt Roper
2021-03-17 17:45 ` Jani Nikula [this message]
2021-03-19 20:49 ` Matt Roper
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 03/23] drm/i915/display: Eliminate most usage of INTEL_GEN() Matt Roper
2021-03-15 20:14 ` Lucas De Marchi
2021-03-17 17:57 ` Jani Nikula
2021-03-17 18:37 ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 04/23] drm/i915: Convert INTEL_GEN() to DISPLAY_VER() as appropriate in intel_pm.c Matt Roper
2021-03-15 20:17 ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 05/23] drm/i915: Convert INTEL_GEN() to DISPLAY_VER() as appropriate in i915_irq.c Matt Roper
2021-03-15 20:19 ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 06/23] drm/i915/display: Simplify GLK display version tests Matt Roper
2021-03-15 20:21 ` Lucas De Marchi
2021-03-11 15:33 ` [Intel-gfx] [PATCH v2 07/23] drm/i915/xelpd: add XE_LPD display characteristics Matt Roper
2021-03-17 17:15 ` Jani Nikula
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 08/23] drm/i915/xelpd: Handle proper AUX interrupt bits Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 09/23] drm/i915/xelpd: Enhanced pipe underrun reporting Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 10/23] drm/i915/xelpd: Define plane capabilities Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 11/23] drm/i915/xelpd: Support 128k plane stride Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 12/23] drm/i915/xelpd: Handle new location of outputs D and E Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 13/23] drm/i915/xelpd: Add XE_LPD power wells Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 14/23] drm/i915/xelpd: Handle LPSP for XE_LPD Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 15/23] drm/i915/xelpd: Increase maximum watermark lines to 255 Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 16/23] drm/i915/xelpd: Required bandwidth increases when VT-d is active Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 17/23] drm/i915/xelpd: Add Wa_14011503030 Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 18/23] drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 19/23] drm/i915/xelpd: Support DP1.4 compression BPPs Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 20/23] drm/i915: Get slice height before computing rc params Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 21/23] drm/i915/xelpd: Calculate VDSC RC parameters Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 22/23] drm/i915/xelpd: Add rc_qp_table for rcparams calculation Matt Roper
2021-03-11 15:34 ` [Intel-gfx] [PATCH v2 23/23] drm/i915/xelpd: Add VRR guardband for VRR CTL Matt Roper
2021-03-11 16:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Separate display version numbering and add XE_LPD (version 13) Patchwork
2021-03-11 16:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-03-11 16:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-11 18:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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