From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/5] drm/i915: Rename SNB/IVB CPU eDP signal level funcs
Date: Thu, 17 May 2018 20:48:49 +0300 [thread overview]
Message-ID: <87lgci41ha.fsf@intel.com> (raw)
In-Reply-To: <20180517170309.28630-4-ville.syrjala@linux.intel.com>
On Thu, 17 May 2018, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> To make the intent more clear, let's rename the signal level funcs for
> the SNB/IVB CPU eDP.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 263e4b1d1db9..cd4c60bfc4c2 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3488,9 +3488,9 @@ gen4_signal_levels(uint8_t train_set)
> return signal_levels;
> }
>
> -/* Gen6's DP voltage swing and pre-emphasis control */
> +/* SNB CPU eDP voltage swing and pre-emphasis control */
> static uint32_t
> -gen6_edp_signal_levels(uint8_t train_set)
> +snb_cpu_edp_signal_levels(uint8_t train_set)
> {
> int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
> DP_TRAIN_PRE_EMPHASIS_MASK);
> @@ -3516,9 +3516,9 @@ gen6_edp_signal_levels(uint8_t train_set)
> }
> }
>
> -/* Gen7's DP voltage swing and pre-emphasis control */
> +/* IVB CPU eDP voltage swing and pre-emphasis control */
> static uint32_t
> -gen7_edp_signal_levels(uint8_t train_set)
> +ivb_cpu_edp_signal_levels(uint8_t train_set)
> {
> int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
> DP_TRAIN_PRE_EMPHASIS_MASK);
> @@ -3566,10 +3566,10 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp)
> } else if (IS_VALLEYVIEW(dev_priv)) {
> signal_levels = vlv_signal_levels(intel_dp);
> } else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
> - signal_levels = gen7_edp_signal_levels(train_set);
> + signal_levels = ivb_cpu_edp_signal_levels(train_set);
> mask = EDP_LINK_TRAIN_VOL_EMP_MASK_IVB;
> } else if (IS_GEN6(dev_priv) && port == PORT_A) {
Should we use IS_SANDYBRIDGE() - which doesn't exist - here then...
Anyway,
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> - signal_levels = gen6_edp_signal_levels(train_set);
> + signal_levels = snb_cpu_edp_signal_levels(train_set);
> mask = EDP_LINK_TRAIN_VOL_EMP_MASK_SNB;
> } else {
> signal_levels = gen4_signal_levels(train_set);
--
Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2018-05-17 17:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-17 17:03 [PATCH 1/5] drm/i915: Use intel_ddi_dp_voltage_max() for HSW/BDW too Ville Syrjala
2018-05-17 17:03 ` [PATCH 2/5] drm/i915: Use the same vswing->max_preemph mapping on HSW/BDW as on SKL+ Ville Syrjala
2018-05-17 17:42 ` Jani Nikula
2018-05-17 17:03 ` [PATCH 3/5] drm/i915: Check for IVB instead of gen7 when we think about IVB CPU eDP Ville Syrjala
2018-05-17 17:45 ` Jani Nikula
2018-05-17 17:03 ` [PATCH 4/5] drm/i915: Rename SNB/IVB CPU eDP signal level funcs Ville Syrjala
2018-05-17 17:48 ` Jani Nikula [this message]
2018-05-17 17:50 ` Ville Syrjälä
2018-05-17 17:03 ` [PATCH 5/5] drm/i915: Rename the remaining gen4 references to g4x in the DP code Ville Syrjala
2018-05-17 17:49 ` Jani Nikula
2018-05-18 14:27 ` Ville Syrjälä
2018-05-17 17:40 ` [PATCH 1/5] drm/i915: Use intel_ddi_dp_voltage_max() for HSW/BDW too Jani Nikula
2018-05-17 18:16 ` ✓ Fi.CI.BAT: success for series starting with [1/5] " Patchwork
2018-05-17 23:00 ` ✓ Fi.CI.IGT: " Patchwork
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