[Intel-gfx] [PATCH 0/2] Firm up gt park/unpark

[Intel-gfx] [PATCH 0/2] Firm up gt park/unpark

[Ashutosh Dixit]

A couple of patches to firm up gt park/unpark.

Ashutosh Dixit (2):
  drm/i915/gt: Don't do display work on platforms without display
  drm/i915/gt: Warn if not in RC6 when GT is parked

 drivers/gpu/drm/i915/gt/intel_gt_pm.c | 42 +++++++++++++++++----------
 drivers/gpu/drm/i915/gt/intel_rc6.c   | 15 ++++++++++
 drivers/gpu/drm/i915/gt/intel_rc6.h   |  1 +
 3 files changed, 42 insertions(+), 16 deletions(-)

-- 
2.34.1

[Intel-gfx] [PATCH 1/2] drm/i915/gt: Don't do display work on platforms without display

[Ashutosh Dixit]

Do display work only on platforms with display. This avoids holding the
runtime PM wakeref for an additional 100+ ms after GT has been parked.

Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7025
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 +++++++++++++++------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index f553e2173bdad..26aa2e979a148 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -70,19 +70,21 @@ static int __gt_unpark(struct intel_wakeref *wf)
 
 	GT_TRACE(gt, "\n");
 
-	/*
-	 * It seems that the DMC likes to transition between the DC states a lot
-	 * when there are no connected displays (no active power domains) during
-	 * command submission.
-	 *
-	 * This activity has negative impact on the performance of the chip with
-	 * huge latencies observed in the interrupt handler and elsewhere.
-	 *
-	 * Work around it by grabbing a GT IRQ power domain whilst there is any
-	 * GT activity, preventing any DC state transitions.
-	 */
-	gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
-	GEM_BUG_ON(!gt->awake);
+	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
+		/*
+		 * It seems that the DMC likes to transition between the DC states a lot
+		 * when there are no connected displays (no active power domains) during
+		 * command submission.
+		 *
+		 * This activity has negative impact on the performance of the chip with
+		 * huge latencies observed in the interrupt handler and elsewhere.
+		 *
+		 * Work around it by grabbing a GT IRQ power domain whilst there is any
+		 * GT activity, preventing any DC state transitions.
+		 */
+		gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
+		GEM_BUG_ON(!gt->awake);
+	}
 
 	intel_rc6_unpark(&gt->rc6);
 	intel_rps_unpark(&gt->rps);
@@ -115,9 +117,11 @@ static int __gt_park(struct intel_wakeref *wf)
 	/* Everything switched off, flush any residual interrupt just in case */
 	intel_synchronize_irq(i915);
 
-	/* Defer dropping the display power well for 100ms, it's slow! */
-	GEM_BUG_ON(!wakeref);
-	intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
+	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
+		/* Defer dropping the display power well for 100ms, it's slow! */
+		GEM_BUG_ON(!wakeref);
+		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
+	}
 
 	return 0;
 }
-- 
2.34.1

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Don't do display work on platforms without display

[Jani Nikula]

On Mon, 10 Oct 2022, Ashutosh Dixit <ashutosh.dixit@intel.com> wrote:
> Do display work only on platforms with display. This avoids holding the
> runtime PM wakeref for an additional 100+ ms after GT has been parked.
>
> Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7025
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 +++++++++++++++------------
>  1 file changed, 20 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index f553e2173bdad..26aa2e979a148 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -70,19 +70,21 @@ static int __gt_unpark(struct intel_wakeref *wf)
>  
>  	GT_TRACE(gt, "\n");
>  
> -	/*
> -	 * It seems that the DMC likes to transition between the DC states a lot
> -	 * when there are no connected displays (no active power domains) during
> -	 * command submission.
> -	 *
> -	 * This activity has negative impact on the performance of the chip with
> -	 * huge latencies observed in the interrupt handler and elsewhere.
> -	 *
> -	 * Work around it by grabbing a GT IRQ power domain whilst there is any
> -	 * GT activity, preventing any DC state transitions.
> -	 */
> -	gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
> -	GEM_BUG_ON(!gt->awake);
> +	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {

Feels like something's wrong if you need both of those.

BR,
Jani.

> +		/*
> +		 * It seems that the DMC likes to transition between the DC states a lot
> +		 * when there are no connected displays (no active power domains) during
> +		 * command submission.
> +		 *
> +		 * This activity has negative impact on the performance of the chip with
> +		 * huge latencies observed in the interrupt handler and elsewhere.
> +		 *
> +		 * Work around it by grabbing a GT IRQ power domain whilst there is any
> +		 * GT activity, preventing any DC state transitions.
> +		 */
> +		gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
> +		GEM_BUG_ON(!gt->awake);
> +	}
>  
>  	intel_rc6_unpark(&gt->rc6);
>  	intel_rps_unpark(&gt->rps);
> @@ -115,9 +117,11 @@ static int __gt_park(struct intel_wakeref *wf)
>  	/* Everything switched off, flush any residual interrupt just in case */
>  	intel_synchronize_irq(i915);
>  
> -	/* Defer dropping the display power well for 100ms, it's slow! */
> -	GEM_BUG_ON(!wakeref);
> -	intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
> +	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
> +		/* Defer dropping the display power well for 100ms, it's slow! */
> +		GEM_BUG_ON(!wakeref);
> +		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
> +	}
>  
>  	return 0;
>  }

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Don't do display work on platforms without display

[Dixit, Ashutosh]

On Tue, 11 Oct 2022 00:22:34 -0700, Jani Nikula wrote:
>

Hi Jani,

> On Mon, 10 Oct 2022, Ashutosh Dixit <ashutosh.dixit@intel.com> wrote:
> > Do display work only on platforms with display. This avoids holding the
> > runtime PM wakeref for an additional 100+ ms after GT has been parked.
> >
> > Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7025
> > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 +++++++++++++++------------
> >  1 file changed, 20 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> > index f553e2173bdad..26aa2e979a148 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> > @@ -70,19 +70,21 @@ static int __gt_unpark(struct intel_wakeref *wf)
> >
> >	GT_TRACE(gt, "\n");
> >
> > -	/*
> > -	 * It seems that the DMC likes to transition between the DC states a lot
> > -	 * when there are no connected displays (no active power domains) during
> > -	 * command submission.
> > -	 *
> > -	 * This activity has negative impact on the performance of the chip with
> > -	 * huge latencies observed in the interrupt handler and elsewhere.
> > -	 *
> > -	 * Work around it by grabbing a GT IRQ power domain whilst there is any
> > -	 * GT activity, preventing any DC state transitions.
> > -	 */
> > -	gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
> > -	GEM_BUG_ON(!gt->awake);
> > +	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
>
> Feels like something's wrong if you need both of those.

Don't think so:

	/* Only valid when HAS_DISPLAY() is true */
	#define INTEL_DISPLAY_ENABLED(dev_priv) \
		(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)),         \
	         !(dev_priv)->params.disable_display &&                         \
	         !intel_opregion_headless_sku(dev_priv))

Maybe inside display code INTEL_DISPLAY_ENABLED is sufficient since code
paths have previously invoked HAS_DISPLAY, but not in non-display code.

Thanks.
--
Ashutosh

> > +		/*
> > +		 * It seems that the DMC likes to transition between the DC states a lot
> > +		 * when there are no connected displays (no active power domains) during
> > +		 * command submission.
> > +		 *
> > +		 * This activity has negative impact on the performance of the chip with
> > +		 * huge latencies observed in the interrupt handler and elsewhere.
> > +		 *
> > +		 * Work around it by grabbing a GT IRQ power domain whilst there is any
> > +		 * GT activity, preventing any DC state transitions.
> > +		 */
> > +		gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
> > +		GEM_BUG_ON(!gt->awake);
> > +	}
> >
> >	intel_rc6_unpark(&gt->rc6);
> >	intel_rps_unpark(&gt->rps);
> > @@ -115,9 +117,11 @@ static int __gt_park(struct intel_wakeref *wf)
> >	/* Everything switched off, flush any residual interrupt just in case */
> >	intel_synchronize_irq(i915);
> >
> > -	/* Defer dropping the display power well for 100ms, it's slow! */
> > -	GEM_BUG_ON(!wakeref);
> > -	intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
> > +	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
> > +		/* Defer dropping the display power well for 100ms, it's slow! */
> > +		GEM_BUG_ON(!wakeref);
> > +		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
> > +	}
> >
> >	return 0;
> >  }
>
> --
> Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Don't do display work on platforms without display

[Tvrtko Ursulin]

On 11/10/2022 08:34, Dixit, Ashutosh wrote:
> On Tue, 11 Oct 2022 00:22:34 -0700, Jani Nikula wrote:
>>
> 
> Hi Jani,
> 
>> On Mon, 10 Oct 2022, Ashutosh Dixit <ashutosh.dixit@intel.com> wrote:
>>> Do display work only on platforms with display. This avoids holding the
>>> runtime PM wakeref for an additional 100+ ms after GT has been parked.
>>>
>>> Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7025
>>> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 +++++++++++++++------------
>>>   1 file changed, 20 insertions(+), 16 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
>>> index f553e2173bdad..26aa2e979a148 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
>>> @@ -70,19 +70,21 @@ static int __gt_unpark(struct intel_wakeref *wf)
>>>
>>> 	GT_TRACE(gt, "\n");
>>>
>>> -	/*
>>> -	 * It seems that the DMC likes to transition between the DC states a lot
>>> -	 * when there are no connected displays (no active power domains) during
>>> -	 * command submission.
>>> -	 *
>>> -	 * This activity has negative impact on the performance of the chip with
>>> -	 * huge latencies observed in the interrupt handler and elsewhere.
>>> -	 *
>>> -	 * Work around it by grabbing a GT IRQ power domain whilst there is any
>>> -	 * GT activity, preventing any DC state transitions.
>>> -	 */
>>> -	gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
>>> -	GEM_BUG_ON(!gt->awake);
>>> +	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
>>
>> Feels like something's wrong if you need both of those.
> 
> Don't think so:
> 
> 	/* Only valid when HAS_DISPLAY() is true */
> 	#define INTEL_DISPLAY_ENABLED(dev_priv) \
> 		(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)),         \
> 	         !(dev_priv)->params.disable_display &&                         \
> 	         !intel_opregion_headless_sku(dev_priv))
> 
> Maybe inside display code INTEL_DISPLAY_ENABLED is sufficient since code
> paths have previously invoked HAS_DISPLAY, but not in non-display code.

AFAIR this workaround is only needed when DMC is loaded so I wonder if 
we could detect that instead?

Although then I am not sure why we haven't done it like that from the 
start. Maybe there was a good reason and I just can't remember it.

Looking at the history, b68763741aa2 ("drm/i915: Restore GT performance 
in headless mode with DMC loaded") which added the workaround did not 
add the 100ms delay. That was added later in 81ff52b70577 ("drm/i915/gt: 
Ratelimit display power w/a"). That part sounds like it makes sense - if 
there is cost in these transitions usual approach is too add some 
hysteresis. (And AFAIR in this particular case it was actually a matter 
or re-adding the hysteresis which was lost once GEM idle work handler 
approach was removed.)

So I guess the main question is can we guard this with (ideally 
something better than) HAS_DMC. Perhaps back then GPUs wo/ display were 
simply not in our minds? Or obtaining the "DC off" power well was 
perhaps a no-op in it's own right when there is no display? If that was 
the case and isn't any more would that be feasible to re-add?

Regards,

Tvrtko

> 
> Thanks.
> --
> Ashutosh
> 
>>> +		/*
>>> +		 * It seems that the DMC likes to transition between the DC states a lot
>>> +		 * when there are no connected displays (no active power domains) during
>>> +		 * command submission.
>>> +		 *
>>> +		 * This activity has negative impact on the performance of the chip with
>>> +		 * huge latencies observed in the interrupt handler and elsewhere.
>>> +		 *
>>> +		 * Work around it by grabbing a GT IRQ power domain whilst there is any
>>> +		 * GT activity, preventing any DC state transitions.
>>> +		 */
>>> +		gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
>>> +		GEM_BUG_ON(!gt->awake);
>>> +	}
>>>
>>> 	intel_rc6_unpark(&gt->rc6);
>>> 	intel_rps_unpark(&gt->rps);
>>> @@ -115,9 +117,11 @@ static int __gt_park(struct intel_wakeref *wf)
>>> 	/* Everything switched off, flush any residual interrupt just in case */
>>> 	intel_synchronize_irq(i915);
>>>
>>> -	/* Defer dropping the display power well for 100ms, it's slow! */
>>> -	GEM_BUG_ON(!wakeref);
>>> -	intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
>>> +	if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
>>> +		/* Defer dropping the display power well for 100ms, it's slow! */
>>> +		GEM_BUG_ON(!wakeref);
>>> +		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
>>> +	}
>>>
>>> 	return 0;
>>>   }
>>
>> --
>> Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gt: Don't do display work on platforms without display

[Tvrtko Ursulin]

On 11/10/2022 09:30, Tvrtko Ursulin wrote:
> 
> On 11/10/2022 08:34, Dixit, Ashutosh wrote:
>> On Tue, 11 Oct 2022 00:22:34 -0700, Jani Nikula wrote:
>>>
>>
>> Hi Jani,
>>
>>> On Mon, 10 Oct 2022, Ashutosh Dixit <ashutosh.dixit@intel.com> wrote:
>>>> Do display work only on platforms with display. This avoids holding the
>>>> runtime PM wakeref for an additional 100+ ms after GT has been parked.
>>>>
>>>> Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7025
>>>> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
>>>> ---
>>>>   drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 
>>>> +++++++++++++++------------
>>>>   1 file changed, 20 insertions(+), 16 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c 
>>>> b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
>>>> index f553e2173bdad..26aa2e979a148 100644
>>>> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
>>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
>>>> @@ -70,19 +70,21 @@ static int __gt_unpark(struct intel_wakeref *wf)
>>>>
>>>>     GT_TRACE(gt, "\n");
>>>>
>>>> -    /*
>>>> -     * It seems that the DMC likes to transition between the DC 
>>>> states a lot
>>>> -     * when there are no connected displays (no active power 
>>>> domains) during
>>>> -     * command submission.
>>>> -     *
>>>> -     * This activity has negative impact on the performance of the 
>>>> chip with
>>>> -     * huge latencies observed in the interrupt handler and elsewhere.
>>>> -     *
>>>> -     * Work around it by grabbing a GT IRQ power domain whilst 
>>>> there is any
>>>> -     * GT activity, preventing any DC state transitions.
>>>> -     */
>>>> -    gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
>>>> -    GEM_BUG_ON(!gt->awake);
>>>> +    if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
>>>
>>> Feels like something's wrong if you need both of those.
>>
>> Don't think so:
>>
>>     /* Only valid when HAS_DISPLAY() is true */
>>     #define INTEL_DISPLAY_ENABLED(dev_priv) \
>>         (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)),         \
>>              !(dev_priv)->params.disable_display 
>> &&                         \
>>              !intel_opregion_headless_sku(dev_priv))
>>
>> Maybe inside display code INTEL_DISPLAY_ENABLED is sufficient since code
>> paths have previously invoked HAS_DISPLAY, but not in non-display code.
> 
> AFAIR this workaround is only needed when DMC is loaded so I wonder if 
> we could detect that instead?
> 
> Although then I am not sure why we haven't done it like that from the 
> start. Maybe there was a good reason and I just can't remember it.
> 
> Looking at the history, b68763741aa2 ("drm/i915: Restore GT performance 
> in headless mode with DMC loaded") which added the workaround did not 
> add the 100ms delay. That was added later in 81ff52b70577 ("drm/i915/gt: 
> Ratelimit display power w/a"). That part sounds like it makes sense - if 
> there is cost in these transitions usual approach is too add some 
> hysteresis. (And AFAIR in this particular case it was actually a matter 
> or re-adding the hysteresis which was lost once GEM idle work handler 
> approach was removed.)
> 
> So I guess the main question is can we guard this with (ideally 
> something better than) HAS_DMC. Perhaps back then GPUs wo/ display were 
> simply not in our minds? Or obtaining the "DC off" power well was 
> perhaps a no-op in it's own right when there is no display? If that was 
> the case and isn't any more would that be feasible to re-add?

Oops or not - we still need a rpm reference in the current scheme, 
display or no display! Back in the day that rpm was separate and 
explicit from this wa... So I guess this code stays as is and only 
possible improvements can be in the PMU area.

Regards,

Tvrtko

[Intel-gfx] [PATCH 2/2] drm/i915/gt: Warn if not in RC6 when GT is parked

[Ashutosh Dixit]

Some i915 modules implicitly assume that there is no user, kernel or
firmware activity after GT is parked. For example, PMU calculations are
incorrect if GT is not in RC6 when GT is parked (outside of the GT
wakeref). Therefore check and warn if GT is not in RC6 at the time of
parking the GT.

Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/7025
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |  6 ++++++
 drivers/gpu/drm/i915/gt/intel_rc6.c   | 15 +++++++++++++++
 drivers/gpu/drm/i915/gt/intel_rc6.h   |  1 +
 3 files changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 26aa2e979a148..5da81e22d0980 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -102,6 +102,8 @@ static int __gt_park(struct intel_wakeref *wf)
 	struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref);
 	intel_wakeref_t wakeref = fetch_and_zero(&gt->awake);
 	struct drm_i915_private *i915 = gt->i915;
+	bool in_rc6;
+	int ret;
 
 	GT_TRACE(gt, "\n");
 
@@ -123,6 +125,10 @@ static int __gt_park(struct intel_wakeref *wf)
 		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
 	}
 
+	ret = intel_rc6_in_rc6(&gt->rc6, &in_rc6);
+	if (!ret && !in_rc6)
+		drm_warn_once(&i915->drm, "Parking, but GT is not in RC6!\n");
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index f8d0523f4c18e..4517988e704a4 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -666,6 +666,21 @@ void intel_rc6_park(struct intel_rc6 *rc6)
 	set(uncore, GEN6_RC_STATE, target << RC_SW_TARGET_STATE_SHIFT);
 }
 
+int intel_rc6_in_rc6(struct intel_rc6 *rc6, bool *in_rc6)
+{
+	u32 gt_core_status;
+
+	/* GEN6_GT_CORE_STATUS exists only for Gen11+ */
+	if (GRAPHICS_VER(rc6_to_i915(rc6)) < 11)
+		return -ENODEV;
+
+	gt_core_status = intel_uncore_read_fw(rc6_to_uncore(rc6), GEN6_GT_CORE_STATUS)
+				& GEN6_RCn_MASK;
+	*in_rc6 = gt_core_status == GEN6_RC6 || gt_core_status == GEN6_RC7;
+
+	return 0;
+}
+
 void intel_rc6_disable(struct intel_rc6 *rc6)
 {
 	if (!rc6->enabled)
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.h b/drivers/gpu/drm/i915/gt/intel_rc6.h
index b6fea71afc223..30da10399028d 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.h
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.h
@@ -16,6 +16,7 @@ void intel_rc6_fini(struct intel_rc6 *rc6);
 
 void intel_rc6_unpark(struct intel_rc6 *rc6);
 void intel_rc6_park(struct intel_rc6 *rc6);
+int intel_rc6_in_rc6(struct intel_rc6 *rc6, bool *in_rc6);
 
 void intel_rc6_sanitize(struct intel_rc6 *rc6);
 void intel_rc6_enable(struct intel_rc6 *rc6);
-- 
2.34.1

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Warn if not in RC6 when GT is parked

[Dixit, Ashutosh]

On Mon, 10 Oct 2022 20:29:23 -0700, Ashutosh Dixit wrote:
>
> Some i915 modules implicitly assume that there is no user, kernel or
> firmware activity after GT is parked. For example, PMU calculations are
> incorrect if GT is not in RC6 when GT is parked (outside of the GT
> wakeref). Therefore check and warn if GT is not in RC6 at the time of
> parking the GT.

This patch has cause widespread dmesg_warn's in premerge CI so there is no
intention of merging this. It just proves that these assumptions in PMU
(for quantities such as frequency and RC6 residency) are incorrect and need
to be addressed.

Thanks.
--
Ashutosh


> @@ -123,6 +125,10 @@ static int __gt_park(struct intel_wakeref *wf)
>		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
>	}
>
> +	ret = intel_rc6_in_rc6(&gt->rc6, &in_rc6);
> +	if (!ret && !in_rc6)
> +		drm_warn_once(&i915->drm, "Parking, but GT is not in RC6!\n");
> +
>	return 0;
>  }

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Warn if not in RC6 when GT is parked

[Tvrtko Ursulin]

On 11/10/2022 06:53, Dixit, Ashutosh wrote:
> On Mon, 10 Oct 2022 20:29:23 -0700, Ashutosh Dixit wrote:
>>
>> Some i915 modules implicitly assume that there is no user, kernel or
>> firmware activity after GT is parked. For example, PMU calculations are
>> incorrect if GT is not in RC6 when GT is parked (outside of the GT
>> wakeref). Therefore check and warn if GT is not in RC6 at the time of
>> parking the GT.
> 
> This patch has cause widespread dmesg_warn's in premerge CI so there is no
> intention of merging this. It just proves that these assumptions in PMU
> (for quantities such as frequency and RC6 residency) are incorrect and need
> to be addressed.

Yeah this probably does not make sense since I am not sure if driver 
actually controls when hardware goes into RC6.

Regards,

Tvrtko

> 
> Thanks.
> --
> Ashutosh
> 
> 
>> @@ -123,6 +125,10 @@ static int __gt_park(struct intel_wakeref *wf)
>> 		intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
>> 	}
>>
>> +	ret = intel_rc6_in_rc6(&gt->rc6, &in_rc6);
>> +	if (!ret && !in_rc6)
>> +		drm_warn_once(&i915->drm, "Parking, but GT is not in RC6!\n");
>> +
>> 	return 0;
>>   }

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Firm up gt park/unpark

[Patchwork]

== Series Details ==

Series: Firm up gt park/unpark
URL   : https://patchwork.freedesktop.org/series/109563/
State : warning

== Summary ==

Error: dim checkpatch failed
965f7dcab4c4 drm/i915/gt: Don't do display work on platforms without display
bced71f23cb7 drm/i915/gt: Warn if not in RC6 when GT is parked
-:56: CHECK:CAMELCASE: Avoid CamelCase: <GEN6_RCn_MASK>
#56: FILE: drivers/gpu/drm/i915/gt/intel_rc6.c:678:
+				& GEN6_RCn_MASK;

total: 0 errors, 0 warnings, 1 checks, 46 lines checked

[Intel-gfx] ✗ Fi.CI.BAT: failure for Firm up gt park/unpark

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 29462 bytes --]

== Series Details ==

Series: Firm up gt park/unpark
URL   : https://patchwork.freedesktop.org/series/109563/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12231 -> Patchwork_109563v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_109563v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_109563v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/index.html

Participating hosts (46 -> 47)
------------------------------

  Additional (3): fi-kbl-soraka bat-atsm-1 bat-adls-5 
  Missing    (2): fi-ctg-p8600 fi-tgl-mst 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_109563v1:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@reload:
    - bat-dg1-5:          [PASS][1] -> [DMESG-WARN][2] +16 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg1-5/igt@i915_module_load@reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg1-5/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - bat-adlp-4:         [PASS][3] -> [DMESG-WARN][4] +16 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adlp-4/igt@i915_pm_rpm@module-reload.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlp-4/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live@gt_lrc:
    - fi-icl-u2:          [PASS][5] -> [DMESG-WARN][6] +16 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-icl-u2/igt@i915_selftest@live@gt_lrc.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-icl-u2/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_mocs:
    - fi-rkl-guc:         [PASS][7] -> [DMESG-WARN][8] +16 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-rkl-guc/igt@i915_selftest@live@gt_mocs.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-rkl-guc/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@mman:
    - bat-dg1-5:          [PASS][9] -> [INCOMPLETE][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg1-5/igt@i915_selftest@live@mman.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg1-5/igt@i915_selftest@live@mman.html
    - fi-pnv-d510:        [PASS][11] -> [INCOMPLETE][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-pnv-d510/igt@i915_selftest@live@mman.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-pnv-d510/igt@i915_selftest@live@mman.html
    - fi-glk-j4005:       [PASS][13] -> [INCOMPLETE][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-glk-j4005/igt@i915_selftest@live@mman.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-glk-j4005/igt@i915_selftest@live@mman.html
    - fi-kbl-7567u:       [PASS][15] -> [INCOMPLETE][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-kbl-7567u/igt@i915_selftest@live@mman.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-7567u/igt@i915_selftest@live@mman.html
    - fi-rkl-11600:       [PASS][17] -> [INCOMPLETE][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-rkl-11600/igt@i915_selftest@live@mman.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-rkl-11600/igt@i915_selftest@live@mman.html
    - fi-adl-ddr5:        [PASS][19] -> [INCOMPLETE][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-adl-ddr5/igt@i915_selftest@live@mman.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-adl-ddr5/igt@i915_selftest@live@mman.html
    - fi-cfl-guc:         [PASS][21] -> [INCOMPLETE][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-cfl-guc/igt@i915_selftest@live@mman.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-cfl-guc/igt@i915_selftest@live@mman.html
    - fi-skl-6700k2:      [PASS][23] -> [INCOMPLETE][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-skl-6700k2/igt@i915_selftest@live@mman.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-skl-6700k2/igt@i915_selftest@live@mman.html
    - fi-cfl-8109u:       [PASS][25] -> [INCOMPLETE][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-cfl-8109u/igt@i915_selftest@live@mman.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-cfl-8109u/igt@i915_selftest@live@mman.html
    - fi-ilk-650:         [PASS][27] -> [INCOMPLETE][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-ilk-650/igt@i915_selftest@live@mman.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-ilk-650/igt@i915_selftest@live@mman.html
    - fi-blb-e6850:       [PASS][29] -> [INCOMPLETE][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-blb-e6850/igt@i915_selftest@live@mman.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-blb-e6850/igt@i915_selftest@live@mman.html
    - fi-skl-6600u:       [PASS][31] -> [INCOMPLETE][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-skl-6600u/igt@i915_selftest@live@mman.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-skl-6600u/igt@i915_selftest@live@mman.html
    - fi-apl-guc:         [PASS][33] -> [INCOMPLETE][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-apl-guc/igt@i915_selftest@live@mman.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-apl-guc/igt@i915_selftest@live@mman.html
    - fi-bdw-5557u:       [PASS][35] -> [INCOMPLETE][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-bdw-5557u/igt@i915_selftest@live@mman.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bdw-5557u/igt@i915_selftest@live@mman.html
    - fi-snb-2520m:       [PASS][37] -> [INCOMPLETE][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-snb-2520m/igt@i915_selftest@live@mman.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-snb-2520m/igt@i915_selftest@live@mman.html
    - fi-rkl-guc:         [PASS][39] -> [INCOMPLETE][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-rkl-guc/igt@i915_selftest@live@mman.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-rkl-guc/igt@i915_selftest@live@mman.html
    - fi-skl-guc:         [PASS][41] -> [INCOMPLETE][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-skl-guc/igt@i915_selftest@live@mman.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-skl-guc/igt@i915_selftest@live@mman.html
    - fi-kbl-soraka:      NOTRUN -> [INCOMPLETE][43]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@i915_selftest@live@mman.html
    - fi-cfl-8700k:       [PASS][44] -> [INCOMPLETE][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-cfl-8700k/igt@i915_selftest@live@mman.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-cfl-8700k/igt@i915_selftest@live@mman.html
    - fi-bsw-nick:        [PASS][46] -> [INCOMPLETE][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-bsw-nick/igt@i915_selftest@live@mman.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bsw-nick/igt@i915_selftest@live@mman.html
    - fi-hsw-g3258:       [PASS][48] -> [INCOMPLETE][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-hsw-g3258/igt@i915_selftest@live@mman.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-hsw-g3258/igt@i915_selftest@live@mman.html
    - fi-bdw-gvtdvm:      [PASS][50] -> [INCOMPLETE][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-bdw-gvtdvm/igt@i915_selftest@live@mman.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bdw-gvtdvm/igt@i915_selftest@live@mman.html
    - fi-hsw-4770:        [PASS][52] -> [INCOMPLETE][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-hsw-4770/igt@i915_selftest@live@mman.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-hsw-4770/igt@i915_selftest@live@mman.html
    - bat-adlp-4:         [PASS][54] -> [INCOMPLETE][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adlp-4/igt@i915_selftest@live@mman.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlp-4/igt@i915_selftest@live@mman.html
    - fi-ivb-3770:        [PASS][56] -> [INCOMPLETE][57]
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-ivb-3770/igt@i915_selftest@live@mman.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-ivb-3770/igt@i915_selftest@live@mman.html
    - fi-elk-e7500:       [PASS][58] -> [INCOMPLETE][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-elk-e7500/igt@i915_selftest@live@mman.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-elk-e7500/igt@i915_selftest@live@mman.html
    - fi-snb-2600:        [PASS][60] -> [INCOMPLETE][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-snb-2600/igt@i915_selftest@live@mman.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-snb-2600/igt@i915_selftest@live@mman.html
    - fi-bxt-dsi:         [PASS][62] -> [INCOMPLETE][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-bxt-dsi/igt@i915_selftest@live@mman.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bxt-dsi/igt@i915_selftest@live@mman.html

  * igt@i915_selftest@live@sanitycheck:
    - fi-rkl-11600:       [PASS][64] -> [DMESG-WARN][65] +16 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-rkl-11600/igt@i915_selftest@live@sanitycheck.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-rkl-11600/igt@i915_selftest@live@sanitycheck.html
    - fi-adl-ddr5:        [PASS][66] -> [DMESG-WARN][67] +16 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-adl-ddr5/igt@i915_selftest@live@sanitycheck.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-adl-ddr5/igt@i915_selftest@live@sanitycheck.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@load:
    - {bat-atsm-1}:       NOTRUN -> [DMESG-WARN][68]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-atsm-1/igt@i915_module_load@load.html

  * igt@i915_pm_rpm@module-reload:
    - {bat-adlp-6}:       [PASS][69] -> [DMESG-WARN][70] +16 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlp-6/igt@i915_pm_rpm@module-reload.html
    - {bat-jsl-3}:        [PASS][71] -> [DMESG-WARN][72] +16 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-jsl-3/igt@i915_pm_rpm@module-reload.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-jsl-3/igt@i915_pm_rpm@module-reload.html
    - {bat-dg2-8}:        [PASS][73] -> [DMESG-WARN][74] +16 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg2-8/igt@i915_pm_rpm@module-reload.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg2-8/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live@active:
    - {bat-adlm-1}:       [PASS][75] -> [DMESG-WARN][76] +16 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adlm-1/igt@i915_selftest@live@active.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlm-1/igt@i915_selftest@live@active.html

  * igt@i915_selftest@live@gt_contexts:
    - {bat-jsl-1}:        [PASS][77] -> [DMESG-WARN][78] +16 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-jsl-1/igt@i915_selftest@live@gt_contexts.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-jsl-1/igt@i915_selftest@live@gt_contexts.html
    - {fi-jsl-1}:         [PASS][79] -> [DMESG-WARN][80] +16 similar issues
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-jsl-1/igt@i915_selftest@live@gt_contexts.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-jsl-1/igt@i915_selftest@live@gt_contexts.html

  * igt@i915_selftest@live@gt_engines:
    - {bat-rpls-2}:       [PASS][81] -> [DMESG-WARN][82] +14 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-rpls-2/igt@i915_selftest@live@gt_engines.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-rpls-2/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@gt_heartbeat:
    - {bat-adln-1}:       [PASS][83] -> [DMESG-WARN][84] +16 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adln-1/igt@i915_selftest@live@gt_heartbeat.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adln-1/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_lrc:
    - {fi-ehl-2}:         [PASS][85] -> [DMESG-WARN][86] +16 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-ehl-2/igt@i915_selftest@live@gt_lrc.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-ehl-2/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_mocs:
    - {bat-dg2-11}:       [PASS][87] -> [DMESG-WARN][88] +16 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg2-11/igt@i915_selftest@live@gt_mocs.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg2-11/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@gt_timelines:
    - {bat-dg2-9}:        [PASS][89] -> [DMESG-WARN][90] +16 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg2-9/igt@i915_selftest@live@gt_timelines.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg2-9/igt@i915_selftest@live@gt_timelines.html

  * igt@i915_selftest@live@mman:
    - {fi-tgl-dsi}:       [PASS][91] -> [INCOMPLETE][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-tgl-dsi/igt@i915_selftest@live@mman.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-tgl-dsi/igt@i915_selftest@live@mman.html
    - {bat-rplp-1}:       [PASS][93] -> [INCOMPLETE][94]
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-rplp-1/igt@i915_selftest@live@mman.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-rplp-1/igt@i915_selftest@live@mman.html
    - {bat-adls-5}:       NOTRUN -> [INCOMPLETE][95]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adls-5/igt@i915_selftest@live@mman.html
    - {bat-dg2-9}:        [PASS][96] -> [INCOMPLETE][97]
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg2-9/igt@i915_selftest@live@mman.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg2-9/igt@i915_selftest@live@mman.html
    - {bat-adln-1}:       [PASS][98] -> [INCOMPLETE][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adln-1/igt@i915_selftest@live@mman.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adln-1/igt@i915_selftest@live@mman.html
    - {bat-rpls-2}:       [PASS][100] -> [INCOMPLETE][101]
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-rpls-2/igt@i915_selftest@live@mman.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-rpls-2/igt@i915_selftest@live@mman.html
    - {bat-adlp-6}:       [PASS][102] -> [INCOMPLETE][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adlp-6/igt@i915_selftest@live@mman.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlp-6/igt@i915_selftest@live@mman.html
    - {fi-ehl-2}:         [PASS][104] -> [INCOMPLETE][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-ehl-2/igt@i915_selftest@live@mman.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-ehl-2/igt@i915_selftest@live@mman.html
    - {bat-dg2-11}:       [PASS][106] -> [INCOMPLETE][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg2-11/igt@i915_selftest@live@mman.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg2-11/igt@i915_selftest@live@mman.html
    - {bat-jsl-3}:        [PASS][108] -> [INCOMPLETE][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-jsl-3/igt@i915_selftest@live@mman.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-jsl-3/igt@i915_selftest@live@mman.html
    - {bat-dg2-8}:        [PASS][110] -> [INCOMPLETE][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-dg2-8/igt@i915_selftest@live@mman.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg2-8/igt@i915_selftest@live@mman.html
    - {bat-adlm-1}:       [PASS][112] -> [INCOMPLETE][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-adlm-1/igt@i915_selftest@live@mman.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlm-1/igt@i915_selftest@live@mman.html
    - {bat-jsl-1}:        [PASS][114] -> [INCOMPLETE][115]
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-jsl-1/igt@i915_selftest@live@mman.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-jsl-1/igt@i915_selftest@live@mman.html
    - {fi-jsl-1}:         [PASS][116] -> [INCOMPLETE][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-jsl-1/igt@i915_selftest@live@mman.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-jsl-1/igt@i915_selftest@live@mman.html
    - {bat-rpls-1}:       [PASS][118] -> [INCOMPLETE][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-rpls-1/igt@i915_selftest@live@mman.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-rpls-1/igt@i915_selftest@live@mman.html

  * igt@i915_selftest@live@sanitycheck:
    - {fi-tgl-dsi}:       [PASS][120] -> [DMESG-WARN][121] +12 similar issues
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-tgl-dsi/igt@i915_selftest@live@sanitycheck.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-tgl-dsi/igt@i915_selftest@live@sanitycheck.html
    - {bat-rplp-1}:       [PASS][122] -> [DMESG-WARN][123] +16 similar issues
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-rplp-1/igt@i915_selftest@live@sanitycheck.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-rplp-1/igt@i915_selftest@live@sanitycheck.html

  * igt@i915_selftest@live@workarounds:
    - {bat-rpls-1}:       [PASS][124] -> [DMESG-WARN][125] +16 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/bat-rpls-1/igt@i915_selftest@live@workarounds.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-rpls-1/igt@i915_selftest@live@workarounds.html
    - {bat-adls-5}:       NOTRUN -> [DMESG-WARN][126] +16 similar issues
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adls-5/igt@i915_selftest@live@workarounds.html

  
Known issues
------------

  Here are the changes found in Patchwork_109563v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_gttfill@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][127] ([fdo#109271]) +9 similar issues
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@gem_exec_gttfill@basic.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][128] ([fdo#109271] / [i915#2190])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][129] ([fdo#109271] / [i915#4613]) +3 similar issues
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-bxt-dsi:         [PASS][130] -> [DMESG-FAIL][131] ([i915#5334])
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-bxt-dsi/igt@i915_selftest@live@gt_heartbeat.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bxt-dsi/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][132] ([i915#1886])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@mman:
    - fi-icl-u2:          [PASS][133] -> [INCOMPLETE][134] ([i915#7057])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12231/fi-icl-u2/igt@i915_selftest@live@mman.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-icl-u2/igt@i915_selftest@live@mman.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][135] ([fdo#109271] / [fdo#111827]) +7 similar issues
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@runner@aborted:
    - bat-adlp-4:         NOTRUN -> [FAIL][136] ([i915#4312])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-adlp-4/igt@runner@aborted.html
    - fi-ivb-3770:        NOTRUN -> [FAIL][137] ([fdo#109271] / [i915#4312])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-ivb-3770/igt@runner@aborted.html
    - fi-elk-e7500:       NOTRUN -> [FAIL][138] ([fdo#109271] / [i915#4312])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-elk-e7500/igt@runner@aborted.html
    - fi-snb-2600:        NOTRUN -> [FAIL][139] ([i915#4312])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-snb-2600/igt@runner@aborted.html
    - fi-bxt-dsi:         NOTRUN -> [FAIL][140] ([i915#4312])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bxt-dsi/igt@runner@aborted.html
    - bat-dg1-5:          NOTRUN -> [FAIL][141] ([i915#4312])
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/bat-dg1-5/igt@runner@aborted.html
    - fi-pnv-d510:        NOTRUN -> [FAIL][142] ([fdo#109271] / [i915#2403] / [i915#4312])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-pnv-d510/igt@runner@aborted.html
    - fi-glk-j4005:       NOTRUN -> [FAIL][143] ([i915#4312])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-glk-j4005/igt@runner@aborted.html
    - fi-kbl-7567u:       NOTRUN -> [FAIL][144] ([i915#4312])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-7567u/igt@runner@aborted.html
    - fi-rkl-11600:       NOTRUN -> [FAIL][145] ([i915#4312])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-rkl-11600/igt@runner@aborted.html
    - fi-adl-ddr5:        NOTRUN -> [FAIL][146] ([i915#4312])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-adl-ddr5/igt@runner@aborted.html
    - fi-cfl-guc:         NOTRUN -> [FAIL][147] ([i915#4312])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-cfl-guc/igt@runner@aborted.html
    - fi-skl-6700k2:      NOTRUN -> [FAIL][148] ([i915#4312])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-skl-6700k2/igt@runner@aborted.html
    - fi-cfl-8109u:       NOTRUN -> [FAIL][149] ([i915#4312])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-cfl-8109u/igt@runner@aborted.html
    - fi-ilk-650:         NOTRUN -> [FAIL][150] ([fdo#109271] / [i915#4312])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-ilk-650/igt@runner@aborted.html
    - fi-blb-e6850:       NOTRUN -> [FAIL][151] ([fdo#109271] / [i915#2403] / [i915#4312])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-blb-e6850/igt@runner@aborted.html
    - fi-skl-6600u:       NOTRUN -> [FAIL][152] ([i915#4312])
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-skl-6600u/igt@runner@aborted.html
    - fi-icl-u2:          NOTRUN -> [FAIL][153] ([i915#4312] / [i915#4991])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-icl-u2/igt@runner@aborted.html
    - fi-apl-guc:         NOTRUN -> [FAIL][154] ([fdo#109271] / [i915#4312] / [i915#6641])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-apl-guc/igt@runner@aborted.html
    - fi-bdw-5557u:       NOTRUN -> [FAIL][155] ([i915#4312])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bdw-5557u/igt@runner@aborted.html
    - fi-snb-2520m:       NOTRUN -> [FAIL][156] ([i915#4312])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-snb-2520m/igt@runner@aborted.html
    - fi-rkl-guc:         NOTRUN -> [FAIL][157] ([i915#4312])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-rkl-guc/igt@runner@aborted.html
    - fi-skl-guc:         NOTRUN -> [FAIL][158] ([i915#4312] / [i915#6641])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-skl-guc/igt@runner@aborted.html
    - fi-kbl-soraka:      NOTRUN -> [FAIL][159] ([i915#4312] / [i915#6641])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-kbl-soraka/igt@runner@aborted.html
    - fi-cfl-8700k:       NOTRUN -> [FAIL][160] ([i915#4312])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-cfl-8700k/igt@runner@aborted.html
    - fi-bsw-nick:        NOTRUN -> [FAIL][161] ([fdo#109271] / [i915#4312])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bsw-nick/igt@runner@aborted.html
    - fi-bdw-gvtdvm:      NOTRUN -> [FAIL][162] ([i915#4312])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/fi-bdw-gvtdvm/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
  [i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
  [i915#6641]: https://gitlab.freedesktop.org/drm/intel/issues/6641
  [i915#7030]: https://gitlab.freedesktop.org/drm/intel/issues/7030
  [i915#7057]: https://gitlab.freedesktop.org/drm/intel/issues/7057


Build changes
-------------

  * Linux: CI_DRM_12231 -> Patchwork_109563v1

  CI-20190529: 20190529
  CI_DRM_12231: bb84c1baa34eed834400e9a3cf9642840be002e1 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7007: 39a979fb4453c557022f0477c609afe10a049e48 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_109563v1: bb84c1baa34eed834400e9a3cf9642840be002e1 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

63e047aeba79 drm/i915/gt: Warn if not in RC6 when GT is parked
672b75d1fb78 drm/i915/gt: Don't do display work on platforms without display

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109563v1/index.html

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