* [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs
@ 2023-03-10 0:59 Ashutosh Dixit
2023-03-10 0:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit
` (3 more replies)
0 siblings, 4 replies; 12+ messages in thread
From: Ashutosh Dixit @ 2023-03-10 0:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi, dri-devel
Expose intel_rps_read_actual_frequency_fw to read the actual freq without
taking forcewake for use by PMU. The code is refactored to use a common set
of functions across sysfs and PMU. Using common functions with sysfs in PMU
solves the issues of missing support for MTL and missing support for older
generations (prior to Gen6). It also future proofs the PMU where sometimes
code has been updated for sysfs and PMU has been missed.
Ashutosh Dixit (2):
drm/i915/pmu: Use functions common with sysfs to read actual freq
drm/i915/pmu: Remove fallback to requested freq for SLPC
drivers/gpu/drm/i915/gt/intel_rps.c | 34 ++++++++++++++++-------------
drivers/gpu/drm/i915/gt/intel_rps.h | 2 +-
drivers/gpu/drm/i915/i915_pmu.c | 17 ++++++++++-----
3 files changed, 31 insertions(+), 22 deletions(-)
--
2.38.0
^ permalink raw reply [flat|nested] 12+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq 2023-03-10 0:59 [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit @ 2023-03-10 0:59 ` Ashutosh Dixit 2023-03-15 9:43 ` Tvrtko Ursulin 2023-03-10 0:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC Ashutosh Dixit ` (2 subsequent siblings) 3 siblings, 1 reply; 12+ messages in thread From: Ashutosh Dixit @ 2023-03-10 0:59 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi, dri-devel Expose intel_rps_read_actual_frequency_fw to read the actual freq without taking forcewake for use by PMU. The code is refactored to use a common set of functions across sysfs and PMU. Using common functions with sysfs in PMU solves the issues of missing support for MTL and missing support for older generations (prior to Gen6). It also future proofs the PMU where sometimes code has been updated for sysfs and PMU has been missed. v2: Remove runtime_pm_if_in_use from read_actual_frequency_fw (Tvrtko) Fixes: 22009b6dad66 ("drm/i915/mtl: Modify CAGF functions for MTL") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8280 Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> --- drivers/gpu/drm/i915/gt/intel_rps.c | 34 ++++++++++++++++------------- drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- drivers/gpu/drm/i915/i915_pmu.c | 10 ++++----- 3 files changed, 24 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 4d0dc9de23f9..9d9ac35691fc 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -2046,16 +2046,6 @@ void intel_rps_sanitize(struct intel_rps *rps) rps_disable_interrupts(rps); } -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps) -{ - struct drm_i915_private *i915 = rps_to_i915(rps); - i915_reg_t rpstat; - - rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1; - - return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat); -} - u32 intel_rps_read_rpstat(struct intel_rps *rps) { struct drm_i915_private *i915 = rps_to_i915(rps); @@ -2089,10 +2079,11 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat) return cagf; } -static u32 read_cagf(struct intel_rps *rps) +static u32 __read_cagf(struct intel_rps *rps, bool take_fw) { struct drm_i915_private *i915 = rps_to_i915(rps); struct intel_uncore *uncore = rps_to_uncore(rps); + i915_reg_t r = INVALID_MMIO_REG; u32 freq; /* @@ -2100,22 +2091,30 @@ static u32 read_cagf(struct intel_rps *rps) * registers will return 0 freq when GT is in RC6 */ if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { - freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1); + r = MTL_MIRROR_TARGET_WP1; } else if (GRAPHICS_VER(i915) >= 12) { - freq = intel_uncore_read(uncore, GEN12_RPSTAT1); + r = GEN12_RPSTAT1; } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { vlv_punit_get(i915); freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); vlv_punit_put(i915); + goto exit; } else if (GRAPHICS_VER(i915) >= 6) { - freq = intel_uncore_read(uncore, GEN6_RPSTAT1); + r = GEN6_RPSTAT1; } else { - freq = intel_uncore_read(uncore, MEMSTAT_ILK); + r = MEMSTAT_ILK; } + freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r); +exit: return intel_rps_get_cagf(rps, freq); } +static u32 read_cagf(struct intel_rps *rps) +{ + return __read_cagf(rps, true); +} + u32 intel_rps_read_actual_frequency(struct intel_rps *rps) { struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; @@ -2128,6 +2127,11 @@ u32 intel_rps_read_actual_frequency(struct intel_rps *rps) return freq; } +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps) +{ + return intel_gpu_freq(rps, __read_cagf(rps, false)); +} + u32 intel_rps_read_punit_req(struct intel_rps *rps) { struct intel_uncore *uncore = rps_to_uncore(rps); diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h index c622962c6bef..2d5b3ef58606 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.h +++ b/drivers/gpu/drm/i915/gt/intel_rps.h @@ -39,6 +39,7 @@ int intel_gpu_freq(struct intel_rps *rps, int val); int intel_freq_opcode(struct intel_rps *rps, int val); u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1); u32 intel_rps_read_actual_frequency(struct intel_rps *rps); +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps); u32 intel_rps_get_requested_frequency(struct intel_rps *rps); u32 intel_rps_get_min_frequency(struct intel_rps *rps); u32 intel_rps_get_min_raw_freq(struct intel_rps *rps); @@ -52,7 +53,6 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); u32 intel_rps_read_punit_req(struct intel_rps *rps); u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); u32 intel_rps_read_rpstat(struct intel_rps *rps); -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps); void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); void intel_rps_raise_unslice(struct intel_rps *rps); void intel_rps_lower_unslice(struct intel_rps *rps); diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index a76c5ce9513d..7ece883a7d95 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -392,14 +392,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) * case we assume the system is running at the intended * frequency. Fortunately, the read should rarely fail! */ - val = intel_rps_read_rpstat_fw(rps); - if (val) - val = intel_rps_get_cagf(rps, val); - else - val = rps->cur_freq; + val = intel_rps_read_actual_frequency_fw(rps); + if (!val) + val = intel_gpu_freq(rps, rps->cur_freq); add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], - intel_gpu_freq(rps, val), period_ns / 1000); + val, period_ns / 1000); } if (pmu->enable & config_mask(I915_PMU_REQUESTED_FREQUENCY)) { -- 2.38.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq 2023-03-10 0:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit @ 2023-03-15 9:43 ` Tvrtko Ursulin 2023-03-16 0:53 ` Dixit, Ashutosh 0 siblings, 1 reply; 12+ messages in thread From: Tvrtko Ursulin @ 2023-03-15 9:43 UTC (permalink / raw) To: Ashutosh Dixit, intel-gfx; +Cc: dri-devel, Rodrigo Vivi On 10/03/2023 00:59, Ashutosh Dixit wrote: > Expose intel_rps_read_actual_frequency_fw to read the actual freq without > taking forcewake for use by PMU. The code is refactored to use a common set > of functions across sysfs and PMU. Using common functions with sysfs in PMU > solves the issues of missing support for MTL and missing support for older > generations (prior to Gen6). It also future proofs the PMU where sometimes > code has been updated for sysfs and PMU has been missed. > > v2: Remove runtime_pm_if_in_use from read_actual_frequency_fw (Tvrtko) > > Fixes: 22009b6dad66 ("drm/i915/mtl: Modify CAGF functions for MTL") > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8280 > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_rps.c | 34 ++++++++++++++++------------- > drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- > drivers/gpu/drm/i915/i915_pmu.c | 10 ++++----- > 3 files changed, 24 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c > index 4d0dc9de23f9..9d9ac35691fc 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.c > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c > @@ -2046,16 +2046,6 @@ void intel_rps_sanitize(struct intel_rps *rps) > rps_disable_interrupts(rps); > } > > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps) > -{ > - struct drm_i915_private *i915 = rps_to_i915(rps); > - i915_reg_t rpstat; > - > - rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1; > - > - return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat); > -} > - > u32 intel_rps_read_rpstat(struct intel_rps *rps) > { > struct drm_i915_private *i915 = rps_to_i915(rps); > @@ -2089,10 +2079,11 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat) > return cagf; > } > > -static u32 read_cagf(struct intel_rps *rps) > +static u32 __read_cagf(struct intel_rps *rps, bool take_fw) > { > struct drm_i915_private *i915 = rps_to_i915(rps); > struct intel_uncore *uncore = rps_to_uncore(rps); > + i915_reg_t r = INVALID_MMIO_REG; > u32 freq; > > /* > @@ -2100,22 +2091,30 @@ static u32 read_cagf(struct intel_rps *rps) > * registers will return 0 freq when GT is in RC6 > */ > if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { > - freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1); > + r = MTL_MIRROR_TARGET_WP1; > } else if (GRAPHICS_VER(i915) >= 12) { > - freq = intel_uncore_read(uncore, GEN12_RPSTAT1); > + r = GEN12_RPSTAT1; > } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { > vlv_punit_get(i915); > freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); > vlv_punit_put(i915); > + goto exit; Alternatively you could avoid the goto by making the read below conditional on r being set. One more conditional though for avoiding gotos.. up to you. > } else if (GRAPHICS_VER(i915) >= 6) { > - freq = intel_uncore_read(uncore, GEN6_RPSTAT1); > + r = GEN6_RPSTAT1; > } else { > - freq = intel_uncore_read(uncore, MEMSTAT_ILK); > + r = MEMSTAT_ILK; > } > > + freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r); > +exit: > return intel_rps_get_cagf(rps, freq); > } > > +static u32 read_cagf(struct intel_rps *rps) > +{ > + return __read_cagf(rps, true); > +} There is only one caller so up to you if you think a helper is needed or not. > + > u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > { > struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; > @@ -2128,6 +2127,11 @@ u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > return freq; > } > > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps) > +{ > + return intel_gpu_freq(rps, __read_cagf(rps, false)); > +} > + > u32 intel_rps_read_punit_req(struct intel_rps *rps) > { > struct intel_uncore *uncore = rps_to_uncore(rps); > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h > index c622962c6bef..2d5b3ef58606 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.h > +++ b/drivers/gpu/drm/i915/gt/intel_rps.h > @@ -39,6 +39,7 @@ int intel_gpu_freq(struct intel_rps *rps, int val); > int intel_freq_opcode(struct intel_rps *rps, int val); > u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1); > u32 intel_rps_read_actual_frequency(struct intel_rps *rps); > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps); > u32 intel_rps_get_requested_frequency(struct intel_rps *rps); > u32 intel_rps_get_min_frequency(struct intel_rps *rps); > u32 intel_rps_get_min_raw_freq(struct intel_rps *rps); > @@ -52,7 +53,6 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); > u32 intel_rps_read_punit_req(struct intel_rps *rps); > u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); > u32 intel_rps_read_rpstat(struct intel_rps *rps); > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps); > void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); > void intel_rps_raise_unslice(struct intel_rps *rps); > void intel_rps_lower_unslice(struct intel_rps *rps); > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > index a76c5ce9513d..7ece883a7d95 100644 > --- a/drivers/gpu/drm/i915/i915_pmu.c > +++ b/drivers/gpu/drm/i915/i915_pmu.c > @@ -392,14 +392,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) > * case we assume the system is running at the intended > * frequency. Fortunately, the read should rarely fail! > */ > - val = intel_rps_read_rpstat_fw(rps); > - if (val) > - val = intel_rps_get_cagf(rps, val); I think you can un-export this one now. With that looks okay to me, with or without the other stuff: Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko > - else > - val = rps->cur_freq; > + val = intel_rps_read_actual_frequency_fw(rps); > + if (!val) > + val = intel_gpu_freq(rps, rps->cur_freq); > > add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], > - intel_gpu_freq(rps, val), period_ns / 1000); > + val, period_ns / 1000); > } > > if (pmu->enable & config_mask(I915_PMU_REQUESTED_FREQUENCY)) { ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq 2023-03-15 9:43 ` Tvrtko Ursulin @ 2023-03-16 0:53 ` Dixit, Ashutosh 0 siblings, 0 replies; 12+ messages in thread From: Dixit, Ashutosh @ 2023-03-16 0:53 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx, dri-devel, Rodrigo Vivi On Wed, 15 Mar 2023 02:43:30 -0700, Tvrtko Ursulin wrote: > > On 10/03/2023 00:59, Ashutosh Dixit wrote: > > Expose intel_rps_read_actual_frequency_fw to read the actual freq without > > taking forcewake for use by PMU. The code is refactored to use a common set > > of functions across sysfs and PMU. Using common functions with sysfs in PMU > > solves the issues of missing support for MTL and missing support for older > > generations (prior to Gen6). It also future proofs the PMU where sometimes > > code has been updated for sysfs and PMU has been missed. > > > > v2: Remove runtime_pm_if_in_use from read_actual_frequency_fw (Tvrtko) > > > > Fixes: 22009b6dad66 ("drm/i915/mtl: Modify CAGF functions for MTL") > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8280 > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_rps.c | 34 ++++++++++++++++------------- > > drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- > > drivers/gpu/drm/i915/i915_pmu.c | 10 ++++----- > > 3 files changed, 24 insertions(+), 22 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c > > index 4d0dc9de23f9..9d9ac35691fc 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_rps.c > > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c > > @@ -2046,16 +2046,6 @@ void intel_rps_sanitize(struct intel_rps *rps) > > rps_disable_interrupts(rps); > > } > > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps) > > -{ > > - struct drm_i915_private *i915 = rps_to_i915(rps); > > - i915_reg_t rpstat; > > - > > - rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1; > > - > > - return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat); > > -} > > - > > u32 intel_rps_read_rpstat(struct intel_rps *rps) > > { > > struct drm_i915_private *i915 = rps_to_i915(rps); > > @@ -2089,10 +2079,11 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat) > > return cagf; > > } > > -static u32 read_cagf(struct intel_rps *rps) > > +static u32 __read_cagf(struct intel_rps *rps, bool take_fw) > > { > > struct drm_i915_private *i915 = rps_to_i915(rps); > > struct intel_uncore *uncore = rps_to_uncore(rps); > > + i915_reg_t r = INVALID_MMIO_REG; > > u32 freq; > > /* > > @@ -2100,22 +2091,30 @@ static u32 read_cagf(struct intel_rps *rps) > > * registers will return 0 freq when GT is in RC6 > > */ > > if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { > > - freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1); > > + r = MTL_MIRROR_TARGET_WP1; > > } else if (GRAPHICS_VER(i915) >= 12) { > > - freq = intel_uncore_read(uncore, GEN12_RPSTAT1); > > + r = GEN12_RPSTAT1; > > } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { > > vlv_punit_get(i915); > > freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); > > vlv_punit_put(i915); > > + goto exit; > > Alternatively you could avoid the goto by making the read below conditional > on r being set. One more conditional though for avoiding gotos.. up to you. Done. > > > } else if (GRAPHICS_VER(i915) >= 6) { > > - freq = intel_uncore_read(uncore, GEN6_RPSTAT1); > > + r = GEN6_RPSTAT1; > > } else { > > - freq = intel_uncore_read(uncore, MEMSTAT_ILK); > > + r = MEMSTAT_ILK; > > } > > + freq = take_fw ? intel_uncore_read(uncore, r) : > > intel_uncore_read_fw(uncore, r); > > +exit: > > return intel_rps_get_cagf(rps, freq); > > } > > +static u32 read_cagf(struct intel_rps *rps) > > +{ > > + return __read_cagf(rps, true); > > +} > > There is only one caller so up to you if you think a helper is needed or > not. There are other callers too in i915/gt/selftest_rps.c so need to retain it. > > > + > > u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > > { > > struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; > > @@ -2128,6 +2127,11 @@ u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > > return freq; > > } > > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps) > > +{ > > + return intel_gpu_freq(rps, __read_cagf(rps, false)); > > +} > > + > > u32 intel_rps_read_punit_req(struct intel_rps *rps) > > { > > struct intel_uncore *uncore = rps_to_uncore(rps); > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h > > index c622962c6bef..2d5b3ef58606 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_rps.h > > +++ b/drivers/gpu/drm/i915/gt/intel_rps.h > > @@ -39,6 +39,7 @@ int intel_gpu_freq(struct intel_rps *rps, int val); > > int intel_freq_opcode(struct intel_rps *rps, int val); > > u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1); > > u32 intel_rps_read_actual_frequency(struct intel_rps *rps); > > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps); > > u32 intel_rps_get_requested_frequency(struct intel_rps *rps); > > u32 intel_rps_get_min_frequency(struct intel_rps *rps); > > u32 intel_rps_get_min_raw_freq(struct intel_rps *rps); > > @@ -52,7 +53,6 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); > > u32 intel_rps_read_punit_req(struct intel_rps *rps); > > u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); > > u32 intel_rps_read_rpstat(struct intel_rps *rps); > > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps); > > void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); > > void intel_rps_raise_unslice(struct intel_rps *rps); > > void intel_rps_lower_unslice(struct intel_rps *rps); > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > > index a76c5ce9513d..7ece883a7d95 100644 > > --- a/drivers/gpu/drm/i915/i915_pmu.c > > +++ b/drivers/gpu/drm/i915/i915_pmu.c > > @@ -392,14 +392,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) > > * case we assume the system is running at the intended > > * frequency. Fortunately, the read should rarely fail! > > */ > > - val = intel_rps_read_rpstat_fw(rps); > > - if (val) > > - val = intel_rps_get_cagf(rps, val); > > I think you can un-export this one now. Done. As bonus unexported intel_rps_read_punit_req too. > With that looks okay to me, with or without the other stuff: > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Thanks. -- Ashutosh > > > - else > > - val = rps->cur_freq; > > + val = intel_rps_read_actual_frequency_fw(rps); > > + if (!val) > > + val = intel_gpu_freq(rps, rps->cur_freq); > > add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], > > - intel_gpu_freq(rps, val), period_ns / 1000); > > + val, period_ns / 1000); > > } > > if (pmu->enable & config_mask(I915_PMU_REQUESTED_FREQUENCY)) { ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC 2023-03-10 0:59 [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit 2023-03-10 0:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit @ 2023-03-10 0:59 ` Ashutosh Dixit 2023-03-15 9:50 ` Tvrtko Ursulin 2023-03-10 2:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use common freq functions with sysfs Patchwork 2023-03-12 9:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 1 reply; 12+ messages in thread From: Ashutosh Dixit @ 2023-03-10 0:59 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi, dri-devel The fallback to requested freq does not work for SLPC because SLPC does not use 'struct intel_rps'. Also for SLPC requested freq can only be obtained from a hw register after acquiring forcewake which we don't want to do for PMU. Therefore remove fallback to requested freq for SLPC. The actual freq will be 0 when gt is in RC6 which is correct. Also this is rare since PMU freq sampling happens only when gt is unparked. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> --- drivers/gpu/drm/i915/i915_pmu.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index 7ece883a7d95..f697fabed64a 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -393,7 +393,14 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) * frequency. Fortunately, the read should rarely fail! */ val = intel_rps_read_actual_frequency_fw(rps); - if (!val) + + /* + * SLPC does not use 'struct intel_rps'. Also for SLPC + * requested freq can only be obtained after acquiring + * forcewake and reading a hw register. For SLPC just + * let val be 0 + */ + if (!val && !intel_uc_uses_guc_slpc(>->uc)) val = intel_gpu_freq(rps, rps->cur_freq); add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], -- 2.38.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC 2023-03-10 0:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC Ashutosh Dixit @ 2023-03-15 9:50 ` Tvrtko Ursulin 2023-03-15 23:54 ` Dixit, Ashutosh 0 siblings, 1 reply; 12+ messages in thread From: Tvrtko Ursulin @ 2023-03-15 9:50 UTC (permalink / raw) To: Ashutosh Dixit, intel-gfx; +Cc: dri-devel, Rodrigo Vivi On 10/03/2023 00:59, Ashutosh Dixit wrote: > The fallback to requested freq does not work for SLPC because SLPC does not > use 'struct intel_rps'. Also for SLPC requested freq can only be obtained > from a hw register after acquiring forcewake which we don't want to do for > PMU. Therefore remove fallback to requested freq for SLPC. The actual freq > will be 0 when gt is in RC6 which is correct. Also this is rare since PMU > freq sampling happens only when gt is unparked. > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > --- > drivers/gpu/drm/i915/i915_pmu.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > index 7ece883a7d95..f697fabed64a 100644 > --- a/drivers/gpu/drm/i915/i915_pmu.c > +++ b/drivers/gpu/drm/i915/i915_pmu.c > @@ -393,7 +393,14 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) > * frequency. Fortunately, the read should rarely fail! > */ > val = intel_rps_read_actual_frequency_fw(rps); > - if (!val) > + > + /* > + * SLPC does not use 'struct intel_rps'. Also for SLPC > + * requested freq can only be obtained after acquiring > + * forcewake and reading a hw register. For SLPC just > + * let val be 0 > + */ > + if (!val && !intel_uc_uses_guc_slpc(>->uc)) > val = intel_gpu_freq(rps, rps->cur_freq); I really dislike sprinkling of "uses slpc" since I think the thing hasn't really been integrated nicely. Case in point is probably the flow duality in intel_rps_boost. Data structures as well, even though some fields and concepts are shared. For instance why we can't have the notion of software tracked cur_freq in rps, and/or have it zero if with SLPC we can't have it otherwise? I will abstain, sorry. Regards, Tvrtko > > add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC 2023-03-15 9:50 ` Tvrtko Ursulin @ 2023-03-15 23:54 ` Dixit, Ashutosh 0 siblings, 0 replies; 12+ messages in thread From: Dixit, Ashutosh @ 2023-03-15 23:54 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx, dri-devel, Rodrigo Vivi On Wed, 15 Mar 2023 02:50:17 -0700, Tvrtko Ursulin wrote: > > On 10/03/2023 00:59, Ashutosh Dixit wrote: > > The fallback to requested freq does not work for SLPC because SLPC does not > > use 'struct intel_rps'. Also for SLPC requested freq can only be obtained > > from a hw register after acquiring forcewake which we don't want to do for > > PMU. Therefore remove fallback to requested freq for SLPC. The actual freq > > will be 0 when gt is in RC6 which is correct. Also this is rare since PMU > > freq sampling happens only when gt is unparked. > > > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > > --- > > drivers/gpu/drm/i915/i915_pmu.c | 9 ++++++++- > > 1 file changed, 8 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > > index 7ece883a7d95..f697fabed64a 100644 > > --- a/drivers/gpu/drm/i915/i915_pmu.c > > +++ b/drivers/gpu/drm/i915/i915_pmu.c > > @@ -393,7 +393,14 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) > > * frequency. Fortunately, the read should rarely fail! > > */ > > val = intel_rps_read_actual_frequency_fw(rps); > > - if (!val) > > + > > + /* > > + * SLPC does not use 'struct intel_rps'. Also for SLPC > > + * requested freq can only be obtained after acquiring > > + * forcewake and reading a hw register. For SLPC just > > + * let val be 0 > > + */ > > + if (!val && !intel_uc_uses_guc_slpc(>->uc)) > > val = intel_gpu_freq(rps, rps->cur_freq); > > I really dislike sprinkling of "uses slpc" since I think the thing hasn't > really been integrated nicely. Case in point is probably the flow duality > in intel_rps_boost. Data structures as well, even though some fields and > concepts are shared. > > For instance why we can't have the notion of software tracked cur_freq in > rps, and/or have it zero if with SLPC we can't have it otherwise? For SLPC: * We can't have the notion of software tracked cur_freq in rps because FW is managing the freq. * rps->cur_freq /is/ actually 0 since SLPC does not use 'struct intel_rps'. So this patch doesn't really make any practical difference, PMU values will be exactly the same with or without this patch. It was just clarifying things. > I will abstain, sorry. I will drop this patch, there doesn't seem much point in it. Thanks. -- Ashutosh ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use common freq functions with sysfs 2023-03-10 0:59 [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit 2023-03-10 0:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit 2023-03-10 0:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC Ashutosh Dixit @ 2023-03-10 2:57 ` Patchwork 2023-03-12 9:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2023-03-10 2:57 UTC (permalink / raw) To: Dixit, Ashutosh; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 7310 bytes --] == Series Details == Series: drm/i915/pmu: Use common freq functions with sysfs URL : https://patchwork.freedesktop.org/series/114942/ State : success == Summary == CI Bug Log - changes from CI_DRM_12834 -> Patchwork_114942v1 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/index.html Participating hosts (35 -> 35) ------------------------------ Additional (1): fi-kbl-soraka Missing (1): fi-snb-2520m Known issues ------------ Here are the changes found in Patchwork_114942v1 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html * igt@i915_selftest@live@gem_contexts: - fi-kbl-soraka: NOTRUN -> [INCOMPLETE][3] ([i915#7913]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-kbl-soraka/igt@i915_selftest@live@gem_contexts.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][4] ([i915#1886]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html - bat-adln-1: [PASS][5] -> [DMESG-FAIL][6] ([i915#4258]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-adln-1/igt@i915_selftest@live@gt_pm.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-adln-1/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@migrate: - bat-dg2-11: [PASS][7] -> [DMESG-WARN][8] ([i915#7699]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-dg2-11/igt@i915_selftest@live@migrate.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-dg2-11/igt@i915_selftest@live@migrate.html * igt@i915_selftest@live@requests: - bat-rpls-2: [PASS][9] -> [ABORT][10] ([i915#7694] / [i915#7913]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-rpls-2/igt@i915_selftest@live@requests.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-rpls-2/igt@i915_selftest@live@requests.html * igt@kms_chamelium_frames@hdmi-crc-fast: - fi-kbl-soraka: NOTRUN -> [SKIP][11] ([fdo#109271]) +16 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - fi-bsw-nick: NOTRUN -> [SKIP][12] ([fdo#109271]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-bsw-nick/igt@kms_chamelium_hpd@common-hpd-after-suspend.html - bat-rpls-1: NOTRUN -> [SKIP][13] ([i915#7828]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-rpls-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_pipe_crc_basic@suspend-read-crc: - bat-rpls-1: NOTRUN -> [SKIP][14] ([i915#1845]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-rpls-1/igt@kms_pipe_crc_basic@suspend-read-crc.html #### Possible fixes #### * igt@gem_exec_suspend@basic-s3@smem: - bat-rpls-1: [ABORT][15] ([i915#6687] / [i915#7978]) -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html * igt@i915_selftest@live@execlists: - fi-bsw-nick: [ABORT][17] ([i915#7911] / [i915#7913]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/fi-bsw-nick/igt@i915_selftest@live@execlists.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/fi-bsw-nick/igt@i915_selftest@live@execlists.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3: - bat-dg2-9: [FAIL][19] ([fdo#103375]) -> [PASS][20] +2 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3.html * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3: - bat-dg2-9: [FAIL][21] ([fdo#103375] / [i915#7932]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3.html #### Warnings #### * igt@i915_selftest@live@slpc: - bat-rpls-1: [DMESG-FAIL][23] ([i915#6367]) -> [DMESG-FAIL][24] ([i915#6367] / [i915#7996]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/bat-rpls-1/igt@i915_selftest@live@slpc.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/bat-rpls-1/igt@i915_selftest@live@slpc.html [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367 [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687 [i915#7694]: https://gitlab.freedesktop.org/drm/intel/issues/7694 [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911 [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913 [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932 [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978 [i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996 Build changes ------------- * Linux: CI_DRM_12834 -> Patchwork_114942v1 CI-20190529: 20190529 CI_DRM_12834: 7e4814c66fdc64c3d7fee735853d909ffe6028cd @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7188: b35bfa32fe672d67ced8555557e3e707ace211ad @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_114942v1: 7e4814c66fdc64c3d7fee735853d909ffe6028cd @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits 3d1b4f512de6 drm/i915/pmu: Remove fallback to requested freq for SLPC d5ae2e507734 drm/i915/pmu: Use functions common with sysfs to read actual freq == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/index.html [-- Attachment #2: Type: text/html, Size: 8760 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Use common freq functions with sysfs 2023-03-10 0:59 [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit ` (2 preceding siblings ...) 2023-03-10 2:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use common freq functions with sysfs Patchwork @ 2023-03-12 9:27 ` Patchwork 3 siblings, 0 replies; 12+ messages in thread From: Patchwork @ 2023-03-12 9:27 UTC (permalink / raw) To: Dixit, Ashutosh; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 39087 bytes --] == Series Details == Series: drm/i915/pmu: Use common freq functions with sysfs URL : https://patchwork.freedesktop.org/series/114942/ State : success == Summary == CI Bug Log - changes from CI_DRM_12834_full -> Patchwork_114942v1_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_114942v1_full: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1: - {shard-tglu}: [PASS][1] -> [DMESG-WARN][2] +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-2/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-1/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html * {igt@xe/xe_exec_basic@once-rebind}: - {shard-dg1}: NOTRUN -> [SKIP][3] +150 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-dg1-15/igt@xe/xe_exec_basic@once-rebind.html Known issues ------------ Here are the changes found in Patchwork_114942v1_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_create@create-ext-cpu-access-big: - shard-tglu-10: NOTRUN -> [SKIP][4] ([i915#6335]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_create@create-ext-cpu-access-big.html * igt@gem_ctx_sseu@engines: - shard-tglu-10: NOTRUN -> [SKIP][5] ([i915#280]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_ctx_sseu@engines.html * igt@gem_exec_balancer@parallel-ordering: - shard-tglu-10: NOTRUN -> [FAIL][6] ([i915#6117]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_exec_fair@basic-none@rcs0: - shard-tglu-10: NOTRUN -> [FAIL][7] ([i915#2842]) +5 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_exec_fair@basic-none@rcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-glk: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk5/igt@gem_exec_fair@basic-pace@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk2/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_lmem_swapping@heavy-multi: - shard-tglu-10: NOTRUN -> [SKIP][10] ([i915#4613]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_lmem_swapping@heavy-multi.html * igt@gem_media_vme: - shard-tglu-10: NOTRUN -> [SKIP][11] ([i915#284]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_media_vme.html * igt@gem_mmap_gtt@coherency: - shard-tglu-10: NOTRUN -> [SKIP][12] ([fdo#111656]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_mmap_gtt@coherency.html * igt@gem_pxp@reject-modify-context-protection-off-1: - shard-tglu-10: NOTRUN -> [SKIP][13] ([i915#4270]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gem_pxp@reject-modify-context-protection-off-1.html * igt@gem_render_copy@x-tiled-to-vebox-yf-tiled: - shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271]) +21 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-apl6/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html * igt@gen7_exec_parse@basic-allocation: - shard-tglu-10: NOTRUN -> [SKIP][15] ([fdo#109289]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gen7_exec_parse@basic-allocation.html * igt@gen9_exec_parse@allowed-single: - shard-glk: [PASS][16] -> [ABORT][17] ([i915#5566]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk3/igt@gen9_exec_parse@allowed-single.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk6/igt@gen9_exec_parse@allowed-single.html * igt@gen9_exec_parse@basic-rejected-ctx-param: - shard-tglu-10: NOTRUN -> [SKIP][18] ([i915#2527] / [i915#2856]) +2 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@gen9_exec_parse@basic-rejected-ctx-param.html * igt@i915_pm_backlight@bad-brightness: - shard-tglu-10: NOTRUN -> [SKIP][19] ([i915#7561]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@i915_pm_backlight@bad-brightness.html * igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a: - shard-tglu-10: NOTRUN -> [FAIL][20] ([i915#3825]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-hdmi-a.html * igt@kms_big_fb@4-tiled-32bpp-rotate-270: - shard-tglu-10: NOTRUN -> [SKIP][21] ([i915#5286]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html * igt@kms_big_fb@linear-64bpp-rotate-90: - shard-tglu-10: NOTRUN -> [SKIP][22] ([fdo#111614]) +1 similar issue [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_big_fb@linear-64bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip: - shard-tglu-10: NOTRUN -> [SKIP][23] ([fdo#111615]) +4 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html * igt@kms_big_joiner@invalid-modeset: - shard-tglu-10: NOTRUN -> [SKIP][24] ([i915#2705]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_big_joiner@invalid-modeset.html * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs: - shard-tglu-10: NOTRUN -> [SKIP][25] ([i915#3689] / [i915#3886]) +4 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs: - shard-apl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3886]) +1 similar issue [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-apl6/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs: - shard-tglu-10: NOTRUN -> [SKIP][27] ([i915#3689] / [i915#6095]) +3 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs.html * igt@kms_ccs@pipe-d-crc-primary-rotation-180-4_tiled_dg2_mc_ccs: - shard-tglu-10: NOTRUN -> [SKIP][28] ([i915#3689]) +7 similar issues [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_ccs@pipe-d-crc-primary-rotation-180-4_tiled_dg2_mc_ccs.html * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc: - shard-tglu-10: NOTRUN -> [SKIP][29] ([i915#6095]) +2 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc.html * igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs: - shard-tglu-10: NOTRUN -> [SKIP][30] ([fdo#111615] / [i915#3689]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs.html * igt@kms_chamelium_color@ctm-0-75: - shard-tglu-10: NOTRUN -> [SKIP][31] ([fdo#111827]) +1 similar issue [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_chamelium_color@ctm-0-75.html * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode: - shard-tglu-10: NOTRUN -> [SKIP][32] ([i915#7828]) +5 similar issues [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html * igt@kms_content_protection@dp-mst-type-1: - shard-tglu-10: NOTRUN -> [SKIP][33] ([i915#3116] / [i915#3299]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_cursor_crc@cursor-sliding-512x170: - shard-tglu-10: NOTRUN -> [SKIP][34] ([i915#3359]) +1 similar issue [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_cursor_crc@cursor-sliding-512x170.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-tglu-10: NOTRUN -> [SKIP][35] ([i915#4103]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic: - shard-glk: [PASS][36] -> [DMESG-WARN][37] ([i915#118]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk8/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk8/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size: - shard-tglu-10: NOTRUN -> [SKIP][38] ([fdo#109274]) +1 similar issue [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-apl: [PASS][39] -> [FAIL][40] ([i915#2346]) +1 similar issue [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_fbcon_fbt@psr: - shard-tglu-10: NOTRUN -> [SKIP][41] ([i915#3469]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_fbcon_fbt@psr.html * igt@kms_flip@2x-flip-vs-absolute-wf_vblank: - shard-tglu-10: NOTRUN -> [SKIP][42] ([fdo#109274] / [i915#3637]) +6 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode: - shard-tglu-10: NOTRUN -> [SKIP][43] ([i915#2587] / [i915#2672]) +4 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc: - shard-tglu-10: NOTRUN -> [SKIP][44] ([fdo#109280]) +29 similar issues [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear: - shard-tglu-10: NOTRUN -> [SKIP][45] ([fdo#110189]) +20 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-tiling-linear.html * igt@kms_panel_fitting@atomic-fastset: - shard-tglu-10: NOTRUN -> [SKIP][46] ([i915#6301]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_panel_fitting@atomic-fastset.html * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf: - shard-tglu-10: NOTRUN -> [SKIP][47] ([i915#658]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html * igt@kms_psr2_su@page_flip-nv12: - shard-tglu-10: NOTRUN -> [SKIP][48] ([fdo#109642] / [fdo#111068] / [i915#658]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_psr2_su@page_flip-nv12.html * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180: - shard-tglu-10: NOTRUN -> [SKIP][49] ([fdo#111615] / [i915#5289]) [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html * igt@kms_setmode@clone-exclusive-crtc: - shard-tglu-10: NOTRUN -> [SKIP][50] ([i915#3555]) +6 similar issues [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_setmode@clone-exclusive-crtc.html * igt@kms_writeback@writeback-fb-id: - shard-tglu-10: NOTRUN -> [SKIP][51] ([i915#2437]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@kms_writeback@writeback-fb-id.html * igt@perf_pmu@rc6-suspend: - shard-apl: [PASS][52] -> [ABORT][53] ([i915#180]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-apl2/igt@perf_pmu@rc6-suspend.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-apl1/igt@perf_pmu@rc6-suspend.html * igt@v3d/v3d_perfmon@destroy-valid-perfmon: - shard-tglu-10: NOTRUN -> [SKIP][54] ([fdo#109315] / [i915#2575]) +3 similar issues [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@v3d/v3d_perfmon@destroy-valid-perfmon.html * igt@vc4/vc4_lookup_fail@bad-color-write: - shard-tglu-10: NOTRUN -> [SKIP][55] ([i915#2575]) +4 similar issues [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-10/igt@vc4/vc4_lookup_fail@bad-color-write.html #### Possible fixes #### * igt@drm_fdinfo@virtual-idle: - {shard-rkl}: [FAIL][56] ([i915#7742]) -> [PASS][57] +1 similar issue [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@drm_fdinfo@virtual-idle.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@drm_fdinfo@virtual-idle.html * igt@feature_discovery@psr2: - {shard-rkl}: [SKIP][58] ([i915#658]) -> [PASS][59] [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@feature_discovery@psr2.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-6/igt@feature_discovery@psr2.html * igt@gem_eio@in-flight-contexts-1us: - shard-apl: [TIMEOUT][60] ([i915#3063]) -> [PASS][61] [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-apl7/igt@gem_eio@in-flight-contexts-1us.html [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-apl2/igt@gem_eio@in-flight-contexts-1us.html * igt@gem_eio@in-flight-suspend: - {shard-rkl}: [FAIL][62] ([fdo#103375]) -> [PASS][63] +2 similar issues [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-3/igt@gem_eio@in-flight-suspend.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_fair@basic-flow@rcs0: - {shard-rkl}: [FAIL][64] ([i915#2842]) -> [PASS][65] +2 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-6/igt@gem_exec_fair@basic-flow@rcs0.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-1/igt@gem_exec_fair@basic-flow@rcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [FAIL][66] ([i915#2842]) -> [PASS][67] +1 similar issue [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@gem_exec_reloc@basic-gtt-cpu: - {shard-rkl}: [SKIP][68] ([i915#3281]) -> [PASS][69] +8 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-1/igt@gem_exec_reloc@basic-gtt-cpu.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-cpu.html * igt@gem_mmap_gtt@coherency: - {shard-rkl}: [SKIP][70] ([fdo#111656]) -> [PASS][71] [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@gem_mmap_gtt@coherency.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@gem_mmap_gtt@coherency.html * igt@gem_partial_pwrite_pread@writes-after-reads: - {shard-rkl}: [SKIP][72] ([i915#3282]) -> [PASS][73] +7 similar issues [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-1/igt@gem_partial_pwrite_pread@writes-after-reads.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads.html * igt@gen9_exec_parse@allowed-single: - shard-apl: [ABORT][74] ([i915#5566]) -> [PASS][75] [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-apl7/igt@gen9_exec_parse@allowed-single.html [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-apl6/igt@gen9_exec_parse@allowed-single.html * igt@gen9_exec_parse@shadow-peek: - {shard-rkl}: [SKIP][76] ([i915#2527]) -> [PASS][77] +3 similar issues [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-3/igt@gen9_exec_parse@shadow-peek.html [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@gen9_exec_parse@shadow-peek.html * igt@i915_pm_dc@dc5-dpms: - {shard-rkl}: [FAIL][78] ([i915#7330]) -> [PASS][79] [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-5/igt@i915_pm_dc@dc5-dpms.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-4/igt@i915_pm_dc@dc5-dpms.html * igt@i915_pm_dc@dc9-dpms: - {shard-rkl}: [SKIP][80] ([i915#3361]) -> [PASS][81] [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-5/igt@i915_pm_dc@dc9-dpms.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-2/igt@i915_pm_dc@dc9-dpms.html * igt@i915_pm_rpm@drm-resources-equal: - {shard-tglu}: [SKIP][82] ([i915#3547]) -> [PASS][83] [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@i915_pm_rpm@drm-resources-equal.html [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@i915_pm_rpm@drm-resources-equal.html * igt@i915_pm_rpm@modeset-lpsp: - {shard-rkl}: [SKIP][84] ([i915#1397]) -> [PASS][85] [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@i915_pm_rpm@modeset-lpsp.html [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp.html * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait: - {shard-tglu}: [SKIP][86] ([i915#1397]) -> [PASS][87] [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html * {igt@i915_power@sanity}: - {shard-rkl}: [SKIP][88] ([i915#7984]) -> [PASS][89] [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@i915_power@sanity.html [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@i915_power@sanity.html * igt@kms_ccs@pipe-d-random-ccs-data-y_tiled_gen12_rc_ccs: - {shard-tglu}: [SKIP][90] ([i915#1845] / [i915#7651]) -> [PASS][91] +18 similar issues [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@kms_ccs@pipe-d-random-ccs-data-y_tiled_gen12_rc_ccs.html [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@kms_ccs@pipe-d-random-ccs-data-y_tiled_gen12_rc_ccs.html * igt@kms_cursor_legacy@basic-flip-before-cursor-legacy: - {shard-tglu}: [SKIP][92] ([i915#1845]) -> [PASS][93] +2 similar issues [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-glk: [FAIL][94] ([i915#2346]) -> [PASS][95] +1 similar issue [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2: - shard-glk: [FAIL][96] ([i915#2122]) -> [PASS][97] [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2: - shard-glk: [FAIL][98] ([i915#79]) -> [PASS][99] [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - {shard-rkl}: [SKIP][100] ([i915#1849] / [i915#4098]) -> [PASS][101] +11 similar issues [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt: - {shard-tglu}: [SKIP][102] ([i915#1849]) -> [PASS][103] +7 similar issues [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt.html [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_plane@plane-panning-bottom-right@pipe-a-planes: - {shard-rkl}: [SKIP][104] ([i915#1849]) -> [PASS][105] +1 similar issue [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-6/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html * igt@kms_plane@plane-position-covered@pipe-a-planes: - {shard-tglu}: [SKIP][106] ([i915#1849] / [i915#3558]) -> [PASS][107] +1 similar issue [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@kms_plane@plane-position-covered@pipe-a-planes.html [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@kms_plane@plane-position-covered@pipe-a-planes.html * igt@kms_psr@sprite_mmap_gtt: - {shard-rkl}: [SKIP][108] ([i915#1072]) -> [PASS][109] [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@kms_psr@sprite_mmap_gtt.html [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-6/igt@kms_psr@sprite_mmap_gtt.html * igt@kms_rotation_crc@primary-rotation-90: - {shard-rkl}: [SKIP][110] ([i915#1845] / [i915#4098]) -> [PASS][111] +16 similar issues [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-2/igt@kms_rotation_crc@primary-rotation-90.html [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-6/igt@kms_rotation_crc@primary-rotation-90.html * igt@kms_universal_plane@universal-plane-pipe-b-sanity: - {shard-tglu}: [SKIP][112] ([fdo#109274]) -> [PASS][113] +1 similar issue [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-tglu-6/igt@kms_universal_plane@universal-plane-pipe-b-sanity.html [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-tglu-2/igt@kms_universal_plane@universal-plane-pipe-b-sanity.html * igt@perf@gen8-unprivileged-single-ctx-counters: - {shard-rkl}: [SKIP][114] ([i915#2436]) -> [PASS][115] [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-1/igt@perf@gen8-unprivileged-single-ctx-counters.html [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@perf@gen8-unprivileged-single-ctx-counters.html * igt@perf@mi-rpc: - {shard-rkl}: [SKIP][116] ([i915#2434]) -> [PASS][117] [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-3/igt@perf@mi-rpc.html [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@perf@mi-rpc.html * igt@perf@polling-small-buf: - {shard-rkl}: [FAIL][118] ([i915#1722]) -> [PASS][119] [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-3/igt@perf@polling-small-buf.html [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@perf@polling-small-buf.html * igt@prime_vgem@basic-fence-read: - {shard-rkl}: [SKIP][120] ([fdo#109295] / [i915#3291] / [i915#3708]) -> [PASS][121] [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-3/igt@prime_vgem@basic-fence-read.html [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@prime_vgem@basic-fence-read.html * igt@prime_vgem@coherency-gtt: - {shard-rkl}: [SKIP][122] ([fdo#109295] / [fdo#111656] / [i915#3708]) -> [PASS][123] [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12834/shard-rkl-3/igt@prime_vgem@coherency-gtt.html [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/shard-rkl-5/igt@prime_vgem@coherency-gtt.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303 [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307 [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308 [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644 [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118 [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722 [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755 [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434 [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2532]: https://gitlab.freedesktop.org/drm/intel/issues/2532 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469 [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3547]: https://gitlab.freedesktop.org/drm/intel/issues/3547 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743 [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989 [i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036 [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079 [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212 [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433 [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812 [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833 [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852 [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859 [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860 [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880 [i915#5030]: https://gitlab.freedesktop.org/drm/intel/issues/5030 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461 [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563 [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566 [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117 [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247 [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 [i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252 [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258 [i915#6259]: https://gitlab.freedesktop.org/drm/intel/issues/6259 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334 [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335 [i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355 [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433 [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621 [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944 [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7128]: https://gitlab.freedesktop.org/drm/intel/issues/7128 [i915#7294]: https://gitlab.freedesktop.org/drm/intel/issues/7294 [i915#7330]: https://gitlab.freedesktop.org/drm/intel/issues/7330 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 [i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582 [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651 [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697 [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701 [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707 [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711 [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949 [i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957 [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975 [i915#7984]: https://gitlab.freedesktop.org/drm/intel/issues/7984 [i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152 [i915#8155]: https://gitlab.freedesktop.org/drm/intel/issues/8155 Build changes ------------- * Linux: CI_DRM_12834 -> Patchwork_114942v1 CI-20190529: 20190529 CI_DRM_12834: 7e4814c66fdc64c3d7fee735853d909ffe6028cd @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7188: b35bfa32fe672d67ced8555557e3e707ace211ad @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_114942v1: 7e4814c66fdc64c3d7fee735853d909ffe6028cd @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114942v1/index.html [-- Attachment #2: Type: text/html, Size: 37148 bytes --] ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs @ 2023-03-09 3:46 Ashutosh Dixit 2023-03-09 3:46 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit 0 siblings, 1 reply; 12+ messages in thread From: Ashutosh Dixit @ 2023-03-09 3:46 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi, dri-devel Expose intel_rps_read_actual_frequency_fw to read the actual freq without taking forcewake for use by PMU. The code is refactored to use a common set of functions across sysfs and PMU. Using common functions with sysfs in PMU solves the issues of missing support for MTL and missing support for older generations (prior to Gen6). It also future proofs the PMU where sometimes code has been updated for sysfs and PMU has been missed. Ashutosh Dixit (2): drm/i915/pmu: Use functions common with sysfs to read actual freq drm/i915/pmu: Remove fallback to requested freq for SLPC drivers/gpu/drm/i915/gt/intel_rps.c | 46 +++++++++++++++++++---------- drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- drivers/gpu/drm/i915/i915_pmu.c | 17 +++++++---- 3 files changed, 43 insertions(+), 22 deletions(-) -- 2.38.0 ^ permalink raw reply [flat|nested] 12+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq 2023-03-09 3:46 [Intel-gfx] [PATCH 0/2] " Ashutosh Dixit @ 2023-03-09 3:46 ` Ashutosh Dixit 2023-03-09 9:20 ` Tvrtko Ursulin 0 siblings, 1 reply; 12+ messages in thread From: Ashutosh Dixit @ 2023-03-09 3:46 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi, dri-devel Expose intel_rps_read_actual_frequency_fw to read the actual freq without taking forcewake for use by PMU. The code is refactored to use a common set of functions across sysfs and PMU. Using common functions with sysfs in PMU solves the issues of missing support for MTL and missing support for older generations (prior to Gen6). It also future proofs the PMU where sometimes code has been updated for sysfs and PMU has been missed. Fixes: 22009b6dad66 ("drm/i915/mtl: Modify CAGF functions for MTL") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8280 Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> --- drivers/gpu/drm/i915/gt/intel_rps.c | 46 +++++++++++++++++++---------- drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- drivers/gpu/drm/i915/i915_pmu.c | 10 +++---- 3 files changed, 36 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 4d0dc9de23f9..3957c5ee5cba 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -2046,16 +2046,6 @@ void intel_rps_sanitize(struct intel_rps *rps) rps_disable_interrupts(rps); } -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps) -{ - struct drm_i915_private *i915 = rps_to_i915(rps); - i915_reg_t rpstat; - - rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1; - - return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat); -} - u32 intel_rps_read_rpstat(struct intel_rps *rps) { struct drm_i915_private *i915 = rps_to_i915(rps); @@ -2089,10 +2079,11 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat) return cagf; } -static u32 read_cagf(struct intel_rps *rps) +static u32 __read_cagf(struct intel_rps *rps, bool take_fw) { struct drm_i915_private *i915 = rps_to_i915(rps); struct intel_uncore *uncore = rps_to_uncore(rps); + i915_reg_t r = INVALID_MMIO_REG; u32 freq; /* @@ -2100,22 +2091,30 @@ static u32 read_cagf(struct intel_rps *rps) * registers will return 0 freq when GT is in RC6 */ if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { - freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1); + r = MTL_MIRROR_TARGET_WP1; } else if (GRAPHICS_VER(i915) >= 12) { - freq = intel_uncore_read(uncore, GEN12_RPSTAT1); + r = GEN12_RPSTAT1; } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { vlv_punit_get(i915); freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); vlv_punit_put(i915); + goto exit; } else if (GRAPHICS_VER(i915) >= 6) { - freq = intel_uncore_read(uncore, GEN6_RPSTAT1); + r = GEN6_RPSTAT1; } else { - freq = intel_uncore_read(uncore, MEMSTAT_ILK); + r = MEMSTAT_ILK; } + freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r); +exit: return intel_rps_get_cagf(rps, freq); } +static u32 read_cagf(struct intel_rps *rps) +{ + return __read_cagf(rps, true); +} + u32 intel_rps_read_actual_frequency(struct intel_rps *rps) { struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; @@ -2128,6 +2127,23 @@ u32 intel_rps_read_actual_frequency(struct intel_rps *rps) return freq; } +static u32 read_cagf_fw(struct intel_rps *rps) +{ + return __read_cagf(rps, false); +} + +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps) +{ + struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; + intel_wakeref_t wakeref; + u32 freq = 0; + + with_intel_runtime_pm_if_in_use(rpm, wakeref) + freq = intel_gpu_freq(rps, read_cagf_fw(rps)); + + return freq; +} + u32 intel_rps_read_punit_req(struct intel_rps *rps) { struct intel_uncore *uncore = rps_to_uncore(rps); diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h index c622962c6bef..2d5b3ef58606 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.h +++ b/drivers/gpu/drm/i915/gt/intel_rps.h @@ -39,6 +39,7 @@ int intel_gpu_freq(struct intel_rps *rps, int val); int intel_freq_opcode(struct intel_rps *rps, int val); u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1); u32 intel_rps_read_actual_frequency(struct intel_rps *rps); +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps); u32 intel_rps_get_requested_frequency(struct intel_rps *rps); u32 intel_rps_get_min_frequency(struct intel_rps *rps); u32 intel_rps_get_min_raw_freq(struct intel_rps *rps); @@ -52,7 +53,6 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); u32 intel_rps_read_punit_req(struct intel_rps *rps); u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); u32 intel_rps_read_rpstat(struct intel_rps *rps); -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps); void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); void intel_rps_raise_unslice(struct intel_rps *rps); void intel_rps_lower_unslice(struct intel_rps *rps); diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index a76c5ce9513d..7ece883a7d95 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -392,14 +392,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) * case we assume the system is running at the intended * frequency. Fortunately, the read should rarely fail! */ - val = intel_rps_read_rpstat_fw(rps); - if (val) - val = intel_rps_get_cagf(rps, val); - else - val = rps->cur_freq; + val = intel_rps_read_actual_frequency_fw(rps); + if (!val) + val = intel_gpu_freq(rps, rps->cur_freq); add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], - intel_gpu_freq(rps, val), period_ns / 1000); + val, period_ns / 1000); } if (pmu->enable & config_mask(I915_PMU_REQUESTED_FREQUENCY)) { -- 2.38.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq 2023-03-09 3:46 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit @ 2023-03-09 9:20 ` Tvrtko Ursulin 2023-03-10 1:03 ` Dixit, Ashutosh 0 siblings, 1 reply; 12+ messages in thread From: Tvrtko Ursulin @ 2023-03-09 9:20 UTC (permalink / raw) To: Ashutosh Dixit, intel-gfx; +Cc: dri-devel, Rodrigo Vivi On 09/03/2023 03:46, Ashutosh Dixit wrote: > Expose intel_rps_read_actual_frequency_fw to read the actual freq without > taking forcewake for use by PMU. The code is refactored to use a common set > of functions across sysfs and PMU. Using common functions with sysfs in PMU > solves the issues of missing support for MTL and missing support for older > generations (prior to Gen6). It also future proofs the PMU where sometimes > code has been updated for sysfs and PMU has been missed. > > Fixes: 22009b6dad66 ("drm/i915/mtl: Modify CAGF functions for MTL") So not DG1 and above? > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8280 > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_rps.c | 46 +++++++++++++++++++---------- > drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- > drivers/gpu/drm/i915/i915_pmu.c | 10 +++---- > 3 files changed, 36 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c > index 4d0dc9de23f9..3957c5ee5cba 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.c > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c > @@ -2046,16 +2046,6 @@ void intel_rps_sanitize(struct intel_rps *rps) > rps_disable_interrupts(rps); > } > > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps) > -{ > - struct drm_i915_private *i915 = rps_to_i915(rps); > - i915_reg_t rpstat; > - > - rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1; > - > - return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat); > -} > - > u32 intel_rps_read_rpstat(struct intel_rps *rps) > { > struct drm_i915_private *i915 = rps_to_i915(rps); > @@ -2089,10 +2079,11 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat) > return cagf; > } > > -static u32 read_cagf(struct intel_rps *rps) > +static u32 __read_cagf(struct intel_rps *rps, bool take_fw) > { > struct drm_i915_private *i915 = rps_to_i915(rps); > struct intel_uncore *uncore = rps_to_uncore(rps); > + i915_reg_t r = INVALID_MMIO_REG; > u32 freq; > > /* > @@ -2100,22 +2091,30 @@ static u32 read_cagf(struct intel_rps *rps) > * registers will return 0 freq when GT is in RC6 > */ > if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { > - freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1); > + r = MTL_MIRROR_TARGET_WP1; > } else if (GRAPHICS_VER(i915) >= 12) { > - freq = intel_uncore_read(uncore, GEN12_RPSTAT1); > + r = GEN12_RPSTAT1; > } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { > vlv_punit_get(i915); > freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); > vlv_punit_put(i915); > + goto exit; > } else if (GRAPHICS_VER(i915) >= 6) { > - freq = intel_uncore_read(uncore, GEN6_RPSTAT1); > + r = GEN6_RPSTAT1; > } else { > - freq = intel_uncore_read(uncore, MEMSTAT_ILK); > + r = MEMSTAT_ILK; > } > > + freq = take_fw ? intel_uncore_read(uncore, r) : intel_uncore_read_fw(uncore, r); > +exit: > return intel_rps_get_cagf(rps, freq); > } > > +static u32 read_cagf(struct intel_rps *rps) > +{ > + return __read_cagf(rps, true); > +} > + > u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > { > struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; > @@ -2128,6 +2127,23 @@ u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > return freq; > } > > +static u32 read_cagf_fw(struct intel_rps *rps) > +{ > + return __read_cagf(rps, false); > +} > + > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps) > +{ > + struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; > + intel_wakeref_t wakeref; > + u32 freq = 0; > + > + with_intel_runtime_pm_if_in_use(rpm, wakeref) When called from i915_pmu.c::frequency sample() above seems redundant since there we already are under intel_gt_pm_get_if_awake. Perhaps it is not a huge deal but it is nevertheless wasteful. Also, maybe I am a bit rusty, but more fundamentally, wouldn't this be adding a _very_ atypical pattern of a _fw function which grabs rpm? I'd expect they all assume it's already held since the forcewake is already held. Am I missing the reason why it is needed? Regards, Tvrtko > + freq = intel_gpu_freq(rps, read_cagf_fw(rps)); > + > + return freq; > +} > + > u32 intel_rps_read_punit_req(struct intel_rps *rps) > { > struct intel_uncore *uncore = rps_to_uncore(rps); > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h > index c622962c6bef..2d5b3ef58606 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.h > +++ b/drivers/gpu/drm/i915/gt/intel_rps.h > @@ -39,6 +39,7 @@ int intel_gpu_freq(struct intel_rps *rps, int val); > int intel_freq_opcode(struct intel_rps *rps, int val); > u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1); > u32 intel_rps_read_actual_frequency(struct intel_rps *rps); > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps); > u32 intel_rps_get_requested_frequency(struct intel_rps *rps); > u32 intel_rps_get_min_frequency(struct intel_rps *rps); > u32 intel_rps_get_min_raw_freq(struct intel_rps *rps); > @@ -52,7 +53,6 @@ u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); > u32 intel_rps_read_punit_req(struct intel_rps *rps); > u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); > u32 intel_rps_read_rpstat(struct intel_rps *rps); > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps); > void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); > void intel_rps_raise_unslice(struct intel_rps *rps); > void intel_rps_lower_unslice(struct intel_rps *rps); > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c > index a76c5ce9513d..7ece883a7d95 100644 > --- a/drivers/gpu/drm/i915/i915_pmu.c > +++ b/drivers/gpu/drm/i915/i915_pmu.c > @@ -392,14 +392,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns) > * case we assume the system is running at the intended > * frequency. Fortunately, the read should rarely fail! > */ > - val = intel_rps_read_rpstat_fw(rps); > - if (val) > - val = intel_rps_get_cagf(rps, val); > - else > - val = rps->cur_freq; > + val = intel_rps_read_actual_frequency_fw(rps); > + if (!val) > + val = intel_gpu_freq(rps, rps->cur_freq); > > add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT], > - intel_gpu_freq(rps, val), period_ns / 1000); > + val, period_ns / 1000); > } > > if (pmu->enable & config_mask(I915_PMU_REQUESTED_FREQUENCY)) { ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq 2023-03-09 9:20 ` Tvrtko Ursulin @ 2023-03-10 1:03 ` Dixit, Ashutosh 0 siblings, 0 replies; 12+ messages in thread From: Dixit, Ashutosh @ 2023-03-10 1:03 UTC (permalink / raw) To: Tvrtko Ursulin; +Cc: intel-gfx, dri-devel, Rodrigo Vivi On Thu, 09 Mar 2023 01:20:09 -0800, Tvrtko Ursulin wrote: > Hi Tvrtko, > On 09/03/2023 03:46, Ashutosh Dixit wrote: > > Expose intel_rps_read_actual_frequency_fw to read the actual freq without > > taking forcewake for use by PMU. The code is refactored to use a common set > > of functions across sysfs and PMU. Using common functions with sysfs in PMU > > solves the issues of missing support for MTL and missing support for older > > generations (prior to Gen6). It also future proofs the PMU where sometimes > > code has been updated for sysfs and PMU has been missed. > > > > Fixes: 22009b6dad66 ("drm/i915/mtl: Modify CAGF functions for MTL") > > So not DG1 and above? The issue for DG1+ happens if non-freq bits are non-zero but freq bits are zero. But we've already seen that during PMU freq sampling gt is unparked so freq bits being 0 is rare. Therefore IMO there is 0 practical impact of that bug, I don't think it's worth fixing it and Cc'ing stable etc. (also those platforms are under force probe). > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8280 > > Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> > > --- > > drivers/gpu/drm/i915/gt/intel_rps.c | 46 +++++++++++++++++++---------- > > drivers/gpu/drm/i915/gt/intel_rps.h | 2 +- > > drivers/gpu/drm/i915/i915_pmu.c | 10 +++---- > > 3 files changed, 36 insertions(+), 22 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c > > index 4d0dc9de23f9..3957c5ee5cba 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_rps.c > > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c > > @@ -2046,16 +2046,6 @@ void intel_rps_sanitize(struct intel_rps *rps) > > rps_disable_interrupts(rps); > > } > > -u32 intel_rps_read_rpstat_fw(struct intel_rps *rps) > > -{ > > - struct drm_i915_private *i915 = rps_to_i915(rps); > > - i915_reg_t rpstat; > > - > > - rpstat = (GRAPHICS_VER(i915) >= 12) ? GEN12_RPSTAT1 : GEN6_RPSTAT1; > > - > > - return intel_uncore_read_fw(rps_to_gt(rps)->uncore, rpstat); > > -} > > - > > u32 intel_rps_read_rpstat(struct intel_rps *rps) > > { > > struct drm_i915_private *i915 = rps_to_i915(rps); > > @@ -2089,10 +2079,11 @@ u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat) > > return cagf; > > } > > -static u32 read_cagf(struct intel_rps *rps) > > +static u32 __read_cagf(struct intel_rps *rps, bool take_fw) > > { > > struct drm_i915_private *i915 = rps_to_i915(rps); > > struct intel_uncore *uncore = rps_to_uncore(rps); > > + i915_reg_t r = INVALID_MMIO_REG; > > u32 freq; > > /* > > @@ -2100,22 +2091,30 @@ static u32 read_cagf(struct intel_rps *rps) > > * registers will return 0 freq when GT is in RC6 > > */ > > if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { > > - freq = intel_uncore_read(uncore, MTL_MIRROR_TARGET_WP1); > > + r = MTL_MIRROR_TARGET_WP1; > > } else if (GRAPHICS_VER(i915) >= 12) { > > - freq = intel_uncore_read(uncore, GEN12_RPSTAT1); > > + r = GEN12_RPSTAT1; > > } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { > > vlv_punit_get(i915); > > freq = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS); > > vlv_punit_put(i915); > > + goto exit; > > } else if (GRAPHICS_VER(i915) >= 6) { > > - freq = intel_uncore_read(uncore, GEN6_RPSTAT1); > > + r = GEN6_RPSTAT1; > > } else { > > - freq = intel_uncore_read(uncore, MEMSTAT_ILK); > > + r = MEMSTAT_ILK; > > } > > + freq = take_fw ? intel_uncore_read(uncore, r) : > > intel_uncore_read_fw(uncore, r); > > +exit: > > return intel_rps_get_cagf(rps, freq); > > } > > +static u32 read_cagf(struct intel_rps *rps) > > +{ > > + return __read_cagf(rps, true); > > +} > > + > > u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > > { > > struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; > > @@ -2128,6 +2127,23 @@ u32 intel_rps_read_actual_frequency(struct intel_rps *rps) > > return freq; > > } > > +static u32 read_cagf_fw(struct intel_rps *rps) > > +{ > > + return __read_cagf(rps, false); > > +} > > + > > +u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps) > > +{ > > + struct intel_runtime_pm *rpm = rps_to_uncore(rps)->rpm; > > + intel_wakeref_t wakeref; > > + u32 freq = 0; > > + > > + with_intel_runtime_pm_if_in_use(rpm, wakeref) > > When called from i915_pmu.c::frequency sample() above seems redundant since > there we already are under intel_gt_pm_get_if_awake. Perhaps it is not a > huge deal but it is nevertheless wasteful. > > Also, maybe I am a bit rusty, but more fundamentally, wouldn't this be > adding a _very_ atypical pattern of a _fw function which grabs rpm? I'd > expect they all assume it's already held since the forcewake is already > held. > > Am I missing the reason why it is needed? Thanks for catching this, you are right, it was just mindless copy paste, I've dropped it in the next version. Thanks. -- Ashutosh ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2023-03-16 0:53 UTC | newest] Thread overview: 12+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-03-10 0:59 [Intel-gfx] [PATCH 0/2] drm/i915/pmu: Use common freq functions with sysfs Ashutosh Dixit 2023-03-10 0:59 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit 2023-03-15 9:43 ` Tvrtko Ursulin 2023-03-16 0:53 ` Dixit, Ashutosh 2023-03-10 0:59 ` [Intel-gfx] [PATCH 2/2] drm/i915/pmu: Remove fallback to requested freq for SLPC Ashutosh Dixit 2023-03-15 9:50 ` Tvrtko Ursulin 2023-03-15 23:54 ` Dixit, Ashutosh 2023-03-10 2:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Use common freq functions with sysfs Patchwork 2023-03-12 9:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2023-03-09 3:46 [Intel-gfx] [PATCH 0/2] " Ashutosh Dixit 2023-03-09 3:46 ` [Intel-gfx] [PATCH 1/2] drm/i915/pmu: Use functions common with sysfs to read actual freq Ashutosh Dixit 2023-03-09 9:20 ` Tvrtko Ursulin 2023-03-10 1:03 ` Dixit, Ashutosh
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