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From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 26/40] HACK: drm/i915/tgl: Gen12 render context size
Date: Thu, 22 Aug 2019 16:42:58 +0300	[thread overview]
Message-ID: <87r25d2u59.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <156629741255.1374.17835443088274919959@skylake-alporthouse-com>

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Quoting Lucas De Marchi (2019-08-17 10:38:48)
>> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> 
>> Re-use Gen11 context size for now.
>> 
>> [ Lucas: add HACK since this is a temporary patch that needs to be
>>   confirmed: we need to check BSpec 46255 and recompute ]
>
> We can drop the HACK and just refer to this as a temporary patch. We
> have selftests and runtime verification to catch if we under allocate,
> so if our testing is clean, it's good enough for the time being.

I think I had a script somewhere which can calculate the
context size from bspec (Cut paste). No promises tho.

Howabout making a selftest to figure out the context state size?

-Mika

>
>> 
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
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  reply	other threads:[~2019-08-22 14:36 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-17  9:38 [PATCH v2 00/40] Tiger Lake batch 3 Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 01/40] drm/i915/tgl: disable DDIC Lucas De Marchi
2019-08-19 17:16   ` Matt Roper
2019-08-17  9:38 ` [PATCH v2 02/40] drm/i915/tgl: add support for reading the timestamp frequency Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 03/40] drm/i915/tgl: Move transcoders to pipes' powerwells Lucas De Marchi
2019-08-19 11:59   ` Imre Deak
2019-08-17  9:38 ` [PATCH v2 04/40] drm/i915/tgl: update DMC firmware to 2.04 Lucas De Marchi
2019-08-19 17:55   ` Srivatsa, Anusha
2019-08-19 18:03     ` Lucas De Marchi
2019-08-19 18:07       ` Srivatsa, Anusha
2019-08-17  9:38 ` [PATCH v2 05/40] drm/i915/psr: Make PSR registers relative to transcoders Lucas De Marchi
2019-08-20 20:16   ` Lucas De Marchi
2019-08-20 21:15     ` Souza, Jose
2019-08-17  9:38 ` [PATCH v2 06/40] drm/i915: Add transcoder restriction to PSR2 Lucas De Marchi
2019-08-20 20:19   ` Lucas De Marchi
2019-08-21 14:50   ` Ville Syrjälä
2019-08-17  9:38 ` [PATCH v2 07/40] drm/i915: Do not unmask PSR interruption in IRQ postinstall Lucas De Marchi
2019-08-20 20:29   ` Lucas De Marchi
2019-08-20 22:20     ` Souza, Jose
2019-08-17  9:38 ` [PATCH v2 08/40] drm/i915/psr: Only handle interruptions of the transcoder in use Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 09/40] drm/i915/bdw+: Enable PSR in any eDP port Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 10/40] drm/i915: Guard and warn if more than one eDP panel is present Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 11/40] drm/i915: Do not read PSR2 register in transcoders without PSR2 Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 12/40] drm/i915/tgl: PSR link standby is not supported anymore Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 13/40] drm/i915/tgl: Access the right register when handling PSR interruptions Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 14/40] drm/i915/tgl: Add maximum resolution supported by PSR2 HW Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 15/40] drm/i915: Fix DP-MST crtc_mask Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 16/40] drm/i915: Add for_each_new_intel_connector_in_state() Lucas De Marchi
2019-08-21 13:13   ` Kahola, Mika
2019-08-17  9:38 ` [PATCH v2 17/40] drm: Add for_each_oldnew_intel_crtc_in_state_reverse() Lucas De Marchi
2019-08-21 11:22   ` Kahola, Mika
2019-08-21 13:32     ` Kahola, Mika
2019-08-17  9:38 ` [PATCH v2 18/40] drm/i915: Disable pipes in reverse order Lucas De Marchi
2019-08-21 11:29   ` Kahola, Mika
2019-08-17  9:38 ` [PATCH v2 19/40] drm/i915/tgl: Select master transcoder in DP MST Lucas De Marchi
2019-08-22 12:43   ` Jani Nikula
2019-08-22 16:44   ` Maarten Lankhorst
2019-08-17  9:38 ` [PATCH v2 20/40] drm/i915/tgl: Introduce initial Tiger Lake workarounds Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 21/40] drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating Lucas De Marchi
2019-08-20 20:54   ` Lucas De Marchi
2019-08-21  9:16     ` Ye, Tony
2019-08-17  9:38 ` [PATCH v2 22/40] drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards Lucas De Marchi
2019-08-20 23:29   ` Summers, Stuart
2019-08-22  0:25     ` Summers, Stuart
2019-08-17  9:38 ` [PATCH v2 23/40] drm/i915/tgl: Register state context definition for Gen12 Lucas De Marchi
2019-08-21 21:12   ` Daniele Ceraolo Spurio
2019-08-22 13:31   ` Mika Kuoppala
2019-08-22 14:51     ` Chris Wilson
2019-08-17  9:38 ` [PATCH v2 24/40] drm/i915/tgl: move DP_TP_* to transcoder Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 25/40] drm/i915/tgl: Implement TGL DisplayPort training sequence Lucas De Marchi
2019-08-20 22:01   ` [PATCH v2] " José Roberto de Souza
2019-08-20 23:07     ` Manasi Navare
2019-08-21 20:22       ` Souza, Jose
     [not found]   ` <20190821213233.1067-1-jose.souza@intel.com>
2019-08-22 11:00     ` [PATCH v3] " Maarten Lankhorst
2019-08-17  9:38 ` [PATCH v2 26/40] HACK: drm/i915/tgl: Gen12 render context size Lucas De Marchi
2019-08-20 10:36   ` Chris Wilson
2019-08-22 13:42     ` Mika Kuoppala [this message]
2019-08-22 13:48       ` Chris Wilson
2019-08-17  9:38 ` [PATCH v2 27/40] drm/i915/tgl: add Gen12 default indirect ctx offset Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 28/40] drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID Lucas De Marchi
2019-08-21 14:43   ` Lisovskiy, Stanislav
2019-08-17  9:38 ` [PATCH v2 29/40] drm/i915/tgl: Gen12 csb support Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 30/40] drm/i915/tgl: Report valid VDBoxes with SFC capability Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 31/40] rm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap Lucas De Marchi
2019-08-20 20:43   ` Lucas De Marchi
2019-08-22 13:28   ` Mika Kuoppala
2019-08-23  0:44     ` Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 32/40] drm/i915/tgl: Updated Private PAT programming Lucas De Marchi
2019-08-20 10:33   ` Chris Wilson
2019-08-17  9:38 ` [PATCH v2 33/40] drm/i915/tgl/perf: use the same oa ctx_id format as icl Lucas De Marchi
2019-08-21 12:36   ` Lionel Landwerlin
2019-08-17  9:38 ` [PATCH v2 34/40] drm/i915/perf: add a parameter to control the size of OA buffer Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 35/40] drm/i915/tgl: Add perf support on TGL Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 36/40] drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS support Lucas De Marchi
2019-08-17  9:38 ` [PATCH v2 37/40] drm/framebuffer/tgl: Format modifier for Intel Gen-12 render compression Lucas De Marchi
2019-08-21 14:34   ` Lisovskiy, Stanislav
2019-08-17  9:39 ` [PATCH v2 38/40] drm/i915/tgl: Gen-12 render decompression Lucas De Marchi
2019-08-17  9:39 ` [PATCH v2 39/40] drm/framebuffer/tgl: Format modifier for Intel Gen-12 media compression Lucas De Marchi
2019-08-21 14:40   ` Lisovskiy, Stanislav
2019-08-17  9:39 ` [PATCH v2 40/40] drm/i915/tgl: " Lucas De Marchi
2019-08-21 14:36   ` Lisovskiy, Stanislav
2019-08-17  9:49 ` ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake batch 3 (rev2) Patchwork
2019-08-17 10:03 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-08-17 10:12 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-08-20 10:28 ` ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake batch 3 (rev3) Patchwork
2019-08-20 10:42 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-08-20 12:15 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-08-20 12:36 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-20 17:59 ` ✓ Fi.CI.IGT: " Patchwork
2019-08-20 22:30 ` ✗ Fi.CI.BAT: failure for Tiger Lake batch 3 (rev4) Patchwork

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