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From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/6] drm/i915/pmu: Add reference counting to the sampling timer
Date: Fri, 12 May 2023 16:44:29 -0700	[thread overview]
Message-ID: <ZF7PXazccbkufp1X@orsosgc001.jf.intel.com> (raw)
In-Reply-To: <87h6shdtn0.wl-ashutosh.dixit@intel.com>

On Fri, May 12, 2023 at 04:20:19PM -0700, Dixit, Ashutosh wrote:
>On Fri, 12 May 2023 15:44:00 -0700, Umesh Nerlige Ramappa wrote:
>>
>> On Fri, May 12, 2023 at 03:29:03PM -0700, Dixit, Ashutosh wrote:
>> > On Fri, 05 May 2023 17:58:14 -0700, Umesh Nerlige Ramappa wrote:
>> >>
>> >
>> > Hi Umesh/Tvrtko,
>> >
>> >> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> >>
>> >> We do not want to have timers per tile and waste CPU cycles and energy via
>> >> multiple wake-up sources, for a relatively un-important task of PMU
>> >> sampling, so keeping a single timer works well. But we also do not want
>> >> the first GT which goes idle to turn off the timer.
>> >>
>> >> Add some reference counting, via a mask of unparked GTs, to solve this.
>> >>
>> >> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> >> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> >> ---
>> >>  drivers/gpu/drm/i915/i915_pmu.c | 12 ++++++++++--
>> >>  drivers/gpu/drm/i915/i915_pmu.h |  4 ++++
>> >>  2 files changed, 14 insertions(+), 2 deletions(-)
>> >>
>> >> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
>> >> index 2b63ee31e1b3..669a42e44082 100644
>> >> --- a/drivers/gpu/drm/i915/i915_pmu.c
>> >> +++ b/drivers/gpu/drm/i915/i915_pmu.c
>> >> @@ -251,7 +251,9 @@ void i915_pmu_gt_parked(struct intel_gt *gt)
>> >>	 * Signal sampling timer to stop if only engine events are enabled and
>> >>	 * GPU went idle.
>> >>	 */
>> >> -	pmu->timer_enabled = pmu_needs_timer(pmu, false);
>> >> +	pmu->unparked &= ~BIT(gt->info.id);
>> >> +	if (pmu->unparked == 0)
>> >> +		pmu->timer_enabled = pmu_needs_timer(pmu, false);
>> >>
>> >>	spin_unlock_irq(&pmu->lock);
>> >>  }
>> >> @@ -268,7 +270,10 @@ void i915_pmu_gt_unparked(struct intel_gt *gt)
>> >>	/*
>> >>	 * Re-enable sampling timer when GPU goes active.
>> >>	 */
>> >> -	__i915_pmu_maybe_start_timer(pmu);
>> >> +	if (pmu->unparked == 0)
>> >> +		__i915_pmu_maybe_start_timer(pmu);
>> >> +
>> >> +	pmu->unparked |= BIT(gt->info.id);
>> >>
>> >>	spin_unlock_irq(&pmu->lock);
>> >>  }
>> >> @@ -438,6 +443,9 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
>> >>	 */
>> >>
>> >>	for_each_gt(gt, i915, i) {
>> >> +		if (!(pmu->unparked & BIT(i)))
>> >> +			continue;
>> >> +
>> >
>> > This is not correct. In this series we are at least sampling frequencies
>> > (calling frequency_sample) even when GT is parked. So these 3 lines should be
>> > deleted. engines_sample will get called and will return without doing
>> > anything if engine events are disabled.
>>
>> Not sure I understand. This is checking pmu->'un'parked bits.
>
>Sorry, my bad. Not "engines_sample will get called and will return without
>doing anything if engine events are disabled" but "engines_sample will get
>called and will return without doing anything if GT is not awake". This is
>the same as the previous behavior before this series.
>
>Umesh and I discussed this but writing this out in case Tvrtko takes a
>look.

Sounds good, Dropping the check here in the new revision.

Thanks,
Umesh
>
>Thanks.
>--
>Ashutosh
>
>
>
>> >
>> >
>> >>		engines_sample(gt, period_ns);
>> >>
>> >>		if (i == 0) /* FIXME */
>> >> diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
>> >> index a686fd7ccedf..3a811266ac6a 100644
>> >> --- a/drivers/gpu/drm/i915/i915_pmu.h
>> >> +++ b/drivers/gpu/drm/i915/i915_pmu.h
>> >> @@ -76,6 +76,10 @@ struct i915_pmu {
>> >>	 * @lock: Lock protecting enable mask and ref count handling.
>> >>	 */
>> >>	spinlock_t lock;
>> >> +	/**
>> >> +	 * @unparked: GT unparked mask.
>> >> +	 */
>> >> +	unsigned int unparked;
>> >>	/**
>> >>	 * @timer: Timer for internal i915 PMU sampling.
>> >>	 */
>> >> --
>> >> 2.36.1
>> >>

  reply	other threads:[~2023-05-12 23:44 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-06  0:58 [Intel-gfx] [PATCH 0/6] Add MTL PMU support for multi-gt Umesh Nerlige Ramappa
2023-05-06  0:58 ` [Intel-gfx] [PATCH 1/6] drm/i915/pmu: Support PMU for all engines Umesh Nerlige Ramappa
2023-05-08 17:52   ` Umesh Nerlige Ramappa
2023-05-09 12:26     ` Tvrtko Ursulin
2023-05-06  0:58 ` [Intel-gfx] [PATCH 2/6] drm/i915/pmu: Skip sampling engines with no enabled counters Umesh Nerlige Ramappa
2023-05-08 17:53   ` Umesh Nerlige Ramappa
2023-05-06  0:58 ` [Intel-gfx] [PATCH 3/6] drm/i915/pmu: Transform PMU parking code to be GT based Umesh Nerlige Ramappa
2023-05-08 17:55   ` Umesh Nerlige Ramappa
2023-05-09 15:10     ` Umesh Nerlige Ramappa
2023-05-06  0:58 ` [Intel-gfx] [PATCH 4/6] drm/i915/pmu: Add reference counting to the sampling timer Umesh Nerlige Ramappa
2023-05-08 17:58   ` Umesh Nerlige Ramappa
2023-05-09 17:25   ` Dixit, Ashutosh
2023-05-10  6:02     ` Dixit, Ashutosh
2023-05-12 22:29   ` Dixit, Ashutosh
2023-05-12 22:44     ` Umesh Nerlige Ramappa
2023-05-12 23:20       ` Dixit, Ashutosh
2023-05-12 23:44         ` Umesh Nerlige Ramappa [this message]
2023-05-15  9:52           ` Tvrtko Ursulin
2023-05-15 21:24             ` Dixit, Ashutosh
2023-05-16  7:12               ` Tvrtko Ursulin
2023-05-16 16:29                 ` Dixit, Ashutosh
2023-05-06  0:58 ` [Intel-gfx] [PATCH 5/6] drm/i915/pmu: Prepare for multi-tile non-engine counters Umesh Nerlige Ramappa
2023-05-08 18:07   ` Umesh Nerlige Ramappa
2023-05-12  1:08   ` Dixit, Ashutosh
2023-05-12 10:56     ` Tvrtko Ursulin
2023-05-12 20:57       ` Umesh Nerlige Ramappa
2023-05-12 22:37         ` Umesh Nerlige Ramappa
2023-05-13  1:09         ` Dixit, Ashutosh
2023-05-15 10:10         ` Tvrtko Ursulin
2023-05-15 22:07           ` Dixit, Ashutosh
2023-05-16  8:35             ` Tvrtko Ursulin
2023-05-06  0:58 ` [Intel-gfx] [PATCH 6/6] drm/i915/pmu: Export counters from all tiles Umesh Nerlige Ramappa
2023-05-08 18:08   ` Umesh Nerlige Ramappa
2023-05-09 12:38   ` Tvrtko Ursulin
2023-05-11 18:57   ` Dixit, Ashutosh
2023-05-12 10:57     ` Tvrtko Ursulin
2023-05-12 17:08       ` Dixit, Ashutosh
2023-05-12 18:53         ` Umesh Nerlige Ramappa
2023-05-12 20:10           ` Dixit, Ashutosh
2023-05-06  2:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add MTL PMU support for multi-gt (rev2) Patchwork
2023-05-06  2:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-06  2:38 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-05-13  1:55 [Intel-gfx] [PATCH 0/6] Add MTL PMU support for multi-gt Umesh Nerlige Ramappa
2023-05-13  1:55 ` [Intel-gfx] [PATCH 4/6] drm/i915/pmu: Add reference counting to the sampling timer Umesh Nerlige Ramappa
2023-05-13  3:01   ` Dixit, Ashutosh
2023-05-15  6:44 [Intel-gfx] [PATCH v4 0/6] Add MTL PMU support for multi-gt Umesh Nerlige Ramappa
2023-05-15  6:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/pmu: Add reference counting to the sampling timer Umesh Nerlige Ramappa

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