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From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v3 18/25] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms
Date: Wed, 20 Sep 2023 16:56:58 +0300	[thread overview]
Message-ID: <ZQr6KrgdXRgMxByi@intel.com> (raw)
In-Reply-To: <ZQrnrTF6OwUuDeuS@ideak-desk.fi.intel.com>

On Wed, Sep 20, 2023 at 03:38:05PM +0300, Imre Deak wrote:
> On Wed, Sep 20, 2023 at 02:25:14PM +0300, Lisovskiy, Stanislav wrote:
> > On Wed, Sep 20, 2023 at 01:59:53PM +0300, Ville Syrjälä wrote:
> > > On Wed, Sep 20, 2023 at 12:11:58PM +0300, Lisovskiy, Stanislav wrote:
> > > > On Thu, Sep 14, 2023 at 10:26:52PM +0300, Imre Deak wrote:
> > > > > If an MST stream is modeset, its state must be checked along all the
> > > > > other streams on the same MST link, for instance to resolve a BW
> > > > > overallocation of a non-sink MST port or to make sure that the FEC is
> > > > > enabled/disabled the same way for all these streams.
> > > > > 
> > > > > To prepare for that this patch adds all the stream CRTCs to the atomic
> > > > > state and marks them for modeset similarly to tgl+ platforms. (If the
> > > > > state computation doesn't change the state the CRTC is switched back to
> > > > > fastset mode.)
> > > > > 
> > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > ---
> > > > >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 ---
> > > > >  1 file changed, 3 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > > index c1fea894d3774..832e8b0e87e84 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > > > > @@ -491,9 +491,6 @@ intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
> > > > >  	struct intel_connector *connector_iter;
> > > > >  	int ret = 0;
> > > > >  
> > > > > -	if (DISPLAY_VER(dev_priv) < 12)
> > > > > -		return  0;
> > > > > -
> > > > 
> > > > I'm just a bit concerned, why this check was initially added?
> > > > Probably there was a reason?
> > > 
> > > It's in the name of the function, which should be renamed if we're
> > > extending it beyond its original purpose.
> > 
> > Well, I would say this check could be "a bit" more descriptive.
> > Still, even if function name gets changed, we just remove the check, for the
> > function which was initially not even intended to be called for pre-tgl?
> 
> The change on tgl+ platforms is that all the MST streams go through a
> master transcoder, while on old platforms each stream has only its own
> transcoder. Hence on tgl+ all streams/CRTCs may need to be modeset, at
> least in the case the CRTC owning the master transcoder (for instance
> pipe A/transcoder A) is modeset. So on tgl+ here all CRTCs for a given
> MST topology is added to the state/marked for modeset.
> 
> pre-tgl this wasn't necessary, until the need to recalculate the BW
> requirement of each stream came up, as described in the commit log.
> 
> I can clarify the above in the commit log and rename the function
> accordingly, is that ok?

Yes, thank you for good explanation. I would may be also add some note to
actual function also, but up to you really.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> 
> > Why it became suitable now then? Or was it just wrong check?
> > 
> > Stan
> > 
> > > 
> > > > 
> > > > Stan
> > > > 
> > > > >  	if (!intel_connector_needs_modeset(state, &connector->base))
> > > > >  		return 0;
> > > > >  
> > > > > -- 
> > > > > 2.37.2
> > > > > 
> > > 
> > > -- 
> > > Ville Syrjälä
> > > Intel

  reply	other threads:[~2023-09-20 13:57 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-14 19:26 [Intel-gfx] [PATCH v3 00/25] drm/i915: Improve BW management on shared display links Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 01/25] drm/i915/dp: Factor out helpers to compute the link limits Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 02/25] drm/i915/dp: Track the pipe and link bpp limits separately Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 03/25] drm/i915/dp: Skip computing a non-DSC link config if DSC is needed Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 04/25] drm/i915/dp: Update the link bpp limits for DSC mode Imre Deak
2023-09-19 14:48   ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 05/25] drm/i915/dp: Limit the output link bpp in " Imre Deak
2023-09-19 14:49   ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 06/25] drm/i915: Add helper to modeset a set of pipes Imre Deak
2023-09-15 18:34   ` Ville Syrjälä
2023-09-15 20:03     ` Imre Deak
2023-09-18 18:25   ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-19 14:25     ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 07/25] drm/i915: During modeset forcing handle inactive but enabled pipes Imre Deak
2023-09-18 18:25   ` [Intel-gfx] [PATCH v5 07/25] drm/i915: Rename intel_modeset_all_pipes() to intel_modeset_all_pipes_late() Imre Deak
2023-09-19 14:26     ` Ville Syrjälä
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 08/25] drm/i915: Factor out a helper to check/compute all the CRTC states Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 09/25] drm/i915: Add helpers for BW management on shared display links Imre Deak
2023-09-15  0:33   ` [Intel-gfx] [PATCH v4 " Imre Deak
2023-09-15 19:11     ` Ville Syrjälä
2023-09-15 21:01       ` Imre Deak
2023-09-18 18:25     ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-19 15:21       ` Ville Syrjälä
2023-09-19 17:40         ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 10/25] drm/i915/fdi: Improve FDI BW sharing between pipe B and C Imre Deak
2023-09-15 19:31   ` Ville Syrjälä
2023-09-15 23:13     ` Imre Deak
2023-09-19 15:35       ` Ville Syrjälä
2023-09-19 17:45         ` Imre Deak
2023-09-18 18:25   ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 11/25] drm/i915/fdi: Recompute state for affected CRTCs on FDI links Imre Deak
2023-09-19 15:44   ` Ville Syrjälä
2023-09-19 18:14     ` Imre Deak
2023-09-19 18:28       ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 12/25] drm/dp_mst: Fix fractional DSC bpp handling Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 13/25] drm/dp_mst: Add a way to calculate PBN values with FEC overhead Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 14/25] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 15/25] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 16/25] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 17/25] drm/i915/dp_mst: Fix PBN calculation with FEC overhead Imre Deak
2023-09-20  9:09   ` Lisovskiy, Stanislav
2023-09-20 10:58   ` Ville Syrjälä
2023-09-20 11:35     ` Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 18/25] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-09-20  9:11   ` Lisovskiy, Stanislav
2023-09-20 10:59     ` Ville Syrjälä
2023-09-20 11:25       ` Lisovskiy, Stanislav
2023-09-20 12:38         ` Imre Deak
2023-09-20 13:56           ` Lisovskiy, Stanislav [this message]
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 19/25] drm/i915/dp_mst: Program the DSC PPS SDP for each stream Imre Deak
2023-09-25  8:00   ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 20/25] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled Imre Deak
2023-09-25  7:56   ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 21/25] drm/i915/dp_mst: Enable DSC decompression if any stream needs this Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 22/25] drm/i915/dp_mst: Add missing DSC compression disabling Imre Deak
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 23/25] drm/i915/dp_mst: Allow DSC only for sink ports of the first branch device Imre Deak
2023-09-25  7:44   ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 24/25] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-09-19 10:52   ` [Intel-gfx] [PATCH v5 " Imre Deak
2023-09-25  7:42     ` Lisovskiy, Stanislav
2023-09-14 19:26 ` [Intel-gfx] [PATCH v3 25/25] drm/i915/dp_mst: Check BW limitations only after all streams are computed Imre Deak
2023-09-25  7:54   ` Lisovskiy, Stanislav
2023-09-14 23:33 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve BW management on shared display links (rev4) Patchwork
2023-09-15  4:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links (rev5) Patchwork
2023-09-15  4:07 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-15  4:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-09-15 12:39 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-19  1:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Improve BW management on shared display links (rev9) Patchwork
2023-09-19 11:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links (rev10) Patchwork
2023-09-19 11:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-19 11:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-09-19 13:29   ` Imre Deak

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