Re: [Intel-gfx] [PATCH v3 20/25] drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is disabled

["Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>]

On Thu, Sep 14, 2023 at 10:26:54PM +0300, Imre Deak wrote:
> Atm the DSC PPS SDP will stay enabled after enabling and disabling DSC.
> This leaves an output blank after switching off DSC on it. Make sure the
> SDP is disabled for an uncompressed output.
> 
> v2:
> - Disable the SDP already during output disabling. (Ville)

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 5 ++++-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++---
>  2 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 03010accc1c7f..e942eb95d688f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4027,7 +4027,10 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
>  			 VIDEO_DIP_ENABLE_SPD_HSW | VIDEO_DIP_ENABLE_DRM_GLK;
>  	u32 val = intel_de_read(dev_priv, reg) & ~dip_enable;
>  
> -	/* TODO: Add DSC case (DIP_ENABLE_PPS) */
> +	/* TODO: Sanitize DSC enabling wrt. intel_dsc_dp_pps_write(). */
> +	if (!enable && HAS_DSC(dev_priv))
> +		val &= ~VDIP_ENABLE_PPS;
> +
>  	/* When PSR is enabled, this routine doesn't disable VSC DIP */
>  	if (!crtc_state->has_psr)
>  		val &= ~VIDEO_DIP_ENABLE_VSC_HSW;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 19548242fa0f2..a38a0e6da01bf 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -662,9 +662,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
>  	 * BSpec 4287: disable DIP after the transcoder is disabled and before
>  	 * the transcoder clock select is set to none.
>  	 */
> -	if (last_mst_stream)
> -		intel_dp_set_infoframes(&dig_port->base, false,
> -					old_crtc_state, NULL);
> +	intel_dp_set_infoframes(&dig_port->base, false,
> +				old_crtc_state, NULL);
>  	/*
>  	 * From TGL spec: "If multi-stream slave transcoder: Configure
>  	 * Transcoder Clock Select to direct no clock to the transcoder"
> -- 
> 2.37.2
>