* [PATCH] drm/i915/icl: Update csc and gamma enable checks
@ 2024-10-03 9:03 Sai Teja Pottumuttu
2024-10-03 9:58 ` ✓ Fi.CI.BAT: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 16+ messages in thread
From: Sai Teja Pottumuttu @ 2024-10-03 9:03 UTC (permalink / raw)
To: intel-gfx; +Cc: matthew.d.roper, ville.syrjala, Sai Teja Pottumuttu
With ICL, we have a way to check if gamma and csc are enabled on
a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
along with the existing BOTTOM_COLOR checks.
BSpec: 7463, 7466
Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 50f41aeb3c28..1bf36898dc7e 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
crtc_state->csc_enable = true;
}
+static void icl_get_config(struct intel_crtc_state *crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ u32 bottom_color;
+
+ crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
+ crtc_state->csc_mode = ilk_read_csc_mode(crtc);
+
+ bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
+
+ if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
+ (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
+ crtc_state->gamma_enable = true;
+
+ if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
+ (crtc_state->csc_mode & ICL_CSC_ENABLE))
+ crtc_state->csc_enable = true;
+}
+
static void skl_color_commit_arm(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -3811,7 +3831,7 @@ static const struct intel_color_funcs tgl_color_funcs = {
.read_luts = icl_read_luts,
.lut_equal = icl_lut_equal,
.read_csc = icl_read_csc,
- .get_config = skl_get_config,
+ .get_config = icl_get_config,
};
static const struct intel_color_funcs icl_color_funcs = {
@@ -3823,7 +3843,7 @@ static const struct intel_color_funcs icl_color_funcs = {
.read_luts = icl_read_luts,
.lut_equal = icl_lut_equal,
.read_csc = icl_read_csc,
- .get_config = skl_get_config,
+ .get_config = icl_get_config,
};
static const struct intel_color_funcs glk_color_funcs = {
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/icl: Update csc and gamma enable checks
2024-10-03 9:03 [PATCH] drm/i915/icl: Update csc and gamma enable checks Sai Teja Pottumuttu
@ 2024-10-03 9:58 ` Patchwork
2024-10-03 10:46 ` [PATCH] " Jani Nikula
` (2 subsequent siblings)
3 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2024-10-03 9:58 UTC (permalink / raw)
To: Sai Teja Pottumuttu; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 10305 bytes --]
== Series Details ==
Series: drm/i915/icl: Update csc and gamma enable checks
URL : https://patchwork.freedesktop.org/series/139485/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_15478 -> Patchwork_139485v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/index.html
Participating hosts (43 -> 42)
------------------------------
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_139485v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap@basic:
- bat-dg2-14: NOTRUN -> [SKIP][1] ([i915#4083])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@gem_mmap@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-dg2-14: NOTRUN -> [SKIP][2] ([i915#4079]) +1 other test skip
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-dg2-14: NOTRUN -> [SKIP][3] ([i915#4077]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@gem_tiled_fence_blits@basic.html
* igt@i915_pm_rps@basic-api:
- bat-dg2-14: NOTRUN -> [SKIP][4] ([i915#11681] / [i915#6621])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live:
- bat-arls-2: [PASS][5] -> [DMESG-FAIL][6] ([i915#10262] / [i915#10341] / [i915#12133])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-arls-2/igt@i915_selftest@live.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-arls-2/igt@i915_selftest@live.html
* igt@i915_selftest@live@dmabuf:
- bat-arls-2: [PASS][7] -> [DMESG-WARN][8] ([i915#10341])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-arls-2/igt@i915_selftest@live@dmabuf.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-arls-2/igt@i915_selftest@live@dmabuf.html
* igt@i915_selftest@live@late_gt_pm:
- bat-arls-2: [PASS][9] -> [DMESG-FAIL][10] ([i915#10262]) +19 other tests dmesg-fail
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-arls-2/igt@i915_selftest@live@late_gt_pm.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-arls-2/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-14: NOTRUN -> [SKIP][11] ([i915#5190])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-14: NOTRUN -> [SKIP][12] ([i915#4215] / [i915#5190])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg2-14: NOTRUN -> [SKIP][13] ([i915#4212]) +7 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-14: NOTRUN -> [SKIP][14] ([i915#4103] / [i915#4213]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-dg2-14: NOTRUN -> [SKIP][15] ([i915#3555] / [i915#3840])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_dsc@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-14: NOTRUN -> [SKIP][16]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-14: NOTRUN -> [SKIP][17] ([i915#5274])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: [PASS][18] -> [SKIP][19] ([i915#9197]) +3 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_pm_backlight@basic-brightness:
- bat-dg2-14: NOTRUN -> [SKIP][20] ([i915#5354])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-dg2-14: NOTRUN -> [SKIP][21] ([i915#1072] / [i915#9732]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-14: NOTRUN -> [SKIP][22] ([i915#3555])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-dg2-14: NOTRUN -> [SKIP][23] ([i915#3708])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-gtt:
- bat-dg2-14: NOTRUN -> [SKIP][24] ([i915#3708] / [i915#4077]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@basic-write:
- bat-dg2-14: NOTRUN -> [SKIP][25] ([i915#3291] / [i915#3708]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-14/igt@prime_vgem@basic-write.html
* igt@runner@aborted:
- bat-dg2-13: NOTRUN -> [FAIL][26] ([i915#12292])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-dg2-13/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live:
- fi-hsw-4770: [DMESG-WARN][27] ([i915#12310]) -> [PASS][28] +1 other test pass
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/fi-hsw-4770/igt@i915_selftest@live.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/fi-hsw-4770/igt@i915_selftest@live.html
- bat-mtlp-8: [ABORT][29] ([i915#12216]) -> [PASS][30] +1 other test pass
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-mtlp-8/igt@i915_selftest@live.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-mtlp-8/igt@i915_selftest@live.html
- {bat-arlh-3}: [ABORT][31] ([i915#12061] / [i915#12133]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-arlh-3/igt@i915_selftest@live.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-arlh-3/igt@i915_selftest@live.html
* igt@i915_selftest@live@workarounds:
- {bat-arlh-3}: [ABORT][33] ([i915#12061]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/bat-arlh-3/igt@i915_selftest@live@workarounds.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10262]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10262
[i915#10341]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10341
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12133]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12133
[i915#12216]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12216
[i915#12292]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12292
[i915#12310]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12310
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
Build changes
-------------
* Linux: CI_DRM_15478 -> Patchwork_139485v1
CI-20190529: 20190529
CI_DRM_15478: af143300756485947a455fe84414adb35904c230 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8050: 0000bc070385689633718cbab01ab02a524f2c61 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_139485v1: af143300756485947a455fe84414adb35904c230 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/index.html
[-- Attachment #2: Type: text/html, Size: 12178 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 9:03 [PATCH] drm/i915/icl: Update csc and gamma enable checks Sai Teja Pottumuttu
2024-10-03 9:58 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2024-10-03 10:46 ` Jani Nikula
2024-10-03 11:10 ` Ville Syrjälä
2024-10-07 19:33 ` ✗ Fi.CI.IGT: failure for " Patchwork
3 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2024-10-03 10:46 UTC (permalink / raw)
To: Sai Teja Pottumuttu, intel-gfx
Cc: matthew.d.roper, ville.syrjala, Sai Teja Pottumuttu
On Thu, 03 Oct 2024, Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com> wrote:
> With ICL, we have a way to check if gamma and csc are enabled on
> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> along with the existing BOTTOM_COLOR checks.
Why?
That's the most important question any commit message must answer.
The state checker is supposed to check that the hardware state matches
the software state exactly. AFAICT this change makes the write and read
asymmetric.
.gamma_mode and .csc_mode are already checked verbatim. What benefit
does this change bring?
BR,
Jani.
>
> BSpec: 7463, 7466
> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 50f41aeb3c28..1bf36898dc7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> crtc_state->csc_enable = true;
> }
>
> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + u32 bottom_color;
> +
> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> +
> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> +
> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> + crtc_state->gamma_enable = true;
> +
> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> + crtc_state->csc_enable = true;
> +}
> +
> static void skl_color_commit_arm(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -3811,7 +3831,7 @@ static const struct intel_color_funcs tgl_color_funcs = {
> .read_luts = icl_read_luts,
> .lut_equal = icl_lut_equal,
> .read_csc = icl_read_csc,
> - .get_config = skl_get_config,
> + .get_config = icl_get_config,
> };
>
> static const struct intel_color_funcs icl_color_funcs = {
> @@ -3823,7 +3843,7 @@ static const struct intel_color_funcs icl_color_funcs = {
> .read_luts = icl_read_luts,
> .lut_equal = icl_lut_equal,
> .read_csc = icl_read_csc,
> - .get_config = skl_get_config,
> + .get_config = icl_get_config,
> };
>
> static const struct intel_color_funcs glk_color_funcs = {
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 9:03 [PATCH] drm/i915/icl: Update csc and gamma enable checks Sai Teja Pottumuttu
2024-10-03 9:58 ` ✓ Fi.CI.BAT: success for " Patchwork
2024-10-03 10:46 ` [PATCH] " Jani Nikula
@ 2024-10-03 11:10 ` Ville Syrjälä
2024-10-03 14:22 ` Matt Roper
2024-10-07 19:33 ` ✗ Fi.CI.IGT: failure for " Patchwork
3 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2024-10-03 11:10 UTC (permalink / raw)
To: Sai Teja Pottumuttu; +Cc: intel-gfx, matthew.d.roper, ville.syrjala
On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> With ICL, we have a way to check if gamma and csc are enabled on
> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> along with the existing BOTTOM_COLOR checks.
>
> BSpec: 7463, 7466
> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 50f41aeb3c28..1bf36898dc7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> crtc_state->csc_enable = true;
> }
>
> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> + u32 bottom_color;
> +
> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> +
> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> +
> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> + crtc_state->gamma_enable = true;
> +
> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> + crtc_state->csc_enable = true;
We don't use the old per-plane/bottom color way of enabling these.
So this is not right.
> +}
> +
> static void skl_color_commit_arm(const struct intel_crtc_state *crtc_state)
> {
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> @@ -3811,7 +3831,7 @@ static const struct intel_color_funcs tgl_color_funcs = {
> .read_luts = icl_read_luts,
> .lut_equal = icl_lut_equal,
> .read_csc = icl_read_csc,
> - .get_config = skl_get_config,
> + .get_config = icl_get_config,
> };
>
> static const struct intel_color_funcs icl_color_funcs = {
> @@ -3823,7 +3843,7 @@ static const struct intel_color_funcs icl_color_funcs = {
> .read_luts = icl_read_luts,
> .lut_equal = icl_lut_equal,
> .read_csc = icl_read_csc,
> - .get_config = skl_get_config,
> + .get_config = icl_get_config,
> };
>
> static const struct intel_color_funcs glk_color_funcs = {
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 11:10 ` Ville Syrjälä
@ 2024-10-03 14:22 ` Matt Roper
2024-10-03 14:32 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Matt Roper @ 2024-10-03 14:22 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: Sai Teja Pottumuttu, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > With ICL, we have a way to check if gamma and csc are enabled on
> > a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > along with the existing BOTTOM_COLOR checks.
> >
> > BSpec: 7463, 7466
> > Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > 1 file changed, 22 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > index 50f41aeb3c28..1bf36898dc7e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > crtc_state->csc_enable = true;
> > }
> >
> > +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > +{
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > + u32 bottom_color;
> > +
> > + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > +
> > + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > +
> > + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > + crtc_state->gamma_enable = true;
> > +
> > + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > + crtc_state->csc_enable = true;
>
> We don't use the old per-plane/bottom color way of enabling these.
> So this is not right.
I think that's the reason for the patch --- today we use
skl_get_config() which *only* checks the bottom color settings. And
that approach is documented as being deprecated (although still
supported on current platforms).
If we're reading out pre-OS state programmed by the vbios, we probably
need to handle whichever approach it took, right? Or are we sanitizing
this away to "off" somewhere that makes it okay to miss what was
programmed?
Matt
>
> > +}
> > +
> > static void skl_color_commit_arm(const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > @@ -3811,7 +3831,7 @@ static const struct intel_color_funcs tgl_color_funcs = {
> > .read_luts = icl_read_luts,
> > .lut_equal = icl_lut_equal,
> > .read_csc = icl_read_csc,
> > - .get_config = skl_get_config,
> > + .get_config = icl_get_config,
> > };
> >
> > static const struct intel_color_funcs icl_color_funcs = {
> > @@ -3823,7 +3843,7 @@ static const struct intel_color_funcs icl_color_funcs = {
> > .read_luts = icl_read_luts,
> > .lut_equal = icl_lut_equal,
> > .read_csc = icl_read_csc,
> > - .get_config = skl_get_config,
> > + .get_config = icl_get_config,
> > };
> >
> > static const struct intel_color_funcs glk_color_funcs = {
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 14:22 ` Matt Roper
@ 2024-10-03 14:32 ` Ville Syrjälä
2024-10-03 14:58 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2024-10-03 14:32 UTC (permalink / raw)
To: Matt Roper; +Cc: Sai Teja Pottumuttu, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > > With ICL, we have a way to check if gamma and csc are enabled on
> > > a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > > along with the existing BOTTOM_COLOR checks.
> > >
> > > BSpec: 7463, 7466
> > > Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > > 1 file changed, 22 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > > index 50f41aeb3c28..1bf36898dc7e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > > @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > > crtc_state->csc_enable = true;
> > > }
> > >
> > > +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > > +{
> > > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > > + u32 bottom_color;
> > > +
> > > + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > > + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > > +
> > > + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > > +
> > > + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > > + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > > + crtc_state->gamma_enable = true;
> > > +
> > > + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > > + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > > + crtc_state->csc_enable = true;
> >
> > We don't use the old per-plane/bottom color way of enabling these.
> > So this is not right.
>
> I think that's the reason for the patch --- today we use
> skl_get_config() which *only* checks the bottom color settings. And
> that approach is documented as being deprecated (although still
> supported on current platforms).
>
> If we're reading out pre-OS state programmed by the vbios, we probably
> need to handle whichever approach it took, right? Or are we sanitizing
> this away to "off" somewhere that makes it okay to miss what was
> programmed?
I think we're not doing anything. I suppose some kind of
assert_legacy_color_stuff_is_off() thing somewhere could be a
decent addition.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 14:32 ` Ville Syrjälä
@ 2024-10-03 14:58 ` Ville Syrjälä
2024-10-03 15:38 ` Pottumuttu, Sai Teja
0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2024-10-03 14:58 UTC (permalink / raw)
To: Matt Roper; +Cc: Sai Teja Pottumuttu, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> > On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > > > With ICL, we have a way to check if gamma and csc are enabled on
> > > > a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > > > along with the existing BOTTOM_COLOR checks.
> > > >
> > > > BSpec: 7463, 7466
> > > > Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > > > 1 file changed, 22 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > > > index 50f41aeb3c28..1bf36898dc7e 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > > > @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > > > crtc_state->csc_enable = true;
> > > > }
> > > >
> > > > +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > > > +{
> > > > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > > + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > > > + u32 bottom_color;
> > > > +
> > > > + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > > > + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > > > +
> > > > + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > > > +
> > > > + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > > > + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > > > + crtc_state->gamma_enable = true;
> > > > +
> > > > + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > > > + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > > > + crtc_state->csc_enable = true;
> > >
> > > We don't use the old per-plane/bottom color way of enabling these.
> > > So this is not right.
> >
> > I think that's the reason for the patch --- today we use
> > skl_get_config() which *only* checks the bottom color settings. And
> > that approach is documented as being deprecated (although still
> > supported on current platforms).
> >
> > If we're reading out pre-OS state programmed by the vbios, we probably
> > need to handle whichever approach it took, right? Or are we sanitizing
> > this away to "off" somewhere that makes it okay to miss what was
> > programmed?
>
> I think we're not doing anything. I suppose some kind of
> assert_legacy_color_stuff_is_off() thing somewhere could be a
> decent addition.
Or maybe we don't need to do anything. The state checker will catch
this problem with the current code as far as the pipe bottom color
is concerned. It won't catch inconsistent plane programming though.
But we also don't have such a consistency check for older platforms
either.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 14:58 ` Ville Syrjälä
@ 2024-10-03 15:38 ` Pottumuttu, Sai Teja
2024-10-03 15:46 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Pottumuttu, Sai Teja @ 2024-10-03 15:38 UTC (permalink / raw)
To: Ville Syrjälä, Matt Roper; +Cc: intel-gfx, ville.syrjala
On 03-10-2024 20:28, Ville Syrjälä wrote:
> On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
>> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
>>> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
>>>> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
>>>>> With ICL, we have a way to check if gamma and csc are enabled on
>>>>> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
>>>>> along with the existing BOTTOM_COLOR checks.
>>>>>
>>>>> BSpec: 7463, 7466
>>>>> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
>>>>> ---
>>>>> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
>>>>> 1 file changed, 22 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
>>>>> index 50f41aeb3c28..1bf36898dc7e 100644
>>>>> --- a/drivers/gpu/drm/i915/display/intel_color.c
>>>>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
>>>>> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
>>>>> crtc_state->csc_enable = true;
>>>>> }
>>>>>
>>>>> +static void icl_get_config(struct intel_crtc_state *crtc_state)
>>>>> +{
>>>>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>>>> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>>>>> + u32 bottom_color;
>>>>> +
>>>>> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
>>>>> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
>>>>> +
>>>>> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
>>>>> +
>>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
>>>>> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
>>>>> + crtc_state->gamma_enable = true;
>>>>> +
>>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
>>>>> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
>>>>> + crtc_state->csc_enable = true;
>>>> We don't use the old per-plane/bottom color way of enabling these.
>>>> So this is not right.
>>> I think that's the reason for the patch --- today we use
>>> skl_get_config() which *only* checks the bottom color settings. And
>>> that approach is documented as being deprecated (although still
>>> supported on current platforms).
>>>
>>> If we're reading out pre-OS state programmed by the vbios, we probably
>>> need to handle whichever approach it took, right? Or are we sanitizing
>>> this away to "off" somewhere that makes it okay to miss what was
>>> programmed?
>> I think we're not doing anything. I suppose some kind of
>> assert_legacy_color_stuff_is_off() thing somewhere could be a
>> decent addition.
> Or maybe we don't need to do anything. The state checker will catch
> this problem with the current code as far as the pipe bottom color
> is concerned. It won't catch inconsistent plane programming though.
> But we also don't have such a consistency check for older platforms
> either.
So, are we essentially saying that we can completely remove BOTTOM_COLOR
from here and just move to using GAMMA_MODE, CSC_MODE for setting
gamma_enable and csc_enable?
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 15:38 ` Pottumuttu, Sai Teja
@ 2024-10-03 15:46 ` Ville Syrjälä
2024-10-03 15:56 ` Pottumuttu, Sai Teja
2024-10-03 16:05 ` Matt Roper
0 siblings, 2 replies; 16+ messages in thread
From: Ville Syrjälä @ 2024-10-03 15:46 UTC (permalink / raw)
To: Pottumuttu, Sai Teja; +Cc: Matt Roper, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
>
> On 03-10-2024 20:28, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> >> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> >>> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> >>>> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> >>>>> With ICL, we have a way to check if gamma and csc are enabled on
> >>>>> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> >>>>> along with the existing BOTTOM_COLOR checks.
> >>>>>
> >>>>> BSpec: 7463, 7466
> >>>>> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> >>>>> ---
> >>>>> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> >>>>> 1 file changed, 22 insertions(+), 2 deletions(-)
> >>>>>
> >>>>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> >>>>> index 50f41aeb3c28..1bf36898dc7e 100644
> >>>>> --- a/drivers/gpu/drm/i915/display/intel_color.c
> >>>>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> >>>>> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> >>>>> crtc_state->csc_enable = true;
> >>>>> }
> >>>>>
> >>>>> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> >>>>> +{
> >>>>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >>>>> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> >>>>> + u32 bottom_color;
> >>>>> +
> >>>>> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> >>>>> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> >>>>> +
> >>>>> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> >>>>> +
> >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> >>>>> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> >>>>> + crtc_state->gamma_enable = true;
> >>>>> +
> >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> >>>>> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> >>>>> + crtc_state->csc_enable = true;
> >>>> We don't use the old per-plane/bottom color way of enabling these.
> >>>> So this is not right.
> >>> I think that's the reason for the patch --- today we use
> >>> skl_get_config() which *only* checks the bottom color settings. And
> >>> that approach is documented as being deprecated (although still
> >>> supported on current platforms).
> >>>
> >>> If we're reading out pre-OS state programmed by the vbios, we probably
> >>> need to handle whichever approach it took, right? Or are we sanitizing
> >>> this away to "off" somewhere that makes it okay to miss what was
> >>> programmed?
> >> I think we're not doing anything. I suppose some kind of
> >> assert_legacy_color_stuff_is_off() thing somewhere could be a
> >> decent addition.
> > Or maybe we don't need to do anything. The state checker will catch
> > this problem with the current code as far as the pipe bottom color
> > is concerned. It won't catch inconsistent plane programming though.
> > But we also don't have such a consistency check for older platforms
> > either.
>
> So, are we essentially saying that we can completely remove BOTTOM_COLOR
> from here and just move to using GAMMA_MODE, CSC_MODE for setting
> gamma_enable and csc_enable?
No. The current code already works correctly, and pipe_csc_enable and
gamma_enable are not meant to be used on icl+.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 15:46 ` Ville Syrjälä
@ 2024-10-03 15:56 ` Pottumuttu, Sai Teja
2024-10-03 16:02 ` Jani Nikula
2024-10-03 16:05 ` Matt Roper
1 sibling, 1 reply; 16+ messages in thread
From: Pottumuttu, Sai Teja @ 2024-10-03 15:56 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Matt Roper, intel-gfx, ville.syrjala, sai.teja.pottumuttu
On 03-10-2024 21:16, Ville Syrjälä wrote:
> No. The current code already works correctly, and pipe_csc_enable and
> gamma_enable are not meant to be used on icl+.
So, if that is the case, would it be good to still have the
icl_get_config function here and completely remove the gamma_enable and
csc_enable setting part so that its clear that we don't need these in icl+?
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 15:56 ` Pottumuttu, Sai Teja
@ 2024-10-03 16:02 ` Jani Nikula
0 siblings, 0 replies; 16+ messages in thread
From: Jani Nikula @ 2024-10-03 16:02 UTC (permalink / raw)
To: Pottumuttu, Sai Teja, Ville Syrjälä
Cc: Matt Roper, intel-gfx, ville.syrjala, sai.teja.pottumuttu
On Thu, 03 Oct 2024, "Pottumuttu, Sai Teja" <sai.teja.pottumuttu@intel.com> wrote:
> On 03-10-2024 21:16, Ville Syrjälä wrote:
>> No. The current code already works correctly, and pipe_csc_enable and
>> gamma_enable are not meant to be used on icl+.
>
> So, if that is the case, would it be good to still have the
> icl_get_config function here and completely remove the gamma_enable and
> csc_enable setting part so that its clear that we don't need these in icl+?
Then you'll lose the check on those bit actually having been left at 0.
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 15:46 ` Ville Syrjälä
2024-10-03 15:56 ` Pottumuttu, Sai Teja
@ 2024-10-03 16:05 ` Matt Roper
2024-10-03 16:12 ` Ville Syrjälä
1 sibling, 1 reply; 16+ messages in thread
From: Matt Roper @ 2024-10-03 16:05 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: Pottumuttu, Sai Teja, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 06:46:31PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
> >
> > On 03-10-2024 20:28, Ville Syrjälä wrote:
> > > On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> > >> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> > >>> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > >>>> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > >>>>> With ICL, we have a way to check if gamma and csc are enabled on
> > >>>>> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > >>>>> along with the existing BOTTOM_COLOR checks.
> > >>>>>
> > >>>>> BSpec: 7463, 7466
> > >>>>> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > >>>>> ---
> > >>>>> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > >>>>> 1 file changed, 22 insertions(+), 2 deletions(-)
> > >>>>>
> > >>>>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > >>>>> index 50f41aeb3c28..1bf36898dc7e 100644
> > >>>>> --- a/drivers/gpu/drm/i915/display/intel_color.c
> > >>>>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > >>>>> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > >>>>> crtc_state->csc_enable = true;
> > >>>>> }
> > >>>>>
> > >>>>> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > >>>>> +{
> > >>>>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > >>>>> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > >>>>> + u32 bottom_color;
> > >>>>> +
> > >>>>> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > >>>>> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > >>>>> +
> > >>>>> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > >>>>> +
> > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > >>>>> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > >>>>> + crtc_state->gamma_enable = true;
> > >>>>> +
> > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > >>>>> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > >>>>> + crtc_state->csc_enable = true;
> > >>>> We don't use the old per-plane/bottom color way of enabling these.
> > >>>> So this is not right.
> > >>> I think that's the reason for the patch --- today we use
> > >>> skl_get_config() which *only* checks the bottom color settings. And
> > >>> that approach is documented as being deprecated (although still
> > >>> supported on current platforms).
> > >>>
> > >>> If we're reading out pre-OS state programmed by the vbios, we probably
> > >>> need to handle whichever approach it took, right? Or are we sanitizing
> > >>> this away to "off" somewhere that makes it okay to miss what was
> > >>> programmed?
> > >> I think we're not doing anything. I suppose some kind of
> > >> assert_legacy_color_stuff_is_off() thing somewhere could be a
> > >> decent addition.
> > > Or maybe we don't need to do anything. The state checker will catch
> > > this problem with the current code as far as the pipe bottom color
> > > is concerned. It won't catch inconsistent plane programming though.
> > > But we also don't have such a consistency check for older platforms
> > > either.
> >
> > So, are we essentially saying that we can completely remove BOTTOM_COLOR
> > from here and just move to using GAMMA_MODE, CSC_MODE for setting
> > gamma_enable and csc_enable?
>
> No. The current code already works correctly, and pipe_csc_enable and
> gamma_enable are not meant to be used on icl+.
Then does that mean icl_color_commit_arm() is wrong since we're
programming those registers there?
Matt
>
> --
> Ville Syrjälä
> Intel
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 16:05 ` Matt Roper
@ 2024-10-03 16:12 ` Ville Syrjälä
2024-10-03 16:20 ` Matt Roper
0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2024-10-03 16:12 UTC (permalink / raw)
To: Matt Roper; +Cc: Pottumuttu, Sai Teja, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 09:05:40AM -0700, Matt Roper wrote:
> On Thu, Oct 03, 2024 at 06:46:31PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
> > >
> > > On 03-10-2024 20:28, Ville Syrjälä wrote:
> > > > On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> > > >> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> > > >>> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > > >>>> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > > >>>>> With ICL, we have a way to check if gamma and csc are enabled on
> > > >>>>> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > > >>>>> along with the existing BOTTOM_COLOR checks.
> > > >>>>>
> > > >>>>> BSpec: 7463, 7466
> > > >>>>> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > > >>>>> ---
> > > >>>>> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > > >>>>> 1 file changed, 22 insertions(+), 2 deletions(-)
> > > >>>>>
> > > >>>>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > > >>>>> index 50f41aeb3c28..1bf36898dc7e 100644
> > > >>>>> --- a/drivers/gpu/drm/i915/display/intel_color.c
> > > >>>>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > > >>>>> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > > >>>>> crtc_state->csc_enable = true;
> > > >>>>> }
> > > >>>>>
> > > >>>>> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > > >>>>> +{
> > > >>>>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > >>>>> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > > >>>>> + u32 bottom_color;
> > > >>>>> +
> > > >>>>> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > > >>>>> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > > >>>>> +
> > > >>>>> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > > >>>>> +
> > > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > > >>>>> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > > >>>>> + crtc_state->gamma_enable = true;
> > > >>>>> +
> > > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > > >>>>> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > > >>>>> + crtc_state->csc_enable = true;
> > > >>>> We don't use the old per-plane/bottom color way of enabling these.
> > > >>>> So this is not right.
> > > >>> I think that's the reason for the patch --- today we use
> > > >>> skl_get_config() which *only* checks the bottom color settings. And
> > > >>> that approach is documented as being deprecated (although still
> > > >>> supported on current platforms).
> > > >>>
> > > >>> If we're reading out pre-OS state programmed by the vbios, we probably
> > > >>> need to handle whichever approach it took, right? Or are we sanitizing
> > > >>> this away to "off" somewhere that makes it okay to miss what was
> > > >>> programmed?
> > > >> I think we're not doing anything. I suppose some kind of
> > > >> assert_legacy_color_stuff_is_off() thing somewhere could be a
> > > >> decent addition.
> > > > Or maybe we don't need to do anything. The state checker will catch
> > > > this problem with the current code as far as the pipe bottom color
> > > > is concerned. It won't catch inconsistent plane programming though.
> > > > But we also don't have such a consistency check for older platforms
> > > > either.
> > >
> > > So, are we essentially saying that we can completely remove BOTTOM_COLOR
> > > from here and just move to using GAMMA_MODE, CSC_MODE for setting
> > > gamma_enable and csc_enable?
> >
> > No. The current code already works correctly, and pipe_csc_enable and
> > gamma_enable are not meant to be used on icl+.
>
> Then does that mean icl_color_commit_arm() is wrong since we're
> programming those registers there?
Not really. It just assumes those bits should never be set,
which is true given how icl_color_check() operates.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 16:12 ` Ville Syrjälä
@ 2024-10-03 16:20 ` Matt Roper
2024-10-03 16:43 ` Ville Syrjälä
0 siblings, 1 reply; 16+ messages in thread
From: Matt Roper @ 2024-10-03 16:20 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: Pottumuttu, Sai Teja, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 07:12:41PM +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2024 at 09:05:40AM -0700, Matt Roper wrote:
> > On Thu, Oct 03, 2024 at 06:46:31PM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
> > > >
> > > > On 03-10-2024 20:28, Ville Syrjälä wrote:
> > > > > On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> > > > >> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> > > > >>> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > > > >>>> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > > > >>>>> With ICL, we have a way to check if gamma and csc are enabled on
> > > > >>>>> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > > > >>>>> along with the existing BOTTOM_COLOR checks.
> > > > >>>>>
> > > > >>>>> BSpec: 7463, 7466
> > > > >>>>> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > > > >>>>> ---
> > > > >>>>> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > > > >>>>> 1 file changed, 22 insertions(+), 2 deletions(-)
> > > > >>>>>
> > > > >>>>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > > > >>>>> index 50f41aeb3c28..1bf36898dc7e 100644
> > > > >>>>> --- a/drivers/gpu/drm/i915/display/intel_color.c
> > > > >>>>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > > > >>>>> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > > > >>>>> crtc_state->csc_enable = true;
> > > > >>>>> }
> > > > >>>>>
> > > > >>>>> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > > > >>>>> +{
> > > > >>>>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > > >>>>> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > > > >>>>> + u32 bottom_color;
> > > > >>>>> +
> > > > >>>>> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > > > >>>>> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > > > >>>>> +
> > > > >>>>> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > > > >>>>> +
> > > > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > > > >>>>> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > > > >>>>> + crtc_state->gamma_enable = true;
> > > > >>>>> +
> > > > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > > > >>>>> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > > > >>>>> + crtc_state->csc_enable = true;
> > > > >>>> We don't use the old per-plane/bottom color way of enabling these.
> > > > >>>> So this is not right.
> > > > >>> I think that's the reason for the patch --- today we use
> > > > >>> skl_get_config() which *only* checks the bottom color settings. And
> > > > >>> that approach is documented as being deprecated (although still
> > > > >>> supported on current platforms).
> > > > >>>
> > > > >>> If we're reading out pre-OS state programmed by the vbios, we probably
> > > > >>> need to handle whichever approach it took, right? Or are we sanitizing
> > > > >>> this away to "off" somewhere that makes it okay to miss what was
> > > > >>> programmed?
> > > > >> I think we're not doing anything. I suppose some kind of
> > > > >> assert_legacy_color_stuff_is_off() thing somewhere could be a
> > > > >> decent addition.
> > > > > Or maybe we don't need to do anything. The state checker will catch
> > > > > this problem with the current code as far as the pipe bottom color
> > > > > is concerned. It won't catch inconsistent plane programming though.
> > > > > But we also don't have such a consistency check for older platforms
> > > > > either.
> > > >
> > > > So, are we essentially saying that we can completely remove BOTTOM_COLOR
> > > > from here and just move to using GAMMA_MODE, CSC_MODE for setting
> > > > gamma_enable and csc_enable?
> > >
> > > No. The current code already works correctly, and pipe_csc_enable and
> > > gamma_enable are not meant to be used on icl+.
> >
> > Then does that mean icl_color_commit_arm() is wrong since we're
> > programming those registers there?
>
> Not really. It just assumes those bits should never be set,
> which is true given how icl_color_check() operates.
Hmm, this is confusing since I see icl_gamma_mode() setting up
pipe-level gamma enable:
if (crtc_state->hw.gamma_lut &&
!crtc_state->c8_planes)
gamma_mode |= POST_CSC_GAMMA_ENABLE;
and icl_csc_mode() setting up CSC enable:
if (crtc_state->hw.ctm)
csc_mode |= ICL_CSC_ENABLE;
and then those eventually get programmed to hardware in
icl_color_commit_arm.
But then our get_config function doesn't read these same bits and
instead only reads the bottom_color bit instead (which is mutually
exclusive with the pipe-level control, and which will likely be removed
from the hardware completely at some point since it's already listed as
deprecated). What am I overlooking here?
Matt
>
> --
> Ville Syrjälä
> Intel
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] drm/i915/icl: Update csc and gamma enable checks
2024-10-03 16:20 ` Matt Roper
@ 2024-10-03 16:43 ` Ville Syrjälä
0 siblings, 0 replies; 16+ messages in thread
From: Ville Syrjälä @ 2024-10-03 16:43 UTC (permalink / raw)
To: Matt Roper; +Cc: Pottumuttu, Sai Teja, intel-gfx, ville.syrjala
On Thu, Oct 03, 2024 at 09:20:38AM -0700, Matt Roper wrote:
> On Thu, Oct 03, 2024 at 07:12:41PM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 03, 2024 at 09:05:40AM -0700, Matt Roper wrote:
> > > On Thu, Oct 03, 2024 at 06:46:31PM +0300, Ville Syrjälä wrote:
> > > > On Thu, Oct 03, 2024 at 09:08:53PM +0530, Pottumuttu, Sai Teja wrote:
> > > > >
> > > > > On 03-10-2024 20:28, Ville Syrjälä wrote:
> > > > > > On Thu, Oct 03, 2024 at 05:32:56PM +0300, Ville Syrjälä wrote:
> > > > > >> On Thu, Oct 03, 2024 at 07:22:37AM -0700, Matt Roper wrote:
> > > > > >>> On Thu, Oct 03, 2024 at 02:10:31PM +0300, Ville Syrjälä wrote:
> > > > > >>>> On Thu, Oct 03, 2024 at 02:33:41PM +0530, Sai Teja Pottumuttu wrote:
> > > > > >>>>> With ICL, we have a way to check if gamma and csc are enabled on
> > > > > >>>>> a pipe using bits in GAMMA_MODE and CSC_MODE. So, use them as well
> > > > > >>>>> along with the existing BOTTOM_COLOR checks.
> > > > > >>>>>
> > > > > >>>>> BSpec: 7463, 7466
> > > > > >>>>> Signed-off-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
> > > > > >>>>> ---
> > > > > >>>>> drivers/gpu/drm/i915/display/intel_color.c | 24 ++++++++++++++++++++--
> > > > > >>>>> 1 file changed, 22 insertions(+), 2 deletions(-)
> > > > > >>>>>
> > > > > >>>>> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> > > > > >>>>> index 50f41aeb3c28..1bf36898dc7e 100644
> > > > > >>>>> --- a/drivers/gpu/drm/i915/display/intel_color.c
> > > > > >>>>> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > > > > >>>>> @@ -1076,6 +1076,26 @@ static void skl_get_config(struct intel_crtc_state *crtc_state)
> > > > > >>>>> crtc_state->csc_enable = true;
> > > > > >>>>> }
> > > > > >>>>>
> > > > > >>>>> +static void icl_get_config(struct intel_crtc_state *crtc_state)
> > > > > >>>>> +{
> > > > > >>>>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > > > >>>>> + struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > > > > >>>>> + u32 bottom_color;
> > > > > >>>>> +
> > > > > >>>>> + crtc_state->gamma_mode = hsw_read_gamma_mode(crtc);
> > > > > >>>>> + crtc_state->csc_mode = ilk_read_csc_mode(crtc);
> > > > > >>>>> +
> > > > > >>>>> + bottom_color = intel_de_read(i915, SKL_BOTTOM_COLOR(crtc->pipe));
> > > > > >>>>> +
> > > > > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_GAMMA_ENABLE) ||
> > > > > >>>>> + (crtc_state->gamma_mode & POST_CSC_GAMMA_ENABLE))
> > > > > >>>>> + crtc_state->gamma_enable = true;
> > > > > >>>>> +
> > > > > >>>>> + if ((bottom_color & SKL_BOTTOM_COLOR_CSC_ENABLE) ||
> > > > > >>>>> + (crtc_state->csc_mode & ICL_CSC_ENABLE))
> > > > > >>>>> + crtc_state->csc_enable = true;
> > > > > >>>> We don't use the old per-plane/bottom color way of enabling these.
> > > > > >>>> So this is not right.
> > > > > >>> I think that's the reason for the patch --- today we use
> > > > > >>> skl_get_config() which *only* checks the bottom color settings. And
> > > > > >>> that approach is documented as being deprecated (although still
> > > > > >>> supported on current platforms).
> > > > > >>>
> > > > > >>> If we're reading out pre-OS state programmed by the vbios, we probably
> > > > > >>> need to handle whichever approach it took, right? Or are we sanitizing
> > > > > >>> this away to "off" somewhere that makes it okay to miss what was
> > > > > >>> programmed?
> > > > > >> I think we're not doing anything. I suppose some kind of
> > > > > >> assert_legacy_color_stuff_is_off() thing somewhere could be a
> > > > > >> decent addition.
> > > > > > Or maybe we don't need to do anything. The state checker will catch
> > > > > > this problem with the current code as far as the pipe bottom color
> > > > > > is concerned. It won't catch inconsistent plane programming though.
> > > > > > But we also don't have such a consistency check for older platforms
> > > > > > either.
> > > > >
> > > > > So, are we essentially saying that we can completely remove BOTTOM_COLOR
> > > > > from here and just move to using GAMMA_MODE, CSC_MODE for setting
> > > > > gamma_enable and csc_enable?
> > > >
> > > > No. The current code already works correctly, and pipe_csc_enable and
> > > > gamma_enable are not meant to be used on icl+.
> > >
> > > Then does that mean icl_color_commit_arm() is wrong since we're
> > > programming those registers there?
> >
> > Not really. It just assumes those bits should never be set,
> > which is true given how icl_color_check() operates.
>
> Hmm, this is confusing since I see icl_gamma_mode() setting up
> pipe-level gamma enable:
>
> if (crtc_state->hw.gamma_lut &&
> !crtc_state->c8_planes)
> gamma_mode |= POST_CSC_GAMMA_ENABLE;
>
> and icl_csc_mode() setting up CSC enable:
>
> if (crtc_state->hw.ctm)
> csc_mode |= ICL_CSC_ENABLE;
>
> and then those eventually get programmed to hardware in
> icl_color_commit_arm.
>
> But then our get_config function doesn't read these same bits and
> instead only reads the bottom_color bit instead (which is mutually
> exclusive with the pipe-level control, and which will likely be removed
> from the hardware completely at some point since it's already listed as
> deprecated). What am I overlooking here?
csc_mode and gamma_mode are read back fully.
If we wanted to be 100% pedantic about how things work in hardware
we'd have to duplicate csc_enable/gamma_enable into plane_state, and
then copy over the thing we computed for the whole crtc into those
and use them when programming the planes. But that's quite a lot of
extra tracking, and we haven't even implemented proper plane state
readout so not much point at this time. And IIRC there was also
some ordering issue in that we compute plane states before color
state, hence the whole *_plane_ctl_crtc() stuff.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/icl: Update csc and gamma enable checks
2024-10-03 9:03 [PATCH] drm/i915/icl: Update csc and gamma enable checks Sai Teja Pottumuttu
` (2 preceding siblings ...)
2024-10-03 11:10 ` Ville Syrjälä
@ 2024-10-07 19:33 ` Patchwork
3 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2024-10-07 19:33 UTC (permalink / raw)
To: Pottumuttu, Sai Teja; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 100275 bytes --]
== Series Details ==
Series: drm/i915/icl: Update csc and gamma enable checks
URL : https://patchwork.freedesktop.org/series/139485/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_15478_full -> Patchwork_139485v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_139485v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_139485v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 11)
------------------------------
Additional (1): shard-glk-0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_139485v1_full:
### CI changes ###
#### Possible regressions ####
* boot:
- shard-glk: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [FAIL][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk9/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk8/boot.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk9/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk9/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk8/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk6/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk6/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk7/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk7/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk7/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk8/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk1/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk1/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk2/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk2/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk2/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk3/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk3/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk3/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk5/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk5/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk5/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk3/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk3/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk3/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk3/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/boot.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/boot.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/boot.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/boot.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/boot.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/boot.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/boot.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/boot.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/boot.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/boot.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/boot.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/boot.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/boot.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/boot.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/boot.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/boot.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk7/boot.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk7/boot.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk7/boot.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk7/boot.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk7/boot.html
### IGT changes ###
#### Possible regressions ####
* igt@kms_color@ctm-0-25@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [ABORT][73] +1 other test abort
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-12/igt@kms_color@ctm-0-25@pipe-a-hdmi-a-3.html
* igt@kms_color@ctm-0-25@pipe-b-hdmi-a-1:
- shard-tglu: ([PASS][74], [PASS][75]) -> [DMESG-WARN][76] +12 other tests dmesg-warn
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-5/igt@kms_color@ctm-0-25@pipe-b-hdmi-a-1.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-10/igt@kms_color@ctm-0-25@pipe-b-hdmi-a-1.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-7/igt@kms_color@ctm-0-25@pipe-b-hdmi-a-1.html
* igt@kms_color@ctm-0-25@pipe-d-hdmi-a-4:
- shard-dg1: ([PASS][77], [PASS][78]) -> [DMESG-WARN][79] +4 other tests dmesg-warn
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-18/igt@kms_color@ctm-0-25@pipe-d-hdmi-a-4.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-19/igt@kms_color@ctm-0-25@pipe-d-hdmi-a-4.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_color@ctm-0-25@pipe-d-hdmi-a-4.html
* igt@kms_color@ctm-0-50@pipe-b-hdmi-a-2:
- shard-rkl: [PASS][80] -> ([DMESG-WARN][81], [DMESG-WARN][82])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-5/igt@kms_color@ctm-0-50@pipe-b-hdmi-a-2.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-1/igt@kms_color@ctm-0-50@pipe-b-hdmi-a-2.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-3/igt@kms_color@ctm-0-50@pipe-b-hdmi-a-2.html
* igt@kms_color@ctm-0-50@pipe-c-hdmi-a-3:
- shard-dg1: [PASS][83] -> [DMESG-WARN][84] +7 other tests dmesg-warn
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-13/igt@kms_color@ctm-0-50@pipe-c-hdmi-a-3.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-12/igt@kms_color@ctm-0-50@pipe-c-hdmi-a-3.html
* igt@kms_color@ctm-max@pipe-b-edp-1:
- shard-mtlp: ([PASS][85], [PASS][86]) -> ([DMESG-WARN][87], [DMESG-WARN][88]) +12 other tests ( 2 dmesg-warn )
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-4/igt@kms_color@ctm-max@pipe-b-edp-1.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-5/igt@kms_color@ctm-max@pipe-b-edp-1.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-6/igt@kms_color@ctm-max@pipe-b-edp-1.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-7/igt@kms_color@ctm-max@pipe-b-edp-1.html
* igt@kms_color@ctm-max@pipe-b-hdmi-a-1:
- shard-rkl: [PASS][89] -> [ABORT][90] +8 other tests abort
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-4/igt@kms_color@ctm-max@pipe-b-hdmi-a-1.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-2/igt@kms_color@ctm-max@pipe-b-hdmi-a-1.html
* igt@kms_color@ctm-max@pipe-b-hdmi-a-2:
- shard-dg2: NOTRUN -> [ABORT][91] +5 other tests abort
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_color@ctm-max@pipe-b-hdmi-a-2.html
- shard-rkl: NOTRUN -> [ABORT][92] +2 other tests abort
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-5/igt@kms_color@ctm-max@pipe-b-hdmi-a-2.html
* igt@kms_color@ctm-max@pipe-c-hdmi-a-4:
- shard-dg1: ([PASS][93], [PASS][94]) -> ([DMESG-WARN][95], [DMESG-WARN][96]) +1 other test ( 2 dmesg-warn )
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-17/igt@kms_color@ctm-max@pipe-c-hdmi-a-4.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-19/igt@kms_color@ctm-max@pipe-c-hdmi-a-4.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-18/igt@kms_color@ctm-max@pipe-c-hdmi-a-4.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_color@ctm-max@pipe-c-hdmi-a-4.html
* igt@kms_color@ctm-negative@pipe-b-hdmi-a-4:
- shard-dg1: [PASS][97] -> [ABORT][98] +2 other tests abort
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-15/igt@kms_color@ctm-negative@pipe-b-hdmi-a-4.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-15/igt@kms_color@ctm-negative@pipe-b-hdmi-a-4.html
* igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [DMESG-WARN][99] +1 other test dmesg-warn
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-7/igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-1.html
* igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-2:
- shard-rkl: ([PASS][100], [PASS][101]) -> [DMESG-WARN][102]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-1/igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-2.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-6/igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-2.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-1/igt@kms_color@ctm-red-to-blue@pipe-b-hdmi-a-2.html
* igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-1:
- shard-tglu: [PASS][103] -> [DMESG-WARN][104] +3 other tests dmesg-warn
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-3/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-1.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-7/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-1.html
* igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-3:
- shard-dg2: [PASS][105] -> [DMESG-WARN][106] +3 other tests dmesg-warn
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-5/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-3.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-7/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-3.html
* igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-4:
- shard-dg1: [PASS][107] -> ([DMESG-WARN][108], [DMESG-WARN][109]) +3 other tests ( 2 dmesg-warn )
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-18/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-4.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-17/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-4.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-19/igt@kms_color@ctm-red-to-blue@pipe-d-hdmi-a-4.html
* igt@kms_color@gamma@pipe-d-hdmi-a-3:
- shard-dg1: NOTRUN -> [DMESG-WARN][110] +4 other tests dmesg-warn
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-12/igt@kms_color@gamma@pipe-d-hdmi-a-3.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-snb: [PASS][111] -> [FAIL][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb2/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-snb: ([PASS][113], [PASS][114]) -> ([PASS][115], [DMESG-WARN][116])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb5/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb5/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@basic-plain-flip:
- shard-tglu: [PASS][117] -> [ABORT][118] +10 other tests abort
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-10/igt@kms_flip@basic-plain-flip.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-9/igt@kms_flip@basic-plain-flip.html
* igt@kms_flip@basic-plain-flip@a-hdmi-a3:
- shard-dg2: [PASS][119] -> [ABORT][120] +2 other tests abort
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_flip@basic-plain-flip@a-hdmi-a3.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_flip@basic-plain-flip@a-hdmi-a3.html
* igt@kms_flip@basic-plain-flip@b-hdmi-a1:
- shard-rkl: [PASS][121] -> [DMESG-WARN][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-2/igt@kms_flip@basic-plain-flip@b-hdmi-a1.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-4/igt@kms_flip@basic-plain-flip@b-hdmi-a1.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible:
- shard-dg2: ([PASS][123], [PASS][124]) -> ([SKIP][125], [ABORT][126]) ([i915#5354])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-hdmi-a4:
- shard-dg1: NOTRUN -> ([ABORT][127], [ABORT][128])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-15/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-hdmi-a4.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@a-hdmi-a4.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a1:
- shard-dg2: NOTRUN -> [DMESG-WARN][129] +9 other tests dmesg-warn
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a1.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a4:
- shard-dg1: NOTRUN -> ([DMESG-WARN][130], [DMESG-WARN][131])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a4.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-15/igt@kms_flip@blocking-absolute-wf_vblank-interruptible@d-hdmi-a4.html
* igt@kms_flip@flip-vs-wf_vblank-interruptible:
- shard-glk: [PASS][132] -> ([PASS][133], [FAIL][134]) +1 other test ( 1 fail, 1 pass )
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-wf_vblank-interruptible@b-hdmi-a4:
- shard-dg1: ([PASS][135], [PASS][136]) -> [FAIL][137]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-19/igt@kms_flip@flip-vs-wf_vblank-interruptible@b-hdmi-a4.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-16/igt@kms_flip@flip-vs-wf_vblank-interruptible@b-hdmi-a4.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_flip@flip-vs-wf_vblank-interruptible@b-hdmi-a4.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-dg2: [PASS][138] -> ([ABORT][139], [ABORT][140]) +1 other test ( 2 abort )
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-10/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-rkl: ([PASS][141], [PASS][142]) -> ([ABORT][143], [ABORT][144]) +9 other tests ( 2 abort )
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-1/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
- shard-dg1: [PASS][145] -> ([ABORT][146], [ABORT][147]) +4 other tests ( 2 abort )
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-14/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-17/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
- shard-dg2: ([PASS][148], [PASS][149]) -> ([ABORT][150], [ABORT][151]) +16 other tests ( 2 abort )
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-11/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-dg2: ([PASS][152], [PASS][153]) -> [ABORT][154] +6 other tests abort
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling:
- shard-rkl: ([PASS][155], [PASS][156]) -> [ABORT][157] +9 other tests abort
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling:
- shard-mtlp: ([PASS][158], [PASS][159]) -> ([ABORT][160], [ABORT][161]) +22 other tests ( 2 abort )
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling@pipe-a-valid-mode:
- shard-tglu: ([PASS][162], [PASS][163]) -> [ABORT][164] +25 other tests abort
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-9/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling@pipe-a-valid-mode.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling@pipe-a-valid-mode.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
- shard-dg2: ([PASS][165], [PASS][166]) -> ([SKIP][167], [ABORT][168]) ([i915#3555]) +2 other tests ( 1 abort, 1 skip )
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-rkl: [PASS][169] -> ([ABORT][170], [ABORT][171]) +7 other tests ( 2 abort )
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-dg1: ([PASS][172], [PASS][173]) -> ([ABORT][174], [ABORT][175]) +19 other tests ( 2 abort )
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-14/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-15/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-14/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-19/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
- shard-dg1: ([PASS][176], [PASS][177]) -> [ABORT][178] +12 other tests abort
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-18/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-12/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-14/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
- shard-mtlp: [PASS][179] -> ([ABORT][180], [ABORT][181])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
* igt@kms_plane@pixel-format-source-clamping:
- shard-mtlp: ([PASS][182], [PASS][183]) -> [ABORT][184] +5 other tests abort
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@kms_plane@pixel-format-source-clamping.html
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-7/igt@kms_plane@pixel-format-source-clamping.html
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-6/igt@kms_plane@pixel-format-source-clamping.html
* igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-3:
- shard-mtlp: ([PASS][185], [PASS][186]) -> [DMESG-WARN][187] +9 other tests dmesg-warn
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-3.html
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-7/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-3.html
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-6/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-3.html
* igt@perf_pmu@busy-accuracy-98:
- shard-tglu: ([PASS][188], [PASS][189]) -> [FAIL][190] +1 other test fail
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-2/igt@perf_pmu@busy-accuracy-98.html
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-7/igt@perf_pmu@busy-accuracy-98.html
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-9/igt@perf_pmu@busy-accuracy-98.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-8bpp-rotate-180:
- shard-rkl: ([PASS][191], [ABORT][192]) ([i915#10354]) -> [ABORT][193]
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-7/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-5/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
* igt@kms_color@ctm-red-to-blue:
- shard-dg2: ([SKIP][194], [PASS][195]) ([i915#5354]) -> [ABORT][196]
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_color@ctm-red-to-blue.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-5/igt@kms_color@ctm-red-to-blue.html
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-7/igt@kms_color@ctm-red-to-blue.html
* igt@kms_color@gamma:
- shard-dg2: ([SKIP][197], [PASS][198]) ([i915#5354]) -> ([ABORT][199], [ABORT][200])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_color@gamma.html
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-8/igt@kms_color@gamma.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_color@gamma.html
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-6/igt@kms_color@gamma.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
- shard-mtlp: ([SKIP][201], [SKIP][202]) ([i915#3555] / [i915#8813]) -> ([ABORT][203], [ABORT][204]) +3 other tests ( 2 abort )
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
- shard-mtlp: ([SKIP][205], [SKIP][206]) ([i915#3555] / [i915#8810]) -> ([ABORT][207], [ABORT][208])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-2/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
- shard-dg2: ([SKIP][209], [PASS][210]) ([i915#3555]) -> ([ABORT][211], [SKIP][212]) ([i915#3555])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-4/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode:
- shard-mtlp: ([SKIP][213], [SKIP][214]) ([i915#8810]) -> ([ABORT][215], [ABORT][216]) +2 other tests ( 2 abort )
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling:
- shard-dg2: ([SKIP][217], [PASS][218]) ([i915#3555]) -> ([ABORT][219], [ABORT][220]) +1 other test ( 2 abort )
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
- shard-mtlp: ([SKIP][221], [SKIP][222]) ([i915#3555] / [i915#8813]) -> [ABORT][223] +3 other tests abort
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-5/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-mtlp: ([SKIP][224], [SKIP][225]) ([i915#3555] / [i915#8810]) -> [ABORT][226] +3 other tests abort
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
- shard-mtlp: ([SKIP][227], [SKIP][228]) ([i915#12316]) -> ([ABORT][229], [ABORT][230])
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-3/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-7/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-2/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-4/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling:
- {shard-tglu-1}: NOTRUN -> [ABORT][231] +3 other tests abort
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
Known issues
------------
Here are the changes found in Patchwork_139485v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@write:
- shard-dg2: ([PASS][232], [PASS][233]) -> [SKIP][234] ([i915#2582])
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@fbdev@write.html
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@fbdev@write.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@fbdev@write.html
* igt@gem_busy@close-race:
- shard-dg2: NOTRUN -> [FAIL][235] ([i915#12297])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@gem_busy@close-race.html
* igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-lmem0-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][236] ([i915#7297])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-lmem0-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][237] ([i915#7697])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_exec_fair@basic-pace-solo:
- shard-glk: NOTRUN -> [FAIL][238] ([i915#2842]) +1 other test fail
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/igt@gem_exec_fair@basic-pace-solo.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-rkl: ([PASS][239], [PASS][240]) -> ([FAIL][241], [FAIL][242]) ([i915#2842] / [i915#2876])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-3/igt@gem_exec_fair@basic-pace@rcs0.html
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-5/igt@gem_exec_fair@basic-pace@rcs0.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-1/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_reloc@basic-concurrent0:
- shard-dg1: NOTRUN -> [SKIP][243] ([i915#3281]) +2 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-13/igt@gem_exec_reloc@basic-concurrent0.html
* igt@gem_mmap@big-bo:
- shard-dg1: NOTRUN -> [SKIP][244] ([i915#4083]) +1 other test skip
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-13/igt@gem_mmap@big-bo.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-tglu: NOTRUN -> [SKIP][245] ([i915#4270])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_render_copy@x-tiled-to-vebox-y-tiled:
- shard-dg2: NOTRUN -> [SKIP][246] ([i915#5190] / [i915#8428])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@gem_render_copy@x-tiled-to-vebox-y-tiled.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][247] -> ([ABORT][248], [PASS][249]) ([i915#5566])
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk6/igt@gen9_exec_parse@allowed-single.html
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/igt@gen9_exec_parse@allowed-single.html
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk3/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0:
- shard-dg1: ([PASS][250], [PASS][251]) -> [FAIL][252] ([i915#3591]) +1 other test fail
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@i915_pm_rc6_residency@rc6-idle@gt0-vcs0.html
* igt@kms_addfb_basic@addfb25-4-tiled:
- shard-dg1: ([PASS][253], [PASS][254]) -> ([DMESG-WARN][255], [PASS][256]) ([i915#4423]) +1 other test ( 1 dmesg-warn, 1 pass )
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-17/igt@kms_addfb_basic@addfb25-4-tiled.html
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-19/igt@kms_addfb_basic@addfb25-4-tiled.html
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_addfb_basic@addfb25-4-tiled.html
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-18/igt@kms_addfb_basic@addfb25-4-tiled.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs:
- shard-dg2: NOTRUN -> [SKIP][257] ([i915#8709]) +11 other tests skip
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-d-hdmi-a-2-4-mc-ccs.html
* igt@kms_atomic_transition@modeset-transition-fencing:
- shard-glk: [PASS][258] -> ([PASS][259], [FAIL][260]) ([i915#12238])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing.html
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing.html
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/igt@kms_atomic_transition@modeset-transition-fencing.html
* igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs:
- shard-glk: [PASS][261] -> ([PASS][262], [FAIL][263]) ([i915#11859]) +1 other test ( 1 fail, 1 pass )
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/igt@kms_atomic_transition@modeset-transition-fencing@2x-outputs.html
* igt@kms_atomic_transition@modeset-transition-nonblocking:
- shard-glk: [PASS][264] -> ([PASS][265], [FAIL][266]) ([i915#12177])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/igt@kms_atomic_transition@modeset-transition-nonblocking.html
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/igt@kms_atomic_transition@modeset-transition-nonblocking.html
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/igt@kms_atomic_transition@modeset-transition-nonblocking.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][267] ([i915#4538] / [i915#5286]) +1 other test skip
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-13/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-tglu: NOTRUN -> [SKIP][268] ([i915#5286])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2: ([PASS][269], [PASS][270]) -> [SKIP][271] ([i915#9197]) +23 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> ([SKIP][272], [SKIP][273]) +8 other tests ( 2 skip )
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1.html
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][274] ([i915#10307] / [i915#6095]) +97 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1:
- shard-tglu: NOTRUN -> [SKIP][275] ([i915#6095]) +19 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-dg2: NOTRUN -> ([SKIP][276], [SKIP][277]) ([i915#10307] / [i915#6095]) +3 other tests ( 2 skip )
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-11/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4:
- shard-dg1: NOTRUN -> ([SKIP][278], [SKIP][279]) ([i915#6095]) +7 other tests ( 2 skip )
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-15/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4.html
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-4.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][280] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-rkl: NOTRUN -> [SKIP][281] ([i915#6095]) +23 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][282] ([i915#6095]) +48 other tests skip
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-3.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> ([SKIP][283], [SKIP][284]) ([i915#6095]) +1 other test ( 2 skip )
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-7/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1.html
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-a-hdmi-a-1.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-tglu: NOTRUN -> [SKIP][285] ([i915#7828]) +1 other test skip
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_frames@dp-crc-multiple:
- shard-dg1: NOTRUN -> [SKIP][286] ([i915#7828])
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_chamelium_frames@dp-crc-multiple.html
* igt@kms_color@degamma:
- shard-dg2: ([PASS][287], [PASS][288]) -> [SKIP][289] ([i915#5354]) +5 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_color@degamma.html
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_color@degamma.html
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_color@degamma.html
* igt@kms_content_protection@content-type-change:
- shard-dg1: NOTRUN -> [SKIP][290] ([i915#9424])
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglu: NOTRUN -> [SKIP][291] ([i915#3116] / [i915#3299])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@legacy:
- shard-tglu: NOTRUN -> [SKIP][292] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_content_protection@legacy.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-glk: NOTRUN -> [SKIP][293] +93 other tests skip
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-tglu: NOTRUN -> [SKIP][294] ([i915#11453])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic:
- shard-dg2: NOTRUN -> [SKIP][295] ([i915#9197]) +3 other tests skip
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_cursor_legacy@cursora-vs-flipa-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][296] -> ([PASS][297], [FAIL][298]) ([i915#2346])
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_dsc@dsc-with-formats:
- shard-tglu: NOTRUN -> [SKIP][299] ([i915#3555] / [i915#3840])
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_dsc@dsc-with-formats.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-tglu: NOTRUN -> [SKIP][300] ([i915#3637] / [i915#3966])
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1:
- shard-snb: ([PASS][301], [PASS][302]) -> ([DMESG-WARN][303], [PASS][304]) ([i915#11922])
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb6/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb5/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb6/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb5/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-snb: ([PASS][305], [PASS][306]) -> [FAIL][307] ([i915#2122]) +1 other test fail
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb4/igt@kms_flip@2x-wf_vblank-ts-check.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb1/igt@kms_flip@2x-wf_vblank-ts-check.html
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb5/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a2:
- shard-rkl: NOTRUN -> [FAIL][308] ([i915#11961])
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend@a-hdmi-a2:
- shard-glk: [PASS][309] -> ([PASS][310], [INCOMPLETE][311]) ([i915#4839])
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk1/igt@kms_flip@flip-vs-suspend@a-hdmi-a2.html
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/igt@kms_flip@flip-vs-suspend@a-hdmi-a2.html
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk9/igt@kms_flip@flip-vs-suspend@a-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend@b-hdmi-a2:
- shard-glk: NOTRUN -> [INCOMPLETE][312] ([i915#4839])
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/igt@kms_flip@flip-vs-suspend@b-hdmi-a2.html
* igt@kms_flip@flip-vs-wf_vblank-interruptible:
- shard-dg2: ([PASS][313], [PASS][314]) -> ([PASS][315], [SKIP][316]) ([i915#5354]) +3 other tests ( 1 pass, 1 skip )
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-7/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
- shard-dg1: ([PASS][317], [PASS][318]) -> ([FAIL][319], [PASS][320]) ([i915#2122])
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-16/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-19/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-12/igt@kms_flip@flip-vs-wf_vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling:
- shard-tglu: NOTRUN -> [SKIP][321] ([i915#2672] / [i915#3555]) +1 other test skip
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-tglu: NOTRUN -> [SKIP][322] ([i915#2587] / [i915#2672]) +1 other test skip
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][323] ([i915#5354]) +1 other test skip
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-rte:
- shard-dg1: NOTRUN -> [SKIP][324] +4 other tests skip
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-2p-rte.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen:
- shard-tglu: NOTRUN -> [SKIP][325] +20 other tests skip
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite:
- shard-dg1: NOTRUN -> [SKIP][326] ([i915#3458])
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt:
- shard-dg1: NOTRUN -> [SKIP][327] ([i915#8708])
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-tglu: NOTRUN -> [SKIP][328] ([i915#3555] / [i915#8228])
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_invalid_mode@bad-htotal:
- shard-dg2: ([PASS][329], [PASS][330]) -> [SKIP][331] ([i915#3555])
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_invalid_mode@bad-htotal.html
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_invalid_mode@bad-htotal.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_invalid_mode@bad-htotal.html
* igt@kms_invalid_mode@int-max-clock:
- shard-dg2: ([PASS][332], [PASS][333]) -> ([PASS][334], [SKIP][335]) ([i915#3555])
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-4/igt@kms_invalid_mode@int-max-clock.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_invalid_mode@int-max-clock.html
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-11/igt@kms_invalid_mode@int-max-clock.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_invalid_mode@int-max-clock.html
* igt@kms_panel_fitting@legacy:
- shard-tglu: NOTRUN -> [SKIP][336] ([i915#6301])
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_panel_fitting@legacy.html
* igt@kms_plane@pixel-format@pipe-a-plane-3:
- shard-mtlp: ([PASS][337], [PASS][338]) -> [DMESG-WARN][339] ([i915#1982])
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-5/igt@kms_plane@pixel-format@pipe-a-plane-3.html
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@kms_plane@pixel-format@pipe-a-plane-3.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-7/igt@kms_plane@pixel-format@pipe-a-plane-3.html
* igt@kms_plane_alpha_blend@alpha-transparent-fb:
- shard-dg2: ([PASS][340], [PASS][341]) -> [SKIP][342] ([i915#7294])
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_alpha_blend@alpha-transparent-fb.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_plane_alpha_blend@alpha-transparent-fb.html
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_alpha_blend@alpha-transparent-fb.html
* igt@kms_plane_alpha_blend@constant-alpha-max:
- shard-dg2: ([PASS][343], [PASS][344]) -> ([PASS][345], [SKIP][346]) ([i915#7294]) +2 other tests ( 1 pass, 1 skip )
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-8/igt@kms_plane_alpha_blend@constant-alpha-max.html
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_plane_alpha_blend@constant-alpha-max.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_plane_alpha_blend@constant-alpha-max.html
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_alpha_blend@constant-alpha-max.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c:
- shard-tglu: NOTRUN -> [SKIP][347] ([i915#12247]) +9 other tests skip
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers:
- shard-dg2: ([PASS][348], [PASS][349]) -> ([PASS][350], [SKIP][351]) ([i915#8152] / [i915#9423]) +1 other test ( 1 pass, 1 skip )
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-7/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-d:
- shard-dg2: ([PASS][352], [PASS][353]) -> ([SKIP][354], [PASS][355]) ([i915#8152]) +1 other test ( 1 pass, 1 skip )
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-d.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-d.html
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-d.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-7/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers@pipe-d.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-pixel-format:
- shard-dg2: NOTRUN -> [SKIP][356] ([i915#8152] / [i915#9423])
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-pixel-format.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-pixel-format@pipe-b:
- shard-dg2: NOTRUN -> [SKIP][357] ([i915#12247]) +2 other tests skip
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-pixel-format@pipe-b.html
* igt@kms_plane_scaling@plane-upscale-factor-0-25-with-pixel-format@pipe-d:
- shard-dg2: NOTRUN -> [SKIP][358] ([i915#8152])
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-pixel-format@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5:
- shard-dg2: ([PASS][359], [PASS][360]) -> [SKIP][361] ([i915#12247] / [i915#6953] / [i915#8152] / [i915#9423])
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_plane_scaling@planes-downscale-factor-0-5.html
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@planes-downscale-factor-0-5.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-5.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-a:
- shard-dg2: ([PASS][362], [PASS][363]) -> ([SKIP][364], [PASS][365]) ([i915#12247]) +11 other tests ( 1 pass, 1 skip )
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-8/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-a.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-a.html
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-a.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_plane_scaling@planes-downscale-factor-0-5-upscale-factor-0-25@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a:
- shard-dg2: ([PASS][366], [PASS][367]) -> [SKIP][368] ([i915#12247]) +2 other tests skip
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a.html
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d:
- shard-dg2: ([PASS][369], [PASS][370]) -> [SKIP][371] ([i915#12247] / [i915#8152])
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d.html
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25:
- shard-dg2: ([PASS][372], [PASS][373]) -> ([SKIP][374], [PASS][375]) ([i915#6953] / [i915#8152] / [i915#9423]) +1 other test ( 1 pass, 1 skip )
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25@pipe-d:
- shard-dg2: ([PASS][376], [PASS][377]) -> ([PASS][378], [SKIP][379]) ([i915#12247] / [i915#8152]) +1 other test ( 1 pass, 1 skip )
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25@pipe-d.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25@pipe-d.html
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25@pipe-d.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_plane_scaling@planes-downscale-factor-0-75-upscale-factor-0-25@pipe-d.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-tglu: NOTRUN -> [SKIP][380] ([i915#9685])
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_rpm@cursor:
- shard-dg2: ([PASS][381], [PASS][382]) -> [SKIP][383] ([i915#1849])
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_pm_rpm@cursor.html
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_pm_rpm@cursor.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_pm_rpm@cursor.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-tglu: NOTRUN -> [SKIP][384] ([i915#6524])
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_properties@plane-properties-atomic:
- shard-dg2: ([PASS][385], [PASS][386]) -> ([SKIP][387], [PASS][388]) ([i915#11521]) +1 other test ( 1 pass, 1 skip )
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-11/igt@kms_properties@plane-properties-atomic.html
[386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-4/igt@kms_properties@plane-properties-atomic.html
[387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_properties@plane-properties-atomic.html
[388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-11/igt@kms_properties@plane-properties-atomic.html
* igt@kms_properties@plane-properties-legacy:
- shard-dg2: ([PASS][389], [PASS][390]) -> [SKIP][391] ([i915#11521])
[389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-1/igt@kms_properties@plane-properties-legacy.html
[390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_properties@plane-properties-legacy.html
[391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_properties@plane-properties-legacy.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-tglu: NOTRUN -> [SKIP][392] ([i915#11520]) +1 other test skip
[392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-glk: NOTRUN -> [SKIP][393] ([i915#11520]) +1 other test skip
[393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk5/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-tglu: NOTRUN -> [SKIP][394] ([i915#9683])
[394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-psr-sprite-plane-move:
- shard-dg1: NOTRUN -> [SKIP][395] ([i915#1072] / [i915#9732]) +1 other test skip
[395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-16/igt@kms_psr@fbc-psr-sprite-plane-move.html
* igt@kms_psr@psr-no-drrs:
- shard-tglu: NOTRUN -> [SKIP][396] ([i915#9732]) +3 other tests skip
[396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_psr@psr-no-drrs.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-tglu: NOTRUN -> [SKIP][397] ([i915#3555])
[397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing:
- shard-dg2: NOTRUN -> [SKIP][398] ([i915#3555])
[398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-tglu: NOTRUN -> [SKIP][399] ([i915#8623])
[399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vblank@ts-continuation-modeset:
- shard-dg2: ([PASS][400], [PASS][401]) -> ([PASS][402], [SKIP][403]) ([i915#9197]) +23 other tests ( 1 pass, 1 skip )
[400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-8/igt@kms_vblank@ts-continuation-modeset.html
[401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_vblank@ts-continuation-modeset.html
[402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_vblank@ts-continuation-modeset.html
[403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@kms_vblank@ts-continuation-modeset.html
* igt@kms_vrr@flip-basic-fastset:
- shard-tglu: NOTRUN -> [SKIP][404] ([i915#9906])
[404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_writeback@writeback-check-output-xrgb2101010:
- shard-glk: NOTRUN -> [SKIP][405] ([i915#2437])
[405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/igt@kms_writeback@writeback-check-output-xrgb2101010.html
* igt@perf@gen12-group-concurrent-oa-buffer-read:
- shard-rkl: ([PASS][406], [PASS][407]) -> ([PASS][408], [FAIL][409]) ([i915#10538])
[406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-3/igt@perf@gen12-group-concurrent-oa-buffer-read.html
[407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-6/igt@perf@gen12-group-concurrent-oa-buffer-read.html
[408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-1/igt@perf@gen12-group-concurrent-oa-buffer-read.html
[409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-5/igt@perf@gen12-group-concurrent-oa-buffer-read.html
* igt@perf_pmu@event-wait@rcs0:
- shard-dg2: NOTRUN -> [SKIP][410] +1 other test skip
[410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@perf_pmu@event-wait@rcs0.html
* igt@syncobj_timeline@invalid-wait-zero-handles:
- shard-glk: NOTRUN -> [FAIL][411] ([i915#9781])
[411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/igt@syncobj_timeline@invalid-wait-zero-handles.html
#### Possible fixes ####
* igt@fbdev@read:
- shard-dg2: ([PASS][412], [SKIP][413]) ([i915#2582]) -> ([PASS][414], [PASS][415])
[412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@fbdev@read.html
[413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@fbdev@read.html
[414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@fbdev@read.html
[415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@fbdev@read.html
* igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0:
- shard-dg2: ([INCOMPLETE][416], [INCOMPLETE][417]) ([i915#7297]) -> [PASS][418]
[416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html
[417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html
[418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-2/igt@gem_ccs@suspend-resume@xmajor-compressed-compfmt0-smem-lmem0.html
* igt@gem_ctx_engines@invalid-engines:
- shard-tglu: ([PASS][419], [FAIL][420]) ([i915#12027]) -> [PASS][421]
[419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-9/igt@gem_ctx_engines@invalid-engines.html
[420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-8/igt@gem_ctx_engines@invalid-engines.html
[421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@gem_ctx_engines@invalid-engines.html
- shard-mtlp: ([FAIL][422], [PASS][423]) ([i915#12027]) -> ([PASS][424], [PASS][425])
[422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@gem_ctx_engines@invalid-engines.html
[423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-7/igt@gem_ctx_engines@invalid-engines.html
[424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-4/igt@gem_ctx_engines@invalid-engines.html
[425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-7/igt@gem_ctx_engines@invalid-engines.html
* igt@gem_ctx_persistence@hostile:
- shard-tglu: [FAIL][426] ([i915#11980]) -> [PASS][427]
[426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-4/igt@gem_ctx_persistence@hostile.html
[427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-3/igt@gem_ctx_persistence@hostile.html
* igt@gem_exec_fair@basic-deadline:
- shard-rkl: [FAIL][428] ([i915#2846]) -> [PASS][429]
[428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
[429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-2/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][430] ([i915#2842]) -> ([PASS][431], [PASS][432]) +1 other test ( 2 pass )
[430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
[431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
[432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-rkl: ([FAIL][433], [PASS][434]) ([i915#2842]) -> [PASS][435] +1 other test pass
[433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-1/igt@gem_exec_fair@basic-pace-share@rcs0.html
[435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-1/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-tglu: ([FAIL][436], [PASS][437]) ([i915#2842]) -> [PASS][438] +1 other test pass
[436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-9/igt@gem_exec_fair@basic-pace-share@rcs0.html
[437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-7/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@i915_pm_rps@reset:
- shard-snb: ([PASS][439], [INCOMPLETE][440]) ([i915#7790]) -> ([PASS][441], [PASS][442])
[439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb6/igt@i915_pm_rps@reset.html
[440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb2/igt@i915_pm_rps@reset.html
[441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb1/igt@i915_pm_rps@reset.html
[442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb5/igt@i915_pm_rps@reset.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-tglu: ([PASS][443], [FAIL][444]) ([i915#10991]) -> [PASS][445] +1 other test pass
[443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-6/igt@kms_async_flips@alternate-sync-async-flip.html
[444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-3/igt@kms_async_flips@alternate-sync-async-flip.html
[445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_atomic_transition@modeset-transition-nonblocking-fencing:
- shard-glk: [FAIL][446] ([i915#12238]) -> [PASS][447]
[446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk8/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html
[447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing.html
* igt@kms_atomic_transition@modeset-transition-nonblocking-fencing@2x-outputs:
- shard-glk: [FAIL][448] ([i915#11859]) -> [PASS][449]
[448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk8/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing@2x-outputs.html
[449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk4/igt@kms_atomic_transition@modeset-transition-nonblocking-fencing@2x-outputs.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-mtlp: ([PASS][450], [FAIL][451]) ([i915#5138]) -> [PASS][452]
[450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-snb: [SKIP][453] -> [PASS][454]
[453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb7/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
[454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb2/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk: [FAIL][455] ([i915#2346]) -> ([PASS][456], [PASS][457])
[455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[457]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-snb: [FAIL][458] -> [PASS][459]
[458]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[459]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb2/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
- shard-mtlp: ([FAIL][460], [PASS][461]) ([i915#2346]) -> ([PASS][462], [PASS][463])
[460]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-8/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[462]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-4/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[463]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-glk: [FAIL][464] ([i915#2122]) -> ([PASS][465], [PASS][466]) +1 other test ( 2 pass )
[464]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-glk9/igt@kms_flip@2x-plain-flip-fb-recreate.html
[465]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk2/igt@kms_flip@2x-plain-flip-fb-recreate.html
[466]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-glk7/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@dpms-off-confusion-interruptible:
- shard-dg2: ([SKIP][467], [PASS][468]) ([i915#5354]) -> ([PASS][469], [PASS][470]) +7 other tests ( 2 pass )
[467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_flip@dpms-off-confusion-interruptible.html
[468]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_flip@dpms-off-confusion-interruptible.html
[469]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_flip@dpms-off-confusion-interruptible.html
[470]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_flip@dpms-off-confusion-interruptible.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1:
- shard-mtlp: ([FAIL][471], [PASS][472]) ([i915#2122]) -> ([PASS][473], [PASS][474])
[471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1.html
[472]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-5/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1.html
[473]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1.html
[474]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-8/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@b-edp1.html
* igt@kms_flip@plain-flip-ts-check@d-hdmi-a1:
- shard-tglu: ([PASS][475], [FAIL][476]) ([i915#2122]) -> [PASS][477] +8 other tests pass
[475]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-8/igt@kms_flip@plain-flip-ts-check@d-hdmi-a1.html
[476]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-9/igt@kms_flip@plain-flip-ts-check@d-hdmi-a1.html
[477]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-4/igt@kms_flip@plain-flip-ts-check@d-hdmi-a1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render:
- shard-dg1: ([DMESG-WARN][478], [PASS][479]) ([i915#1982] / [i915#4391] / [i915#4423]) -> [PASS][480]
[478]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
[479]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg1-13/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
[480]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
- shard-snb: ([SKIP][481], [SKIP][482]) -> [PASS][483] +1 other test pass
[481]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
[482]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
[483]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-snb: ([SKIP][484], [PASS][485]) -> ([PASS][486], [PASS][487]) +1 other test ( 2 pass )
[484]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
[485]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-snb7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
[486]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
[487]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_invalid_mode@bad-hsync-end:
- shard-dg2: ([SKIP][488], [PASS][489]) ([i915#3555]) -> ([PASS][490], [PASS][491]) +1 other test ( 2 pass )
[488]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_invalid_mode@bad-hsync-end.html
[489]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_invalid_mode@bad-hsync-end.html
[490]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_invalid_mode@bad-hsync-end.html
[491]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_invalid_mode@bad-hsync-end.html
* igt@kms_plane@planar-pixel-format-settings:
- shard-dg2: ([PASS][492], [SKIP][493]) ([i915#9581]) -> ([PASS][494], [PASS][495])
[492]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane@planar-pixel-format-settings.html
[493]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane@planar-pixel-format-settings.html
[494]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@kms_plane@planar-pixel-format-settings.html
[495]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_plane@planar-pixel-format-settings.html
* igt@kms_plane@plane-panning-bottom-right:
- shard-dg2: ([SKIP][496], [PASS][497]) ([i915#8825]) -> ([PASS][498], [PASS][499])
[496]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane@plane-panning-bottom-right.html
[497]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-7/igt@kms_plane@plane-panning-bottom-right.html
[498]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-10/igt@kms_plane@plane-panning-bottom-right.html
[499]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-8/igt@kms_plane@plane-panning-bottom-right.html
* igt@kms_plane_alpha_blend@alpha-basic:
- shard-dg2: ([SKIP][500], [PASS][501]) ([i915#7294]) -> ([PASS][502], [PASS][503])
[500]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane_alpha_blend@alpha-basic.html
[501]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_alpha_blend@alpha-basic.html
[502]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_plane_alpha_blend@alpha-basic.html
[503]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@kms_plane_alpha_blend@alpha-basic.html
* igt@kms_plane_scaling@planes-upscale-20x20:
- shard-dg2: ([SKIP][504], [PASS][505]) ([i915#6953] / [i915#8152] / [i915#9423]) -> ([PASS][506], [PASS][507])
[504]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20.html
[505]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20.html
[506]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_plane_scaling@planes-upscale-20x20.html
[507]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-20x20.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
- shard-dg2: ([PASS][508], [SKIP][509]) ([i915#12247] / [i915#3555] / [i915#6953] / [i915#8152] / [i915#9423]) -> ([PASS][510], [PASS][511])
[508]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
[509]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
[510]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
[511]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d:
- shard-dg2: ([PASS][512], [SKIP][513]) ([i915#12247] / [i915#8152]) -> ([PASS][514], [PASS][515])
[512]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d.html
[513]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d.html
[514]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d.html
[515]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-d.html
* igt@kms_plane_scaling@planes-upscale-20x20@pipe-b:
- shard-dg2: ([PASS][516], [SKIP][517]) ([i915#12247]) -> ([PASS][518], [PASS][519]) +5 other tests ( 2 pass )
[516]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20@pipe-b.html
[517]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20@pipe-b.html
[518]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_plane_scaling@planes-upscale-20x20@pipe-b.html
[519]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-20x20@pipe-b.html
* igt@kms_plane_scaling@planes-upscale-20x20@pipe-d:
- shard-dg2: ([PASS][520], [SKIP][521]) ([i915#8152]) -> ([PASS][522], [PASS][523])
[520]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-3/igt@kms_plane_scaling@planes-upscale-20x20@pipe-d.html
[521]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_plane_scaling@planes-upscale-20x20@pipe-d.html
[522]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-20x20@pipe-d.html
[523]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-4/igt@kms_plane_scaling@planes-upscale-20x20@pipe-d.html
* igt@kms_pm_dc@dc6-dpms:
- shard-tglu: ([PASS][524], [FAIL][525]) ([i915#9295]) -> [PASS][526]
[524]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-10/igt@kms_pm_dc@dc6-dpms.html
[525]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-7/igt@kms_pm_dc@dc6-dpms.html
[526]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-2/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc9-dpms:
- shard-tglu: ([SKIP][527], [PASS][528]) ([i915#4281]) -> [PASS][529]
[527]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-8/igt@kms_pm_dc@dc9-dpms.html
[528]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-tglu-5/igt@kms_pm_dc@dc9-dpms.html
[529]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-tglu-5/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-rkl: ([PASS][530], [SKIP][531]) ([i915#9519]) -> [PASS][532]
[530]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-2/igt@kms_pm_rpm@dpms-lpsp.html
[531]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html
[532]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-rkl-4/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-dg2: ([SKIP][533], [PASS][534]) ([i915#9519]) -> ([PASS][535], [PASS][536]) +2 other tests ( 2 pass )
[533]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[534]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[535]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[536]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_universal_plane@cursor-fb-leak:
- shard-mtlp: ([PASS][537], [FAIL][538]) ([i915#9196]) -> ([PASS][539], [PASS][540]) +1 other test ( 2 pass )
[537]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-2/igt@kms_universal_plane@cursor-fb-leak.html
[538]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak.html
[539]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak.html
[540]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-mtlp-6/igt@kms_universal_plane@cursor-fb-leak.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-dg2: ([SKIP][541], [PASS][542]) ([i915#9197]) -> ([PASS][543], [PASS][544]) +24 other tests ( 2 pass )
[541]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
[542]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15478/shard-dg2-6/igt@kms_vblank@ts-continuation-dpms-suspend.html
[543]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-3/igt@kms_vblank@ts-continuation-dpms-suspend.html
[544]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/shard-dg2-5/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@pe
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139485v1/index.html
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Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
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2024-10-03 9:03 [PATCH] drm/i915/icl: Update csc and gamma enable checks Sai Teja Pottumuttu
2024-10-03 9:58 ` ✓ Fi.CI.BAT: success for " Patchwork
2024-10-03 10:46 ` [PATCH] " Jani Nikula
2024-10-03 11:10 ` Ville Syrjälä
2024-10-03 14:22 ` Matt Roper
2024-10-03 14:32 ` Ville Syrjälä
2024-10-03 14:58 ` Ville Syrjälä
2024-10-03 15:38 ` Pottumuttu, Sai Teja
2024-10-03 15:46 ` Ville Syrjälä
2024-10-03 15:56 ` Pottumuttu, Sai Teja
2024-10-03 16:02 ` Jani Nikula
2024-10-03 16:05 ` Matt Roper
2024-10-03 16:12 ` Ville Syrjälä
2024-10-03 16:20 ` Matt Roper
2024-10-03 16:43 ` Ville Syrjälä
2024-10-07 19:33 ` ✗ Fi.CI.IGT: failure for " Patchwork
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