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* [PATCH 00/17] Account for DSC bubble overhead for horizontal slices
@ 2026-01-30  8:17 Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 01/17] drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid Ankit Nautiyal
                   ` (18 more replies)
  0 siblings, 19 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:17 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

When DSC is enabled on a pipe, the pipe pixel rate input to cdclk frequency
and pipe joiner calculations needs to be adjusted to account for
compression overhead: specifically, the "bubbles" added at each horizontal
slice boundary. This overhead has always existed, even on earlier
platforms, but was not previously accounted for.

Currently, the number of joined pipes is computed much earlier than the
decision to use DSC: both during the mode_valid phase for each mode and in
the compute_config phase for a given mode. As a result, the DSC bubble
overhead cannot be considered when determining the number of pipes to join,
which may lead to incorrect configurations.

This series refactors the sequence of steps used to determine the number of
pipes to be joined and the DSC policy. The first few patches restructure
the mode_valid and compute config logic to make room for DSC bubble
overhead accounting. With these, we iterate over joiner candidates and
select the minimal joiner configuration that satisfies the
mode-requirements. The later patches introduce the actual overhead
adjustment and use it for: the minimum cdclk requirements with DSC,
SST mode_valid logic, and SST/MST compute_config logic.

Rev 2:
 - Refactor joiner computation for compute config.
 - Refactor DSC BW calculation.
 - Add overhead for SST/MST compute config phase for recomputing joiner
   requirements for DSC.
 - NOTE:
   - For Patch#7 (drm/i915/dp: Rework pipe joiner logic in mode_valid)
     git diff = --patience is used for better readability.

Rev 3:
 - Use diff = --patience in format-patch for better readability.
 - Add a macro to iterate over the joiner candidates.
 - Add a separate helper to check pixel rate against dotclock limit.
 - Add patch from Chaitanya for additional platform specific
   limitations [1].

[1] https://patchwork.freedesktop.org/patch/661952/?series=151047&rev=1

Rev 4:
 - Address review comments from Jani and Imre.
 - Drop enum for joiner candidates and iterate over num of pipes joined.
 - Rename some of the helpers.
 - Split the patch to check for pixel limit for max uncompressed
   dotclock into PTL and other platforms. For PTL the bspec and HSDES
   matches, but for other platforms need to confirm the need for the
   limits.

Rev 5:
 - Address comments from Imre.
 - Add a patch to remove joiner helpers that are no longer required.
 - Dropped the patch to replace the joiner loops with an iterator; will
   follow up this separately.
 - Modified the patch to enforce pixel limit for max uncomprssed
   dotclock for pre PTL platforms, and added the limit only for WCL.
   Limits for prior platforms is intentionally left to avoid regression
   on these platforms and deal with them if there are actual issues
   reported.
 - Use diff = --histogram as its seen to work better for this series as
   also suggested by Imre.

Rev 6:
 - Address comments from Imre.
 - Re-add the patch to replace the joiner loops with iterator; [credits to
   Imre to figure it out and for the suggested changes.]

Ankit Nautiyal (15):
  drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid
  drm/i915/dp: Move num_joined_pipes and related checks together
  drm/i915/dp: Extract helper to get the hdisplay limit
  drm/i915/dp: Rework pipe joiner logic in mode_valid
  drm/i915/dp: Rework pipe joiner logic in compute_config
  drm/i915/dp_mst: Move the check for dotclock at the end
  drm/i915/dp_mst: Move the joiner dependent code together
  drm/i915/dp_mst: Rework pipe joiner logic in mode_valid
  drm/i915/dp_mst: Extract helper to compute link for given joiner
    config
  drm/i915/dp_mst: Rework pipe joiner logic in compute_config
  drm/i915/dp: Remove unused joiner helpers
  drm/i915/dp: Introduce helper to check pixel rate against dotclock
    limits
  drm/i915/dp: Refactor dsc_slice_count handling in
    intel_dp_mode_valid()
  drm/i915/dp: Account for DSC slice overhead
  drm/i915/dp: Add helpers for joiner candidate loops

Chaitanya Kumar Borah (2):
  drm/i915/display: Add upper limit check for pixel clock
  drm/i915/display: Extend the max dotclock limit to WCL

 drivers/gpu/drm/i915/display/intel_display.c |  19 ++
 drivers/gpu/drm/i915/display/intel_display.h |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c      | 312 ++++++++++++-------
 drivers/gpu/drm/i915/display/intel_dp.h      |  19 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c  | 186 +++++++----
 drivers/gpu/drm/i915/display/intel_vdsc.c    |   1 -
 drivers/gpu/drm/i915/display/intel_vdsc.h    |   3 +
 7 files changed, 367 insertions(+), 174 deletions(-)

-- 
2.45.2


^ permalink raw reply	[flat|nested] 27+ messages in thread

* [PATCH 01/17] drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
@ 2026-01-30  8:17 ` Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 02/17] drm/i915/dp: Move num_joined_pipes and related checks together Ankit Nautiyal
                   ` (17 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:17 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Move check for bad hdisplay early as it is independent on other checks.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79fd3b8d8b25..126da297efc5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1460,6 +1460,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	if (mode->clock < 10000)
 		return MODE_CLOCK_LOW;
 
+	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
+		return MODE_H_ILLEGAL;
+
 	fixed_mode = intel_panel_fixed_mode(connector, mode);
 	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
 		status = intel_panel_mode_valid(connector, mode);
@@ -1483,9 +1486,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	if (target_clock > max_dotclk)
 		return MODE_CLOCK_HIGH;
 
-	if (intel_dp_hdisplay_bad(display, mode->hdisplay))
-		return MODE_H_ILLEGAL;
-
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
 	max_lanes = intel_dp_max_lane_count(intel_dp);
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 02/17] drm/i915/dp: Move num_joined_pipes and related checks together
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 01/17] drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid Ankit Nautiyal
@ 2026-01-30  8:17 ` Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 03/17] drm/i915/dp: Extract helper to get the hdisplay limit Ankit Nautiyal
                   ` (16 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:17 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Move the calculation of `num_joined_pipes` and other constraints that
depend on it, into a single block.
This groups all joiner-dependent logic together, preparing the code for a
future loop-based evaluation of multiple joiner configurations.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 32 ++++++++++++-------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 126da297efc5..c0a8ffac6312 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1472,20 +1472,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 		target_clock = fixed_mode->clock;
 	}
 
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     mode->hdisplay, target_clock);
-	max_dotclk *= num_joined_pipes;
-
 	sink_format = intel_dp_sink_format(connector, mode);
 	output_format = intel_dp_output_format(connector, sink_format);
 
-	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
-	if (status != MODE_OK)
-		return status;
-
-	if (target_clock > max_dotclk)
-		return MODE_CLOCK_HIGH;
-
 	max_link_clock = intel_dp_max_link_rate(intel_dp);
 	max_lanes = intel_dp_max_lane_count(intel_dp);
 
@@ -1496,6 +1485,17 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 					   target_clock, mode->hdisplay,
 					   link_bpp_x16, 0);
 
+	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
+						     mode->hdisplay, target_clock);
+	max_dotclk *= num_joined_pipes;
+
+	if (target_clock > max_dotclk)
+		return MODE_CLOCK_HIGH;
+
+	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
+	if (status != MODE_OK)
+		return status;
+
 	if (intel_dp_has_dsc(connector)) {
 		int pipe_bpp;
 
@@ -1538,14 +1538,14 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
 		return MODE_CLOCK_HIGH;
 
-	if (mode_rate > max_rate && !dsc)
-		return MODE_CLOCK_HIGH;
-
-	status = intel_dp_mode_valid_downstream(connector, mode, target_clock);
+	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
 	if (status != MODE_OK)
 		return status;
 
-	return intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
+	if (mode_rate > max_rate && !dsc)
+		return MODE_CLOCK_HIGH;
+
+	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
 }
 
 bool intel_dp_source_supports_tps3(struct intel_display *display)
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 03/17] drm/i915/dp: Extract helper to get the hdisplay limit
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 01/17] drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 02/17] drm/i915/dp: Move num_joined_pipes and related checks together Ankit Nautiyal
@ 2026-01-30  8:17 ` Ankit Nautiyal
  2026-01-30  8:17 ` [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid Ankit Nautiyal
                   ` (15 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:17 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Separate out function to get the hdisplay limit for a given platform.

v2: Rename the helper to intel_dp_max_hdisplay_per_pipe(). (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c0a8ffac6312..4c3a1b6d0015 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1371,6 +1371,12 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	return MODE_OK;
 }
 
+static
+int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
+{
+	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
+}
+
 static
 bool intel_dp_needs_joiner(struct intel_dp *intel_dp,
 			   struct intel_connector *connector,
@@ -1378,17 +1384,14 @@ bool intel_dp_needs_joiner(struct intel_dp *intel_dp,
 			   int num_joined_pipes)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
-	int hdisplay_limit;
 
 	if (!intel_dp_has_joiner(intel_dp))
 		return false;
 
 	num_joined_pipes /= 2;
 
-	hdisplay_limit = DISPLAY_VER(display) >= 30 ? 6144 : 5120;
-
 	return clock > num_joined_pipes * display->cdclk.max_dotclk_freq ||
-	       hdisplay > num_joined_pipes * hdisplay_limit;
+	       hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display);
 }
 
 int intel_dp_num_joined_pipes(struct intel_dp *intel_dp,
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (2 preceding siblings ...)
  2026-01-30  8:17 ` [PATCH 03/17] drm/i915/dp: Extract helper to get the hdisplay limit Ankit Nautiyal
@ 2026-01-30  8:17 ` Ankit Nautiyal
  2026-02-02  8:40   ` Imre Deak
  2026-01-30  8:18 ` [PATCH 05/17] drm/i915/dp: Rework pipe joiner logic in compute_config Ankit Nautiyal
                   ` (14 subsequent siblings)
  18 siblings, 1 reply; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:17 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Currently in intel_dp_mode_valid(), we compute the number of joined pipes
required before deciding whether DSC is needed. This ordering prevents us
from accounting for DSC-related overhead when determining pipe
requirements.

It is not possible to first decide whether DSC is needed and then compute
the required number of joined pipes, because the two depend on each other:

 - DSC need is a function of the pipe count (e.g., 4‑pipe always requires
   DSC; 2‑pipe may require it if uncompressed joiner is unavailable).

 - Whether a given pipe‑join configuration is sufficient depends on
   effective bandwidth, which itself changes when DSC is used.

As a result, the only correct approach is to iterate candidate pipe counts.

So, refactor the logic to start with a single pipe and incrementally try
additional pipes only if needed. While DSC overhead is not yet computed
here, this restructuring prepares the code to support that in a follow-up
changes.

If a forced joiner configuration is present, we just check for that
configuration. If it fails, we bailout and return instead of trying with
other joiner configurations.

v2:
 - Iterate over number of pipes to be joined instead of joiner
   candidates. (Jani)
 - Document the rationale of iterating over number of joined pipes.
   (Imre)
v3:
 - In case the force joiner configuration doesn't work, do not fallback
   to the normal routine, bailout instead of trying other joiner
   configurations. (Imre)
v4:
 - Use num_joined_pipes instead of num_pipes. (Imre)
 - Inititialize status before the loops starts. (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 135 ++++++++++++++++--------
 1 file changed, 89 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4c3a1b6d0015..dbe63efc1694 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1434,6 +1434,23 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
 	return true;
 }
 
+static
+bool intel_dp_can_join(struct intel_display *display,
+		       int num_joined_pipes)
+{
+	switch (num_joined_pipes) {
+	case 1:
+		return true;
+	case 2:
+		return HAS_BIGJOINER(display) ||
+		       HAS_UNCOMPRESSED_JOINER(display);
+	case 4:
+		return HAS_ULTRAJOINER(display);
+	default:
+		return false;
+	}
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid(struct drm_connector *_connector,
 		    const struct drm_display_mode *mode)
@@ -1445,7 +1462,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	const struct drm_display_mode *fixed_mode;
 	int target_clock = mode->clock;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
-	int max_dotclk = display->cdclk.max_dotclk_freq;
 	u16 dsc_max_compressed_bpp = 0;
 	u8 dsc_slice_count = 0;
 	enum drm_mode_status status;
@@ -1488,66 +1504,93 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 					   target_clock, mode->hdisplay,
 					   link_bpp_x16, 0);
 
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     mode->hdisplay, target_clock);
-	max_dotclk *= num_joined_pipes;
+	/*
+	 * We cannot determine the required pipe‑join count before knowing whether
+	 * DSC is needed, nor can we determine DSC need without knowing the pipe
+	 * count.
+	 * Because of this dependency cycle, the only correct approach is to iterate
+	 * over candidate pipe counts and evaluate each combination.
+	 */
+	status = MODE_CLOCK_HIGH;
+	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		int max_dotclk = display->cdclk.max_dotclk_freq;
 
-	if (target_clock > max_dotclk)
-		return MODE_CLOCK_HIGH;
+		if (connector->force_joined_pipes &&
+		    num_joined_pipes != connector->force_joined_pipes)
+			continue;
 
-	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
-	if (status != MODE_OK)
-		return status;
+		if (!intel_dp_can_join(display, num_joined_pipes))
+			continue;
 
-	if (intel_dp_has_dsc(connector)) {
-		int pipe_bpp;
+		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
+			continue;
 
-		/*
-		 * TBD pass the connector BPC,
-		 * for now U8_MAX so that max BPC on that platform would be picked
-		 */
-		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
+		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
+		if (status != MODE_OK)
+			continue;
 
-		/*
-		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
-		 * integer value since we support only integer values of bpp.
-		 */
-		if (intel_dp_is_edp(intel_dp)) {
-			dsc_max_compressed_bpp =
-				drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
+		if (intel_dp_has_dsc(connector)) {
+			int pipe_bpp;
 
-			dsc_slice_count =
-				intel_dp_dsc_get_slice_count(connector,
-							     target_clock,
-							     mode->hdisplay,
-							     num_joined_pipes);
+			/*
+			 * TBD pass the connector BPC,
+			 * for now U8_MAX so that max BPC on that platform would be picked
+			 */
+			pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
 
-			dsc = dsc_max_compressed_bpp && dsc_slice_count;
-		} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
-			unsigned long bw_overhead_flags = 0;
+			/*
+			 * Output bpp is stored in 6.4 format so right shift by 4 to get the
+			 * integer value since we support only integer values of bpp.
+			 */
+			if (intel_dp_is_edp(intel_dp)) {
+				dsc_max_compressed_bpp =
+					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
 
-			if (!drm_dp_is_uhbr_rate(max_link_clock))
-				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
+				dsc_slice_count =
+					intel_dp_dsc_get_slice_count(connector,
+								     target_clock,
+								     mode->hdisplay,
+								     num_joined_pipes);
 
-			dsc = intel_dp_mode_valid_with_dsc(connector,
-							   max_link_clock, max_lanes,
-							   target_clock, mode->hdisplay,
-							   num_joined_pipes,
-							   output_format, pipe_bpp,
-							   bw_overhead_flags);
+				dsc = dsc_max_compressed_bpp && dsc_slice_count;
+			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
+				unsigned long bw_overhead_flags = 0;
+
+				if (!drm_dp_is_uhbr_rate(max_link_clock))
+					bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
+
+				dsc = intel_dp_mode_valid_with_dsc(connector,
+								   max_link_clock, max_lanes,
+								   target_clock, mode->hdisplay,
+								   num_joined_pipes,
+								   output_format, pipe_bpp,
+								   bw_overhead_flags);
+			}
 		}
+
+		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
+			continue;
+
+		if (mode_rate > max_rate && !dsc)
+			continue;
+
+		status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
+		if (status != MODE_OK)
+			continue;
+
+		max_dotclk *= num_joined_pipes;
+
+		if (target_clock > max_dotclk) {
+			status = MODE_CLOCK_HIGH;
+			continue;
+		}
+
+		break;
 	}
 
-	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
-		return MODE_CLOCK_HIGH;
-
-	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
 	if (status != MODE_OK)
 		return status;
 
-	if (mode_rate > max_rate && !dsc)
-		return MODE_CLOCK_HIGH;
-
 	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
 }
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 05/17] drm/i915/dp: Rework pipe joiner logic in compute_config
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (3 preceding siblings ...)
  2026-01-30  8:17 ` [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 06/17] drm/i915/dp_mst: Move the check for dotclock at the end Ankit Nautiyal
                   ` (13 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Currently, the number of joined pipes are determined early in the flow,
which limits flexibility for accounting DSC slice overhead. To address
this, recompute the joined pipe count during DSC configuration.

Refactor intel_dp_dsc_compute_config() to iterate over joiner candidates
and select the minimal joiner configuration that satisfies the mode
requirements. This prepares the logic for future changes that will
consider DSC slice overhead.

v2:
 - Rename helper to intel_dp_compute_link_for_joined_pipes(). (Imre)
 - Move the check for max dotclock inside the helper so that if dotclock
   check fails for non DSC case for a given number of joined pipes, we
   are able to fallback to the DSC mode. (Imre)
v3:
 - Drop fallback to other joiner configurations, if the force joiner
   configuration fails. (Imre)
 - Check for maxdotclock limit for non-DSC case first and fall back to
   DSC if the check fails. (Imre)
 - Initialize ret to -EINVAL to handle case where we bail out early.
   (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 90 ++++++++++++++++++++-----
 1 file changed, 73 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index dbe63efc1694..85e84f7748d3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2799,33 +2799,24 @@ bool intel_dp_joiner_needs_dsc(struct intel_display *display,
 }
 
 static int
-intel_dp_compute_link_config(struct intel_encoder *encoder,
-			     struct intel_crtc_state *pipe_config,
-			     struct drm_connector_state *conn_state,
-			     bool respect_downstream_limits)
+intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
+				       struct intel_crtc_state *pipe_config,
+				       struct drm_connector_state *conn_state,
+				       bool respect_downstream_limits)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+	int num_joined_pipes = intel_crtc_num_joined_pipes(pipe_config);
 	struct intel_connector *connector =
 		to_intel_connector(conn_state->connector);
 	const struct drm_display_mode *adjusted_mode =
 		&pipe_config->hw.adjusted_mode;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	int max_dotclk = display->cdclk.max_dotclk_freq;
 	struct link_config_limits limits;
 	bool dsc_needed, joiner_needs_dsc;
-	int num_joined_pipes;
 	int ret = 0;
 
-	if (pipe_config->fec_enable &&
-	    !intel_dp_supports_fec(intel_dp, connector, pipe_config))
-		return -EINVAL;
-
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     adjusted_mode->crtc_hdisplay,
-						     adjusted_mode->crtc_clock);
-	if (num_joined_pipes > 1)
-		pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);
-
+	max_dotclk *= num_joined_pipes;
 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
@@ -2848,7 +2839,8 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 							     fxp_q4_from_int(pipe_config->pipe_bpp),
 							     fxp_q4_from_int(pipe_config->pipe_bpp),
 							     0, false);
-		if (ret)
+
+		if (ret || adjusted_mode->crtc_clock > max_dotclk)
 			dsc_needed = true;
 	}
 
@@ -2873,6 +2865,9 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 						  conn_state, &limits, 64);
 		if (ret < 0)
 			return ret;
+
+		if (adjusted_mode->crtc_clock > max_dotclk)
+			return -EINVAL;
 	}
 
 	drm_dbg_kms(display->drm,
@@ -2888,6 +2883,67 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	return 0;
 }
 
+static int
+intel_dp_compute_link_config(struct intel_encoder *encoder,
+			     struct intel_crtc_state *crtc_state,
+			     struct drm_connector_state *conn_state,
+			     bool respect_downstream_limits)
+{
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
+	const struct drm_display_mode *adjusted_mode =
+		&crtc_state->hw.adjusted_mode;
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	int num_joined_pipes;
+	int ret = -EINVAL;
+
+	if (crtc_state->fec_enable &&
+	    !intel_dp_supports_fec(intel_dp, connector, crtc_state))
+		return -EINVAL;
+
+	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		if (connector->force_joined_pipes &&
+		    num_joined_pipes != connector->force_joined_pipes)
+			continue;
+
+		if (!intel_dp_can_join(display, num_joined_pipes))
+			continue;
+
+		if (adjusted_mode->hdisplay >
+		    num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
+			continue;
+
+		/*
+		 * NOTE:
+		 * The crtc_state->joiner_pipes should have been set at the end
+		 * only if all the conditions are met. However that would mean
+		 * that num_joined_pipes is passed around to all helpers and
+		 * make them use it instead of using crtc_state->joiner_pipes
+		 * directly or indirectly (via intel_crtc_num_joined_pipes()).
+		 *
+		 * For now, setting crtc_state->joiner_pipes to the candidate
+		 * value to avoid the above churn and resetting it to 0, in case
+		 * no joiner candidate is found to be suitable for the given
+		 * configuration.
+		 */
+		if (num_joined_pipes > 1)
+			crtc_state->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1,
+							   crtc->pipe);
+
+		ret = intel_dp_compute_link_for_joined_pipes(encoder, crtc_state, conn_state,
+							     respect_downstream_limits);
+		if (ret == 0)
+			break;
+	}
+
+	if (ret < 0)
+		crtc_state->joiner_pipes = 0;
+
+	return ret;
+}
+
 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
 				  const struct drm_connector_state *conn_state)
 {
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 06/17] drm/i915/dp_mst: Move the check for dotclock at the end
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (4 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 05/17] drm/i915/dp: Rework pipe joiner logic in compute_config Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 07/17] drm/i915/dp_mst: Move the joiner dependent code together Ankit Nautiyal
                   ` (12 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Refactor the mode_valid to have all joiner dependent stuff together and
place the check for dotclock limit at the very end.

This will help in the following refactor to iterate over the joiner
candidates and find the best joiner candidate that satisfy all checks
and limits.

v2: Update status to MODE_CLOCK_HIGH if max_dotclock check fails. (Imre)
v3: Drop redundant MODE_OK assignment and return. (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 24f8e60df9ac..ec6882af0631 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1470,20 +1470,19 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 	 *   corresponding link capabilities of the sink) in case the
 	 *   stream is uncompressed for it by the last branch device.
 	 */
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     mode->hdisplay, target_clock);
-	max_dotclk *= num_joined_pipes;
-
 	ret = drm_modeset_lock(&mgr->base.lock, ctx);
 	if (ret)
 		return ret;
 
-	if (mode_rate > max_rate || mode->clock > max_dotclk ||
+	if (mode_rate > max_rate ||
 	    drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) {
 		*status = MODE_CLOCK_HIGH;
 		return 0;
 	}
 
+	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
+						     mode->hdisplay, target_clock);
+
 	if (intel_dp_has_dsc(connector) && drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
 		/*
 		 * TBD pass the connector BPC,
@@ -1513,6 +1512,15 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 	}
 
 	*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
+
+	if (*status != MODE_OK)
+		return 0;
+
+	max_dotclk *= num_joined_pipes;
+
+	if (mode->clock > max_dotclk)
+		*status = MODE_CLOCK_HIGH;
+
 	return 0;
 }
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 07/17] drm/i915/dp_mst: Move the joiner dependent code together
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (5 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 06/17] drm/i915/dp_mst: Move the check for dotclock at the end Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid Ankit Nautiyal
                   ` (11 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Move the calculation of num_joined_pipes and other constraints that
depend on it, into a single block in mst_stream_compute_config().

This groups all joiner-dependent logic together, preparing the code for a
future loop-based evaluation of multiple joiner configurations.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index ec6882af0631..fc9367cc42ec 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -619,16 +619,16 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 		return -EINVAL;
 
+	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
+	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
+	pipe_config->has_pch_encoder = false;
+
 	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
 						     adjusted_mode->crtc_hdisplay,
 						     adjusted_mode->crtc_clock);
 	if (num_joined_pipes > 1)
 		pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);
 
-	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
-	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
-	pipe_config->has_pch_encoder = false;
-
 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
@@ -685,6 +685,10 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 						  pipe_config->dp_m_n.tu);
 	}
 
+	if (ret)
+		return ret;
+
+	ret = intel_dp_compute_min_hblank(pipe_config, conn_state);
 	if (ret)
 		return ret;
 
@@ -695,10 +699,6 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 		pipe_config->lane_lat_optim_mask =
 			bxt_dpio_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 
-	ret = intel_dp_compute_min_hblank(pipe_config, conn_state);
-	if (ret)
-		return ret;
-
 	intel_vrr_compute_config(pipe_config, conn_state);
 
 	intel_dp_audio_compute_config(encoder, pipe_config, conn_state);
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (6 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 07/17] drm/i915/dp_mst: Move the joiner dependent code together Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-02-02  8:50   ` Imre Deak
  2026-01-30  8:18 ` [PATCH 09/17] drm/i915/dp_mst: Extract helper to compute link for given joiner config Ankit Nautiyal
                   ` (10 subsequent siblings)
  18 siblings, 1 reply; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Refactor the logic to get the number of joined pipes. Start with a single
pipe and incrementally try additional pipes only if needed. While DSC
overhead is not yet computed here, this restructuring prepares the code to
support that in follow-up changes.

v2:
 - Remove fallback in case force-joiner configuration fails. (Imre)
 - Drop redundant MODE_OK assignment (Imre)
v3:
 - Align with the changes in intel_dp_mode_valid(). (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     |  2 -
 drivers/gpu/drm/i915/display/intel_dp.h     |  3 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 86 ++++++++++++---------
 3 files changed, 52 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 85e84f7748d3..2a31543ce4d1 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1371,7 +1371,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
 	return MODE_OK;
 }
 
-static
 int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
 {
 	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
@@ -1434,7 +1433,6 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
 	return true;
 }
 
-static
 bool intel_dp_can_join(struct intel_display *display,
 		       int num_joined_pipes)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 25bfbfd291b0..6d409c1998c9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -225,5 +225,8 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
 				 struct drm_connector_state *conn_state);
 int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
 			       bool assume_all_enabled);
+int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
+bool intel_dp_can_join(struct intel_display *display,
+		       int num_joined_pipes);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index fc9367cc42ec..6414fc8fb4a4 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1420,7 +1420,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 	struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr;
 	struct drm_dp_mst_port *port = connector->mst.port;
 	const int min_bpp = 18;
-	int max_dotclk = display->cdclk.max_dotclk_freq;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 	unsigned long bw_overhead_flags =
 		DRM_DP_BW_OVERHEAD_MST | DRM_DP_BW_OVERHEAD_SSC_REF_CLK;
@@ -1480,47 +1479,60 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 		return 0;
 	}
 
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     mode->hdisplay, target_clock);
+	*status = MODE_CLOCK_HIGH;
+	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		int max_dotclk = display->cdclk.max_dotclk_freq;
 
-	if (intel_dp_has_dsc(connector) && drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
-		/*
-		 * TBD pass the connector BPC,
-		 * for now U8_MAX so that max BPC on that platform would be picked
-		 */
-		int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
+		if (connector->force_joined_pipes &&
+		    num_joined_pipes != connector->force_joined_pipes)
+			continue;
 
-		if (!drm_dp_is_uhbr_rate(max_link_clock))
-			bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
+		if (!intel_dp_can_join(display, num_joined_pipes))
+			continue;
 
-		dsc = intel_dp_mode_valid_with_dsc(connector,
-						   max_link_clock, max_lanes,
-						   target_clock, mode->hdisplay,
-						   num_joined_pipes,
-						   INTEL_OUTPUT_FORMAT_RGB, pipe_bpp,
-						   bw_overhead_flags);
+		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
+			continue;
+
+		if (intel_dp_has_dsc(connector) &&
+		    drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
+			/*
+			 * TBD pass the connector BPC,
+			 * for now U8_MAX so that max BPC on that platform would be picked
+			 */
+			int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
+
+			if (!drm_dp_is_uhbr_rate(max_link_clock))
+				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
+
+			dsc = intel_dp_mode_valid_with_dsc(connector,
+							   max_link_clock, max_lanes,
+							   target_clock, mode->hdisplay,
+							   num_joined_pipes,
+							   INTEL_OUTPUT_FORMAT_RGB, pipe_bpp,
+							   bw_overhead_flags);
+		}
+
+		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
+			continue;
+
+		if (mode_rate > max_rate && !dsc)
+			continue;
+
+		*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
+
+		if (*status != MODE_OK)
+			continue;
+
+		max_dotclk *= num_joined_pipes;
+
+		if (mode->clock > max_dotclk) {
+			*status = MODE_CLOCK_HIGH;
+			continue;
+		}
+
+		break;
 	}
 
-	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) {
-		*status = MODE_CLOCK_HIGH;
-		return 0;
-	}
-
-	if (mode_rate > max_rate && !dsc) {
-		*status = MODE_CLOCK_HIGH;
-		return 0;
-	}
-
-	*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
-
-	if (*status != MODE_OK)
-		return 0;
-
-	max_dotclk *= num_joined_pipes;
-
-	if (mode->clock > max_dotclk)
-		*status = MODE_CLOCK_HIGH;
-
 	return 0;
 }
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 09/17] drm/i915/dp_mst: Extract helper to compute link for given joiner config
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (7 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 10/17] drm/i915/dp_mst: Rework pipe joiner logic in compute_config Ankit Nautiyal
                   ` (9 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Move the joiner-dependent portion of mst_stream_compute_config() into
mst_stream_compute_link_for_joined_pipes(), which computes the MST link
configuration for a specific num_joined_pipes.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 73 ++++++++++++++-------
 1 file changed, 48 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 6414fc8fb4a4..aa328d99d9f2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -595,40 +595,19 @@ mst_stream_compute_config_limits(struct intel_dp *intel_dp,
 							    dsc);
 }
 
-static int mst_stream_compute_config(struct intel_encoder *encoder,
-				     struct intel_crtc_state *pipe_config,
-				     struct drm_connector_state *conn_state)
+static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encoder,
+						    struct intel_crtc_state *pipe_config,
+						    struct drm_connector_state *conn_state,
+						    int num_joined_pipes)
 {
 	struct intel_display *display = to_intel_display(encoder);
-	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
-	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	struct intel_dp *intel_dp = to_primary_dp(encoder);
 	struct intel_connector *connector =
 		to_intel_connector(conn_state->connector);
-	const struct drm_display_mode *adjusted_mode =
-		&pipe_config->hw.adjusted_mode;
 	struct link_config_limits limits;
 	bool dsc_needed, joiner_needs_dsc;
-	int num_joined_pipes;
 	int ret = 0;
 
-	if (pipe_config->fec_enable &&
-	    !intel_dp_supports_fec(intel_dp, connector, pipe_config))
-		return -EINVAL;
-
-	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
-		return -EINVAL;
-
-	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
-	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
-	pipe_config->has_pch_encoder = false;
-
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     adjusted_mode->crtc_hdisplay,
-						     adjusted_mode->crtc_clock);
-	if (num_joined_pipes > 1)
-		pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);
-
 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
@@ -683,6 +662,8 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 		ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
 						  conn_state, &limits,
 						  pipe_config->dp_m_n.tu);
+		if (ret)
+			return ret;
 	}
 
 	if (ret)
@@ -692,6 +673,48 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 	if (ret)
 		return ret;
 
+	return 0;
+}
+
+static int mst_stream_compute_config(struct intel_encoder *encoder,
+				     struct intel_crtc_state *pipe_config,
+				     struct drm_connector_state *conn_state)
+{
+	struct intel_display *display = to_intel_display(encoder);
+	struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
+	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+	struct intel_dp *intel_dp = to_primary_dp(encoder);
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
+	const struct drm_display_mode *adjusted_mode =
+		&pipe_config->hw.adjusted_mode;
+	int num_joined_pipes;
+	int ret = 0;
+
+	if (pipe_config->fec_enable &&
+	    !intel_dp_supports_fec(intel_dp, connector, pipe_config))
+		return -EINVAL;
+
+	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
+		return -EINVAL;
+
+	pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
+	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
+	pipe_config->has_pch_encoder = false;
+
+	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
+						     adjusted_mode->crtc_hdisplay,
+						     adjusted_mode->crtc_clock);
+	if (num_joined_pipes > 1)
+		pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);
+
+	ret = mst_stream_compute_link_for_joined_pipes(encoder,
+						       pipe_config,
+						       conn_state,
+						       num_joined_pipes);
+	if (ret)
+		return ret;
+
 	pipe_config->limited_color_range =
 		intel_dp_limited_color_range(pipe_config, conn_state);
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 10/17] drm/i915/dp_mst: Rework pipe joiner logic in compute_config
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (8 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 09/17] drm/i915/dp_mst: Extract helper to compute link for given joiner config Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 11/17] drm/i915/dp: Remove unused joiner helpers Ankit Nautiyal
                   ` (8 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Similar to the DP SST, refactor mst_stream_compute_config() to iterate
over joiner candidates and select the minimal joiner configuration that
satisfies the mode requirements. This prepares the logic for future changes
that will consider DSC slice overhead.

v2:
 - Move the check for dotclock in the new helper and check for both DSC and
   non-DSC case. In case the check fails for non-DSC, fallback to DSC
   configuration. (Imre)
 - Propagate the return value from the core helper:
   mst_stream_compute_link_for_joined_pipes(). (Imre)
v3:
 - Use num_joined_pipes instead of num_pipes. (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 43 +++++++++++++++------
 1 file changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index aa328d99d9f2..dac89dc54f1d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -602,12 +602,16 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 {
 	struct intel_display *display = to_intel_display(encoder);
 	struct intel_dp *intel_dp = to_primary_dp(encoder);
+	const struct drm_display_mode *adjusted_mode =
+		&pipe_config->hw.adjusted_mode;
 	struct intel_connector *connector =
 		to_intel_connector(conn_state->connector);
+	int max_dotclk = display->cdclk.max_dotclk_freq;
 	struct link_config_limits limits;
 	bool dsc_needed, joiner_needs_dsc;
 	int ret = 0;
 
+	max_dotclk *= num_joined_pipes;
 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
@@ -621,7 +625,7 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 		if (ret == -EDEADLK)
 			return ret;
 
-		if (ret)
+		if (ret || adjusted_mode->clock > max_dotclk)
 			dsc_needed = true;
 	}
 
@@ -664,6 +668,9 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 						  pipe_config->dp_m_n.tu);
 		if (ret)
 			return ret;
+
+		if (adjusted_mode->clock > max_dotclk)
+			return -EINVAL;
 	}
 
 	if (ret)
@@ -689,7 +696,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 	const struct drm_display_mode *adjusted_mode =
 		&pipe_config->hw.adjusted_mode;
 	int num_joined_pipes;
-	int ret = 0;
+	int ret = -EINVAL;
 
 	if (pipe_config->fec_enable &&
 	    !intel_dp_supports_fec(intel_dp, connector, pipe_config))
@@ -702,16 +709,30 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 	pipe_config->has_pch_encoder = false;
 
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     adjusted_mode->crtc_hdisplay,
-						     adjusted_mode->crtc_clock);
-	if (num_joined_pipes > 1)
-		pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1, crtc->pipe);
+	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		if (connector->force_joined_pipes &&
+		    num_joined_pipes != connector->force_joined_pipes)
+			continue;
+
+		if (!intel_dp_can_join(display, num_joined_pipes))
+			continue;
+
+		if (adjusted_mode->hdisplay >
+		    num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
+			continue;
+
+		if (num_joined_pipes > 1)
+			pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1,
+							    crtc->pipe);
+
+		ret = mst_stream_compute_link_for_joined_pipes(encoder,
+							       pipe_config,
+							       conn_state,
+							       num_joined_pipes);
+		if (!ret)
+			break;
+	}
 
-	ret = mst_stream_compute_link_for_joined_pipes(encoder,
-						       pipe_config,
-						       conn_state,
-						       num_joined_pipes);
 	if (ret)
 		return ret;
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 11/17] drm/i915/dp: Remove unused joiner helpers
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (9 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 10/17] drm/i915/dp_mst: Rework pipe joiner logic in compute_config Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 12/17] drm/i915/dp: Introduce helper to check pixel rate against dotclock limits Ankit Nautiyal
                   ` (7 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

The helpers intel_dp_num_joined_pipes() and intel_dp_needs_joiner() are no
longer used now that joiner selection iterates over all candidates.
Remove them.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 37 -------------------------
 drivers/gpu/drm/i915/display/intel_dp.h |  4 ---
 2 files changed, 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2a31543ce4d1..c5e2e29a751b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1376,43 +1376,6 @@ int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
 	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
 }
 
-static
-bool intel_dp_needs_joiner(struct intel_dp *intel_dp,
-			   struct intel_connector *connector,
-			   int hdisplay, int clock,
-			   int num_joined_pipes)
-{
-	struct intel_display *display = to_intel_display(intel_dp);
-
-	if (!intel_dp_has_joiner(intel_dp))
-		return false;
-
-	num_joined_pipes /= 2;
-
-	return clock > num_joined_pipes * display->cdclk.max_dotclk_freq ||
-	       hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display);
-}
-
-int intel_dp_num_joined_pipes(struct intel_dp *intel_dp,
-			      struct intel_connector *connector,
-			      int hdisplay, int clock)
-{
-	struct intel_display *display = to_intel_display(intel_dp);
-
-	if (connector->force_joined_pipes)
-		return connector->force_joined_pipes;
-
-	if (HAS_ULTRAJOINER(display) &&
-	    intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 4))
-		return 4;
-
-	if ((HAS_BIGJOINER(display) || HAS_UNCOMPRESSED_JOINER(display)) &&
-	    intel_dp_needs_joiner(intel_dp, connector, hdisplay, clock, 2))
-		return 2;
-
-	return 1;
-}
-
 bool intel_dp_has_dsc(const struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 6d409c1998c9..ebaa35d23c9c 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -153,10 +153,6 @@ bool intel_dp_dsc_valid_compressed_bpp(struct intel_dp *intel_dp, int bpp_x16);
 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
 				int mode_clock, int mode_hdisplay,
 				int num_joined_pipes);
-int intel_dp_num_joined_pipes(struct intel_dp *intel_dp,
-			      struct intel_connector *connector,
-			      int hdisplay, int clock);
-
 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 {
 	return ~((1 << lane_count) - 1) & 0xf;
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 12/17] drm/i915/dp: Introduce helper to check pixel rate against dotclock limits
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (10 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 11/17] drm/i915/dp: Remove unused joiner helpers Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 13/17] drm/i915/dp: Refactor dsc_slice_count handling in intel_dp_mode_valid() Ankit Nautiyal
                   ` (6 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Add intel_dp_dotclk_valid() helper, that checks the required pixel rate
against platform dotclock limit. With joined pipes the effective dotclock
limit depends upon the number of joined pipes.

Call the helper from the mode_valid phase and from the compute_config
phase where we need to check the limits for the given target clock for a
given joiner candidate.

v2: Rename the helper to intel_dp_dotclk_valid(). (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 31 +++++++++++++++------
 drivers/gpu/drm/i915/display/intel_dp.h     |  3 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 19 +++++++------
 3 files changed, 35 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c5e2e29a751b..bf90605ec9cb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1412,6 +1412,18 @@ bool intel_dp_can_join(struct intel_display *display,
 	}
 }
 
+bool intel_dp_dotclk_valid(struct intel_display *display,
+			   int target_clock,
+			   int num_joined_pipes)
+{
+	int max_dotclk = display->cdclk.max_dotclk_freq;
+	int effective_dotclk_limit;
+
+	effective_dotclk_limit = max_dotclk * num_joined_pipes;
+
+	return target_clock <= effective_dotclk_limit;
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid(struct drm_connector *_connector,
 		    const struct drm_display_mode *mode)
@@ -1474,8 +1486,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	 */
 	status = MODE_CLOCK_HIGH;
 	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
-		int max_dotclk = display->cdclk.max_dotclk_freq;
-
 		if (connector->force_joined_pipes &&
 		    num_joined_pipes != connector->force_joined_pipes)
 			continue;
@@ -1539,9 +1549,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 		if (status != MODE_OK)
 			continue;
 
-		max_dotclk *= num_joined_pipes;
-
-		if (target_clock > max_dotclk) {
+		if (!intel_dp_dotclk_valid(display,
+					   target_clock,
+					   num_joined_pipes)) {
 			status = MODE_CLOCK_HIGH;
 			continue;
 		}
@@ -2772,12 +2782,10 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
 	const struct drm_display_mode *adjusted_mode =
 		&pipe_config->hw.adjusted_mode;
 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-	int max_dotclk = display->cdclk.max_dotclk_freq;
 	struct link_config_limits limits;
 	bool dsc_needed, joiner_needs_dsc;
 	int ret = 0;
 
-	max_dotclk *= num_joined_pipes;
 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
@@ -2801,7 +2809,10 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
 							     fxp_q4_from_int(pipe_config->pipe_bpp),
 							     0, false);
 
-		if (ret || adjusted_mode->crtc_clock > max_dotclk)
+		if (ret ||
+		    !intel_dp_dotclk_valid(display,
+					   adjusted_mode->crtc_clock,
+					   num_joined_pipes))
 			dsc_needed = true;
 	}
 
@@ -2827,7 +2838,9 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
 		if (ret < 0)
 			return ret;
 
-		if (adjusted_mode->crtc_clock > max_dotclk)
+		if (!intel_dp_dotclk_valid(display,
+					   adjusted_mode->crtc_clock,
+					   num_joined_pipes))
 			return -EINVAL;
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index ebaa35d23c9c..edeb09372d1e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -224,5 +224,8 @@ int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
 int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
 bool intel_dp_can_join(struct intel_display *display,
 		       int num_joined_pipes);
+bool intel_dp_dotclk_valid(struct intel_display *display,
+			   int target_clock,
+			   int num_joined_pipes);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index dac89dc54f1d..0eab5ced27d3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -606,12 +606,10 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 		&pipe_config->hw.adjusted_mode;
 	struct intel_connector *connector =
 		to_intel_connector(conn_state->connector);
-	int max_dotclk = display->cdclk.max_dotclk_freq;
 	struct link_config_limits limits;
 	bool dsc_needed, joiner_needs_dsc;
 	int ret = 0;
 
-	max_dotclk *= num_joined_pipes;
 	joiner_needs_dsc = intel_dp_joiner_needs_dsc(display, num_joined_pipes);
 
 	dsc_needed = joiner_needs_dsc || intel_dp->force_dsc_en ||
@@ -625,7 +623,10 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 		if (ret == -EDEADLK)
 			return ret;
 
-		if (ret || adjusted_mode->clock > max_dotclk)
+		if (ret ||
+		    !intel_dp_dotclk_valid(display,
+					   adjusted_mode->clock,
+					   num_joined_pipes))
 			dsc_needed = true;
 	}
 
@@ -669,7 +670,9 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 		if (ret)
 			return ret;
 
-		if (adjusted_mode->clock > max_dotclk)
+		if (!intel_dp_dotclk_valid(display,
+					   adjusted_mode->clock,
+					   num_joined_pipes))
 			return -EINVAL;
 	}
 
@@ -1525,8 +1528,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 
 	*status = MODE_CLOCK_HIGH;
 	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
-		int max_dotclk = display->cdclk.max_dotclk_freq;
-
 		if (connector->force_joined_pipes &&
 		    num_joined_pipes != connector->force_joined_pipes)
 			continue;
@@ -1567,9 +1568,9 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 		if (*status != MODE_OK)
 			continue;
 
-		max_dotclk *= num_joined_pipes;
-
-		if (mode->clock > max_dotclk) {
+		if (!intel_dp_dotclk_valid(display,
+					   mode->clock,
+					   num_joined_pipes)) {
 			*status = MODE_CLOCK_HIGH;
 			continue;
 		}
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 13/17] drm/i915/dp: Refactor dsc_slice_count handling in intel_dp_mode_valid()
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (11 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 12/17] drm/i915/dp: Introduce helper to check pixel rate against dotclock limits Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 14/17] drm/i915/dp: Account for DSC slice overhead Ankit Nautiyal
                   ` (5 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Make dsc_slice_count closer to the block where it is used and promote it
from u8 to int. This aligns it with upcoming DSC bubble pixel-rate
adjustments, where the slice count participates in wider arithmetic.

Currently, for non-eDP (DP/DP_MST) cases  the slice count is computed only
inside intel_dp_dsc_mode_valid() and is not used by the caller. Once DSC
bubble handling is added, dp_mode_valid() will need access to its own local
slice count for non-eDP cases as well.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index bf90605ec9cb..61b86cdff3ef 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1436,7 +1436,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	int target_clock = mode->clock;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
 	u16 dsc_max_compressed_bpp = 0;
-	u8 dsc_slice_count = 0;
 	enum drm_mode_status status;
 	bool dsc = false;
 	int num_joined_pipes;
@@ -1486,6 +1485,8 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	 */
 	status = MODE_CLOCK_HIGH;
 	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		int dsc_slice_count = 0;
+
 		if (connector->force_joined_pipes &&
 		    num_joined_pipes != connector->force_joined_pipes)
 			continue;
@@ -1503,6 +1504,11 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 		if (intel_dp_has_dsc(connector)) {
 			int pipe_bpp;
 
+			dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+								       target_clock,
+								       mode->hdisplay,
+								       num_joined_pipes);
+
 			/*
 			 * TBD pass the connector BPC,
 			 * for now U8_MAX so that max BPC on that platform would be picked
@@ -1517,12 +1523,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 				dsc_max_compressed_bpp =
 					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
 
-				dsc_slice_count =
-					intel_dp_dsc_get_slice_count(connector,
-								     target_clock,
-								     mode->hdisplay,
-								     num_joined_pipes);
-
 				dsc = dsc_max_compressed_bpp && dsc_slice_count;
 			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
 				unsigned long bw_overhead_flags = 0;
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 14/17] drm/i915/dp: Account for DSC slice overhead
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (12 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 13/17] drm/i915/dp: Refactor dsc_slice_count handling in intel_dp_mode_valid() Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops Ankit Nautiyal
                   ` (4 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Account for DSC slice overhead bubbles and adjust the pixel rate while
checking the pixel rate against the max dotclock limits.

v2: Add missing assignment for dsc_slice_count in
mst_connector_mode_valid_ctx(). (Imre)

v3: Explicitly pass dsc_slice_count as 0 for Non-DSC case. (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 21 +++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp.h     |  2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_vdsc.c   |  1 -
 drivers/gpu/drm/i915/display/intel_vdsc.h   |  3 +++
 5 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 61b86cdff3ef..3905723f5ab6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1414,6 +1414,8 @@ bool intel_dp_can_join(struct intel_display *display,
 
 bool intel_dp_dotclk_valid(struct intel_display *display,
 			   int target_clock,
+			   int htotal,
+			   int dsc_slice_count,
 			   int num_joined_pipes)
 {
 	int max_dotclk = display->cdclk.max_dotclk_freq;
@@ -1421,6 +1423,12 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
 
 	effective_dotclk_limit = max_dotclk * num_joined_pipes;
 
+	if (dsc_slice_count)
+		target_clock = intel_dsc_get_pixel_rate_with_dsc_bubbles(display,
+									 target_clock,
+									 htotal,
+									 dsc_slice_count);
+
 	return target_clock <= effective_dotclk_limit;
 }
 
@@ -1549,8 +1557,13 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 		if (status != MODE_OK)
 			continue;
 
+		if (!dsc)
+			dsc_slice_count = 0;
+
 		if (!intel_dp_dotclk_valid(display,
 					   target_clock,
+					   mode->htotal,
+					   dsc_slice_count,
 					   num_joined_pipes)) {
 			status = MODE_CLOCK_HIGH;
 			continue;
@@ -2812,6 +2825,8 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
 		if (ret ||
 		    !intel_dp_dotclk_valid(display,
 					   adjusted_mode->crtc_clock,
+					   adjusted_mode->crtc_htotal,
+					   0,
 					   num_joined_pipes))
 			dsc_needed = true;
 	}
@@ -2822,6 +2837,8 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
 	}
 
 	if (dsc_needed) {
+		int dsc_slice_count;
+
 		drm_dbg_kms(display->drm,
 			    "Try DSC (fallback=%s, joiner=%s, force=%s)\n",
 			    str_yes_no(ret), str_yes_no(joiner_needs_dsc),
@@ -2838,8 +2855,12 @@ intel_dp_compute_link_for_joined_pipes(struct intel_encoder *encoder,
 		if (ret < 0)
 			return ret;
 
+		dsc_slice_count = intel_dsc_line_slice_count(&pipe_config->dsc.slice_config);
+
 		if (!intel_dp_dotclk_valid(display,
 					   adjusted_mode->crtc_clock,
+					   adjusted_mode->crtc_htotal,
+					   dsc_slice_count,
 					   num_joined_pipes))
 			return -EINVAL;
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index edeb09372d1e..95a38763a367 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -226,6 +226,8 @@ bool intel_dp_can_join(struct intel_display *display,
 		       int num_joined_pipes);
 bool intel_dp_dotclk_valid(struct intel_display *display,
 			   int target_clock,
+			   int htotal,
+			   int dsc_slice_count,
 			   int num_joined_pipes);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0eab5ced27d3..ad66c483959b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -626,6 +626,8 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 		if (ret ||
 		    !intel_dp_dotclk_valid(display,
 					   adjusted_mode->clock,
+					   adjusted_mode->htotal,
+					   0,
 					   num_joined_pipes))
 			dsc_needed = true;
 	}
@@ -637,6 +639,8 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 
 	/* enable compression if the mode doesn't fit available BW */
 	if (dsc_needed) {
+		int dsc_slice_count;
+
 		drm_dbg_kms(display->drm, "Try DSC (fallback=%s, joiner=%s, force=%s)\n",
 			    str_yes_no(ret), str_yes_no(joiner_needs_dsc),
 			    str_yes_no(intel_dp->force_dsc_en));
@@ -670,8 +674,12 @@ static int mst_stream_compute_link_for_joined_pipes(struct intel_encoder *encode
 		if (ret)
 			return ret;
 
+		dsc_slice_count = intel_dp_mst_dsc_get_slice_count(connector, pipe_config);
+
 		if (!intel_dp_dotclk_valid(display,
 					   adjusted_mode->clock,
+					   adjusted_mode->htotal,
+					   dsc_slice_count,
 					   num_joined_pipes))
 			return -EINVAL;
 	}
@@ -1528,6 +1536,8 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 
 	*status = MODE_CLOCK_HIGH;
 	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		int dsc_slice_count = 0;
+
 		if (connector->force_joined_pipes &&
 		    num_joined_pipes != connector->force_joined_pipes)
 			continue;
@@ -1546,6 +1556,11 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 			 */
 			int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
 
+			dsc_slice_count = intel_dp_dsc_get_slice_count(connector,
+								       mode->clock,
+								       mode->hdisplay,
+								       num_joined_pipes);
+
 			if (!drm_dp_is_uhbr_rate(max_link_clock))
 				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
 
@@ -1568,8 +1583,13 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 		if (*status != MODE_OK)
 			continue;
 
+		if (!dsc)
+			dsc_slice_count = 0;
+
 		if (!intel_dp_dotclk_valid(display,
 					   mode->clock,
+					   mode->htotal,
+					   dsc_slice_count,
 					   num_joined_pipes)) {
 			*status = MODE_CLOCK_HIGH;
 			continue;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 642a89270d8e..7e53201b3cb1 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -1104,7 +1104,6 @@ void intel_vdsc_state_dump(struct drm_printer *p, int indent,
 	drm_dsc_dump_config(p, indent, &crtc_state->dsc.config);
 }
 
-static
 int intel_dsc_get_pixel_rate_with_dsc_bubbles(struct intel_display *display,
 					      int pixel_rate, int htotal,
 					      int dsc_horizontal_slices)
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index aeb17670307b..f4d5b37293cf 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -41,5 +41,8 @@ void intel_vdsc_state_dump(struct drm_printer *p, int indent,
 			   const struct intel_crtc_state *crtc_state);
 int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state);
 unsigned int intel_vdsc_prefill_lines(const struct intel_crtc_state *crtc_state);
+int intel_dsc_get_pixel_rate_with_dsc_bubbles(struct intel_display *display,
+					      int pixel_rate, int htotal,
+					      int dsc_horizontal_slices);
 
 #endif /* __INTEL_VDSC_H__ */
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (13 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 14/17] drm/i915/dp: Account for DSC slice overhead Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-02-02  8:51   ` Imre Deak
  2026-01-30  8:18 ` [PATCH 16/17] drm/i915/display: Add upper limit check for pixel clock Ankit Nautiyal
                   ` (3 subsequent siblings)
  18 siblings, 1 reply; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Introduce for_each_joiner_candidate(), intel_dp_joiner_candidate_valid()
and intel_dp_joiner_candidate_valid() to remove duplicated joiner
enumeration and validity checks across DP SST and MST paths.

Suggested-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 44 ++++++++++-----------
 drivers/gpu/drm/i915/display/intel_dp.h     |  7 ++++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 25 +-----------
 3 files changed, 29 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 3905723f5ab6..920e4d593b1d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1492,19 +1492,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	 * over candidate pipe counts and evaluate each combination.
 	 */
 	status = MODE_CLOCK_HIGH;
-	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+	for_each_joiner_candidate(connector, mode, num_joined_pipes) {
 		int dsc_slice_count = 0;
 
-		if (connector->force_joined_pipes &&
-		    num_joined_pipes != connector->force_joined_pipes)
-			continue;
-
-		if (!intel_dp_can_join(display, num_joined_pipes))
-			continue;
-
-		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
-			continue;
-
 		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
 		if (status != MODE_OK)
 			continue;
@@ -2884,7 +2874,6 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 			     struct drm_connector_state *conn_state,
 			     bool respect_downstream_limits)
 {
-	struct intel_display *display = to_intel_display(encoder);
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct intel_connector *connector =
 		to_intel_connector(conn_state->connector);
@@ -2898,18 +2887,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
 	    !intel_dp_supports_fec(intel_dp, connector, crtc_state))
 		return -EINVAL;
 
-	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
-		if (connector->force_joined_pipes &&
-		    num_joined_pipes != connector->force_joined_pipes)
-			continue;
-
-		if (!intel_dp_can_join(display, num_joined_pipes))
-			continue;
-
-		if (adjusted_mode->hdisplay >
-		    num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
-			continue;
-
+	for_each_joiner_candidate(connector, adjusted_mode, num_joined_pipes) {
 		/*
 		 * NOTE:
 		 * The crtc_state->joiner_pipes should have been set at the end
@@ -7219,3 +7197,21 @@ int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
 
 	return sdp_guardband;
 }
+
+bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
+				     int hdisplay,
+				     int num_joined_pipes)
+{
+	struct intel_display *display = to_intel_display(connector);
+
+	if (!intel_dp_can_join(display, num_joined_pipes))
+		return false;
+
+	if (hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
+		return false;
+
+	if (connector->force_joined_pipes && connector->force_joined_pipes != num_joined_pipes)
+		return false;
+
+	return true;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 95a38763a367..ff527b351de0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -229,5 +229,12 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
 			   int htotal,
 			   int dsc_slice_count,
 			   int num_joined_pipes);
+bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
+				     int hdisplay,
+				     int num_joined_pipes);
+
+#define for_each_joiner_candidate(__connector, __mode, __num_joined_pipes) \
+	for ((__num_joined_pipes) = 1; (__num_joined_pipes) <= (I915_MAX_PIPES); (__num_joined_pipes)++) \
+		for_each_if(intel_dp_joiner_candidate_valid(__connector, (__mode)->hdisplay, __num_joined_pipes))
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index ad66c483959b..2c8a7c57e795 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -720,18 +720,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
 	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 	pipe_config->has_pch_encoder = false;
 
-	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
-		if (connector->force_joined_pipes &&
-		    num_joined_pipes != connector->force_joined_pipes)
-			continue;
-
-		if (!intel_dp_can_join(display, num_joined_pipes))
-			continue;
-
-		if (adjusted_mode->hdisplay >
-		    num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
-			continue;
-
+	for_each_joiner_candidate(connector, adjusted_mode, num_joined_pipes) {
 		if (num_joined_pipes > 1)
 			pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1,
 							    crtc->pipe);
@@ -1535,19 +1524,9 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
 	}
 
 	*status = MODE_CLOCK_HIGH;
-	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+	for_each_joiner_candidate(connector, mode, num_joined_pipes) {
 		int dsc_slice_count = 0;
 
-		if (connector->force_joined_pipes &&
-		    num_joined_pipes != connector->force_joined_pipes)
-			continue;
-
-		if (!intel_dp_can_join(display, num_joined_pipes))
-			continue;
-
-		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
-			continue;
-
 		if (intel_dp_has_dsc(connector) &&
 		    drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
 			/*
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 16/17] drm/i915/display: Add upper limit check for pixel clock
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (14 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  8:18 ` [PATCH 17/17] drm/i915/display: Extend the max dotclock limit to WCL Ankit Nautiyal
                   ` (2 subsequent siblings)
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: jani.nikula, imre.deak, Chaitanya Kumar Borah, Ankit Nautiyal

From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

Add upper limit check for pixel clock for DISPLAY_VER >= 30.
Limits don't apply when DSC is enabled.

The helper returns the upper limit for the platforms, capped to the
max dotclock (khz).

For the currently supported versions of HDMI, pixel clock is already
limited to 600Mhz so nothing needs to be done there as of now.

v2:
 - Add this limit to the new helper.
v3:
 - Rename helper to intel_max_uncompressed_dotclock(). (Imre)
 - Limit only for PTL and cap the limit to max_dotclock. (Imre)

BSpec: 49199, 68912
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 11 +++++++++++
 drivers/gpu/drm/i915/display/intel_display.h |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c      |  3 +++
 3 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7491e00e3858..9cfeb5530fd8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8001,6 +8001,17 @@ void intel_setup_outputs(struct intel_display *display)
 	drm_helper_move_panel_connectors_to_head(display->drm);
 }
 
+int intel_max_uncompressed_dotclock(struct intel_display *display)
+{
+	int max_dotclock = display->cdclk.max_dotclk_freq;
+	int limit = max_dotclock;
+
+	if (DISPLAY_VER(display) >= 30)
+		limit = 1350000;
+
+	return min(max_dotclock, limit);
+}
+
 static int max_dotclock(struct intel_display *display)
 {
 	int max_dotclock = display->cdclk.max_dotclk_freq;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 4cced16af8ce..552a59d19e0f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -462,6 +462,7 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,
 				    struct intel_link_m_n *m_n);
 int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
 int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config);
+int intel_max_uncompressed_dotclock(struct intel_display *display);
 enum intel_display_power_domain intel_port_to_power_domain(struct intel_digital_port *dig_port);
 enum intel_display_power_domain
 intel_aux_power_domain(struct intel_digital_port *dig_port);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 920e4d593b1d..d97bf44d7ded 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1428,6 +1428,9 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
 									 target_clock,
 									 htotal,
 									 dsc_slice_count);
+	else
+		effective_dotclk_limit =
+			intel_max_uncompressed_dotclock(display) * num_joined_pipes;
 
 	return target_clock <= effective_dotclk_limit;
 }
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* [PATCH 17/17] drm/i915/display: Extend the max dotclock limit to WCL
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (15 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 16/17] drm/i915/display: Add upper limit check for pixel clock Ankit Nautiyal
@ 2026-01-30  8:18 ` Ankit Nautiyal
  2026-01-30  9:41 ` ✓ i915.CI.BAT: success for Account for DSC bubble overhead for horizontal slices (rev6) Patchwork
  2026-01-30 17:45 ` ✗ i915.CI.Full: failure " Patchwork
  18 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-01-30  8:18 UTC (permalink / raw)
  To: intel-gfx, intel-xe
  Cc: jani.nikula, imre.deak, Chaitanya Kumar Borah, Ankit Nautiyal

From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

Add upper limit check for pixel clock for WCL.

For prior platforms though the bspec mentions the dotclock limits, however
these are intentionally not enforced to avoid regressions, unless real
issues are observed.

BSpec: 49199, 68912
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9cfeb5530fd8..bd4219467e0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8006,8 +8006,16 @@ int intel_max_uncompressed_dotclock(struct intel_display *display)
 	int max_dotclock = display->cdclk.max_dotclk_freq;
 	int limit = max_dotclock;
 
-	if (DISPLAY_VER(display) >= 30)
+	if (DISPLAY_VERx100(display) == 3002)
+		limit = 937500;
+	else if (DISPLAY_VER(display) >= 30)
 		limit = 1350000;
+	/*
+	 * Note: For other platforms though there are limits given
+	 * in the Bspec, however the limit is intentionally not
+	 * enforced to avoid regressions, unless real issues are
+	 * observed.
+	 */
 
 	return min(max_dotclock, limit);
 }
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

* ✓ i915.CI.BAT: success for Account for DSC bubble overhead for horizontal slices (rev6)
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (16 preceding siblings ...)
  2026-01-30  8:18 ` [PATCH 17/17] drm/i915/display: Extend the max dotclock limit to WCL Ankit Nautiyal
@ 2026-01-30  9:41 ` Patchwork
  2026-01-30 17:45 ` ✗ i915.CI.Full: failure " Patchwork
  18 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2026-01-30  9:41 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 8204 bytes --]

== Series Details ==

Series: Account for DSC bubble overhead for horizontal slices (rev6)
URL   : https://patchwork.freedesktop.org/series/152804/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_17910 -> Patchwork_152804v6
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/index.html

Participating hosts (41 -> 40)
------------------------------

  Additional (2): fi-ilk-650 bat-adls-6 
  Missing    (3): bat-dg2-13 bat-arls-5 fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_152804v6 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_lmem_swapping@parallel-random-engines:
    - bat-adls-6:         NOTRUN -> [SKIP][1] ([i915#4613]) +3 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
    - bat-adls-6:         NOTRUN -> [SKIP][2] ([i915#3282])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@gem_tiled_pread_basic.html

  * igt@i915_selftest@live:
    - fi-glk-j4005:       [PASS][3] -> [ABORT][4] ([i915#15623])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/fi-glk-j4005/igt@i915_selftest@live.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/fi-glk-j4005/igt@i915_selftest@live.html

  * igt@i915_selftest@live@execlists:
    - fi-glk-j4005:       [PASS][5] -> [ABORT][6] ([i915#15624])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/fi-glk-j4005/igt@i915_selftest@live@execlists.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/fi-glk-j4005/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@sanitycheck:
    - bat-apl-1:          [PASS][7] -> [DMESG-WARN][8] ([i915#13735]) +77 other tests dmesg-warn
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/bat-apl-1/igt@i915_selftest@live@sanitycheck.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-apl-1/igt@i915_selftest@live@sanitycheck.html

  * igt@i915_selftest@live@workarounds:
    - bat-dg2-9:          [PASS][9] -> [DMESG-FAIL][10] ([i915#12061]) +1 other test dmesg-fail
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/bat-dg2-9/igt@i915_selftest@live@workarounds.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-dg2-9/igt@i915_selftest@live@workarounds.html
    - bat-arls-6:         [PASS][11] -> [DMESG-FAIL][12] ([i915#12061]) +1 other test dmesg-fail
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/bat-arls-6/igt@i915_selftest@live@workarounds.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-arls-6/igt@i915_selftest@live@workarounds.html

  * igt@intel_hwmon@hwmon-read:
    - bat-adls-6:         NOTRUN -> [SKIP][13] ([i915#7707]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@intel_hwmon@hwmon-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-adls-6:         NOTRUN -> [SKIP][14] ([i915#4103]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-adls-6:         NOTRUN -> [SKIP][15] ([i915#3555] / [i915#3840])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@kms_dsc@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-adls-6:         NOTRUN -> [SKIP][16]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
    - bat-adls-6:         NOTRUN -> [SKIP][17] ([i915#5354])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_pm_rpm@basic-pci-d3-state:
    - bat-apl-1:          [PASS][18] -> [DMESG-WARN][19] ([i915#13735] / [i915#180]) +49 other tests dmesg-warn
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-apl-1/igt@kms_pm_rpm@basic-pci-d3-state.html
    - fi-ilk-650:         NOTRUN -> [SKIP][20] +25 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/fi-ilk-650/igt@kms_pm_rpm@basic-pci-d3-state.html

  * igt@kms_psr@psr-primary-mmap-gtt:
    - bat-adls-6:         NOTRUN -> [SKIP][21] ([i915#1072] / [i915#9732]) +3 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@kms_psr@psr-primary-mmap-gtt.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-adls-6:         NOTRUN -> [SKIP][22] ([i915#3555])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-read:
    - bat-adls-6:         NOTRUN -> [SKIP][23] ([i915#3291]) +2 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-adls-6/igt@prime_vgem@basic-fence-read.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@mman:
    - bat-atsm-1:         [DMESG-FAIL][24] ([i915#14204]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/bat-atsm-1/igt@i915_selftest@live@mman.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-atsm-1/igt@i915_selftest@live@mman.html

  * igt@kms_hdmi_inject@inject-audio:
    - fi-tgl-1115g4:      [FAIL][26] ([i915#14867]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html

  
#### Warnings ####

  * igt@i915_selftest@live:
    - bat-atsm-1:         [DMESG-FAIL][28] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][29] ([i915#12061])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/bat-atsm-1/igt@i915_selftest@live.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/bat-atsm-1/igt@i915_selftest@live.html

  
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13735]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13735
  [i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
  [i915#14867]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14867
  [i915#15623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15623
  [i915#15624]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15624
  [i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732


Build changes
-------------

  * Linux: CI_DRM_17910 -> Patchwork_152804v6

  CI-20190529: 20190529
  CI_DRM_17910: 69c1143407ca17d556eb4e5ead7eb43b60a3fe65 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8725: 8725
  Patchwork_152804v6: 69c1143407ca17d556eb4e5ead7eb43b60a3fe65 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/index.html

[-- Attachment #2: Type: text/html, Size: 9707 bytes --]

^ permalink raw reply	[flat|nested] 27+ messages in thread

* ✗ i915.CI.Full: failure for Account for DSC bubble overhead for horizontal slices (rev6)
  2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
                   ` (17 preceding siblings ...)
  2026-01-30  9:41 ` ✓ i915.CI.BAT: success for Account for DSC bubble overhead for horizontal slices (rev6) Patchwork
@ 2026-01-30 17:45 ` Patchwork
  18 siblings, 0 replies; 27+ messages in thread
From: Patchwork @ 2026-01-30 17:45 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 135957 bytes --]

== Series Details ==

Series: Account for DSC bubble overhead for horizontal slices (rev6)
URL   : https://patchwork.freedesktop.org/series/152804/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_17910_full -> Patchwork_152804v6_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_152804v6_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_152804v6_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_152804v6_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - shard-dg2:          ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [FAIL][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-4/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-1/igt@i915_module_load@load.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-3/igt@i915_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@i915_module_load@load.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-3/igt@i915_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-3/igt@i915_module_load@load.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@i915_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-4/igt@i915_module_load@load.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-5/igt@i915_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@i915_module_load@load.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-5/igt@i915_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-1/igt@i915_module_load@load.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-3/igt@i915_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-7/igt@i915_module_load@load.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-4/igt@i915_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-7/igt@i915_module_load@load.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-6/igt@i915_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-5/igt@i915_module_load@load.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-1/igt@i915_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-6/igt@i915_module_load@load.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@i915_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@i915_module_load@load.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-1/igt@i915_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-6/igt@i915_module_load@load.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@i915_module_load@load.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-1/igt@i915_module_load@load.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@i915_module_load@load.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-5/igt@i915_module_load@load.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-7/igt@i915_module_load@load.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@i915_module_load@load.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@i915_module_load@load.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-5/igt@i915_module_load@load.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-1/igt@i915_module_load@load.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-6/igt@i915_module_load@load.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@i915_module_load@load.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-1/igt@i915_module_load@load.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@i915_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@i915_module_load@load.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-7/igt@i915_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@i915_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-1/igt@i915_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-5/igt@i915_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-5/igt@i915_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-7/igt@i915_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-3/igt@i915_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-6/igt@i915_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@i915_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@i915_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-3/igt@i915_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-3/igt@i915_module_load@load.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][51]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
    - shard-tglu-1:       NOTRUN -> [SKIP][52]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-2-size-256:
    - shard-rkl:          [PASS][53] -> [FAIL][54] +1 other test fail
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-1/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-2-size-256.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-2-size-256.html

  * igt@syncobj_timeline@etime-single-wait-for-submit-submitted:
    - shard-dg2:          [PASS][55] -> [SKIP][56] +29 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@syncobj_timeline@etime-single-wait-for-submit-submitted.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@syncobj_timeline@etime-single-wait-for-submit-submitted.html

  
#### Warnings ####

  * igt@kms_addfb_basic@clobberred-modifier:
    - shard-dg2:          [SKIP][57] ([i915#4212]) -> [SKIP][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_addfb_basic@clobberred-modifier.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_addfb_basic@clobberred-modifier.html

  * igt@kms_chamelium_frames@hdmi-crc-multiple:
    - shard-dg2:          [SKIP][59] ([i915#11151] / [i915#7828]) -> [SKIP][60] +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_chamelium_frames@hdmi-crc-multiple.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_chamelium_frames@hdmi-crc-multiple.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg2:          [SKIP][61] ([i915#6944] / [i915#9424]) -> [SKIP][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_content_protection@mei-interface.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-dg2:          [SKIP][63] ([i915#3555]) -> [SKIP][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-dg2:          [SKIP][65] ([i915#13046] / [i915#5354]) -> [SKIP][66] +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          [SKIP][67] ([i915#1257]) -> [SKIP][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_dp_aux_dev.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_dp_aux_dev.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-dg2:          [SKIP][69] ([i915#9934]) -> [SKIP][70] +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
    - shard-dg2:          [SKIP][71] ([i915#15608] / [i915#8825]) -> [SKIP][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping:
    - shard-dg2:          [SKIP][73] ([i915#15608] / [i915#15609] / [i915#8825]) -> [SKIP][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping.html

  * igt@kms_pm_rpm@cursor-dpms:
    - shard-dg2:          [SKIP][75] ([i915#4077]) -> [SKIP][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_pm_rpm@cursor-dpms.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_pm_rpm@cursor-dpms.html

  * igt@perf@global-sseu-config-invalid:
    - shard-dg2:          [SKIP][77] ([i915#7387]) -> [SKIP][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@perf@global-sseu-config-invalid.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@perf@global-sseu-config-invalid.html

  
Known issues
------------

  Here are the changes found in Patchwork_152804v6_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-tglu:         NOTRUN -> [SKIP][79] ([i915#11078])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-rkl:          NOTRUN -> [SKIP][80] ([i915#3555] / [i915#9323])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@ctrl-surf-copy:
    - shard-tglu:         NOTRUN -> [SKIP][81] ([i915#3555] / [i915#9323])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@gem_ccs@ctrl-surf-copy.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-rkl:          NOTRUN -> [SKIP][82] ([i915#9323])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-tglu:         NOTRUN -> [SKIP][83] ([i915#13008])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-tglu:         NOTRUN -> [SKIP][84] ([i915#7697])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-rkl:          NOTRUN -> [SKIP][85] ([i915#7697])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_ctx_sseu@invalid-args:
    - shard-rkl:          NOTRUN -> [SKIP][86] ([i915#280])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@gem_ctx_sseu@invalid-args.html
    - shard-tglu-1:       NOTRUN -> [SKIP][87] ([i915#280])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@gem_ctx_sseu@invalid-args.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-rkl:          NOTRUN -> [SKIP][88] ([i915#4525]) +2 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_capture@capture-invisible:
    - shard-glk10:        NOTRUN -> [SKIP][89] ([i915#6334]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@gem_exec_capture@capture-invisible.html

  * igt@gem_exec_capture@capture-invisible@smem0:
    - shard-tglu:         NOTRUN -> [SKIP][90] ([i915#6334]) +1 other test skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@gem_exec_capture@capture-invisible@smem0.html

  * igt@gem_exec_params@secure-non-root:
    - shard-dg2:          NOTRUN -> [SKIP][91]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@gem_exec_params@secure-non-root.html

  * igt@gem_exec_reloc@basic-softpin:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([i915#3281]) +6 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_exec_reloc@basic-softpin.html

  * igt@gem_exec_reloc@basic-write-read:
    - shard-dg2:          NOTRUN -> [SKIP][93] ([i915#3281])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@gem_exec_reloc@basic-write-read.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-rkl:          [PASS][94] -> [ABORT][95] ([i915#15131]) +1 other test abort
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-8/igt@gem_exec_suspend@basic-s3.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-1/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-rkl:          NOTRUN -> [SKIP][96] ([i915#4613] / [i915#7582])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-rkl:          NOTRUN -> [SKIP][97] ([i915#4613]) +1 other test skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@gem_lmem_swapping@parallel-multi.html
    - shard-tglu-1:       NOTRUN -> [SKIP][98] ([i915#4613]) +3 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_lmem_swapping@random-engines:
    - shard-glk:          NOTRUN -> [SKIP][99] ([i915#4613]) +3 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk5/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_lmem_swapping@smem-oom:
    - shard-tglu:         NOTRUN -> [SKIP][100] ([i915#4613]) +2 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@gem_lmem_swapping@smem-oom.html

  * igt@gem_mmap_gtt@medium-copy-odd:
    - shard-dg2:          NOTRUN -> [SKIP][101] ([i915#4077])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@gem_mmap_gtt@medium-copy-odd.html

  * igt@gem_pread@display:
    - shard-rkl:          NOTRUN -> [SKIP][102] ([i915#3282]) +2 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_pread@display.html

  * igt@gem_pxp@hw-rejects-pxp-buffer:
    - shard-tglu-1:       NOTRUN -> [SKIP][103] ([i915#13398])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@gem_pxp@hw-rejects-pxp-buffer.html

  * igt@gem_render_copy@y-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][104] ([i915#5190] / [i915#8428])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@gem_render_copy@y-tiled.html

  * igt@gem_set_tiling_vs_blt@tiled-to-tiled:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#8411])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@gem_set_tiling_vs_blt@tiled-to-tiled.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-tglu-1:       NOTRUN -> [SKIP][106] ([i915#3297]) +2 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-tglu:         NOTRUN -> [SKIP][107] ([i915#3297] / [i915#3323])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@unsync-overlap:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#3297]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_userptr_blits@unsync-overlap.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-glk:          [PASS][109] -> [ABORT][110] ([i915#5566])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-glk1/igt@gen9_exec_parse@allowed-all.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk2/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-rkl:          NOTRUN -> [SKIP][111] ([i915#2527]) +2 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gen9_exec_parse@allowed-single.html

  * igt@gen9_exec_parse@batch-zero-length:
    - shard-tglu:         NOTRUN -> [SKIP][112] ([i915#2527] / [i915#2856])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@gen9_exec_parse@batch-zero-length.html

  * igt@gen9_exec_parse@bb-chained:
    - shard-tglu-1:       NOTRUN -> [SKIP][113] ([i915#2527] / [i915#2856])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@gen9_exec_parse@bb-chained.html

  * igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs1:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#14073]) +7 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@i915_drm_fdinfo@most-busy-idle-check-all@vecs1.html

  * igt@i915_pm_freq_api@freq-reset-multiple:
    - shard-rkl:          NOTRUN -> [SKIP][115] ([i915#8399]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@i915_pm_freq_api@freq-reset-multiple.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][116] ([i915#8399])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_rpm@system-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][117] ([i915#13356]) +2 other tests incomplete
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk9/igt@i915_pm_rpm@system-suspend.html

  * igt@i915_power@sanity:
    - shard-mtlp:         [PASS][118] -> [SKIP][119] ([i915#7984])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-mtlp-8/igt@i915_power@sanity.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-mtlp-6/igt@i915_power@sanity.html

  * igt@i915_query@hwconfig_table:
    - shard-tglu:         NOTRUN -> [SKIP][120] ([i915#6245])
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@i915_query@hwconfig_table.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-rkl:          NOTRUN -> [SKIP][121] ([i915#5723])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@i915_query@test-query-geometry-subslices.html

  * igt@i915_suspend@fence-restore-untiled:
    - shard-glk10:        NOTRUN -> [INCOMPLETE][122] ([i915#4817])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@i915_suspend@fence-restore-untiled.html

  * igt@intel_hwmon@hwmon-read:
    - shard-rkl:          NOTRUN -> [SKIP][123] ([i915#7707])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@intel_hwmon@hwmon-read.html

  * igt@kms_addfb_basic@addfb25-y-tiled-legacy:
    - shard-dg2:          [PASS][124] -> [SKIP][125] ([i915#5190])
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-legacy.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-legacy.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-tglu:         NOTRUN -> [SKIP][126] ([i915#1769] / [i915#3555])
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
    - shard-glk10:        NOTRUN -> [SKIP][127] ([i915#1769])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [FAIL][128] ([i915#5956])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-6/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-3.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-rkl:          NOTRUN -> [SKIP][129] ([i915#5286]) +4 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][130] ([i915#5286]) +2 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-tglu:         NOTRUN -> [SKIP][131] ([i915#5286]) +3 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-mtlp:         [PASS][132] -> [FAIL][133] ([i915#5138])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-mtlp-5/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][134] ([i915#3638]) +2 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@linear-64bpp-rotate-0:
    - shard-dg2:          [PASS][135] -> [SKIP][136] +6 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_big_fb@linear-64bpp-rotate-0.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_big_fb@linear-64bpp-rotate-0.html
    - shard-dg1:          [PASS][137] -> [DMESG-WARN][138] ([i915#4423]) +1 other test dmesg-warn
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-18/igt@kms_big_fb@linear-64bpp-rotate-0.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-13/igt@kms_big_fb@linear-64bpp-rotate-0.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-tglu-1:       NOTRUN -> [SKIP][139] ([i915#3828])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][140] ([i915#10307] / [i915#10434] / [i915#6095]) +2 other tests skip
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-glk10:        NOTRUN -> [SKIP][141] +236 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][142] ([i915#6095]) +66 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][143] ([i915#14544] / [i915#6095]) +6 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_ccs@bad-rotation-90-yf-tiled-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][144] ([i915#14098] / [i915#14544] / [i915#6095]) +3 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][145] ([i915#12313])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][146] ([i915#6095]) +39 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][147] ([i915#6095]) +179 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-12/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][148] ([i915#12805])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][149] ([i915#6095]) +54 other tests skip
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][150] ([i915#12805])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][151] ([i915#14694] / [i915#15582]) +1 other test incomplete
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk1/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][152] ([i915#14098] / [i915#6095]) +44 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-1/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][153] ([i915#6095]) +40 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-3.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][154] ([i915#10307] / [i915#6095]) +109 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][155] ([i915#3742]) +1 other test skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-tglu-1:       NOTRUN -> [SKIP][156] ([i915#11151] / [i915#7828]) +4 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_frames@hdmi-frame-dump:
    - shard-rkl:          NOTRUN -> [SKIP][157] ([i915#11151] / [i915#7828]) +10 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_chamelium_frames@hdmi-frame-dump.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-tglu:         NOTRUN -> [SKIP][158] ([i915#11151] / [i915#7828]) +6 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-tglu-1:       NOTRUN -> [SKIP][159] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-3:
    - shard-dg2:          NOTRUN -> [FAIL][160] ([i915#7173])
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_content_protection@atomic-dpms@pipe-a-dp-3.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#15330] / [i915#3116])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-lic-type-0-hdcp14:
    - shard-tglu:         NOTRUN -> [SKIP][162] ([i915#15330])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_content_protection@dp-mst-lic-type-0-hdcp14.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][163] ([i915#15330] / [i915#3116] / [i915#3299])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-rkl:          NOTRUN -> [SKIP][164] ([i915#6944] / [i915#7118] / [i915#9424])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-rkl:          NOTRUN -> [SKIP][165] ([i915#6944])
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@type1:
    - shard-dg2:          NOTRUN -> [SKIP][166] ([i915#6944] / [i915#7118] / [i915#7162] / [i915#9424])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent:
    - shard-tglu:         NOTRUN -> [SKIP][167] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-tglu-1:       NOTRUN -> [SKIP][168] ([i915#3555])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-onscreen-128x42:
    - shard-rkl:          NOTRUN -> [FAIL][169] ([i915#13566]) +3 other tests fail
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-128x42.html

  * igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [FAIL][170] ([i915#13566]) +1 other test fail
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_cursor_crc@cursor-random-256x85@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-tglu-1:       NOTRUN -> [SKIP][171] ([i915#13049])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x32:
    - shard-rkl:          NOTRUN -> [SKIP][172] ([i915#3555]) +3 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_cursor_crc@cursor-rapid-movement-32x32.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][173] ([i915#12358] / [i915#14152] / [i915#7882])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk6/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][174] ([i915#12358] / [i915#14152])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk6/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][175] +22 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#4103])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-tglu:         NOTRUN -> [SKIP][177] ([i915#9067])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-rkl:          NOTRUN -> [SKIP][178] ([i915#9723]) +1 other test skip
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dither@fb-8bpc-vs-panel-8bpc:
    - shard-dg2:          [PASS][179] -> [SKIP][180] ([i915#3555])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-7/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-tglu:         NOTRUN -> [SKIP][181] ([i915#13749])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-tglu:         NOTRUN -> [SKIP][182] ([i915#13707])
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-tglu:         NOTRUN -> [SKIP][183] ([i915#3555] / [i915#3840])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][184] ([i915#9878])
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk5/igt@kms_fbcon_fbt@fbc-suspend.html
    - shard-rkl:          [PASS][185] -> [INCOMPLETE][186] ([i915#9878])
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_fbcon_fbt@fbc-suspend.html
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr:
    - shard-tglu:         NOTRUN -> [SKIP][187] ([i915#3469])
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_fbcon_fbt@psr.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][188] ([i915#3955])
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@psr1:
    - shard-tglu:         NOTRUN -> [SKIP][189] ([i915#658])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-tglu:         NOTRUN -> [SKIP][190] ([i915#3637] / [i915#9934]) +6 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-glk:          NOTRUN -> [INCOMPLETE][191] ([i915#12745] / [i915#4839]) +1 other test incomplete
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk9/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
    - shard-snb:          [PASS][192] -> [TIMEOUT][193] ([i915#14033] / [i915#14350])
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-snb4/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][194] ([i915#4839])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk9/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1:
    - shard-snb:          [PASS][195] -> [TIMEOUT][196] ([i915#14033])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-snb4/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-rkl:          NOTRUN -> [SKIP][197] ([i915#9934]) +8 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@2x-plain-flip:
    - shard-tglu-1:       NOTRUN -> [SKIP][198] ([i915#3637] / [i915#9934]) +3 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-rkl:          [PASS][199] -> [INCOMPLETE][200] ([i915#6113])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2:
    - shard-rkl:          NOTRUN -> [INCOMPLETE][201] ([i915#6113])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html

  * igt@kms_flip@flip-vs-suspend@a-hdmi-a1:
    - shard-glk:          NOTRUN -> [INCOMPLETE][202] ([i915#12745])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk9/igt@kms_flip@flip-vs-suspend@a-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][203] ([i915#2672]) +1 other test skip
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][204] ([i915#2672] / [i915#3555]) +1 other test skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][205] ([i915#2587] / [i915#2672]) +2 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][206] ([i915#2587] / [i915#2672] / [i915#3555])
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-tglu:         NOTRUN -> [SKIP][207] ([i915#2587] / [i915#2672] / [i915#3555])
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-tglu-1:       NOTRUN -> [SKIP][208] ([i915#2672] / [i915#3555])
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglu-1:       NOTRUN -> [SKIP][209] ([i915#2587] / [i915#2672]) +1 other test skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-rkl:          NOTRUN -> [SKIP][210] ([i915#2672] / [i915#3555]) +1 other test skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][211] ([i915#15104])
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-tglu-1:       NOTRUN -> [SKIP][212] +25 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt:
    - shard-tglu:         NOTRUN -> [SKIP][213] ([i915#15574]) +1 other test skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-rkl:          NOTRUN -> [SKIP][214] ([i915#5439])
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-tglu-1:       NOTRUN -> [SKIP][215] ([i915#15102]) +10 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-rkl:          NOTRUN -> [SKIP][216] ([i915#15102] / [i915#3023]) +13 other tests skip
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-shrfb-fliptrack-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][217] ([i915#8708]) +2 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-1p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen:
    - shard-tglu:         NOTRUN -> [SKIP][218] +45 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][219] ([i915#15102]) +3 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-cpu:
    - shard-dg2:          NOTRUN -> [SKIP][220] ([i915#15102])
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-tglu:         NOTRUN -> [SKIP][221] ([i915#15102]) +15 other tests skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][222] ([i915#1825]) +29 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff:
    - shard-dg2:          NOTRUN -> [SKIP][223] ([i915#5354]) +1 other test skip
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt:
    - shard-rkl:          NOTRUN -> [SKIP][224] ([i915#15574]) +3 other tests skip
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt.html
    - shard-tglu-1:       NOTRUN -> [SKIP][225] ([i915#15574]) +2 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-blt.html

  * igt@kms_hdr@invalid-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][226] ([i915#3555] / [i915#8228])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2:          [PASS][227] -> [SKIP][228] ([i915#3555] / [i915#8228])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_hdr@invalid-metadata-sizes.html
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-swap:
    - shard-tglu:         NOTRUN -> [SKIP][229] ([i915#3555] / [i915#8228]) +2 other tests skip
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_hdr@static-swap.html

  * igt@kms_hdr@static-toggle:
    - shard-rkl:          [PASS][230] -> [SKIP][231] ([i915#3555] / [i915#8228])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_hdr@static-toggle.html
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-tglu-1:       NOTRUN -> [SKIP][232] ([i915#15459])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][233] ([i915#13688])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][234] ([i915#15458])
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-dg2:          [PASS][235] -> [SKIP][236] ([i915#15459])
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_panel_fitting@legacy:
    - shard-tglu:         NOTRUN -> [SKIP][237] ([i915#6301])
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_panel_fitting@legacy.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier:
    - shard-rkl:          NOTRUN -> [SKIP][238] ([i915#15608] / [i915#8825]) +1 other test skip
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
    - shard-rkl:          NOTRUN -> [SKIP][239] ([i915#15608] / [i915#15609] / [i915#8825]) +3 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping@pipe-b-plane-0:
    - shard-rkl:          NOTRUN -> [SKIP][240] ([i915#15608]) +24 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping@pipe-b-plane-0.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-a-plane-7:
    - shard-tglu:         NOTRUN -> [SKIP][241] ([i915#15609]) +1 other test skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-a-plane-7.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-b-plane-7:
    - shard-tglu:         NOTRUN -> [SKIP][242] ([i915#15609] / [i915#8825]) +1 other test skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier-source-clamping@pipe-b-plane-7.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-b-plane-0:
    - shard-tglu-1:       NOTRUN -> [SKIP][243] ([i915#15608]) +14 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-b-plane-0.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-b-plane-7:
    - shard-tglu-1:       NOTRUN -> [SKIP][244] ([i915#15608] / [i915#8825]) +1 other test skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-b-plane-7.html

  * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
    - shard-tglu:         NOTRUN -> [SKIP][245] ([i915#15608] / [i915#15609] / [i915#8825]) +1 other test skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier:
    - shard-tglu:         NOTRUN -> [SKIP][246] ([i915#15608] / [i915#8825]) +1 other test skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
    - shard-tglu-1:       NOTRUN -> [SKIP][247] ([i915#15608] / [i915#15609] / [i915#8825])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-a-plane-7:
    - shard-tglu-1:       NOTRUN -> [SKIP][248] ([i915#15609])
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-a-plane-7.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-b-plane-7:
    - shard-tglu-1:       NOTRUN -> [SKIP][249] ([i915#15609] / [i915#8825])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping@pipe-b-plane-7.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier@pipe-a-plane-3:
    - shard-tglu:         NOTRUN -> [SKIP][250] ([i915#15608]) +20 other tests skip
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier@pipe-a-plane-3.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-a-plane-5:
    - shard-rkl:          NOTRUN -> [SKIP][251] ([i915#15609]) +5 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-5:
    - shard-rkl:          NOTRUN -> [SKIP][252] ([i915#15609] / [i915#8825]) +3 other tests skip
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-5.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb:
    - shard-glk10:        NOTRUN -> [FAIL][253] ([i915#10647] / [i915#12177])
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
    - shard-glk10:        NOTRUN -> [FAIL][254] ([i915#10647]) +1 other test fail
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html

  * igt@kms_plane_cursor@overlay:
    - shard-rkl:          [PASS][255] -> [FAIL][256] ([i915#15530]) +1 other test fail
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-1/igt@kms_plane_cursor@overlay.html
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_plane_cursor@overlay.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-dg2:          [PASS][257] -> [SKIP][258] ([i915#9423]) +1 other test skip
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d:
    - shard-tglu-1:       NOTRUN -> [SKIP][259] ([i915#15329]) +4 other tests skip
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-d.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-tglu-1:       NOTRUN -> [SKIP][260] ([i915#9812])
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-rkl:          NOTRUN -> [SKIP][261] ([i915#5354]) +1 other test skip
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-tglu:         NOTRUN -> [SKIP][262] ([i915#9685])
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         NOTRUN -> [SKIP][263] ([i915#4281])
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_lpsp@screens-disabled:
    - shard-rkl:          NOTRUN -> [SKIP][264] ([i915#8430])
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_pm_lpsp@screens-disabled.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-dg2:          NOTRUN -> [SKIP][265] ([i915#15073])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-dg1:          [PASS][266] -> [SKIP][267] ([i915#15073]) +1 other test skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-13/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-14/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-rkl:          NOTRUN -> [SKIP][268] ([i915#15073])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-rkl:          [PASS][269] -> [SKIP][270] ([i915#15073]) +3 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_pm_rpm@modeset-non-lpsp.html
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_pm_rpm@package-g7:
    - shard-dg2:          NOTRUN -> [SKIP][271] ([i915#15403])
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_pm_rpm@package-g7.html

  * igt@kms_pm_rpm@system-suspend-modeset:
    - shard-glk:          NOTRUN -> [INCOMPLETE][272] ([i915#10553])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk5/igt@kms_pm_rpm@system-suspend-modeset.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-tglu:         NOTRUN -> [SKIP][273] ([i915#6524])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_prime@basic-modeset-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][274] ([i915#6524])
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_prime@basic-modeset-hybrid.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][275] ([i915#11520]) +6 other tests skip
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk2/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-dg2:          NOTRUN -> [SKIP][276] ([i915#11520]) +1 other test skip
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-rkl:          NOTRUN -> [SKIP][277] ([i915#11520]) +8 other tests skip
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
    - shard-glk10:        NOTRUN -> [SKIP][278] ([i915#11520]) +4 other tests skip
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk10/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-tglu-1:       NOTRUN -> [SKIP][279] ([i915#11520]) +3 other tests skip
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-tglu:         NOTRUN -> [SKIP][280] ([i915#11520]) +5 other tests skip
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-tglu:         NOTRUN -> [SKIP][281] ([i915#9683])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-rkl:          NOTRUN -> [SKIP][282] ([i915#9683]) +1 other test skip
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-primary-blt:
    - shard-dg2:          NOTRUN -> [SKIP][283] ([i915#1072] / [i915#9732])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_psr@fbc-pr-primary-blt.html

  * igt@kms_psr@fbc-psr-no-drrs:
    - shard-tglu:         NOTRUN -> [SKIP][284] ([i915#9732]) +13 other tests skip
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_psr@fbc-psr-no-drrs.html

  * igt@kms_psr@fbc-psr2-sprite-render:
    - shard-rkl:          NOTRUN -> [SKIP][285] ([i915#1072] / [i915#9732]) +18 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_psr@fbc-psr2-sprite-render.html

  * igt@kms_psr@pr-no-drrs:
    - shard-glk:          NOTRUN -> [SKIP][286] +312 other tests skip
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk5/igt@kms_psr@pr-no-drrs.html

  * igt@kms_psr@pr-sprite-plane-onoff:
    - shard-tglu-1:       NOTRUN -> [SKIP][287] ([i915#9732]) +10 other tests skip
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-1/igt@kms_psr@pr-sprite-plane-onoff.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-rkl:          NOTRUN -> [SKIP][288] ([i915#9685])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-tglu:         NOTRUN -> [SKIP][289] ([i915#5289]) +1 other test skip
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-rkl:          NOTRUN -> [SKIP][290] ([i915#5289])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-tglu:         NOTRUN -> [SKIP][291] ([i915#3555]) +4 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-8/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_selftest@drm_framebuffer:
    - shard-rkl:          NOTRUN -> [ABORT][292] ([i915#13179]) +1 other test abort
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_selftest@drm_framebuffer.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-rkl:          NOTRUN -> [SKIP][293] ([i915#8623])
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2:          NOTRUN -> [SKIP][294] ([i915#8623])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-glk:          NOTRUN -> [INCOMPLETE][295] ([i915#12276]) +1 other test incomplete
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk2/igt@kms_vblank@ts-continuation-suspend.html

  * igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2:
    - shard-rkl:          [PASS][296] -> [INCOMPLETE][297] ([i915#12276])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-3/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-4/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          NOTRUN -> [SKIP][298] ([i915#11920])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_vrr@lobf.html

  * igt@kms_vrr@max-min:
    - shard-rkl:          NOTRUN -> [SKIP][299] ([i915#9906])
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@kms_vrr@max-min.html

  * igt@kms_vrr@negative-basic:
    - shard-dg2:          [PASS][300] -> [SKIP][301] ([i915#3555] / [i915#9906])
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_vrr@negative-basic.html
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-7/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-tglu:         NOTRUN -> [SKIP][302] ([i915#9906]) +2 other tests skip
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-rkl:          NOTRUN -> [SKIP][303] ([i915#8516])
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@perf_pmu@rc6-all-gts.html

  * igt@perf_pmu@rc6-suspend:
    - shard-rkl:          [PASS][304] -> [INCOMPLETE][305] ([i915#13520])
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@perf_pmu@rc6-suspend.html
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@perf_pmu@rc6-suspend.html

  * igt@prime_vgem@coherency-blt:
    - shard-dg2:          [PASS][306] -> [SKIP][307] ([i915#2575]) +22 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@prime_vgem@coherency-blt.html
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@prime_vgem@coherency-blt.html

  * igt@prime_vgem@fence-flip-hang:
    - shard-rkl:          NOTRUN -> [SKIP][308] ([i915#3708])
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@prime_vgem@fence-flip-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - shard-rkl:          NOTRUN -> [SKIP][309] ([i915#9917])
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - shard-tglu:         NOTRUN -> [FAIL][310] ([i915#12910]) +19 other tests fail
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-tglu-10/igt@sriov_basic@enable-vfs-autoprobe-on.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-immediate:
    - shard-rkl:          [ABORT][311] -> [PASS][312]
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@gem_eio@in-flight-immediate.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_eio@in-flight-immediate.html

  * igt@gem_eio@in-flight-suspend:
    - shard-rkl:          [INCOMPLETE][313] ([i915#13390]) -> [PASS][314]
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gem_eio@in-flight-suspend.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_big@single:
    - shard-mtlp:         [DMESG-FAIL][315] ([i915#15478]) -> [PASS][316]
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-mtlp-8/igt@gem_exec_big@single.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-mtlp-6/igt@gem_exec_big@single.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          [INCOMPLETE][317] ([i915#13356]) -> [PASS][318] +1 other test pass
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-7/igt@gem_exec_suspend@basic-s0.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_workarounds@suspend-resume:
    - shard-glk:          [INCOMPLETE][319] ([i915#13356] / [i915#14586]) -> [PASS][320]
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-glk1/igt@gem_workarounds@suspend-resume.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-glk9/igt@gem_workarounds@suspend-resume.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-rkl:          [ABORT][321] ([i915#15131]) -> [PASS][322]
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-1/igt@gem_workarounds@suspend-resume-context.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-7/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_suspend@sysfs-reader:
    - shard-rkl:          [ABORT][323] ([i915#15140]) -> [PASS][324]
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-1/igt@i915_suspend@sysfs-reader.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@i915_suspend@sysfs-reader.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-rkl:          [INCOMPLETE][325] ([i915#6113]) -> [PASS][326] +1 other test pass
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_flip@flip-vs-suspend.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-dg2:          [FAIL][327] ([i915#15389] / [i915#6880]) -> [PASS][328]
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_frontbuffer_tracking@fbc-tiling-4.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-rkl:          [SKIP][329] ([i915#3555] / [i915#8228]) -> [PASS][330] +1 other test pass
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_hdr@bpc-switch-dpms.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-rkl:          [SKIP][331] ([i915#6953]) -> [PASS][332]
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_plane_scaling@intel-max-src-size.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_pm_rpm@dpms-lpsp:
    - shard-rkl:          [SKIP][333] ([i915#15073]) -> [PASS][334] +1 other test pass
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-1/igt@kms_pm_rpm@dpms-lpsp.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_pm_rpm@dpms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg1:          [SKIP][335] ([i915#15073]) -> [PASS][336]
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-13/igt@kms_pm_rpm@modeset-lpsp.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp.html

  
#### Warnings ####

  * igt@api_intel_bb@blit-reloc-keep-cache:
    - shard-rkl:          [SKIP][337] ([i915#14544] / [i915#8411]) -> [SKIP][338] ([i915#8411]) +1 other test skip
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@api_intel_bb@blit-reloc-keep-cache.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@api_intel_bb@blit-reloc-keep-cache.html

  * igt@device_reset@unbind-cold-reset-rebind:
    - shard-rkl:          [SKIP][339] ([i915#11078]) -> [SKIP][340] ([i915#11078] / [i915#14544])
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@device_reset@unbind-cold-reset-rebind.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@device_reset@unbind-cold-reset-rebind.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-rkl:          [SKIP][341] ([i915#14544] / [i915#9323]) -> [SKIP][342] ([i915#9323])
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gem_ccs@block-multicopy-compressed.html
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          [SKIP][343] ([i915#14544] / [i915#3555] / [i915#9323]) -> [SKIP][344] ([i915#3555] / [i915#9323])
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gem_ccs@block-multicopy-inplace.html
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ccs@large-ctrl-surf-copy:
    - shard-rkl:          [SKIP][345] ([i915#13008]) -> [SKIP][346] ([i915#13008] / [i915#14544])
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@gem_ccs@large-ctrl-surf-copy.html
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gem_ccs@large-ctrl-surf-copy.html

  * igt@gem_exec_fence@submit3:
    - shard-dg2:          [SKIP][347] ([i915#4812]) -> [SKIP][348] ([i915#2575])
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_exec_fence@submit3.html
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_exec_fence@submit3.html

  * igt@gem_exec_reloc@basic-wc:
    - shard-dg2:          [SKIP][349] ([i915#3281]) -> [SKIP][350] ([i915#2575]) +3 other tests skip
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_exec_reloc@basic-wc.html
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_exec_reloc@basic-wc.html

  * igt@gem_exec_reloc@basic-write-gtt-noreloc:
    - shard-rkl:          [SKIP][351] ([i915#3281]) -> [SKIP][352] ([i915#14544] / [i915#3281]) +2 other tests skip
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@gem_exec_reloc@basic-write-gtt-noreloc.html
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gem_exec_reloc@basic-write-gtt-noreloc.html

  * igt@gem_exec_reloc@basic-write-wc-noreloc:
    - shard-rkl:          [SKIP][353] ([i915#14544] / [i915#3281]) -> [SKIP][354] ([i915#3281]) +3 other tests skip
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gem_exec_reloc@basic-write-wc-noreloc.html
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_exec_reloc@basic-write-wc-noreloc.html

  * igt@gem_exec_schedule@reorder-wide:
    - shard-dg2:          [SKIP][355] ([i915#4537] / [i915#4812]) -> [SKIP][356] ([i915#2575])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_exec_schedule@reorder-wide.html
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_exec_schedule@reorder-wide.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          [SKIP][357] ([i915#7276]) -> [SKIP][358] ([i915#14544] / [i915#7276])
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@gem_exec_schedule@semaphore-power.html
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-rkl:          [SKIP][359] ([i915#14544] / [i915#4613]) -> [SKIP][360] ([i915#4613]) +1 other test skip
   [359]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-random.html
   [360]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-rkl:          [SKIP][361] ([i915#4613]) -> [SKIP][362] ([i915#14544] / [i915#4613]) +1 other test skip
   [361]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
   [362]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_mmap_wc@bad-offset:
    - shard-dg2:          [SKIP][363] ([i915#4083]) -> [SKIP][364] ([i915#2575])
   [363]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_mmap_wc@bad-offset.html
   [364]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_mmap_wc@bad-offset.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
    - shard-dg2:          [SKIP][365] ([i915#3282]) -> [SKIP][366] ([i915#2575]) +1 other test skip
   [365]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
   [366]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-rkl:          [SKIP][367] ([i915#14544] / [i915#3282]) -> [SKIP][368] ([i915#3282]) +1 other test skip
   [367]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [368]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_pwrite@basic-random:
    - shard-rkl:          [SKIP][369] ([i915#3282]) -> [SKIP][370] ([i915#14544] / [i915#3282]) +2 other tests skip
   [369]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@gem_pwrite@basic-random.html
   [370]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gem_pwrite@basic-random.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-dg2:          [SKIP][371] ([i915#4270]) -> [SKIP][372] ([i915#2575])
   [371]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_pxp@reject-modify-context-protection-off-2.html
   [372]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs:
    - shard-dg2:          [SKIP][373] ([i915#5190] / [i915#8428]) -> [SKIP][374] ([i915#2575] / [i915#5190])
   [373]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs.html
   [374]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs.html

  * igt@gem_tiled_pread_pwrite:
    - shard-dg2:          [SKIP][375] ([i915#4079]) -> [SKIP][376] ([i915#2575])
   [375]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_tiled_pread_pwrite.html
   [376]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_tiled_pread_pwrite.html

  * igt@gem_unfence_active_buffers:
    - shard-dg2:          [SKIP][377] ([i915#4879]) -> [SKIP][378] ([i915#2575])
   [377]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_unfence_active_buffers.html
   [378]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_unfence_active_buffers.html

  * igt@gem_userptr_blits@create-destroy-unsync:
    - shard-rkl:          [SKIP][379] ([i915#3297]) -> [SKIP][380] ([i915#14544] / [i915#3297]) +1 other test skip
   [379]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@gem_userptr_blits@create-destroy-unsync.html
   [380]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gem_userptr_blits@create-destroy-unsync.html

  * igt@gem_userptr_blits@unsync-unmap-after-close:
    - shard-dg2:          [SKIP][381] ([i915#3297]) -> [SKIP][382] ([i915#2575])
   [381]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gem_userptr_blits@unsync-unmap-after-close.html
   [382]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gem_userptr_blits@unsync-unmap-after-close.html

  * igt@gen7_exec_parse@bitmasks:
    - shard-dg2:          [SKIP][383] -> [SKIP][384] ([i915#2575])
   [383]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@gen7_exec_parse@bitmasks.html
   [384]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@gen7_exec_parse@bitmasks.html

  * igt@gen9_exec_parse@bb-start-far:
    - shard-rkl:          [SKIP][385] ([i915#2527]) -> [SKIP][386] ([i915#14544] / [i915#2527])
   [385]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@gen9_exec_parse@bb-start-far.html
   [386]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@gen9_exec_parse@bb-start-far.html

  * igt@gen9_exec_parse@shadow-peek:
    - shard-rkl:          [SKIP][387] ([i915#14544] / [i915#2527]) -> [SKIP][388] ([i915#2527]) +1 other test skip
   [387]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@gen9_exec_parse@shadow-peek.html
   [388]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@gen9_exec_parse@shadow-peek.html

  * igt@i915_pm_freq_api@freq-suspend:
    - shard-rkl:          [SKIP][389] ([i915#8399]) -> [SKIP][390] ([i915#14544] / [i915#8399])
   [389]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@i915_pm_freq_api@freq-suspend.html
   [390]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@i915_pm_freq_api@freq-suspend.html

  * igt@i915_pm_freq_mult@media-freq@gt0:
    - shard-rkl:          [SKIP][391] ([i915#14544] / [i915#6590]) -> [SKIP][392] ([i915#6590]) +1 other test skip
   [391]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@i915_pm_freq_mult@media-freq@gt0.html
   [392]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@i915_pm_freq_mult@media-freq@gt0.html

  * igt@i915_query@query-topology-coherent-slice-mask:
    - shard-dg2:          [SKIP][393] ([i915#6188]) -> [SKIP][394] ([i915#2575])
   [393]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@i915_query@query-topology-coherent-slice-mask.html
   [394]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@i915_query@query-topology-coherent-slice-mask.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-rkl:          [SKIP][395] ([i915#5286]) -> [SKIP][396] ([i915#14544] / [i915#5286]) +2 other tests skip
   [395]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html
   [396]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-addfb-size-overflow:
    - shard-dg1:          [SKIP][397] ([i915#5286]) -> [SKIP][398] ([i915#4423] / [i915#5286])
   [397]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-12/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
   [398]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-17/igt@kms_big_fb@4-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-rkl:          [SKIP][399] ([i915#14544] / [i915#5286]) -> [SKIP][400] ([i915#5286]) +1 other test skip
   [399]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [400]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-64bpp-rotate-270:
    - shard-rkl:          [SKIP][401] ([i915#14544] / [i915#3638]) -> [SKIP][402] ([i915#3638]) +1 other test skip
   [401]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-270.html
   [402]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_big_fb@linear-64bpp-rotate-270.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-rkl:          [SKIP][403] ([i915#3828]) -> [SKIP][404] ([i915#14544] / [i915#3828])
   [403]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
   [404]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-rkl:          [SKIP][405] ([i915#3638]) -> [SKIP][406] ([i915#14544] / [i915#3638]) +2 other tests skip
   [405]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
   [406]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-dg2:          [SKIP][407] ([i915#4538] / [i915#5190]) -> [SKIP][408] ([i915#5190]) +2 other tests skip
   [407]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
   [408]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
    - shard-rkl:          [SKIP][409] ([i915#14544]) -> [SKIP][410] +1 other test skip
   [409]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html
   [410]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2:
    - shard-rkl:          [SKIP][411] ([i915#6095]) -> [SKIP][412] ([i915#14544] / [i915#6095]) +15 other tests skip
   [411]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html
   [412]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@bad-aux-stride-yf-tiled-ccs:
    - shard-dg2:          [SKIP][413] ([i915#10307] / [i915#6095]) -> [SKIP][414] +2 other tests skip
   [413]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html
   [414]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_ccs@bad-aux-stride-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-rkl:          [SKIP][415] ([i915#12313]) -> [SKIP][416] ([i915#12313] / [i915#14544])
   [415]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
   [416]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs:
    - shard-dg2:          [SKIP][417] ([i915#6095]) -> [SKIP][418] +1 other test skip
   [417]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
   [418]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][419] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][420] ([i915#14098] / [i915#6095]) +7 other tests skip
   [419]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html
   [420]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2:
    - shard-rkl:          [SKIP][421] ([i915#14098] / [i915#6095]) -> [SKIP][422] ([i915#14098] / [i915#14544] / [i915#6095]) +19 other tests skip
   [421]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html
   [422]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          [SKIP][423] ([i915#14544] / [i915#6095]) -> [SKIP][424] ([i915#6095]) +5 other tests skip
   [423]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
   [424]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
    - shard-rkl:          [SKIP][425] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][426] ([i915#11151] / [i915#7828]) +1 other test skip
   [425]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
   [426]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-rkl:          [SKIP][427] ([i915#11151] / [i915#7828]) -> [SKIP][428] ([i915#11151] / [i915#14544] / [i915#7828]) +3 other tests skip
   [427]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
   [428]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_content_protection@atomic:
    - shard-rkl:          [SKIP][429] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][430] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424]) +1 other test skip
   [429]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_content_protection@atomic.html
   [430]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-dg2:          [SKIP][431] ([i915#6944] / [i915#7118] / [i915#9424]) -> [FAIL][432] ([i915#7173])
   [431]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-6/igt@kms_content_protection@atomic-dpms.html
   [432]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_content_protection@atomic-dpms.html
    - shard-rkl:          [SKIP][433] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][434] ([i915#6944] / [i915#7118] / [i915#9424])
   [433]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_content_protection@atomic-dpms.html
   [434]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@atomic-dpms-hdcp14:
    - shard-rkl:          [SKIP][435] ([i915#14544] / [i915#6944]) -> [SKIP][436] ([i915#6944])
   [435]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_content_protection@atomic-dpms-hdcp14.html
   [436]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_content_protection@atomic-dpms-hdcp14.html

  * igt@kms_content_protection@legacy:
    - shard-dg2:          [FAIL][437] ([i915#7173]) -> [SKIP][438] ([i915#6944] / [i915#7118] / [i915#9424])
   [437]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_content_protection@legacy.html
   [438]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-dg2:          [FAIL][439] ([i915#7173]) -> [SKIP][440] ([i915#6944])
   [439]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-11/igt@kms_content_protection@legacy-hdcp14.html
   [440]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-7/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][441] ([i915#6944] / [i915#9424]) -> [SKIP][442] ([i915#9433])
   [441]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-18/igt@kms_content_protection@mei-interface.html
   [442]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-13/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-rkl:          [SKIP][443] ([i915#13049]) -> [SKIP][444] ([i915#13049] / [i915#14544])
   [443]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-5/igt@kms_cursor_crc@cursor-random-512x170.html
   [444]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-rkl:          [SKIP][445] ([i915#13049] / [i915#14544]) -> [SKIP][446] ([i915#13049])
   [445]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x512.html
   [446]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-rkl:          [SKIP][447] ([i915#3555]) -> [SKIP][448] ([i915#14544] / [i915#3555]) +6 other tests skip
   [447]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
   [448]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-legacy:
    - shard-rkl:          [SKIP][449] -> [SKIP][450] ([i915#14544]) +12 other tests skip
   [449]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html
   [450]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-rkl:          [SKIP][451] ([i915#14544] / [i915#4103]) -> [SKIP][452] ([i915#4103])
   [451]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
   [452]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-rkl:          [SKIP][453] ([i915#13748]) -> [SKIP][454] ([i915#13748] / [i915#14544])
   [453]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_dp_link_training@uhbr-mst.html
   [454]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-rkl:          [SKIP][455] ([i915#13707]) -> [SKIP][456] ([i915#13707] / [i915#14544])
   [455]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [456]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-rkl:          [SKIP][457] ([i915#3840]) -> [SKIP][458] ([i915#14544] / [i915#3840])
   [457]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_dsc@dsc-fractional-bpp.html
   [458]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-dg2:          [SKIP][459] ([i915#3555] / [i915#3840]) -> [SKIP][460]
   [459]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_dsc@dsc-with-formats.html
   [460]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_fbcon_fbt@psr:
    - shard-rkl:          [SKIP][461] ([i915#3955]) -> [SKIP][462] ([i915#14544] / [i915#3955])
   [461]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_fbcon_fbt@psr.html
   [462]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@psr1:
    - shard-rkl:          [SKIP][463] ([i915#658]) -> [SKIP][464] ([i915#14544] / [i915#658])
   [463]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_feature_discovery@psr1.html
   [464]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_feature_discovery@psr1.html

  * igt@kms_feature_discovery@psr2:
    - shard-rkl:          [SKIP][465] ([i915#14544] / [i915#658]) -> [SKIP][466] ([i915#658])
   [465]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_feature_discovery@psr2.html
   [466]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-plain-flip:
    - shard-rkl:          [SKIP][467] ([i915#9934]) -> [SKIP][468] ([i915#14544] / [i915#9934]) +6 other tests skip
   [467]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_flip@2x-plain-flip.html
   [468]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-rkl:          [SKIP][469] ([i915#14544] / [i915#9934]) -> [SKIP][470] ([i915#9934]) +1 other test skip
   [469]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_flip@2x-plain-flip-interruptible.html
   [470]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
    - shard-dg2:          [SKIP][471] ([i915#2672] / [i915#3555] / [i915#5190]) -> [SKIP][472] ([i915#5190])
   [471]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
   [472]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-rkl:          [SKIP][473] ([i915#2672] / [i915#3555]) -> [SKIP][474] ([i915#14544] / [i915#2672] / [i915#3555])
   [473]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
   [474]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          [SKIP][475] ([i915#2672]) -> [SKIP][476] ([i915#14544] / [i915#2672])
   [475]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
   [476]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
    - shard-rkl:          [SKIP][477] ([i915#14544] / [i915#2672] / [i915#3555]) -> [SKIP][478] ([i915#2672] / [i915#3555])
   [477]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
   [478]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          [SKIP][479] ([i915#14544] / [i915#2672]) -> [SKIP][480] ([i915#2672])
   [479]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html
   [480]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt:
    - shard-dg2:          [SKIP][481] ([i915#8708]) -> [SKIP][482] +1 other test skip
   [481]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html
   [482]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt:
    - shard-rkl:          [SKIP][483] ([i915#14544] / [i915#15102]) -> [SKIP][484] ([i915#15102])
   [483]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt.html
   [484]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt:
    - shard-rkl:          [SKIP][485] ([i915#15102]) -> [SKIP][486] ([i915#14544] / [i915#15102]) +2 other tests skip
   [485]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html
   [486]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-render:
    - shard-dg2:          [SKIP][487] ([i915#15102]) -> [SKIP][488]
   [487]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-render.html
   [488]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-dg2:          [SKIP][489] ([i915#15102] / [i915#3458]) -> [SKIP][490] +4 other tests skip
   [489]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [490]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - shard-dg2:          [SKIP][491] ([i915#15102] / [i915#3458]) -> [SKIP][492] ([i915#10433] / [i915#15102] / [i915#3458]) +1 other test skip
   [491]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [492]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
    - shard-dg2:          [SKIP][493] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][494] ([i915#15102] / [i915#3458]) +1 other test skip
   [493]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
   [494]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
    - shard-rkl:          [SKIP][495] ([i915#15102] / [i915#3023]) -> [SKIP][496] ([i915#14544] / [i915#15102] / [i915#3023]) +7 other tests skip
   [495]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
   [496]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-rkl:          [SKIP][497] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][498] ([i915#15102] / [i915#3023]) +5 other tests skip
   [497]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
   [498]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-rkl:          [SKIP][499] ([i915#14544] / [i915#1825]) -> [SKIP][500] ([i915#1825]) +10 other tests skip
   [499]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html
   [500]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          [SKIP][501] ([i915#1825]) -> [SKIP][502] ([i915#14544] / [i915#1825]) +21 other tests skip
   [501]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html
   [502]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt:
    - shard-dg2:          [SKIP][503] ([i915#5354]) -> [SKIP][504] +7 other tests skip
   [503]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt.html
   [504]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-wc:
    - shard-dg2:          [SKIP][505] ([i915#15574]) -> [SKIP][506]
   [505]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-wc.html
   [506]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-pwrite:
    - shard-rkl:          [SKIP][507] ([i915#15574]) -> [SKIP][508] ([i915#14544] / [i915#15574]) +2 other tests skip
   [507]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-pwrite.html
   [508]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-pwrite.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-dg2:          [SKIP][509] ([i915#12713]) -> [SKIP][510] ([i915#13331])
   [509]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-7/igt@kms_hdr@brightness-with-hdr.html
   [510]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-11/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-dg2:          [SKIP][511] ([i915#15458]) -> [SKIP][512]
   [511]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_joiner@basic-force-ultra-joiner.html
   [512]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-rkl:          [SKIP][513] ([i915#15459]) -> [SKIP][514] ([i915#14544] / [i915#15459])
   [513]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-5/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [514]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-4tiled:
    - shard-rkl:          [SKIP][515] ([i915#14712]) -> [SKIP][516] ([i915#14544] / [i915#14712])
   [515]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html
   [516]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_pipe_stress@stress-xrgb8888-4tiled.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier:
    - shard-dg1:          [SKIP][517] ([i915#15608] / [i915#8825]) -> [SKIP][518] ([i915#15608] / [i915#4423] / [i915#8825])
   [517]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html
   [518]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-13/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-a-plane-0:
    - shard-dg1:          [SKIP][519] ([i915#15608]) -> [SKIP][520] ([i915#15608] / [i915#4423])
   [519]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-a-plane-0.html
   [520]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg1-13/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-a-plane-0.html

  * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
    - shard-rkl:          [SKIP][521] ([i915#15608] / [i915#15609] / [i915#8825]) -> [SKIP][522] ([i915#14544] / [i915#15608] / [i915#15609] / [i915#8825]) +1 other test skip
   [521]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
   [522]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-b-plane-5:
    - shard-rkl:          [SKIP][523] ([i915#15609] / [i915#8825]) -> [SKIP][524] ([i915#14544] / [i915#15609] / [i915#8825]) +1 other test skip
   [523]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-b-plane-5.html
   [524]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping@pipe-a-plane-0:
    - shard-rkl:          [SKIP][525] ([i915#15608]) -> [SKIP][526] ([i915#14544] / [i915#15608]) +1 other test skip
   [525]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping@pipe-a-plane-0.html
   [526]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping@pipe-a-plane-0.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
    - shard-rkl:          [SKIP][527] ([i915#14544] / [i915#15608] / [i915#8825]) -> [SKIP][528] ([i915#15608] / [i915#8825]) +1 other test skip
   [527]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html
   [528]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier@pipe-a-plane-0:
    - shard-rkl:          [SKIP][529] ([i915#14544] / [i915#15608]) -> [SKIP][530] ([i915#15608])
   [529]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier@pipe-a-plane-0.html
   [530]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier@pipe-a-plane-0.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c:
    - shard-rkl:          [SKIP][531] ([i915#15329]) -> [SKIP][532] ([i915#14544] / [i915#15329]) +3 other tests skip
   [531]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html
   [532]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-rotation@pipe-c.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-rkl:          [SKIP][533] ([i915#9340]) -> [SKIP][534] ([i915#3828])
   [533]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
   [534]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          [SKIP][535] ([i915#15073]) -> [SKIP][536] ([i915#14544] / [i915#15073])
   [535]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [536]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
    - shard-rkl:          [SKIP][537] ([i915#11520]) -> [SKIP][538] ([i915#11520] / [i915#14544]) +5 other tests skip
   [537]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
   [538]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
    - shard-dg2:          [SKIP][539] ([i915#11520]) -> [SKIP][540] +1 other test skip
   [539]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
   [540]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-rkl:          [SKIP][541] ([i915#11520] / [i915#14544]) -> [SKIP][542] ([i915#11520]) +1 other test skip
   [541]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
   [542]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-rkl:          [SKIP][543] ([i915#9683]) -> [SKIP][544] ([i915#14544] / [i915#9683])
   [543]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_psr2_su@frontbuffer-xrgb8888.html
   [544]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-pr-sprite-plane-onoff:
    - shard-rkl:          [SKIP][545] ([i915#1072] / [i915#9732]) -> [SKIP][546] ([i915#1072] / [i915#14544] / [i915#9732]) +9 other tests skip
   [545]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_psr@fbc-pr-sprite-plane-onoff.html
   [546]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_psr@fbc-pr-sprite-plane-onoff.html

  * igt@kms_psr@psr-sprite-plane-move:
    - shard-rkl:          [SKIP][547] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][548] ([i915#1072] / [i915#9732]) +3 other tests skip
   [547]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_psr@psr-sprite-plane-move.html
   [548]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_psr@psr-sprite-plane-move.html

  * igt@kms_psr@psr2-cursor-plane-move:
    - shard-dg2:          [SKIP][549] ([i915#1072] / [i915#9732]) -> [SKIP][550] +4 other tests skip
   [549]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_psr@psr2-cursor-plane-move.html
   [550]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_psr@psr2-cursor-plane-move.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-rkl:          [SKIP][551] ([i915#5289]) -> [SKIP][552] ([i915#14544] / [i915#5289])
   [551]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
   [552]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-dg2:          [SKIP][553] ([i915#12755] / [i915#5190]) -> [SKIP][554] ([i915#5190])
   [553]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
   [554]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-8/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_vrr@flip-basic:
    - shard-rkl:          [SKIP][555] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][556] ([i915#15243] / [i915#3555])
   [555]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_vrr@flip-basic.html
   [556]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-rkl:          [SKIP][557] ([i915#9906]) -> [SKIP][558] ([i915#14544] / [i915#9906])
   [557]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-2/igt@kms_vrr@flip-basic-fastset.html
   [558]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-6/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@negative-basic:
    - shard-rkl:          [SKIP][559] ([i915#14544] / [i915#3555] / [i915#9906]) -> [SKIP][560] ([i915#3555] / [i915#9906])
   [559]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@kms_vrr@negative-basic.html
   [560]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-3/igt@kms_vrr@negative-basic.html

  * igt@perf@non-zero-reason@0-rcs0:
    - shard-dg2:          [FAIL][561] ([i915#9100]) -> [FAIL][562] ([i915#3089]) +1 other test fail
   [561]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-dg2-1/igt@perf@non-zero-reason@0-rcs0.html
   [562]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-dg2-1/igt@perf@non-zero-reason@0-rcs0.html

  * igt@prime_vgem@coherency-gtt:
    - shard-rkl:          [SKIP][563] ([i915#14544] / [i915#3708]) -> [SKIP][564] ([i915#3708])
   [563]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17910/shard-rkl-6/igt@prime_vgem@coherency-gtt.html
   [564]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/shard-rkl-8/igt@prime_vgem@coherency-gtt.html

  
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10553]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10553
  [i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#12177]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12177
  [i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12358]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12358
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13179]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13179
  [i915#13331]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13331
  [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
  [i915#13390]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13390
  [i915#13398]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13398
  [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
  [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
  [i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
  [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
  [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
  [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
  [i915#14033]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14033
  [i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
  [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
  [i915#14152]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14152
  [i915#14350]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14350
  [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
  [i915#14586]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14586
  [i915#14694]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14694
  [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
  [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
  [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
  [i915#15104]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15104
  [i915#15131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15131
  [i915#15140]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15140
  [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
  [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
  [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
  [i915#15389]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15389
  [i915#15403]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15403
  [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
  [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
  [i915#15478]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15478
  [i915#15530]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15530
  [i915#15574]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15574
  [i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
  [i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
  [i915#15609]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15609
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3089]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3089
  [i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4879]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4879
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5566
  [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
  [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
  [i915#6188]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6188
  [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
  [i915#6590]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6590
  [i915#6880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6880
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
  [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
  [i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
  [i915#7387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7387
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#7882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7882
  [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8430]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8430
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9100]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9100
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
  [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
  [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
  [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
  [i915#9878]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9878
  [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
  [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
  [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934


Build changes
-------------

  * Linux: CI_DRM_17910 -> Patchwork_152804v6

  CI-20190529: 20190529
  CI_DRM_17910: 69c1143407ca17d556eb4e5ead7eb43b60a3fe65 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8725: 8725
  Patchwork_152804v6: 69c1143407ca17d556eb4e5ead7eb43b60a3fe65 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_152804v6/index.html

[-- Attachment #2: Type: text/html, Size: 183759 bytes --]

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid
  2026-01-30  8:17 ` [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid Ankit Nautiyal
@ 2026-02-02  8:40   ` Imre Deak
  2026-02-02  9:24     ` Nautiyal, Ankit K
  0 siblings, 1 reply; 27+ messages in thread
From: Imre Deak @ 2026-02-02  8:40 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula

On Fri, Jan 30, 2026 at 01:47:59PM +0530, Ankit Nautiyal wrote:
> Currently in intel_dp_mode_valid(), we compute the number of joined pipes
> required before deciding whether DSC is needed. This ordering prevents us
> from accounting for DSC-related overhead when determining pipe
> requirements.
> 
> It is not possible to first decide whether DSC is needed and then compute
> the required number of joined pipes, because the two depend on each other:
> 
>  - DSC need is a function of the pipe count (e.g., 4‑pipe always requires
>    DSC; 2‑pipe may require it if uncompressed joiner is unavailable).
> 
>  - Whether a given pipe‑join configuration is sufficient depends on
>    effective bandwidth, which itself changes when DSC is used.
> 
> As a result, the only correct approach is to iterate candidate pipe counts.
> 
> So, refactor the logic to start with a single pipe and incrementally try
> additional pipes only if needed. While DSC overhead is not yet computed
> here, this restructuring prepares the code to support that in a follow-up
> changes.
> 
> If a forced joiner configuration is present, we just check for that
> configuration. If it fails, we bailout and return instead of trying with
> other joiner configurations.
> 
> v2:
>  - Iterate over number of pipes to be joined instead of joiner
>    candidates. (Jani)
>  - Document the rationale of iterating over number of joined pipes.
>    (Imre)
> v3:
>  - In case the force joiner configuration doesn't work, do not fallback
>    to the normal routine, bailout instead of trying other joiner
>    configurations. (Imre)
> v4:
>  - Use num_joined_pipes instead of num_pipes. (Imre)
>  - Inititialize status before the loops starts. (Imre)
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Reviewed-by: Imre Deak <imre.deak@intel.com>

There is still one issue, see below.

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 135 ++++++++++++++++--------
>  1 file changed, 89 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4c3a1b6d0015..dbe63efc1694 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1434,6 +1434,23 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
>  	return true;
>  }
>  
> +static
> +bool intel_dp_can_join(struct intel_display *display,
> +		       int num_joined_pipes)
> +{
> +	switch (num_joined_pipes) {
> +	case 1:
> +		return true;
> +	case 2:
> +		return HAS_BIGJOINER(display) ||
> +		       HAS_UNCOMPRESSED_JOINER(display);
> +	case 4:
> +		return HAS_ULTRAJOINER(display);
> +	default:
> +		return false;
> +	}
> +}
> +
>  static enum drm_mode_status
>  intel_dp_mode_valid(struct drm_connector *_connector,
>  		    const struct drm_display_mode *mode)
> @@ -1445,7 +1462,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  	const struct drm_display_mode *fixed_mode;
>  	int target_clock = mode->clock;
>  	int max_rate, mode_rate, max_lanes, max_link_clock;
> -	int max_dotclk = display->cdclk.max_dotclk_freq;
>  	u16 dsc_max_compressed_bpp = 0;
>  	u8 dsc_slice_count = 0;
>  	enum drm_mode_status status;
> @@ -1488,66 +1504,93 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  					   target_clock, mode->hdisplay,
>  					   link_bpp_x16, 0);
>  
> -	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
> -						     mode->hdisplay, target_clock);
> -	max_dotclk *= num_joined_pipes;
> +	/*
> +	 * We cannot determine the required pipe‑join count before knowing whether
> +	 * DSC is needed, nor can we determine DSC need without knowing the pipe
> +	 * count.
> +	 * Because of this dependency cycle, the only correct approach is to iterate
> +	 * over candidate pipe counts and evaluate each combination.
> +	 */
> +	status = MODE_CLOCK_HIGH;
> +	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> +		int max_dotclk = display->cdclk.max_dotclk_freq;
>  
> -	if (target_clock > max_dotclk)
> -		return MODE_CLOCK_HIGH;
> +		if (connector->force_joined_pipes &&
> +		    num_joined_pipes != connector->force_joined_pipes)
> +			continue;
>  
> -	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
> -	if (status != MODE_OK)
> -		return status;
> +		if (!intel_dp_can_join(display, num_joined_pipes))
> +			continue;
>  
> -	if (intel_dp_has_dsc(connector)) {
> -		int pipe_bpp;
> +		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> +			continue;
>  
> -		/*
> -		 * TBD pass the connector BPC,
> -		 * for now U8_MAX so that max BPC on that platform would be picked
> -		 */
> -		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> +		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
> +		if (status != MODE_OK)
> +			continue;

I missed it in my review of this particular patch, even though
I did mention the similar issue elsewhere:

status is guaranteed to be MODE_OK at this point and then ...

>  
> -		/*
> -		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
> -		 * integer value since we support only integer values of bpp.
> -		 */
> -		if (intel_dp_is_edp(intel_dp)) {
> -			dsc_max_compressed_bpp =
> -				drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
> +		if (intel_dp_has_dsc(connector)) {
> +			int pipe_bpp;
>  
> -			dsc_slice_count =
> -				intel_dp_dsc_get_slice_count(connector,
> -							     target_clock,
> -							     mode->hdisplay,
> -							     num_joined_pipes);
> +			/*
> +			 * TBD pass the connector BPC,
> +			 * for now U8_MAX so that max BPC on that platform would be picked
> +			 */
> +			pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
>  
> -			dsc = dsc_max_compressed_bpp && dsc_slice_count;
> -		} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> -			unsigned long bw_overhead_flags = 0;
> +			/*
> +			 * Output bpp is stored in 6.4 format so right shift by 4 to get the
> +			 * integer value since we support only integer values of bpp.
> +			 */
> +			if (intel_dp_is_edp(intel_dp)) {
> +				dsc_max_compressed_bpp =
> +					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
>  
> -			if (!drm_dp_is_uhbr_rate(max_link_clock))
> -				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> +				dsc_slice_count =
> +					intel_dp_dsc_get_slice_count(connector,
> +								     target_clock,
> +								     mode->hdisplay,
> +								     num_joined_pipes);
>  
> -			dsc = intel_dp_mode_valid_with_dsc(connector,
> -							   max_link_clock, max_lanes,
> -							   target_clock, mode->hdisplay,
> -							   num_joined_pipes,
> -							   output_format, pipe_bpp,
> -							   bw_overhead_flags);
> +				dsc = dsc_max_compressed_bpp && dsc_slice_count;
> +			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> +				unsigned long bw_overhead_flags = 0;
> +
> +				if (!drm_dp_is_uhbr_rate(max_link_clock))
> +					bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> +
> +				dsc = intel_dp_mode_valid_with_dsc(connector,
> +								   max_link_clock, max_lanes,
> +								   target_clock, mode->hdisplay,
> +								   num_joined_pipes,
> +								   output_format, pipe_bpp,
> +								   bw_overhead_flags);
> +			}
>  		}
> +
> +		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> +			continue;

... this will continue with status == MODE_OK and the loop can terminate
like that. So need a status = MODE_CLOCK_HIGH before continue.

> +
> +		if (mode_rate > max_rate && !dsc)

This needs a status = MODE_CLOCK_HIGH as well.

With the above fixed:
Reviewed-by: Imre Deak <imre.deak@intel.com>

> +			continue;
> +
> +		status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> +		if (status != MODE_OK)
> +			continue;
> +
> +		max_dotclk *= num_joined_pipes;
> +
> +		if (target_clock > max_dotclk) {
> +			status = MODE_CLOCK_HIGH;
> +			continue;
> +		}
> +
> +		break;
>  	}
>  
> -	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> -		return MODE_CLOCK_HIGH;
> -
> -	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
>  	if (status != MODE_OK)
>  		return status;
>  
> -	if (mode_rate > max_rate && !dsc)
> -		return MODE_CLOCK_HIGH;
> -
>  	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
>  }
>  
> -- 
> 2.45.2
> 

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid
  2026-01-30  8:18 ` [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid Ankit Nautiyal
@ 2026-02-02  8:50   ` Imre Deak
  0 siblings, 0 replies; 27+ messages in thread
From: Imre Deak @ 2026-02-02  8:50 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula

On Fri, Jan 30, 2026 at 01:48:03PM +0530, Ankit Nautiyal wrote:
> Refactor the logic to get the number of joined pipes. Start with a single
> pipe and incrementally try additional pipes only if needed. While DSC
> overhead is not yet computed here, this restructuring prepares the code to
> support that in follow-up changes.
> 
> v2:
>  - Remove fallback in case force-joiner configuration fails. (Imre)
>  - Drop redundant MODE_OK assignment (Imre)
> v3:
>  - Align with the changes in intel_dp_mode_valid(). (Imre)
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Reviewed-by: Imre Deak <imre.deak@intel.com>

One comment below.

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     |  2 -
>  drivers/gpu/drm/i915/display/intel_dp.h     |  3 +
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 86 ++++++++++++---------
>  3 files changed, 52 insertions(+), 39 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 85e84f7748d3..2a31543ce4d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1371,7 +1371,6 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
>  	return MODE_OK;
>  }
>  
> -static
>  int intel_dp_max_hdisplay_per_pipe(struct intel_display *display)
>  {
>  	return DISPLAY_VER(display) >= 30 ? 6144 : 5120;
> @@ -1434,7 +1433,6 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
>  	return true;
>  }
>  
> -static
>  bool intel_dp_can_join(struct intel_display *display,
>  		       int num_joined_pipes)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 25bfbfd291b0..6d409c1998c9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -225,5 +225,8 @@ int intel_dp_compute_config_late(struct intel_encoder *encoder,
>  				 struct drm_connector_state *conn_state);
>  int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
>  			       bool assume_all_enabled);
> +int intel_dp_max_hdisplay_per_pipe(struct intel_display *display);
> +bool intel_dp_can_join(struct intel_display *display,
> +		       int num_joined_pipes);
>  
>  #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index fc9367cc42ec..6414fc8fb4a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1420,7 +1420,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
>  	struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst.mgr;
>  	struct drm_dp_mst_port *port = connector->mst.port;
>  	const int min_bpp = 18;
> -	int max_dotclk = display->cdclk.max_dotclk_freq;
>  	int max_rate, mode_rate, max_lanes, max_link_clock;
>  	unsigned long bw_overhead_flags =
>  		DRM_DP_BW_OVERHEAD_MST | DRM_DP_BW_OVERHEAD_SSC_REF_CLK;
> @@ -1480,47 +1479,60 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
>  		return 0;
>  	}
>  
> -	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
> -						     mode->hdisplay, target_clock);
> +	*status = MODE_CLOCK_HIGH;
> +	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> +		int max_dotclk = display->cdclk.max_dotclk_freq;
>  
> -	if (intel_dp_has_dsc(connector) && drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> -		/*
> -		 * TBD pass the connector BPC,
> -		 * for now U8_MAX so that max BPC on that platform would be picked
> -		 */
> -		int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> +		if (connector->force_joined_pipes &&
> +		    num_joined_pipes != connector->force_joined_pipes)
> +			continue;
>  
> -		if (!drm_dp_is_uhbr_rate(max_link_clock))
> -			bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> +		if (!intel_dp_can_join(display, num_joined_pipes))
> +			continue;
>  
> -		dsc = intel_dp_mode_valid_with_dsc(connector,
> -						   max_link_clock, max_lanes,
> -						   target_clock, mode->hdisplay,
> -						   num_joined_pipes,
> -						   INTEL_OUTPUT_FORMAT_RGB, pipe_bpp,
> -						   bw_overhead_flags);
> +		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> +			continue;
> +
> +		if (intel_dp_has_dsc(connector) &&
> +		    drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> +			/*
> +			 * TBD pass the connector BPC,
> +			 * for now U8_MAX so that max BPC on that platform would be picked
> +			 */
> +			int pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> +
> +			if (!drm_dp_is_uhbr_rate(max_link_clock))
> +				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> +
> +			dsc = intel_dp_mode_valid_with_dsc(connector,
> +							   max_link_clock, max_lanes,
> +							   target_clock, mode->hdisplay,
> +							   num_joined_pipes,
> +							   INTEL_OUTPUT_FORMAT_RGB, pipe_bpp,
> +							   bw_overhead_flags);
> +		}
> +
> +		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> +			continue;

Nit: This does work, since *status is guaranteed to be other than MODE_OK
(either MODE_CLOCK_HIGH set before the loop, or the error return from
intel_mode_valid_max_plane_size() in the previous iteration). However
for symmetry with the SST code, this could set *status = MODE_CLOCK_HIGH
explicitly before the continue.

> +
> +		if (mode_rate > max_rate && !dsc)

This as well.

> +			continue;
> +
> +		*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> +
> +		if (*status != MODE_OK)
> +			continue;
> +
> +		max_dotclk *= num_joined_pipes;
> +
> +		if (mode->clock > max_dotclk) {
> +			*status = MODE_CLOCK_HIGH;
> +			continue;
> +		}
> +
> +		break;
>  	}
>  
> -	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) {
> -		*status = MODE_CLOCK_HIGH;
> -		return 0;
> -	}
> -
> -	if (mode_rate > max_rate && !dsc) {
> -		*status = MODE_CLOCK_HIGH;
> -		return 0;
> -	}
> -
> -	*status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> -
> -	if (*status != MODE_OK)
> -		return 0;
> -
> -	max_dotclk *= num_joined_pipes;
> -
> -	if (mode->clock > max_dotclk)
> -		*status = MODE_CLOCK_HIGH;
> -
>  	return 0;
>  }
>  
> -- 
> 2.45.2
> 

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops
  2026-01-30  8:18 ` [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops Ankit Nautiyal
@ 2026-02-02  8:51   ` Imre Deak
  0 siblings, 0 replies; 27+ messages in thread
From: Imre Deak @ 2026-02-02  8:51 UTC (permalink / raw)
  To: Ankit Nautiyal; +Cc: intel-gfx, intel-xe, jani.nikula

On Fri, Jan 30, 2026 at 01:48:10PM +0530, Ankit Nautiyal wrote:
> Introduce for_each_joiner_candidate(), intel_dp_joiner_candidate_valid()
> and intel_dp_joiner_candidate_valid() to remove duplicated joiner
> enumeration and validity checks across DP SST and MST paths.
> 
> Suggested-by: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     | 44 ++++++++++-----------
>  drivers/gpu/drm/i915/display/intel_dp.h     |  7 ++++
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 25 +-----------
>  3 files changed, 29 insertions(+), 47 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3905723f5ab6..920e4d593b1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1492,19 +1492,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>  	 * over candidate pipe counts and evaluate each combination.
>  	 */
>  	status = MODE_CLOCK_HIGH;
> -	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> +	for_each_joiner_candidate(connector, mode, num_joined_pipes) {
>  		int dsc_slice_count = 0;
>  
> -		if (connector->force_joined_pipes &&
> -		    num_joined_pipes != connector->force_joined_pipes)
> -			continue;
> -
> -		if (!intel_dp_can_join(display, num_joined_pipes))
> -			continue;
> -
> -		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> -			continue;
> -
>  		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
>  		if (status != MODE_OK)
>  			continue;
> @@ -2884,7 +2874,6 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  			     struct drm_connector_state *conn_state,
>  			     bool respect_downstream_limits)
>  {
> -	struct intel_display *display = to_intel_display(encoder);
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct intel_connector *connector =
>  		to_intel_connector(conn_state->connector);
> @@ -2898,18 +2887,7 @@ intel_dp_compute_link_config(struct intel_encoder *encoder,
>  	    !intel_dp_supports_fec(intel_dp, connector, crtc_state))
>  		return -EINVAL;
>  
> -	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> -		if (connector->force_joined_pipes &&
> -		    num_joined_pipes != connector->force_joined_pipes)
> -			continue;
> -
> -		if (!intel_dp_can_join(display, num_joined_pipes))
> -			continue;
> -
> -		if (adjusted_mode->hdisplay >
> -		    num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> -			continue;
> -
> +	for_each_joiner_candidate(connector, adjusted_mode, num_joined_pipes) {
>  		/*
>  		 * NOTE:
>  		 * The crtc_state->joiner_pipes should have been set at the end
> @@ -7219,3 +7197,21 @@ int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
>  
>  	return sdp_guardband;
>  }
> +
> +bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
> +				     int hdisplay,
> +				     int num_joined_pipes)
> +{
> +	struct intel_display *display = to_intel_display(connector);
> +
> +	if (!intel_dp_can_join(display, num_joined_pipes))
> +		return false;
> +
> +	if (hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> +		return false;
> +
> +	if (connector->force_joined_pipes && connector->force_joined_pipes != num_joined_pipes)
> +		return false;
> +
> +	return true;
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 95a38763a367..ff527b351de0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -229,5 +229,12 @@ bool intel_dp_dotclk_valid(struct intel_display *display,
>  			   int htotal,
>  			   int dsc_slice_count,
>  			   int num_joined_pipes);
> +bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
> +				     int hdisplay,
> +				     int num_joined_pipes);
> +
> +#define for_each_joiner_candidate(__connector, __mode, __num_joined_pipes) \
> +	for ((__num_joined_pipes) = 1; (__num_joined_pipes) <= (I915_MAX_PIPES); (__num_joined_pipes)++) \
> +		for_each_if(intel_dp_joiner_candidate_valid(__connector, (__mode)->hdisplay, __num_joined_pipes))
>  
>  #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index ad66c483959b..2c8a7c57e795 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -720,18 +720,7 @@ static int mst_stream_compute_config(struct intel_encoder *encoder,
>  	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
>  	pipe_config->has_pch_encoder = false;
>  
> -	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> -		if (connector->force_joined_pipes &&
> -		    num_joined_pipes != connector->force_joined_pipes)
> -			continue;
> -
> -		if (!intel_dp_can_join(display, num_joined_pipes))
> -			continue;
> -
> -		if (adjusted_mode->hdisplay >
> -		    num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> -			continue;
> -
> +	for_each_joiner_candidate(connector, adjusted_mode, num_joined_pipes) {
>  		if (num_joined_pipes > 1)
>  			pipe_config->joiner_pipes = GENMASK(crtc->pipe + num_joined_pipes - 1,
>  							    crtc->pipe);
> @@ -1535,19 +1524,9 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
>  	}
>  
>  	*status = MODE_CLOCK_HIGH;
> -	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> +	for_each_joiner_candidate(connector, mode, num_joined_pipes) {
>  		int dsc_slice_count = 0;
>  
> -		if (connector->force_joined_pipes &&
> -		    num_joined_pipes != connector->force_joined_pipes)
> -			continue;
> -
> -		if (!intel_dp_can_join(display, num_joined_pipes))
> -			continue;
> -
> -		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> -			continue;
> -
>  		if (intel_dp_has_dsc(connector) &&
>  		    drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
>  			/*
> -- 
> 2.45.2
> 

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid
  2026-02-02  8:40   ` Imre Deak
@ 2026-02-02  9:24     ` Nautiyal, Ankit K
  2026-02-02  9:27       ` Imre Deak
  0 siblings, 1 reply; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-02  9:24 UTC (permalink / raw)
  To: imre.deak; +Cc: intel-gfx, intel-xe, jani.nikula


On 2/2/2026 2:10 PM, Imre Deak wrote:
> On Fri, Jan 30, 2026 at 01:47:59PM +0530, Ankit Nautiyal wrote:
>> Currently in intel_dp_mode_valid(), we compute the number of joined pipes
>> required before deciding whether DSC is needed. This ordering prevents us
>> from accounting for DSC-related overhead when determining pipe
>> requirements.
>>
>> It is not possible to first decide whether DSC is needed and then compute
>> the required number of joined pipes, because the two depend on each other:
>>
>>   - DSC need is a function of the pipe count (e.g., 4‑pipe always requires
>>     DSC; 2‑pipe may require it if uncompressed joiner is unavailable).
>>
>>   - Whether a given pipe‑join configuration is sufficient depends on
>>     effective bandwidth, which itself changes when DSC is used.
>>
>> As a result, the only correct approach is to iterate candidate pipe counts.
>>
>> So, refactor the logic to start with a single pipe and incrementally try
>> additional pipes only if needed. While DSC overhead is not yet computed
>> here, this restructuring prepares the code to support that in a follow-up
>> changes.
>>
>> If a forced joiner configuration is present, we just check for that
>> configuration. If it fails, we bailout and return instead of trying with
>> other joiner configurations.
>>
>> v2:
>>   - Iterate over number of pipes to be joined instead of joiner
>>     candidates. (Jani)
>>   - Document the rationale of iterating over number of joined pipes.
>>     (Imre)
>> v3:
>>   - In case the force joiner configuration doesn't work, do not fallback
>>     to the normal routine, bailout instead of trying other joiner
>>     configurations. (Imre)
>> v4:
>>   - Use num_joined_pipes instead of num_pipes. (Imre)
>>   - Inititialize status before the loops starts. (Imre)
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Reviewed-by: Imre Deak <imre.deak@intel.com>
> There is still one issue, see below.
>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c | 135 ++++++++++++++++--------
>>   1 file changed, 89 insertions(+), 46 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 4c3a1b6d0015..dbe63efc1694 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1434,6 +1434,23 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
>>   	return true;
>>   }
>>   
>> +static
>> +bool intel_dp_can_join(struct intel_display *display,
>> +		       int num_joined_pipes)
>> +{
>> +	switch (num_joined_pipes) {
>> +	case 1:
>> +		return true;
>> +	case 2:
>> +		return HAS_BIGJOINER(display) ||
>> +		       HAS_UNCOMPRESSED_JOINER(display);
>> +	case 4:
>> +		return HAS_ULTRAJOINER(display);
>> +	default:
>> +		return false;
>> +	}
>> +}
>> +
>>   static enum drm_mode_status
>>   intel_dp_mode_valid(struct drm_connector *_connector,
>>   		    const struct drm_display_mode *mode)
>> @@ -1445,7 +1462,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>>   	const struct drm_display_mode *fixed_mode;
>>   	int target_clock = mode->clock;
>>   	int max_rate, mode_rate, max_lanes, max_link_clock;
>> -	int max_dotclk = display->cdclk.max_dotclk_freq;
>>   	u16 dsc_max_compressed_bpp = 0;
>>   	u8 dsc_slice_count = 0;
>>   	enum drm_mode_status status;
>> @@ -1488,66 +1504,93 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>>   					   target_clock, mode->hdisplay,
>>   					   link_bpp_x16, 0);
>>   
>> -	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
>> -						     mode->hdisplay, target_clock);
>> -	max_dotclk *= num_joined_pipes;
>> +	/*
>> +	 * We cannot determine the required pipe‑join count before knowing whether
>> +	 * DSC is needed, nor can we determine DSC need without knowing the pipe
>> +	 * count.
>> +	 * Because of this dependency cycle, the only correct approach is to iterate
>> +	 * over candidate pipe counts and evaluate each combination.
>> +	 */
>> +	status = MODE_CLOCK_HIGH;
>> +	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
>> +		int max_dotclk = display->cdclk.max_dotclk_freq;
>>   
>> -	if (target_clock > max_dotclk)
>> -		return MODE_CLOCK_HIGH;
>> +		if (connector->force_joined_pipes &&
>> +		    num_joined_pipes != connector->force_joined_pipes)
>> +			continue;
>>   
>> -	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
>> -	if (status != MODE_OK)
>> -		return status;
>> +		if (!intel_dp_can_join(display, num_joined_pipes))
>> +			continue;
>>   
>> -	if (intel_dp_has_dsc(connector)) {
>> -		int pipe_bpp;
>> +		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
>> +			continue;
>>   
>> -		/*
>> -		 * TBD pass the connector BPC,
>> -		 * for now U8_MAX so that max BPC on that platform would be picked
>> -		 */
>> -		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
>> +		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
>> +		if (status != MODE_OK)
>> +			continue;
> I missed it in my review of this particular patch, even though
> I did mention the similar issue elsewhere:
>
> status is guaranteed to be MODE_OK at this point and then ...


Oh yes this was not a problem earlier as I was setting status = 
MODE_CLOCK_HIGH inside the loop.

Thanks for catching this, will fix this in this patch and the patch#8 
and re-send.


Regards,

Ankit

>
>>   
>> -		/*
>> -		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
>> -		 * integer value since we support only integer values of bpp.
>> -		 */
>> -		if (intel_dp_is_edp(intel_dp)) {
>> -			dsc_max_compressed_bpp =
>> -				drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
>> +		if (intel_dp_has_dsc(connector)) {
>> +			int pipe_bpp;
>>   
>> -			dsc_slice_count =
>> -				intel_dp_dsc_get_slice_count(connector,
>> -							     target_clock,
>> -							     mode->hdisplay,
>> -							     num_joined_pipes);
>> +			/*
>> +			 * TBD pass the connector BPC,
>> +			 * for now U8_MAX so that max BPC on that platform would be picked
>> +			 */
>> +			pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
>>   
>> -			dsc = dsc_max_compressed_bpp && dsc_slice_count;
>> -		} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
>> -			unsigned long bw_overhead_flags = 0;
>> +			/*
>> +			 * Output bpp is stored in 6.4 format so right shift by 4 to get the
>> +			 * integer value since we support only integer values of bpp.
>> +			 */
>> +			if (intel_dp_is_edp(intel_dp)) {
>> +				dsc_max_compressed_bpp =
>> +					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
>>   
>> -			if (!drm_dp_is_uhbr_rate(max_link_clock))
>> -				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
>> +				dsc_slice_count =
>> +					intel_dp_dsc_get_slice_count(connector,
>> +								     target_clock,
>> +								     mode->hdisplay,
>> +								     num_joined_pipes);
>>   
>> -			dsc = intel_dp_mode_valid_with_dsc(connector,
>> -							   max_link_clock, max_lanes,
>> -							   target_clock, mode->hdisplay,
>> -							   num_joined_pipes,
>> -							   output_format, pipe_bpp,
>> -							   bw_overhead_flags);
>> +				dsc = dsc_max_compressed_bpp && dsc_slice_count;
>> +			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
>> +				unsigned long bw_overhead_flags = 0;
>> +
>> +				if (!drm_dp_is_uhbr_rate(max_link_clock))
>> +					bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
>> +
>> +				dsc = intel_dp_mode_valid_with_dsc(connector,
>> +								   max_link_clock, max_lanes,
>> +								   target_clock, mode->hdisplay,
>> +								   num_joined_pipes,
>> +								   output_format, pipe_bpp,
>> +								   bw_overhead_flags);
>> +			}
>>   		}
>> +
>> +		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
>> +			continue;
> ... this will continue with status == MODE_OK and the loop can terminate
> like that. So need a status = MODE_CLOCK_HIGH before continue.
>
>> +
>> +		if (mode_rate > max_rate && !dsc)
> This needs a status = MODE_CLOCK_HIGH as well.
>
> With the above fixed:
> Reviewed-by: Imre Deak <imre.deak@intel.com>
>
>> +			continue;
>> +
>> +		status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
>> +		if (status != MODE_OK)
>> +			continue;
>> +
>> +		max_dotclk *= num_joined_pipes;
>> +
>> +		if (target_clock > max_dotclk) {
>> +			status = MODE_CLOCK_HIGH;
>> +			continue;
>> +		}
>> +
>> +		break;
>>   	}
>>   
>> -	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
>> -		return MODE_CLOCK_HIGH;
>> -
>> -	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
>>   	if (status != MODE_OK)
>>   		return status;
>>   
>> -	if (mode_rate > max_rate && !dsc)
>> -		return MODE_CLOCK_HIGH;
>> -
>>   	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
>>   }
>>   
>> -- 
>> 2.45.2
>>

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid
  2026-02-02  9:24     ` Nautiyal, Ankit K
@ 2026-02-02  9:27       ` Imre Deak
  2026-02-02  9:29         ` Nautiyal, Ankit K
  0 siblings, 1 reply; 27+ messages in thread
From: Imre Deak @ 2026-02-02  9:27 UTC (permalink / raw)
  To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe, jani.nikula

On Mon, Feb 02, 2026 at 02:54:25PM +0530, Nautiyal, Ankit K wrote:
> 
> On 2/2/2026 2:10 PM, Imre Deak wrote:
> > On Fri, Jan 30, 2026 at 01:47:59PM +0530, Ankit Nautiyal wrote:
> > > Currently in intel_dp_mode_valid(), we compute the number of joined pipes
> > > required before deciding whether DSC is needed. This ordering prevents us
> > > from accounting for DSC-related overhead when determining pipe
> > > requirements.
> > > 
> > > It is not possible to first decide whether DSC is needed and then compute
> > > the required number of joined pipes, because the two depend on each other:
> > > 
> > >   - DSC need is a function of the pipe count (e.g., 4‑pipe always requires
> > >     DSC; 2‑pipe may require it if uncompressed joiner is unavailable).
> > > 
> > >   - Whether a given pipe‑join configuration is sufficient depends on
> > >     effective bandwidth, which itself changes when DSC is used.
> > > 
> > > As a result, the only correct approach is to iterate candidate pipe counts.
> > > 
> > > So, refactor the logic to start with a single pipe and incrementally try
> > > additional pipes only if needed. While DSC overhead is not yet computed
> > > here, this restructuring prepares the code to support that in a follow-up
> > > changes.
> > > 
> > > If a forced joiner configuration is present, we just check for that
> > > configuration. If it fails, we bailout and return instead of trying with
> > > other joiner configurations.
> > > 
> > > v2:
> > >   - Iterate over number of pipes to be joined instead of joiner
> > >     candidates. (Jani)
> > >   - Document the rationale of iterating over number of joined pipes.
> > >     (Imre)
> > > v3:
> > >   - In case the force joiner configuration doesn't work, do not fallback
> > >     to the normal routine, bailout instead of trying other joiner
> > >     configurations. (Imre)
> > > v4:
> > >   - Use num_joined_pipes instead of num_pipes. (Imre)
> > >   - Inititialize status before the loops starts. (Imre)
> > > 
> > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> > > Reviewed-by: Imre Deak <imre.deak@intel.com>
> > There is still one issue, see below.
> > 
> > > ---
> > >   drivers/gpu/drm/i915/display/intel_dp.c | 135 ++++++++++++++++--------
> > >   1 file changed, 89 insertions(+), 46 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > index 4c3a1b6d0015..dbe63efc1694 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > @@ -1434,6 +1434,23 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
> > >   	return true;
> > >   }
> > > +static
> > > +bool intel_dp_can_join(struct intel_display *display,
> > > +		       int num_joined_pipes)
> > > +{
> > > +	switch (num_joined_pipes) {
> > > +	case 1:
> > > +		return true;
> > > +	case 2:
> > > +		return HAS_BIGJOINER(display) ||
> > > +		       HAS_UNCOMPRESSED_JOINER(display);
> > > +	case 4:
> > > +		return HAS_ULTRAJOINER(display);
> > > +	default:
> > > +		return false;
> > > +	}
> > > +}
> > > +
> > >   static enum drm_mode_status
> > >   intel_dp_mode_valid(struct drm_connector *_connector,
> > >   		    const struct drm_display_mode *mode)
> > > @@ -1445,7 +1462,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> > >   	const struct drm_display_mode *fixed_mode;
> > >   	int target_clock = mode->clock;
> > >   	int max_rate, mode_rate, max_lanes, max_link_clock;
> > > -	int max_dotclk = display->cdclk.max_dotclk_freq;
> > >   	u16 dsc_max_compressed_bpp = 0;
> > >   	u8 dsc_slice_count = 0;
> > >   	enum drm_mode_status status;
> > > @@ -1488,66 +1504,93 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> > >   					   target_clock, mode->hdisplay,
> > >   					   link_bpp_x16, 0);
> > > -	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
> > > -						     mode->hdisplay, target_clock);
> > > -	max_dotclk *= num_joined_pipes;
> > > +	/*
> > > +	 * We cannot determine the required pipe‑join count before knowing whether
> > > +	 * DSC is needed, nor can we determine DSC need without knowing the pipe
> > > +	 * count.
> > > +	 * Because of this dependency cycle, the only correct approach is to iterate
> > > +	 * over candidate pipe counts and evaluate each combination.
> > > +	 */
> > > +	status = MODE_CLOCK_HIGH;
> > > +	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
> > > +		int max_dotclk = display->cdclk.max_dotclk_freq;
> > > -	if (target_clock > max_dotclk)
> > > -		return MODE_CLOCK_HIGH;
> > > +		if (connector->force_joined_pipes &&
> > > +		    num_joined_pipes != connector->force_joined_pipes)
> > > +			continue;
> > > -	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
> > > -	if (status != MODE_OK)
> > > -		return status;
> > > +		if (!intel_dp_can_join(display, num_joined_pipes))
> > > +			continue;
> > > -	if (intel_dp_has_dsc(connector)) {
> > > -		int pipe_bpp;
> > > +		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
> > > +			continue;
> > > -		/*
> > > -		 * TBD pass the connector BPC,
> > > -		 * for now U8_MAX so that max BPC on that platform would be picked
> > > -		 */
> > > -		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> > > +		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
> > > +		if (status != MODE_OK)
> > > +			continue;
> > I missed it in my review of this particular patch, even though
> > I did mention the similar issue elsewhere:
> > 
> > status is guaranteed to be MODE_OK at this point and then ...
> 
> 
> Oh yes this was not a problem earlier as I was setting status =
> MODE_CLOCK_HIGH inside the loop.

It was a problem even then, if this continue happened in the last
iteration.

> 
> Thanks for catching this, will fix this in this patch and the patch#8 and
> re-send.
> 
> 
> Regards,
> 
> Ankit
> 
> > 
> > > -		/*
> > > -		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
> > > -		 * integer value since we support only integer values of bpp.
> > > -		 */
> > > -		if (intel_dp_is_edp(intel_dp)) {
> > > -			dsc_max_compressed_bpp =
> > > -				drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
> > > +		if (intel_dp_has_dsc(connector)) {
> > > +			int pipe_bpp;
> > > -			dsc_slice_count =
> > > -				intel_dp_dsc_get_slice_count(connector,
> > > -							     target_clock,
> > > -							     mode->hdisplay,
> > > -							     num_joined_pipes);
> > > +			/*
> > > +			 * TBD pass the connector BPC,
> > > +			 * for now U8_MAX so that max BPC on that platform would be picked
> > > +			 */
> > > +			pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
> > > -			dsc = dsc_max_compressed_bpp && dsc_slice_count;
> > > -		} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> > > -			unsigned long bw_overhead_flags = 0;
> > > +			/*
> > > +			 * Output bpp is stored in 6.4 format so right shift by 4 to get the
> > > +			 * integer value since we support only integer values of bpp.
> > > +			 */
> > > +			if (intel_dp_is_edp(intel_dp)) {
> > > +				dsc_max_compressed_bpp =
> > > +					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
> > > -			if (!drm_dp_is_uhbr_rate(max_link_clock))
> > > -				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> > > +				dsc_slice_count =
> > > +					intel_dp_dsc_get_slice_count(connector,
> > > +								     target_clock,
> > > +								     mode->hdisplay,
> > > +								     num_joined_pipes);
> > > -			dsc = intel_dp_mode_valid_with_dsc(connector,
> > > -							   max_link_clock, max_lanes,
> > > -							   target_clock, mode->hdisplay,
> > > -							   num_joined_pipes,
> > > -							   output_format, pipe_bpp,
> > > -							   bw_overhead_flags);
> > > +				dsc = dsc_max_compressed_bpp && dsc_slice_count;
> > > +			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
> > > +				unsigned long bw_overhead_flags = 0;
> > > +
> > > +				if (!drm_dp_is_uhbr_rate(max_link_clock))
> > > +					bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
> > > +
> > > +				dsc = intel_dp_mode_valid_with_dsc(connector,
> > > +								   max_link_clock, max_lanes,
> > > +								   target_clock, mode->hdisplay,
> > > +								   num_joined_pipes,
> > > +								   output_format, pipe_bpp,
> > > +								   bw_overhead_flags);
> > > +			}
> > >   		}
> > > +
> > > +		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> > > +			continue;
> > ... this will continue with status == MODE_OK and the loop can terminate
> > like that. So need a status = MODE_CLOCK_HIGH before continue.
> > 
> > > +
> > > +		if (mode_rate > max_rate && !dsc)
> > This needs a status = MODE_CLOCK_HIGH as well.
> > 
> > With the above fixed:
> > Reviewed-by: Imre Deak <imre.deak@intel.com>
> > 
> > > +			continue;
> > > +
> > > +		status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> > > +		if (status != MODE_OK)
> > > +			continue;
> > > +
> > > +		max_dotclk *= num_joined_pipes;
> > > +
> > > +		if (target_clock > max_dotclk) {
> > > +			status = MODE_CLOCK_HIGH;
> > > +			continue;
> > > +		}
> > > +
> > > +		break;
> > >   	}
> > > -	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> > > -		return MODE_CLOCK_HIGH;
> > > -
> > > -	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
> > >   	if (status != MODE_OK)
> > >   		return status;
> > > -	if (mode_rate > max_rate && !dsc)
> > > -		return MODE_CLOCK_HIGH;
> > > -
> > >   	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
> > >   }
> > > -- 
> > > 2.45.2
> > > 

^ permalink raw reply	[flat|nested] 27+ messages in thread

* Re: [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid
  2026-02-02  9:27       ` Imre Deak
@ 2026-02-02  9:29         ` Nautiyal, Ankit K
  0 siblings, 0 replies; 27+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-02  9:29 UTC (permalink / raw)
  To: imre.deak; +Cc: intel-gfx, intel-xe, jani.nikula


On 2/2/2026 2:57 PM, Imre Deak wrote:
> On Mon, Feb 02, 2026 at 02:54:25PM +0530, Nautiyal, Ankit K wrote:
>> On 2/2/2026 2:10 PM, Imre Deak wrote:
>>> On Fri, Jan 30, 2026 at 01:47:59PM +0530, Ankit Nautiyal wrote:
>>>> Currently in intel_dp_mode_valid(), we compute the number of joined pipes
>>>> required before deciding whether DSC is needed. This ordering prevents us
>>>> from accounting for DSC-related overhead when determining pipe
>>>> requirements.
>>>>
>>>> It is not possible to first decide whether DSC is needed and then compute
>>>> the required number of joined pipes, because the two depend on each other:
>>>>
>>>>    - DSC need is a function of the pipe count (e.g., 4‑pipe always requires
>>>>      DSC; 2‑pipe may require it if uncompressed joiner is unavailable).
>>>>
>>>>    - Whether a given pipe‑join configuration is sufficient depends on
>>>>      effective bandwidth, which itself changes when DSC is used.
>>>>
>>>> As a result, the only correct approach is to iterate candidate pipe counts.
>>>>
>>>> So, refactor the logic to start with a single pipe and incrementally try
>>>> additional pipes only if needed. While DSC overhead is not yet computed
>>>> here, this restructuring prepares the code to support that in a follow-up
>>>> changes.
>>>>
>>>> If a forced joiner configuration is present, we just check for that
>>>> configuration. If it fails, we bailout and return instead of trying with
>>>> other joiner configurations.
>>>>
>>>> v2:
>>>>    - Iterate over number of pipes to be joined instead of joiner
>>>>      candidates. (Jani)
>>>>    - Document the rationale of iterating over number of joined pipes.
>>>>      (Imre)
>>>> v3:
>>>>    - In case the force joiner configuration doesn't work, do not fallback
>>>>      to the normal routine, bailout instead of trying other joiner
>>>>      configurations. (Imre)
>>>> v4:
>>>>    - Use num_joined_pipes instead of num_pipes. (Imre)
>>>>    - Inititialize status before the loops starts. (Imre)
>>>>
>>>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>>>> Reviewed-by: Imre Deak <imre.deak@intel.com>
>>> There is still one issue, see below.
>>>
>>>> ---
>>>>    drivers/gpu/drm/i915/display/intel_dp.c | 135 ++++++++++++++++--------
>>>>    1 file changed, 89 insertions(+), 46 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>>>> index 4c3a1b6d0015..dbe63efc1694 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>>> @@ -1434,6 +1434,23 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
>>>>    	return true;
>>>>    }
>>>> +static
>>>> +bool intel_dp_can_join(struct intel_display *display,
>>>> +		       int num_joined_pipes)
>>>> +{
>>>> +	switch (num_joined_pipes) {
>>>> +	case 1:
>>>> +		return true;
>>>> +	case 2:
>>>> +		return HAS_BIGJOINER(display) ||
>>>> +		       HAS_UNCOMPRESSED_JOINER(display);
>>>> +	case 4:
>>>> +		return HAS_ULTRAJOINER(display);
>>>> +	default:
>>>> +		return false;
>>>> +	}
>>>> +}
>>>> +
>>>>    static enum drm_mode_status
>>>>    intel_dp_mode_valid(struct drm_connector *_connector,
>>>>    		    const struct drm_display_mode *mode)
>>>> @@ -1445,7 +1462,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>>>>    	const struct drm_display_mode *fixed_mode;
>>>>    	int target_clock = mode->clock;
>>>>    	int max_rate, mode_rate, max_lanes, max_link_clock;
>>>> -	int max_dotclk = display->cdclk.max_dotclk_freq;
>>>>    	u16 dsc_max_compressed_bpp = 0;
>>>>    	u8 dsc_slice_count = 0;
>>>>    	enum drm_mode_status status;
>>>> @@ -1488,66 +1504,93 @@ intel_dp_mode_valid(struct drm_connector *_connector,
>>>>    					   target_clock, mode->hdisplay,
>>>>    					   link_bpp_x16, 0);
>>>> -	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
>>>> -						     mode->hdisplay, target_clock);
>>>> -	max_dotclk *= num_joined_pipes;
>>>> +	/*
>>>> +	 * We cannot determine the required pipe‑join count before knowing whether
>>>> +	 * DSC is needed, nor can we determine DSC need without knowing the pipe
>>>> +	 * count.
>>>> +	 * Because of this dependency cycle, the only correct approach is to iterate
>>>> +	 * over candidate pipe counts and evaluate each combination.
>>>> +	 */
>>>> +	status = MODE_CLOCK_HIGH;
>>>> +	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
>>>> +		int max_dotclk = display->cdclk.max_dotclk_freq;
>>>> -	if (target_clock > max_dotclk)
>>>> -		return MODE_CLOCK_HIGH;
>>>> +		if (connector->force_joined_pipes &&
>>>> +		    num_joined_pipes != connector->force_joined_pipes)
>>>> +			continue;
>>>> -	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
>>>> -	if (status != MODE_OK)
>>>> -		return status;
>>>> +		if (!intel_dp_can_join(display, num_joined_pipes))
>>>> +			continue;
>>>> -	if (intel_dp_has_dsc(connector)) {
>>>> -		int pipe_bpp;
>>>> +		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
>>>> +			continue;
>>>> -		/*
>>>> -		 * TBD pass the connector BPC,
>>>> -		 * for now U8_MAX so that max BPC on that platform would be picked
>>>> -		 */
>>>> -		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
>>>> +		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
>>>> +		if (status != MODE_OK)
>>>> +			continue;
>>> I missed it in my review of this particular patch, even though
>>> I did mention the similar issue elsewhere:
>>>
>>> status is guaranteed to be MODE_OK at this point and then ...
>>
>> Oh yes this was not a problem earlier as I was setting status =
>> MODE_CLOCK_HIGH inside the loop.
> It was a problem even then, if this continue happened in the last
> iteration.

Ah right (face palm).


>
>> Thanks for catching this, will fix this in this patch and the patch#8 and
>> re-send.
>>
>>
>> Regards,
>>
>> Ankit
>>
>>>> -		/*
>>>> -		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
>>>> -		 * integer value since we support only integer values of bpp.
>>>> -		 */
>>>> -		if (intel_dp_is_edp(intel_dp)) {
>>>> -			dsc_max_compressed_bpp =
>>>> -				drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
>>>> +		if (intel_dp_has_dsc(connector)) {
>>>> +			int pipe_bpp;
>>>> -			dsc_slice_count =
>>>> -				intel_dp_dsc_get_slice_count(connector,
>>>> -							     target_clock,
>>>> -							     mode->hdisplay,
>>>> -							     num_joined_pipes);
>>>> +			/*
>>>> +			 * TBD pass the connector BPC,
>>>> +			 * for now U8_MAX so that max BPC on that platform would be picked
>>>> +			 */
>>>> +			pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
>>>> -			dsc = dsc_max_compressed_bpp && dsc_slice_count;
>>>> -		} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
>>>> -			unsigned long bw_overhead_flags = 0;
>>>> +			/*
>>>> +			 * Output bpp is stored in 6.4 format so right shift by 4 to get the
>>>> +			 * integer value since we support only integer values of bpp.
>>>> +			 */
>>>> +			if (intel_dp_is_edp(intel_dp)) {
>>>> +				dsc_max_compressed_bpp =
>>>> +					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
>>>> -			if (!drm_dp_is_uhbr_rate(max_link_clock))
>>>> -				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
>>>> +				dsc_slice_count =
>>>> +					intel_dp_dsc_get_slice_count(connector,
>>>> +								     target_clock,
>>>> +								     mode->hdisplay,
>>>> +								     num_joined_pipes);
>>>> -			dsc = intel_dp_mode_valid_with_dsc(connector,
>>>> -							   max_link_clock, max_lanes,
>>>> -							   target_clock, mode->hdisplay,
>>>> -							   num_joined_pipes,
>>>> -							   output_format, pipe_bpp,
>>>> -							   bw_overhead_flags);
>>>> +				dsc = dsc_max_compressed_bpp && dsc_slice_count;
>>>> +			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
>>>> +				unsigned long bw_overhead_flags = 0;
>>>> +
>>>> +				if (!drm_dp_is_uhbr_rate(max_link_clock))
>>>> +					bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
>>>> +
>>>> +				dsc = intel_dp_mode_valid_with_dsc(connector,
>>>> +								   max_link_clock, max_lanes,
>>>> +								   target_clock, mode->hdisplay,
>>>> +								   num_joined_pipes,
>>>> +								   output_format, pipe_bpp,
>>>> +								   bw_overhead_flags);
>>>> +			}
>>>>    		}
>>>> +
>>>> +		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
>>>> +			continue;
>>> ... this will continue with status == MODE_OK and the loop can terminate
>>> like that. So need a status = MODE_CLOCK_HIGH before continue.
>>>
>>>> +
>>>> +		if (mode_rate > max_rate && !dsc)
>>> This needs a status = MODE_CLOCK_HIGH as well.
>>>
>>> With the above fixed:
>>> Reviewed-by: Imre Deak <imre.deak@intel.com>
>>>
>>>> +			continue;
>>>> +
>>>> +		status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
>>>> +		if (status != MODE_OK)
>>>> +			continue;
>>>> +
>>>> +		max_dotclk *= num_joined_pipes;
>>>> +
>>>> +		if (target_clock > max_dotclk) {
>>>> +			status = MODE_CLOCK_HIGH;
>>>> +			continue;
>>>> +		}
>>>> +
>>>> +		break;
>>>>    	}
>>>> -	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
>>>> -		return MODE_CLOCK_HIGH;
>>>> -
>>>> -	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
>>>>    	if (status != MODE_OK)
>>>>    		return status;
>>>> -	if (mode_rate > max_rate && !dsc)
>>>> -		return MODE_CLOCK_HIGH;
>>>> -
>>>>    	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
>>>>    }
>>>> -- 
>>>> 2.45.2
>>>>

^ permalink raw reply	[flat|nested] 27+ messages in thread

* [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid
  2026-02-02 10:37 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
@ 2026-02-02 10:37 ` Ankit Nautiyal
  0 siblings, 0 replies; 27+ messages in thread
From: Ankit Nautiyal @ 2026-02-02 10:37 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: jani.nikula, imre.deak, Ankit Nautiyal

Currently in intel_dp_mode_valid(), we compute the number of joined pipes
required before deciding whether DSC is needed. This ordering prevents us
from accounting for DSC-related overhead when determining pipe
requirements.

It is not possible to first decide whether DSC is needed and then compute
the required number of joined pipes, because the two depend on each other:

 - DSC need is a function of the pipe count (e.g., 4‑pipe always requires
   DSC; 2‑pipe may require it if uncompressed joiner is unavailable).

 - Whether a given pipe‑join configuration is sufficient depends on
   effective bandwidth, which itself changes when DSC is used.

As a result, the only correct approach is to iterate candidate pipe counts.

So, refactor the logic to start with a single pipe and incrementally try
additional pipes only if needed. While DSC overhead is not yet computed
here, this restructuring prepares the code to support that in a follow-up
changes.

If a forced joiner configuration is present, we just check for that
configuration. If it fails, we bailout and return instead of trying with
other joiner configurations.

v2:
 - Iterate over number of pipes to be joined instead of joiner
   candidates. (Jani)
 - Document the rationale of iterating over number of joined pipes.
   (Imre)
v3:
 - In case the force joiner configuration doesn't work, do not fallback
   to the normal routine, bailout instead of trying other joiner
   configurations. (Imre)
v4:
 - Use num_joined_pipes instead of num_pipes. (Imre)
 - Inititialize status before the loops starts. (Imre)
v5:
 - Fix status handling by setting MODE_CLOCK_HIGH on DSC/rate failures.
   (Imre)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 139 ++++++++++++++++--------
 1 file changed, 93 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4c3a1b6d0015..17803b3f9a21 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1434,6 +1434,23 @@ bool intel_dp_has_dsc(const struct intel_connector *connector)
 	return true;
 }
 
+static
+bool intel_dp_can_join(struct intel_display *display,
+		       int num_joined_pipes)
+{
+	switch (num_joined_pipes) {
+	case 1:
+		return true;
+	case 2:
+		return HAS_BIGJOINER(display) ||
+		       HAS_UNCOMPRESSED_JOINER(display);
+	case 4:
+		return HAS_ULTRAJOINER(display);
+	default:
+		return false;
+	}
+}
+
 static enum drm_mode_status
 intel_dp_mode_valid(struct drm_connector *_connector,
 		    const struct drm_display_mode *mode)
@@ -1445,7 +1462,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 	const struct drm_display_mode *fixed_mode;
 	int target_clock = mode->clock;
 	int max_rate, mode_rate, max_lanes, max_link_clock;
-	int max_dotclk = display->cdclk.max_dotclk_freq;
 	u16 dsc_max_compressed_bpp = 0;
 	u8 dsc_slice_count = 0;
 	enum drm_mode_status status;
@@ -1488,66 +1504,97 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 					   target_clock, mode->hdisplay,
 					   link_bpp_x16, 0);
 
-	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,
-						     mode->hdisplay, target_clock);
-	max_dotclk *= num_joined_pipes;
+	/*
+	 * We cannot determine the required pipe‑join count before knowing whether
+	 * DSC is needed, nor can we determine DSC need without knowing the pipe
+	 * count.
+	 * Because of this dependency cycle, the only correct approach is to iterate
+	 * over candidate pipe counts and evaluate each combination.
+	 */
+	status = MODE_CLOCK_HIGH;
+	for (num_joined_pipes = 1; num_joined_pipes <= I915_MAX_PIPES; num_joined_pipes++) {
+		int max_dotclk = display->cdclk.max_dotclk_freq;
 
-	if (target_clock > max_dotclk)
-		return MODE_CLOCK_HIGH;
+		if (connector->force_joined_pipes &&
+		    num_joined_pipes != connector->force_joined_pipes)
+			continue;
 
-	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
-	if (status != MODE_OK)
-		return status;
+		if (!intel_dp_can_join(display, num_joined_pipes))
+			continue;
 
-	if (intel_dp_has_dsc(connector)) {
-		int pipe_bpp;
+		if (mode->hdisplay > num_joined_pipes * intel_dp_max_hdisplay_per_pipe(display))
+			continue;
 
-		/*
-		 * TBD pass the connector BPC,
-		 * for now U8_MAX so that max BPC on that platform would be picked
-		 */
-		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
+		status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);
+		if (status != MODE_OK)
+			continue;
 
-		/*
-		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
-		 * integer value since we support only integer values of bpp.
-		 */
-		if (intel_dp_is_edp(intel_dp)) {
-			dsc_max_compressed_bpp =
-				drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
+		if (intel_dp_has_dsc(connector)) {
+			int pipe_bpp;
 
-			dsc_slice_count =
-				intel_dp_dsc_get_slice_count(connector,
-							     target_clock,
-							     mode->hdisplay,
-							     num_joined_pipes);
+			/*
+			 * TBD pass the connector BPC,
+			 * for now U8_MAX so that max BPC on that platform would be picked
+			 */
+			pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
 
-			dsc = dsc_max_compressed_bpp && dsc_slice_count;
-		} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
-			unsigned long bw_overhead_flags = 0;
+			/*
+			 * Output bpp is stored in 6.4 format so right shift by 4 to get the
+			 * integer value since we support only integer values of bpp.
+			 */
+			if (intel_dp_is_edp(intel_dp)) {
+				dsc_max_compressed_bpp =
+					drm_edp_dsc_sink_output_bpp(connector->dp.dsc_dpcd) >> 4;
 
-			if (!drm_dp_is_uhbr_rate(max_link_clock))
-				bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
+				dsc_slice_count =
+					intel_dp_dsc_get_slice_count(connector,
+								     target_clock,
+								     mode->hdisplay,
+								     num_joined_pipes);
 
-			dsc = intel_dp_mode_valid_with_dsc(connector,
-							   max_link_clock, max_lanes,
-							   target_clock, mode->hdisplay,
-							   num_joined_pipes,
-							   output_format, pipe_bpp,
-							   bw_overhead_flags);
+				dsc = dsc_max_compressed_bpp && dsc_slice_count;
+			} else if (drm_dp_sink_supports_fec(connector->dp.fec_capability)) {
+				unsigned long bw_overhead_flags = 0;
+
+				if (!drm_dp_is_uhbr_rate(max_link_clock))
+					bw_overhead_flags |= DRM_DP_BW_OVERHEAD_FEC;
+
+				dsc = intel_dp_mode_valid_with_dsc(connector,
+								   max_link_clock, max_lanes,
+								   target_clock, mode->hdisplay,
+								   num_joined_pipes,
+								   output_format, pipe_bpp,
+								   bw_overhead_flags);
+			}
 		}
+
+		if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc) {
+			status = MODE_CLOCK_HIGH;
+			continue;
+		}
+
+		if (mode_rate > max_rate && !dsc) {
+			status = MODE_CLOCK_HIGH;
+			continue;
+		}
+
+		status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
+		if (status != MODE_OK)
+			continue;
+
+		max_dotclk *= num_joined_pipes;
+
+		if (target_clock > max_dotclk) {
+			status = MODE_CLOCK_HIGH;
+			continue;
+		}
+
+		break;
 	}
 
-	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
-		return MODE_CLOCK_HIGH;
-
-	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
 	if (status != MODE_OK)
 		return status;
 
-	if (mode_rate > max_rate && !dsc)
-		return MODE_CLOCK_HIGH;
-
 	return intel_dp_mode_valid_downstream(connector, mode, target_clock);
 }
 
-- 
2.45.2


^ permalink raw reply related	[flat|nested] 27+ messages in thread

end of thread, other threads:[~2026-02-02 10:53 UTC | newest]

Thread overview: 27+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-01-30  8:17 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 01/17] drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 02/17] drm/i915/dp: Move num_joined_pipes and related checks together Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 03/17] drm/i915/dp: Extract helper to get the hdisplay limit Ankit Nautiyal
2026-01-30  8:17 ` [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid Ankit Nautiyal
2026-02-02  8:40   ` Imre Deak
2026-02-02  9:24     ` Nautiyal, Ankit K
2026-02-02  9:27       ` Imre Deak
2026-02-02  9:29         ` Nautiyal, Ankit K
2026-01-30  8:18 ` [PATCH 05/17] drm/i915/dp: Rework pipe joiner logic in compute_config Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 06/17] drm/i915/dp_mst: Move the check for dotclock at the end Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 07/17] drm/i915/dp_mst: Move the joiner dependent code together Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 08/17] drm/i915/dp_mst: Rework pipe joiner logic in mode_valid Ankit Nautiyal
2026-02-02  8:50   ` Imre Deak
2026-01-30  8:18 ` [PATCH 09/17] drm/i915/dp_mst: Extract helper to compute link for given joiner config Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 10/17] drm/i915/dp_mst: Rework pipe joiner logic in compute_config Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 11/17] drm/i915/dp: Remove unused joiner helpers Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 12/17] drm/i915/dp: Introduce helper to check pixel rate against dotclock limits Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 13/17] drm/i915/dp: Refactor dsc_slice_count handling in intel_dp_mode_valid() Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 14/17] drm/i915/dp: Account for DSC slice overhead Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 15/17] drm/i915/dp: Add helpers for joiner candidate loops Ankit Nautiyal
2026-02-02  8:51   ` Imre Deak
2026-01-30  8:18 ` [PATCH 16/17] drm/i915/display: Add upper limit check for pixel clock Ankit Nautiyal
2026-01-30  8:18 ` [PATCH 17/17] drm/i915/display: Extend the max dotclock limit to WCL Ankit Nautiyal
2026-01-30  9:41 ` ✓ i915.CI.BAT: success for Account for DSC bubble overhead for horizontal slices (rev6) Patchwork
2026-01-30 17:45 ` ✗ i915.CI.Full: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2026-02-02 10:37 [PATCH 00/17] Account for DSC bubble overhead for horizontal slices Ankit Nautiyal
2026-02-02 10:37 ` [PATCH 04/17] drm/i915/dp: Rework pipe joiner logic in mode_valid Ankit Nautiyal

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