Re: [Intel-gfx] [PATCH 05/53] drm/i915/gen12: Use fuse info to enable SFC

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

On 01/07/2021 21:23, Matt Roper wrote:
> From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> 
> In Gen12 there are various fuse combinations and in each configuration
> vdbox engine may be connected to SFC depending on which engines are
> available, so we need to set the SFC capability based on fuse value from
> the hardware. Even numbered phyical instance always have SFC, odd

physical

> numbered physical instances have SFC only if previous even instance is
> fused off.

Just a few nits.

> Bspec: 48028
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_engine_cs.c | 30 ++++++++++++++++++-----
>   1 file changed, 24 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 151870d8fdd3..4ab2c9abb943 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -442,6 +442,28 @@ void intel_engines_free(struct intel_gt *gt)
>   	}
>   }
>   
> +static inline

Inline is not desired here.

> +bool vdbox_has_sfc(struct drm_i915_private *i915, unsigned int physical_vdbox,
> +		   unsigned int logical_vdbox, u16 vdbox_mask)
> +{

I'd be tempted to prefix the function name with gen11_ so it is clearer 
it does not apply to earlier gens. Because if looking just at the diff 
out of context below, one can wonder if there is a functional change or 
not. There isn't, because there is a bailout for gen < 11 early in 
init_engine_mask(), but perhaps gen11 function name prefix would make 
this a bit more self-documenting.

> +	/*
> +	 * In Gen11, only even numbered logical VDBOXes are hooked
> +	 * up to an SFC (Scaler & Format Converter) unit.
> +	 * In Gen12, Even numbered phyical instance always are connected

physical

> +	 * to an SFC. Odd numbered physical instances have SFC only if
> +	 * previous even instance is fused off.
> +	 */
> +	if (GRAPHICS_VER(i915) == 12) {
> +		return (physical_vdbox % 2 == 0) ||
> +			!(BIT(physical_vdbox - 1) & vdbox_mask);
> +	} else if (GRAPHICS_VER(i915) == 11) {
> +		return logical_vdbox % 2 == 0;
> +	}

Not need for curlies on these branches.

> +
> +	MISSING_CASE(GRAPHICS_VER(i915));
> +	return false;
> +}
> +
>   /*
>    * Determine which engines are fused off in our particular hardware.
>    * Note that we have a catch-22 situation where we need to be able to access
> @@ -493,13 +515,9 @@ static intel_engine_mask_t init_engine_mask(struct intel_gt *gt)
>   			continue;
>   		}
>   
> -		/*
> -		 * In Gen11, only even numbered logical VDBOXes are
> -		 * hooked up to an SFC (Scaler & Format Converter) unit.
> -		 * In TGL each VDBOX has access to an SFC.
> -		 */
> -		if (GRAPHICS_VER(i915) >= 12 || logical_vdbox++ % 2 == 0)
> +		if (vdbox_has_sfc(i915, i, logical_vdbox, vdbox_mask))
>   			gt->info.vdbox_sfc_access |= BIT(i);
> +		logical_vdbox++;
>   	}
>   	drm_dbg(&i915->drm, "vdbox enable: %04x, instances: %04lx\n",
>   		vdbox_mask, VDBOX_MASK(gt));
> 

Regards,

Tvrtko
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