From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915/display: Workaround cursor left overs with PSR2 selective fetch enabled
Date: Fri, 10 Sep 2021 16:29:32 +0300 [thread overview]
Message-ID: <e0993b2b-84d7-893c-96cd-8061bdb695ae@intel.com> (raw)
In-Reply-To: <20210909230725.33735-5-jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
On 9/10/21 2:07 AM, José Roberto de Souza wrote:
> Not sure why but when moving the cursor fast it causes some artifacts
> of the cursor to be left in the cursor path, adding some pixels above
> the cursor to the damaged area fixes the issue, so leaving this as a
> workaround until proper fix is found.
>
> This is reproducile on TGL and ADL-P.
>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 25 ++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 670b0ceba110f..18e721dde22e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1565,6 +1565,28 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c
> drm_warn(&dev_priv->drm, "Missing PSR2 sel fetch alignment with DSC\n");
> }
>
> +/*
> + * FIXME: Not sure why but when moving the cursor fast it causes some artifacts
> + * of the cursor to be left in the cursor path, adding some pixels above the
> + * cursor to the damaged area fixes the issue.
> + */
> +static void cursor_area_workaround(const struct intel_plane_state *new_plane_state,
> + struct drm_rect *damaged_area,
> + struct drm_rect *pipe_clip)
> +{
> + const struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
> + int height;
> +
> + if (plane->id != PLANE_CURSOR)
> + return;
> +
> + height = drm_rect_height(&new_plane_state->uapi.dst) / 2;
> + damaged_area->y1 -= height;
> + damaged_area->y1 = max(damaged_area->y1, 0);
> +
> + clip_area_update(pipe_clip, damaged_area);
> +}
> +
> int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> @@ -1627,6 +1649,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> damaged_area.y2 = new_plane_state->uapi.dst.y2;
> clip_area_update(&pipe_clip, &damaged_area);
> }
> +
> + cursor_area_workaround(new_plane_state, &damaged_area,
> + &pipe_clip);
> continue;
> } else if (new_plane_state->uapi.alpha != old_plane_state->uapi.alpha) {
> /* If alpha changed mark the whole plane area as damaged */
>
next prev parent reply other threads:[~2021-09-10 13:30 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-09 23:07 [Intel-gfx] [PATCH 1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation José Roberto de Souza
2021-09-09 23:07 ` [Intel-gfx] [PATCH 2/5] drm/i915/display/adlp: Add new PSR2 workarounds José Roberto de Souza
2021-09-10 13:38 ` Gwan-gyeong Mun
2021-09-10 16:29 ` Souza, Jose
2021-09-13 16:09 ` Gwan-gyeong Mun
2021-09-13 17:00 ` Souza, Jose
2021-09-14 12:39 ` Gwan-gyeong Mun
2021-09-09 23:07 ` [Intel-gfx] [PATCH 3/5] drm/i915/display: Wait at least 2 frames before selective update José Roberto de Souza
2021-09-10 13:26 ` Gwan-gyeong Mun
2021-09-09 23:07 ` [Intel-gfx] [PATCH 4/5] drm/i915/display/psr: Use drm damage helpers to calculate plane damaged area José Roberto de Souza
2021-09-13 16:03 ` Gwan-gyeong Mun
2021-09-13 16:45 ` Souza, Jose
2021-09-14 12:42 ` Gwan-gyeong Mun
2021-09-09 23:07 ` [Intel-gfx] [PATCH 5/5] drm/i915/display: Workaround cursor left overs with PSR2 selective fetch enabled José Roberto de Souza
2021-09-10 13:29 ` Gwan-gyeong Mun [this message]
2021-09-10 0:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR calculation Patchwork
2021-09-10 0:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-10 2:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-10 13:39 ` [Intel-gfx] [PATCH 1/5] " Gwan-gyeong Mun
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e0993b2b-84d7-893c-96cd-8061bdb695ae@intel.com \
--to=gwan-gyeong.mun@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jose.souza@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox