* [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-04 10:51 [Intel-gfx] [PATCH v5 1/5] " Matthew Auld
@ 2022-10-04 10:51 ` Matthew Auld
0 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2022-10-04 10:51 UTC (permalink / raw)
To: intel-gfx; +Cc: Nirmoy Das, Jianshui Yu
For these types of display buffers, we need to able to CPU access some
part of the backing memory in prepare_plane_clear_colors(). As a result
we need to ensure we always place in the mappable part of lmem, which
becomes necessary on small-bar systems.
v2(Nirmoy & Ville):
- Add some commentary for why we need to CPU access the buffer.
- Split out the other changes, so we just consider the display change
here.
v3:
- Handle this in the dpt path.
Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
Reported-by: Jianshui Yu <jianshui.yu@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 24 +++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 5031ee5695dd..1aa42862a2c4 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
continue;
if (HAS_LMEM(dev_priv)) {
- ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
+ unsigned int flags = obj->flags;
+
+ /*
+ * For this type of buffer we need to able to read from the CPU
+ * the clear color value found in the buffer, hence we need to
+ * ensure it is always in the mappable part of lmem, if this is
+ * a small-bar device.
+ */
+ if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
+ flags &= ~I915_BO_ALLOC_GPU_ONLY;
+ ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
+ flags);
if (ret)
continue;
}
@@ -154,8 +165,17 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
ret = i915_gem_object_lock(obj, &ww);
if (!ret && phys_cursor)
ret = i915_gem_object_attach_phys(obj, alignment);
- else if (!ret && HAS_LMEM(dev_priv))
+ else if (!ret && HAS_LMEM(dev_priv)) {
+ /*
+ * For this type of ccs buffer we need to able to read from the
+ * CPU the clear color value found in the buffer, which might
+ * require moving to the mappable part of lmem first, but here
+ * we should be using dpt for this.
+ */
+ WARN_ON_ONCE(intel_fb_rc_ccs_cc_plane(fb) >= 0);
+
ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
+ }
if (!ret)
ret = i915_gem_object_pin_pages(obj);
if (ret)
--
2.37.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
@ 2022-10-04 13:19 Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt Matthew Auld
` (7 more replies)
0 siblings, 8 replies; 18+ messages in thread
From: Matthew Auld @ 2022-10-04 13:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Nirmoy Das, Jianshui Yu
The copy is async (if there even is one), but when later updating the
GGTT we always sync against the binding, which will in turn sync against
any moves.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Jianshui Yu <jianshui.yu@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index c86e5d4ee016..0cd9e8cb078b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -141,7 +141,6 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
ret = i915_gem_object_attach_phys(obj, alignment);
else if (!ret && HAS_LMEM(dev_priv))
ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
- /* TODO: Do we need to sync when migration becomes async? */
if (!ret)
ret = i915_gem_object_pin_pages(obj);
if (ret)
--
2.37.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
@ 2022-10-04 13:19 ` Matthew Auld
2022-10-04 13:31 ` Ville Syrjälä
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 3/5] drm/i915: allow control over the flags when migrating Matthew Auld
` (6 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2022-10-04 13:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Nirmoy Das, Jianshui Yu
On platforms like DG2, it looks like the dpt path here is missing the
migrate-to-lmem step on discrete platforms.
v2:
- Move the vma_pin() under the for_i915_gem_ww(), otherwise the
object can be moved after dropping the lock and then doing the pin.
Fixes: 33e7a975103c ("drm/i915/xelpd: First stab at DPT support")
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Jianshui Yu <jianshui.yu@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 51 +++++++++++++--------
1 file changed, 33 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 0cd9e8cb078b..5031ee5695dd 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -26,10 +26,17 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
struct drm_device *dev = fb->dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+ struct i915_gem_ww_ctx ww;
struct i915_vma *vma;
u32 alignment;
int ret;
+ /*
+ * We are not syncing against the binding (and potential migrations)
+ * below, so this vm must never be async.
+ */
+ GEM_WARN_ON(vm->bind_async_flags);
+
if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
return ERR_PTR(-EINVAL);
@@ -37,29 +44,37 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
- ret = i915_gem_object_lock_interruptible(obj, NULL);
- if (!ret) {
+ for_i915_gem_ww(&ww, ret, true) {
+ ret = i915_gem_object_lock(obj, &ww);
+ if (ret)
+ continue;
+
+ if (HAS_LMEM(dev_priv)) {
+ ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
+ if (ret)
+ continue;
+ }
+
ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
- i915_gem_object_unlock(obj);
- }
- if (ret) {
- vma = ERR_PTR(ret);
- goto err;
- }
+ if (ret)
+ continue;
- vma = i915_vma_instance(obj, vm, view);
- if (IS_ERR(vma))
- goto err;
+ vma = i915_vma_instance(obj, vm, view);
+ if (IS_ERR(vma)) {
+ ret = PTR_ERR(vma);
+ continue;
+ }
- if (i915_vma_misplaced(vma, 0, alignment, 0)) {
- ret = i915_vma_unbind_unlocked(vma);
- if (ret) {
- vma = ERR_PTR(ret);
- goto err;
+ if (i915_vma_misplaced(vma, 0, alignment, 0)) {
+ ret = i915_vma_unbind(vma);
+ if (ret)
+ continue;
}
- }
- ret = i915_vma_pin(vma, 0, alignment, PIN_GLOBAL);
+ ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL);
+ if (ret)
+ continue;
+ }
if (ret) {
vma = ERR_PTR(ret);
goto err;
--
2.37.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v5 3/5] drm/i915: allow control over the flags when migrating
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt Matthew Auld
@ 2022-10-04 13:19 ` Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
` (5 subsequent siblings)
7 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2022-10-04 13:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Nirmoy Das, Jianshui Yu
In the next patch we want to move the object (if the current resource is
not compatible), to the mappable part of lmem for some display buffers.
Currently that requires being able to unset the I915_BO_ALLOC_GPU_ONLY
hint.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Jianshui Yu <jianshui.yu@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 37 ++++++++++++++++++-
drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ++
.../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 5 ++-
4 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 7ff9c7877bec..369006c5317f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -652,6 +652,41 @@ bool i915_gem_object_can_migrate(struct drm_i915_gem_object *obj,
int i915_gem_object_migrate(struct drm_i915_gem_object *obj,
struct i915_gem_ww_ctx *ww,
enum intel_region_id id)
+{
+ return __i915_gem_object_migrate(obj, ww, id, obj->flags);
+}
+
+/**
+ * __i915_gem_object_migrate - Migrate an object to the desired region id, with
+ * control of the extra flags
+ * @obj: The object to migrate.
+ * @ww: An optional struct i915_gem_ww_ctx. If NULL, the backend may
+ * not be successful in evicting other objects to make room for this object.
+ * @id: The region id to migrate to.
+ * @flags: The object flags. Normally just obj->flags.
+ *
+ * Attempt to migrate the object to the desired memory region. The
+ * object backend must support migration and the object may not be
+ * pinned, (explicitly pinned pages or pinned vmas). The object must
+ * be locked.
+ * On successful completion, the object will have pages pointing to
+ * memory in the new region, but an async migration task may not have
+ * completed yet, and to accomplish that, i915_gem_object_wait_migration()
+ * must be called.
+ *
+ * Note: the @ww parameter is not used yet, but included to make sure
+ * callers put some effort into obtaining a valid ww ctx if one is
+ * available.
+ *
+ * Return: 0 on success. Negative error code on failure. In particular may
+ * return -ENXIO on lack of region space, -EDEADLK for deadlock avoidance
+ * if @ww is set, -EINTR or -ERESTARTSYS if signal pending, and
+ * -EBUSY if the object is pinned.
+ */
+int __i915_gem_object_migrate(struct drm_i915_gem_object *obj,
+ struct i915_gem_ww_ctx *ww,
+ enum intel_region_id id,
+ unsigned int flags)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
struct intel_memory_region *mr;
@@ -672,7 +707,7 @@ int i915_gem_object_migrate(struct drm_i915_gem_object *obj,
return 0;
}
- return obj->ops->migrate(obj, mr);
+ return obj->ops->migrate(obj, mr, flags);
}
/**
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index a3b7551a57fc..6b9ecff42bb5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -612,6 +612,10 @@ bool i915_gem_object_migratable(struct drm_i915_gem_object *obj);
int i915_gem_object_migrate(struct drm_i915_gem_object *obj,
struct i915_gem_ww_ctx *ww,
enum intel_region_id id);
+int __i915_gem_object_migrate(struct drm_i915_gem_object *obj,
+ struct i915_gem_ww_ctx *ww,
+ enum intel_region_id id,
+ unsigned int flags);
bool i915_gem_object_can_migrate(struct drm_i915_gem_object *obj,
enum intel_region_id id);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 40305e2bcd49..d0d6772e6f36 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -107,7 +107,8 @@ struct drm_i915_gem_object_ops {
* pinning or for as long as the object lock is held.
*/
int (*migrate)(struct drm_i915_gem_object *obj,
- struct intel_memory_region *mr);
+ struct intel_memory_region *mr,
+ unsigned int flags);
void (*release)(struct drm_i915_gem_object *obj);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 3dc6acfcf4ec..5bed353ee9bc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -848,9 +848,10 @@ static int __i915_ttm_migrate(struct drm_i915_gem_object *obj,
}
static int i915_ttm_migrate(struct drm_i915_gem_object *obj,
- struct intel_memory_region *mr)
+ struct intel_memory_region *mr,
+ unsigned int flags)
{
- return __i915_ttm_migrate(obj, mr, obj->flags);
+ return __i915_ttm_migrate(obj, mr, flags);
}
static void i915_ttm_put_pages(struct drm_i915_gem_object *obj,
--
2.37.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 3/5] drm/i915: allow control over the flags when migrating Matthew Auld
@ 2022-10-04 13:19 ` Matthew Auld
2022-10-04 13:39 ` Ville Syrjälä
` (2 more replies)
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 5/5] drm/i915: check memory is mappable in read_from_page Matthew Auld
` (4 subsequent siblings)
7 siblings, 3 replies; 18+ messages in thread
From: Matthew Auld @ 2022-10-04 13:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Nirmoy Das, Jianshui Yu
For these types of display buffers, we need to able to CPU access some
part of the backing memory in prepare_plane_clear_colors(). As a result
we need to ensure we always place in the mappable part of lmem, which
becomes necessary on small-bar systems.
v2(Nirmoy & Ville):
- Add some commentary for why we need to CPU access the buffer.
- Split out the other changes, so we just consider the display change
here.
v3:
- Handle this in the dpt path.
v4(Ville):
- Drop the intel_fb_rc_ccs_cc_plane() sanity check in
pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
seems.
Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
Reported-by: Jianshui Yu <jianshui.yu@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 5031ee5695dd..e12339f46640 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
continue;
if (HAS_LMEM(dev_priv)) {
- ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
+ unsigned int flags = obj->flags;
+
+ /*
+ * For this type of buffer we need to able to read from the CPU
+ * the clear color value found in the buffer, hence we need to
+ * ensure it is always in the mappable part of lmem, if this is
+ * a small-bar device.
+ */
+ if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
+ flags &= ~I915_BO_ALLOC_GPU_ONLY;
+ ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
+ flags);
if (ret)
continue;
}
--
2.37.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [Intel-gfx] [PATCH v5 5/5] drm/i915: check memory is mappable in read_from_page
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
` (2 preceding siblings ...)
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
@ 2022-10-04 13:19 ` Matthew Auld
2022-10-04 19:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Patchwork
` (3 subsequent siblings)
7 siblings, 0 replies; 18+ messages in thread
From: Matthew Auld @ 2022-10-04 13:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Nirmoy Das, Jianshui Yu
On small-bar systems we could be given something non-mappable here,
which leads to nasty oops. Make this nicer by checking if the resource
is mappable or not, and return an error otherwise.
v2: drop GEM_BUG_ON(flags & I915_BO_ALLOC_GPU_ONLY)
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Jianshui Yu <jianshui.yu@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_object.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 369006c5317f..62495d5d0038 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -444,6 +444,16 @@ i915_gem_object_read_from_page_iomap(struct drm_i915_gem_object *obj, u64 offset
io_mapping_unmap(src_map);
}
+static bool object_has_mappable_iomem(struct drm_i915_gem_object *obj)
+{
+ GEM_BUG_ON(!i915_gem_object_has_iomem(obj));
+
+ if (IS_DGFX(to_i915(obj->base.dev)))
+ return i915_ttm_resource_mappable(i915_gem_to_ttm(obj)->resource);
+
+ return true;
+}
+
/**
* i915_gem_object_read_from_page - read data from the page of a GEM object
* @obj: GEM object to read from
@@ -466,7 +476,7 @@ int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 offset,
if (i915_gem_object_has_struct_page(obj))
i915_gem_object_read_from_page_kmap(obj, offset, dst, size);
- else if (i915_gem_object_has_iomem(obj))
+ else if (i915_gem_object_has_iomem(obj) && object_has_mappable_iomem(obj))
i915_gem_object_read_from_page_iomap(obj, offset, dst, size);
else
return -ENODEV;
--
2.37.3
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt Matthew Auld
@ 2022-10-04 13:31 ` Ville Syrjälä
0 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2022-10-04 13:31 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx, Nirmoy Das, Jianshui Yu
On Tue, Oct 04, 2022 at 02:19:13PM +0100, Matthew Auld wrote:
> On platforms like DG2, it looks like the dpt path here is missing the
> migrate-to-lmem step on discrete platforms.
>
> v2:
> - Move the vma_pin() under the for_i915_gem_ww(), otherwise the
> object can be moved after dropping the lock and then doing the pin.
>
> Fixes: 33e7a975103c ("drm/i915/xelpd: First stab at DPT support")
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Jianshui Yu <jianshui.yu@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb_pin.c | 51 +++++++++++++--------
> 1 file changed, 33 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> index 0cd9e8cb078b..5031ee5695dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -26,10 +26,17 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
> struct drm_device *dev = fb->dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> struct drm_i915_gem_object *obj = intel_fb_obj(fb);
> + struct i915_gem_ww_ctx ww;
> struct i915_vma *vma;
> u32 alignment;
> int ret;
>
> + /*
> + * We are not syncing against the binding (and potential migrations)
> + * below, so this vm must never be async.
> + */
> + GEM_WARN_ON(vm->bind_async_flags);
> +
> if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
> return ERR_PTR(-EINVAL);
>
> @@ -37,29 +44,37 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
>
> atomic_inc(&dev_priv->gpu_error.pending_fb_pin);
>
> - ret = i915_gem_object_lock_interruptible(obj, NULL);
> - if (!ret) {
> + for_i915_gem_ww(&ww, ret, true) {
> + ret = i915_gem_object_lock(obj, &ww);
> + if (ret)
> + continue;
> +
> + if (HAS_LMEM(dev_priv)) {
> + ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
> + if (ret)
> + continue;
> + }
> +
> ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
> - i915_gem_object_unlock(obj);
> - }
> - if (ret) {
> - vma = ERR_PTR(ret);
> - goto err;
> - }
> + if (ret)
> + continue;
>
> - vma = i915_vma_instance(obj, vm, view);
> - if (IS_ERR(vma))
> - goto err;
> + vma = i915_vma_instance(obj, vm, view);
> + if (IS_ERR(vma)) {
> + ret = PTR_ERR(vma);
> + continue;
> + }
>
> - if (i915_vma_misplaced(vma, 0, alignment, 0)) {
> - ret = i915_vma_unbind_unlocked(vma);
> - if (ret) {
> - vma = ERR_PTR(ret);
> - goto err;
> + if (i915_vma_misplaced(vma, 0, alignment, 0)) {
> + ret = i915_vma_unbind(vma);
> + if (ret)
> + continue;
> }
> - }
>
> - ret = i915_vma_pin(vma, 0, alignment, PIN_GLOBAL);
> + ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL);
> + if (ret)
> + continue;
> + }
> if (ret) {
> vma = ERR_PTR(ret);
> goto err;
> --
> 2.37.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
@ 2022-10-04 13:39 ` Ville Syrjälä
2022-10-04 13:40 ` Das, Nirmoy
2022-10-11 13:54 ` Tvrtko Ursulin
2 siblings, 0 replies; 18+ messages in thread
From: Ville Syrjälä @ 2022-10-04 13:39 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx, Nirmoy Das, Jianshui Yu
On Tue, Oct 04, 2022 at 02:19:15PM +0100, Matthew Auld wrote:
> For these types of display buffers, we need to able to CPU access some
> part of the backing memory in prepare_plane_clear_colors(). As a result
> we need to ensure we always place in the mappable part of lmem, which
> becomes necessary on small-bar systems.
>
> v2(Nirmoy & Ville):
> - Add some commentary for why we need to CPU access the buffer.
> - Split out the other changes, so we just consider the display change
> here.
> v3:
> - Handle this in the dpt path.
> v4(Ville):
> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
> seems.
On some hw I think there was also a chicken bit to disable DPT,
and the DPT simulation situation was always a mess (you had
to enable it using some custom config). So in theory someone
might have the need to use the non-DPT path on more modern hw
as well, but I'm OK not considering it here. If someone thinks
that small-bar+no-DPT is important they can deal with it in a
separate patch.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
> Reported-by: Jianshui Yu <jianshui.yu@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> index 5031ee5695dd..e12339f46640 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
> continue;
>
> if (HAS_LMEM(dev_priv)) {
> - ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
> + unsigned int flags = obj->flags;
> +
> + /*
> + * For this type of buffer we need to able to read from the CPU
> + * the clear color value found in the buffer, hence we need to
> + * ensure it is always in the mappable part of lmem, if this is
> + * a small-bar device.
> + */
> + if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
> + flags &= ~I915_BO_ALLOC_GPU_ONLY;
> + ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
> + flags);
> if (ret)
> continue;
> }
> --
> 2.37.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
2022-10-04 13:39 ` Ville Syrjälä
@ 2022-10-04 13:40 ` Das, Nirmoy
2022-10-11 13:54 ` Tvrtko Ursulin
2 siblings, 0 replies; 18+ messages in thread
From: Das, Nirmoy @ 2022-10-04 13:40 UTC (permalink / raw)
To: Matthew Auld, intel-gfx; +Cc: Jianshui Yu, Nirmoy Das
On 10/4/2022 3:19 PM, Matthew Auld wrote:
> For these types of display buffers, we need to able to CPU access some
> part of the backing memory in prepare_plane_clear_colors(). As a result
> we need to ensure we always place in the mappable part of lmem, which
> becomes necessary on small-bar systems.
>
> v2(Nirmoy & Ville):
> - Add some commentary for why we need to CPU access the buffer.
> - Split out the other changes, so we just consider the display change
> here.
> v3:
> - Handle this in the dpt path.
> v4(Ville):
> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
> seems.
>
> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
> Reported-by: Jianshui Yu <jianshui.yu@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
Acked-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> index 5031ee5695dd..e12339f46640 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
> continue;
>
> if (HAS_LMEM(dev_priv)) {
> - ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
> + unsigned int flags = obj->flags;
> +
> + /*
> + * For this type of buffer we need to able to read from the CPU
> + * the clear color value found in the buffer, hence we need to
> + * ensure it is always in the mappable part of lmem, if this is
> + * a small-bar device.
> + */
> + if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
> + flags &= ~I915_BO_ALLOC_GPU_ONLY;
> + ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
> + flags);
> if (ret)
> continue;
> }
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
` (3 preceding siblings ...)
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 5/5] drm/i915: check memory is mappable in read_from_page Matthew Auld
@ 2022-10-04 19:28 ` Patchwork
2022-10-04 19:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-10-04 19:28 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
URL : https://patchwork.freedesktop.org/series/109389/
State : warning
== Summary ==
Error: dim checkpatch failed
bc460e1488f8 drm/i915: remove the TODO in pin_and_fence_fb_obj
59ce3062aac5 drm/i915/display: handle migration for dpt
-:39: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#39: FILE: drivers/gpu/drm/i915/display/intel_fb_pin.c:37:
+ * below, so this vm must never be async.
+ */
total: 0 errors, 1 warnings, 0 checks, 72 lines checked
75f6b6d81df4 drm/i915: allow control over the flags when migrating
91b718df89fd drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
dcc38cf36004 drm/i915: check memory is mappable in read_from_page
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
` (4 preceding siblings ...)
2022-10-04 19:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Patchwork
@ 2022-10-04 19:28 ` Patchwork
2022-10-04 19:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-05 5:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-10-04 19:28 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
== Series Details ==
Series: series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
URL : https://patchwork.freedesktop.org/series/109389/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
` (5 preceding siblings ...)
2022-10-04 19:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-10-04 19:52 ` Patchwork
2022-10-05 5:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-10-04 19:52 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8483 bytes --]
== Series Details ==
Series: series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
URL : https://patchwork.freedesktop.org/series/109389/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12214 -> Patchwork_109389v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/index.html
Participating hosts (44 -> 43)
------------------------------
Additional (2): fi-hsw-4770 fi-tgl-dsi
Missing (3): fi-ctg-p8600 fi-bdw-samus fi-hsw-4200u
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_109389v1:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_suspend@basic-s3@smem:
- {bat-rpls-1}: NOTRUN -> [DMESG-WARN][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
Known issues
------------
Here are the changes found in Patchwork_109389v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_softpin@allocator-basic-reserve:
- fi-hsw-4770: NOTRUN -> [SKIP][2] ([fdo#109271]) +9 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-hsw-4770/igt@gem_softpin@allocator-basic-reserve.html
* igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#3012])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-hsw-4770/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-g3258: [PASS][4] -> [INCOMPLETE][5] ([i915#3303] / [i915#4785])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
- fi-snb-2600: [PASS][6] -> [INCOMPLETE][7] ([i915#6992])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-bxt-dsi: [PASS][8] -> [DMESG-WARN][9] ([i915#1982])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/fi-bxt-dsi/igt@i915_suspend@basic-s3-without-i915.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-bxt-dsi/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@dp-crc-fast:
- fi-hsw-4770: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-hsw-4770/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1072]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
* igt@runner@aborted:
- fi-hsw-g3258: NOTRUN -> [FAIL][12] ([fdo#109271] / [i915#4312])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-hsw-g3258/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}: [DMESG-WARN][13] ([i915#2867]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_exec_suspend@basic-s3@smem:
- {bat-rplp-1}: [DMESG-WARN][15] ([i915#2867]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/bat-rplp-1/igt@gem_exec_suspend@basic-s3@smem.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/bat-rplp-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@gt_mocs:
- {bat-rpls-2}: [DMESG-FAIL][17] -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/bat-rpls-2/igt@i915_selftest@live@gt_mocs.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/bat-rpls-2/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@hangcheck:
- {fi-ehl-2}: [INCOMPLETE][19] ([i915#5153] / [i915#6106]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/fi-ehl-2/igt@i915_selftest@live@hangcheck.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/fi-ehl-2/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@hugepages:
- {bat-rpls-2}: [DMESG-WARN][21] ([i915#5278]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/bat-rpls-2/igt@i915_selftest@live@hugepages.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/bat-rpls-2/igt@i915_selftest@live@hugepages.html
* igt@i915_selftest@live@reset:
- {bat-rpls-1}: [DMESG-FAIL][23] ([i915#4983] / [i915#5828]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/bat-rpls-1/igt@i915_selftest@live@reset.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/bat-rpls-1/igt@i915_selftest@live@reset.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5153]: https://gitlab.freedesktop.org/drm/intel/issues/5153
[i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
[i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
[i915#6106]: https://gitlab.freedesktop.org/drm/intel/issues/6106
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6816]: https://gitlab.freedesktop.org/drm/intel/issues/6816
[i915#6856]: https://gitlab.freedesktop.org/drm/intel/issues/6856
[i915#6992]: https://gitlab.freedesktop.org/drm/intel/issues/6992
Build changes
-------------
* Linux: CI_DRM_12214 -> Patchwork_109389v1
CI-20190529: 20190529
CI_DRM_12214: 605c9d194cc3f4eea4511e19f54adadda0924d42 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6680: 4097d61efefff3453347a58f511e3cdcd4608d0a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109389v1: 605c9d194cc3f4eea4511e19f54adadda0924d42 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
a859691bcdb6 drm/i915: check memory is mappable in read_from_page
5c607a64bd09 drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2f7351fbd180 drm/i915: allow control over the flags when migrating
ef2249f1f548 drm/i915/display: handle migration for dpt
984ab25d4f22 drm/i915: remove the TODO in pin_and_fence_fb_obj
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/index.html
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
` (6 preceding siblings ...)
2022-10-04 19:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-10-05 5:41 ` Patchwork
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2022-10-05 5:41 UTC (permalink / raw)
To: Matthew Auld; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 47921 bytes --]
== Series Details ==
Series: series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj
URL : https://patchwork.freedesktop.org/series/109389/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12214_full -> Patchwork_109389v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_109389v1_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_color@ctm-0-75@pipe-b-hdmi-a-3:
- {shard-dg1}: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-dg1-19/igt@kms_color@ctm-0-75@pipe-b-hdmi-a-3.html
New tests
---------
New tests have been introduced between CI_DRM_12214_full and Patchwork_109389v1_full:
### New IGT tests (4) ###
* igt@kms_color@legacy-gamma@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.43] s
* igt@kms_plane_cursor@viewport@pipe-b-hdmi-a-3-size-128:
- Statuses : 1 pass(s)
- Exec time: [3.12] s
* igt@kms_plane_cursor@viewport@pipe-b-hdmi-a-3-size-256:
- Statuses : 1 pass(s)
- Exec time: [3.18] s
* igt@kms_plane_cursor@viewport@pipe-b-hdmi-a-3-size-64:
- Statuses : 1 pass(s)
- Exec time: [3.17] s
Known issues
------------
Here are the changes found in Patchwork_109389v1_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- shard-apl: ([PASS][2], [PASS][3], [FAIL][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26]) ([i915#4386]) -> ([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl1/boot.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl1/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl1/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl1/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl1/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl2/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl2/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl2/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl2/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl6/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl6/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl6/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl6/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl7/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl7/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl7/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl8/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl8/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl8/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl8/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl6/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl7/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl6/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl6/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl6/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl6/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl3/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl3/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl3/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl3/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl1/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl1/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl1/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl1/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl8/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl8/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl7/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl7/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl7/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl8/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl8/boot.html
### IGT changes ###
#### Issues hit ####
* igt@drm_buddy@all:
- shard-tglb: NOTRUN -> [SKIP][52] ([i915#6433])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@drm_buddy@all.html
* igt@gem_create@create-massive:
- shard-apl: NOTRUN -> [DMESG-WARN][53] ([i915#4991])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@gem_create@create-massive.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-tglb: NOTRUN -> [SKIP][54] ([i915#280])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][55] -> [FAIL][56] ([i915#2842])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb5/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-tglb: NOTRUN -> [FAIL][57] ([i915#2842]) +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][58] ([i915#2842])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb1/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_params@no-blt:
- shard-tglb: NOTRUN -> [SKIP][59] ([fdo#109283])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@gem_exec_params@no-blt.html
* igt@gem_lmem_swapping@heavy-multi:
- shard-skl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#4613])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl10/igt@gem_lmem_swapping@heavy-multi.html
* igt@gem_lmem_swapping@smem-oom:
- shard-tglb: NOTRUN -> [SKIP][61] ([i915#4613]) +2 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_lmem_swapping@verify:
- shard-apl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#4613])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@gem_lmem_swapping@verify.html
* igt@gem_pxp@fail-invalid-protected-context:
- shard-tglb: NOTRUN -> [SKIP][63] ([i915#4270]) +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@gem_pxp@fail-invalid-protected-context.html
* igt@gem_softpin@evict-single-offset:
- shard-apl: NOTRUN -> [FAIL][64] ([i915#4171])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@gem_softpin@evict-single-offset.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-tglb: NOTRUN -> [SKIP][65] ([i915#3297])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@gem_userptr_blits@unsync-overlap.html
* igt@gen7_exec_parse@load-register-reg:
- shard-tglb: NOTRUN -> [SKIP][66] ([fdo#109289]) +2 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@gen7_exec_parse@load-register-reg.html
* igt@gen9_exec_parse@bb-chained:
- shard-tglb: NOTRUN -> [SKIP][67] ([i915#2527] / [i915#2856]) +3 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@gen9_exec_parse@bb-chained.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [PASS][68] -> [FAIL][69] ([i915#6537])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl6/igt@i915_pm_rps@engine-order.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl3/igt@i915_pm_rps@engine-order.html
* igt@i915_query@query-topology-known-pci-ids:
- shard-tglb: NOTRUN -> [SKIP][70] ([fdo#109303])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@i915_query@query-topology-known-pci-ids.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][71] -> [DMESG-WARN][72] ([i915#180]) +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/igt@i915_suspend@sysfs-reader.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl1/igt@i915_suspend@sysfs-reader.html
* igt@kms_addfb_basic@legacy-format:
- shard-tglb: [PASS][73] -> [INCOMPLETE][74] ([i915#6987])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-tglb1/igt@kms_addfb_basic@legacy-format.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_addfb_basic@legacy-format.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1:
- shard-skl: [PASS][75] -> [FAIL][76] ([i915#2521])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-skl10/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-edp-1.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-tglb: NOTRUN -> [SKIP][77] ([i915#404])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-tglb: NOTRUN -> [SKIP][78] ([i915#1769])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-tglb: NOTRUN -> [SKIP][79] ([i915#1769] / [i915#3555])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180:
- shard-tglb: NOTRUN -> [SKIP][80] ([i915#5286]) +2 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][81] ([fdo#111614])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-tglb: NOTRUN -> [SKIP][82] ([fdo#111615]) +3 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_joiner@invalid-modeset:
- shard-tglb: NOTRUN -> [SKIP][83] ([i915#2705]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_big_joiner@invalid-modeset.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#3886])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl10/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#3886]) +2 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][86] ([i915#3689] / [i915#3886]) +2 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs:
- shard-apl: NOTRUN -> [SKIP][87] ([fdo#109271]) +78 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@kms_ccs@pipe-b-random-ccs-data-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][88] ([i915#3689] / [i915#6095])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_ccs@pipe-c-bad-rotation-90-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#3886])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk6/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][90] ([fdo#111615] / [i915#3689]) +3 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_ccs@pipe-c-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][91] ([i915#3689]) +6 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_ccs.html
* igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc:
- shard-tglb: NOTRUN -> [SKIP][92] ([i915#6095]) +7 similar issues
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_chamelium@common-hpd-after-suspend:
- shard-tglb: NOTRUN -> [SKIP][93] ([fdo#109284] / [fdo#111827]) +5 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-hpd-enable-disable-mode:
- shard-apl: NOTRUN -> [SKIP][94] ([fdo#109271] / [fdo#111827]) +3 similar issues
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@kms_chamelium@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium@hdmi-audio-edid:
- shard-glk: NOTRUN -> [SKIP][95] ([fdo#109271] / [fdo#111827])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk6/igt@kms_chamelium@hdmi-audio-edid.html
* igt@kms_color@ctm-0-75@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [FAIL][96] ([i915#315]) +3 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_color@ctm-0-75@pipe-c-edp-1.html
* igt@kms_content_protection@mei_interface:
- shard-tglb: NOTRUN -> [SKIP][97] ([i915#1063]) +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_content_protection@mei_interface.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-tglb: NOTRUN -> [SKIP][98] ([fdo#109279] / [i915#3359])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-tglb: NOTRUN -> [SKIP][99] ([i915#3359]) +1 similar issue
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-tglb: NOTRUN -> [SKIP][100] ([i915#3555])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-skl: NOTRUN -> [SKIP][101] ([fdo#109271]) +6 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl4/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_legacy@cursorb-vs-flipa@atomic-transitions-varying-size:
- shard-tglb: NOTRUN -> [SKIP][102] ([fdo#109274] / [fdo#111825]) +5 similar issues
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_cursor_legacy@cursorb-vs-flipa@atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-glk: [PASS][103] -> [FAIL][104] ([i915#2346]) +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor@varying-size:
- shard-iclb: [PASS][105] -> [FAIL][106] ([i915#2346]) +2 similar issues
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb2/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor:
- shard-tglb: NOTRUN -> [SKIP][107] ([i915#4103])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_cursor_legacy@short-busy-flip-before-cursor.html
* igt@kms_flip@2x-flip-vs-modeset-vs-hang:
- shard-tglb: NOTRUN -> [SKIP][108] ([fdo#109274] / [fdo#111825] / [i915#3637]) +4 similar issues
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
- shard-skl: [PASS][109] -> [FAIL][110] ([i915#2122])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][111] ([i915#2587] / [i915#2672]) +1 similar issue
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][112] ([i915#2587] / [i915#2672]) +2 similar issues
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][113] ([i915#2672]) +3 similar issues
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_force_connector_basic@force-load-detect:
- shard-tglb: NOTRUN -> [SKIP][114] ([fdo#109285])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_frontbuffer_tracking@fbcpsr-stridechange:
- shard-tglb: NOTRUN -> [SKIP][115] ([i915#6497]) +9 similar issues
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-stridechange.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][116] ([fdo#109280] / [fdo#111825]) +24 similar issues
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt:
- shard-glk: NOTRUN -> [SKIP][117] ([fdo#109271]) +27 similar issues
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt.html
* igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d:
- shard-tglb: NOTRUN -> [SKIP][118] ([i915#6403]) +3 similar issues
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-tglb: NOTRUN -> [SKIP][119] ([i915#1839]) +1 similar issue
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1:
- shard-iclb: [PASS][120] -> [DMESG-WARN][121] ([i915#2867])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb4/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb6/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-edp-1.html
* igt@kms_plane_lowres@tiling-4:
- shard-tglb: NOTRUN -> [SKIP][122] ([fdo#112054] / [i915#5288])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_plane_lowres@tiling-4.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-sf:
- shard-tglb: NOTRUN -> [SKIP][123] ([i915#2920]) +1 similar issue
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_psr2_sf@cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-apl: NOTRUN -> [SKIP][124] ([fdo#109271] / [i915#658]) +1 similar issue
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-glk: NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#658])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk6/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [PASS][126] -> [SKIP][127] ([fdo#109441])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb2/igt@kms_psr@psr2_dpms.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb7/igt@kms_psr@psr2_dpms.html
* igt@kms_psr@psr2_primary_blt:
- shard-tglb: NOTRUN -> [FAIL][128] ([i915#132] / [i915#3467]) +2 similar issues
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@kms_psr@psr2_primary_blt.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-tglb: NOTRUN -> [SKIP][129] ([i915#2437])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb3/igt@kms_writeback@writeback-invalid-parameters.html
* igt@sysfs_clients@fair-0:
- shard-glk: NOTRUN -> [SKIP][130] ([fdo#109271] / [i915#2994])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk6/igt@sysfs_clients@fair-0.html
* igt@sysfs_clients@fair-3:
- shard-tglb: NOTRUN -> [SKIP][131] ([i915#2994]) +1 similar issue
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@sysfs_clients@fair-3.html
* igt@sysfs_clients@pidname:
- shard-apl: NOTRUN -> [SKIP][132] ([fdo#109271] / [i915#2994])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@sysfs_clients@pidname.html
* igt@tools_test@sysfs_l3_parity:
- shard-tglb: NOTRUN -> [SKIP][133] ([fdo#109307])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb7/igt@tools_test@sysfs_l3_parity.html
#### Possible fixes ####
* igt@gem_bad_reloc@negative-reloc:
- {shard-rkl}: [SKIP][134] ([i915#3281]) -> [PASS][135] +16 similar issues
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-4/igt@gem_bad_reloc@negative-reloc.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-5/igt@gem_bad_reloc@negative-reloc.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [FAIL][136] ([i915#6268]) -> [PASS][137]
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-tglb2/igt@gem_ctx_exec@basic-nohangcheck.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-tglb5/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_ctx_persistence@smoketest:
- {shard-rkl}: [FAIL][138] ([i915#5099]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-6/igt@gem_ctx_persistence@smoketest.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-2/igt@gem_ctx_persistence@smoketest.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][140] ([fdo#103375]) -> [PASS][141] +2 similar issues
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-4/igt@gem_eio@in-flight-suspend.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-2/igt@gem_eio@in-flight-suspend.html
* igt@gem_eio@kms:
- {shard-dg1}: [FAIL][142] ([i915#5784]) -> [PASS][143]
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-dg1-19/igt@gem_eio@kms.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-dg1-13/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel:
- shard-iclb: [SKIP][144] ([i915#4525]) -> [PASS][145] +1 similar issue
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb3/igt@gem_exec_balancer@parallel.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb1/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [FAIL][146] ([i915#2842]) -> [PASS][147] +2 similar issues
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-glk7/igt@gem_exec_fair@basic-pace@rcs0.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk9/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_partial_pwrite_pread@reads:
- {shard-rkl}: [SKIP][148] ([i915#3282]) -> [PASS][149] +5 similar issues
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@gem_partial_pwrite_pread@reads.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-5/igt@gem_partial_pwrite_pread@reads.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [DMESG-WARN][150] ([i915#180]) -> [PASS][151]
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl3/igt@gem_workarounds@suspend-resume.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl2/igt@gem_workarounds@suspend-resume.html
* igt@gen9_exec_parse@bb-chained:
- {shard-rkl}: [SKIP][152] ([i915#2527]) -> [PASS][153] +3 similar issues
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@gen9_exec_parse@bb-chained.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-5/igt@gen9_exec_parse@bb-chained.html
* igt@i915_pm_dc@dc6-psr:
- {shard-rkl}: [SKIP][154] ([i915#658]) -> [PASS][155]
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-1/igt@i915_pm_dc@dc6-psr.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rpm@fences:
- {shard-rkl}: [SKIP][156] ([i915#1849]) -> [PASS][157]
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@i915_pm_rpm@fences.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@i915_pm_rpm@fences.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- {shard-rkl}: [SKIP][158] ([i915#1397]) -> [PASS][159]
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@i915_pm_rpm@modeset-lpsp-stress.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@i915_pm_rps@min-max-config-idle:
- {shard-rkl}: [FAIL][160] ([i915#4016]) -> [PASS][161]
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@i915_pm_rps@min-max-config-idle.html
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-5/igt@i915_pm_rps@min-max-config-idle.html
* igt@kms_addfb_basic@legacy-format:
- {shard-rkl}: [INCOMPLETE][162] ([i915#6987]) -> [PASS][163]
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@kms_addfb_basic@legacy-format.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-5/igt@kms_addfb_basic@legacy-format.html
* igt@kms_atomic@atomic_plane_damage:
- {shard-rkl}: [SKIP][164] ([i915#4098]) -> [PASS][165]
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-1/igt@kms_atomic@atomic_plane_damage.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@kms_atomic@atomic_plane_damage.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-apl: [FAIL][166] ([i915#2346]) -> [PASS][167]
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-skl: [FAIL][168] ([i915#4767]) -> [PASS][169]
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-skl4/igt@kms_fbcon_fbt@psr-suspend.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1:
- shard-skl: [FAIL][170] ([i915#2122]) -> [PASS][171] +1 similar issue
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-skl7/igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl9/igt@kms_flip@flip-vs-absolute-wf_vblank@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-skl: [FAIL][172] ([i915#79]) -> [PASS][173]
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_frontbuffer_tracking@psr-modesetfrombusy:
- {shard-rkl}: [SKIP][174] ([i915#1849] / [i915#4098]) -> [PASS][175] +12 similar issues
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-modesetfrombusy.html
* igt@kms_plane@plane-panning-bottom-right@pipe-a-planes:
- {shard-rkl}: [SKIP][176] ([i915#1849] / [i915#3558]) -> [PASS][177] +1 similar issue
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html
* igt@kms_psr@primary_render:
- {shard-rkl}: [SKIP][178] ([i915#1072]) -> [PASS][179]
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-1/igt@kms_psr@primary_render.html
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@kms_psr@primary_render.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [SKIP][180] ([fdo#109441]) -> [PASS][181]
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb1/igt@kms_psr@psr2_sprite_mmap_gtt.html
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_universal_plane@universal-plane-pipe-b-functional:
- {shard-rkl}: [SKIP][182] ([i915#1845] / [i915#4070] / [i915#4098]) -> [PASS][183]
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@kms_universal_plane@universal-plane-pipe-b-functional.html
* igt@kms_vblank@pipe-b-query-idle:
- {shard-rkl}: [SKIP][184] ([i915#1845] / [i915#4098]) -> [PASS][185] +17 similar issues
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-1/igt@kms_vblank@pipe-b-query-idle.html
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-6/igt@kms_vblank@pipe-b-query-idle.html
* igt@perf@oa-exponents:
- shard-glk: [INCOMPLETE][186] ([i915#5213]) -> [PASS][187]
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-glk5/igt@perf@oa-exponents.html
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-glk6/igt@perf@oa-exponents.html
* igt@perf@polling-small-buf:
- {shard-rkl}: [FAIL][188] ([i915#1722]) -> [PASS][189]
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-rkl-2/igt@perf@polling-small-buf.html
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-rkl-5/igt@perf@polling-small-buf.html
* igt@perf_pmu@idle@rcs0:
- {shard-dg1}: [FAIL][190] ([i915#4349]) -> [PASS][191]
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-dg1-13/igt@perf_pmu@idle@rcs0.html
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-dg1-19/igt@perf_pmu@idle@rcs0.html
* igt@sysfs_timeslice_duration@timeout@vecs0:
- shard-apl: [FAIL][192] ([i915#1755]) -> [PASS][193]
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-apl6/igt@sysfs_timeslice_duration@timeout@vecs0.html
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-apl8/igt@sysfs_timeslice_duration@timeout@vecs0.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: [FAIL][194] ([i915#6117]) -> [SKIP][195] ([i915#4525])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb4/igt@gem_exec_balancer@parallel-ordering.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html
* igt@kms_chamelium@hdmi-crc-nonplanar-formats:
- shard-skl: [SKIP][196] ([fdo#109271] / [fdo#111827] / [i915#1888]) -> [SKIP][197] ([fdo#109271] / [fdo#111827])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-skl9/igt@kms_chamelium@hdmi-crc-nonplanar-formats.html
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-skl10/igt@kms_chamelium@hdmi-crc-nonplanar-formats.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][198] ([i915#658]) -> [SKIP][199] ([i915#2920])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12214/shard-iclb1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1911]: https://gitlab.freedesktop.org/drm/intel/issues/1911
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3467]: https://gitlab.freedesktop.org/drm/intel/issues/3467
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4016]: https://gitlab.freedesktop.org/drm/intel/issues/4016
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4386]: https://gitlab.freedesktop.org/drm/intel/issues/4386
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5099]: https://gitlab.freedesktop.org/drm/intel/issues/5099
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
[i915#6403]: https://gitlab.freedesktop.org/drm/intel/issues/6403
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#6987]: https://gitlab.freedesktop.org/drm/intel/issues/6987
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_12214 -> Patchwork_109389v1
CI-20190529: 20190529
CI_DRM_12214: 605c9d194cc3f4eea4511e19f54adadda0924d42 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6680: 4097d61efefff3453347a58f511e3cdcd4608d0a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109389v1: 605c9d194cc3f4eea4511e19f54adadda0924d42 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109389v1/index.html
[-- Attachment #2: Type: text/html, Size: 53027 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
2022-10-04 13:39 ` Ville Syrjälä
2022-10-04 13:40 ` Das, Nirmoy
@ 2022-10-11 13:54 ` Tvrtko Ursulin
2022-10-11 14:39 ` Matthew Auld
2 siblings, 1 reply; 18+ messages in thread
From: Tvrtko Ursulin @ 2022-10-11 13:54 UTC (permalink / raw)
To: Matthew Auld, intel-gfx; +Cc: Jianshui Yu, Nirmoy Das
Hi Matt,
On 04/10/2022 14:19, Matthew Auld wrote:
> For these types of display buffers, we need to able to CPU access some
> part of the backing memory in prepare_plane_clear_colors(). As a result
> we need to ensure we always place in the mappable part of lmem, which
> becomes necessary on small-bar systems.
>
> v2(Nirmoy & Ville):
> - Add some commentary for why we need to CPU access the buffer.
> - Split out the other changes, so we just consider the display change
> here.
> v3:
> - Handle this in the dpt path.
> v4(Ville):
> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
> seems.
>
> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
That one landed in 6.0 - do you want to send this (with
pre-requisite(s)) to stable? Or if not do you want me to send for 6.1 as
part of fixes flow? In which case what are the per-requisites?
Regards,
Tvrtko
> Reported-by: Jianshui Yu <jianshui.yu@intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> index 5031ee5695dd..e12339f46640 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
> @@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
> continue;
>
> if (HAS_LMEM(dev_priv)) {
> - ret = i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0);
> + unsigned int flags = obj->flags;
> +
> + /*
> + * For this type of buffer we need to able to read from the CPU
> + * the clear color value found in the buffer, hence we need to
> + * ensure it is always in the mappable part of lmem, if this is
> + * a small-bar device.
> + */
> + if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
> + flags &= ~I915_BO_ALLOC_GPU_ONLY;
> + ret = __i915_gem_object_migrate(obj, &ww, INTEL_REGION_LMEM_0,
> + flags);
> if (ret)
> continue;
> }
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-11 13:54 ` Tvrtko Ursulin
@ 2022-10-11 14:39 ` Matthew Auld
2022-10-11 15:03 ` Tvrtko Ursulin
0 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2022-10-11 14:39 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx; +Cc: Jianshui Yu, Nirmoy Das
Hi,
On 11/10/2022 14:54, Tvrtko Ursulin wrote:
>
> Hi Matt,
>
> On 04/10/2022 14:19, Matthew Auld wrote:
>> For these types of display buffers, we need to able to CPU access some
>> part of the backing memory in prepare_plane_clear_colors(). As a result
>> we need to ensure we always place in the mappable part of lmem, which
>> becomes necessary on small-bar systems.
>>
>> v2(Nirmoy & Ville):
>> - Add some commentary for why we need to CPU access the buffer.
>> - Split out the other changes, so we just consider the display change
>> here.
>> v3:
>> - Handle this in the dpt path.
>> v4(Ville):
>> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
>> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
>> seems.
>>
>> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
>
> That one landed in 6.0 - do you want to send this (with
> pre-requisite(s)) to stable? Or if not do you want me to send for 6.1 as
> part of fixes flow? In which case what are the per-requisites?
This one is only for DG2, which is still hidden behind force_probe, so
not too sure if it needs stable? I think the only pre-requisite is
999f45620772 ("drm/i915: allow control over the flags when migrating"),
but again I'm not too sure how much we care about fixes for platforms
hidden behind force_probe? What do you think?
>
> Regards,
>
> Tvrtko
>
>> Reported-by: Jianshui Yu <jianshui.yu@intel.com>
>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Cc: Nirmoy Das <nirmoy.das@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c
>> b/drivers/gpu/drm/i915/display/intel_fb_pin.c
>> index 5031ee5695dd..e12339f46640 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
>> @@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
>> continue;
>> if (HAS_LMEM(dev_priv)) {
>> - ret = i915_gem_object_migrate(obj, &ww,
>> INTEL_REGION_LMEM_0);
>> + unsigned int flags = obj->flags;
>> +
>> + /*
>> + * For this type of buffer we need to able to read from
>> the CPU
>> + * the clear color value found in the buffer, hence we
>> need to
>> + * ensure it is always in the mappable part of lmem, if
>> this is
>> + * a small-bar device.
>> + */
>> + if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
>> + flags &= ~I915_BO_ALLOC_GPU_ONLY;
>> + ret = __i915_gem_object_migrate(obj, &ww,
>> INTEL_REGION_LMEM_0,
>> + flags);
>> if (ret)
>> continue;
>> }
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-11 14:39 ` Matthew Auld
@ 2022-10-11 15:03 ` Tvrtko Ursulin
2022-10-11 15:28 ` Matthew Auld
0 siblings, 1 reply; 18+ messages in thread
From: Tvrtko Ursulin @ 2022-10-11 15:03 UTC (permalink / raw)
To: Matthew Auld, intel-gfx; +Cc: Jianshui Yu, Nirmoy Das
On 11/10/2022 15:39, Matthew Auld wrote:
> Hi,
>
> On 11/10/2022 14:54, Tvrtko Ursulin wrote:
>>
>> Hi Matt,
>>
>> On 04/10/2022 14:19, Matthew Auld wrote:
>>> For these types of display buffers, we need to able to CPU access some
>>> part of the backing memory in prepare_plane_clear_colors(). As a result
>>> we need to ensure we always place in the mappable part of lmem, which
>>> becomes necessary on small-bar systems.
>>>
>>> v2(Nirmoy & Ville):
>>> - Add some commentary for why we need to CPU access the buffer.
>>> - Split out the other changes, so we just consider the display change
>>> here.
>>> v3:
>>> - Handle this in the dpt path.
>>> v4(Ville):
>>> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
>>> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
>>> seems.
>>>
>>> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
>>
>> That one landed in 6.0 - do you want to send this (with
>> pre-requisite(s)) to stable? Or if not do you want me to send for 6.1
>> as part of fixes flow? In which case what are the per-requisites?
>
> This one is only for DG2, which is still hidden behind force_probe, so
> not too sure if it needs stable? I think the only pre-requisite is
> 999f45620772 ("drm/i915: allow control over the flags when migrating"),
> but again I'm not too sure how much we care about fixes for platforms
> hidden behind force_probe? What do you think?
It is certainly not mandatory, but now that cards are about to ship and
reach end users it may be nice to have if not too hard - at least for
6.1 release candidates. I am not clear on the importance of the fix to
say for sure. Like what goes bang and under what circumstances. So I do
basically defer to someone who knows those answers.
Regards,
Tvrtko
>
>>
>> Regards,
>>
>> Tvrtko
>>
>>> Reported-by: Jianshui Yu <jianshui.yu@intel.com>
>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> Cc: Nirmoy Das <nirmoy.das@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>> b/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>> index 5031ee5695dd..e12339f46640 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>> @@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
>>> continue;
>>> if (HAS_LMEM(dev_priv)) {
>>> - ret = i915_gem_object_migrate(obj, &ww,
>>> INTEL_REGION_LMEM_0);
>>> + unsigned int flags = obj->flags;
>>> +
>>> + /*
>>> + * For this type of buffer we need to able to read from
>>> the CPU
>>> + * the clear color value found in the buffer, hence we
>>> need to
>>> + * ensure it is always in the mappable part of lmem, if
>>> this is
>>> + * a small-bar device.
>>> + */
>>> + if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
>>> + flags &= ~I915_BO_ALLOC_GPU_ONLY;
>>> + ret = __i915_gem_object_migrate(obj, &ww,
>>> INTEL_REGION_LMEM_0,
>>> + flags);
>>> if (ret)
>>> continue;
>>> }
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-11 15:03 ` Tvrtko Ursulin
@ 2022-10-11 15:28 ` Matthew Auld
2022-10-11 16:35 ` Tvrtko Ursulin
0 siblings, 1 reply; 18+ messages in thread
From: Matthew Auld @ 2022-10-11 15:28 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx; +Cc: Jianshui Yu, Nirmoy Das
On 11/10/2022 16:03, Tvrtko Ursulin wrote:
>
> On 11/10/2022 15:39, Matthew Auld wrote:
>> Hi,
>>
>> On 11/10/2022 14:54, Tvrtko Ursulin wrote:
>>>
>>> Hi Matt,
>>>
>>> On 04/10/2022 14:19, Matthew Auld wrote:
>>>> For these types of display buffers, we need to able to CPU access some
>>>> part of the backing memory in prepare_plane_clear_colors(). As a result
>>>> we need to ensure we always place in the mappable part of lmem, which
>>>> becomes necessary on small-bar systems.
>>>>
>>>> v2(Nirmoy & Ville):
>>>> - Add some commentary for why we need to CPU access the buffer.
>>>> - Split out the other changes, so we just consider the display change
>>>> here.
>>>> v3:
>>>> - Handle this in the dpt path.
>>>> v4(Ville):
>>>> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
>>>> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
>>>> seems.
>>>>
>>>> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
>>>
>>> That one landed in 6.0 - do you want to send this (with
>>> pre-requisite(s)) to stable? Or if not do you want me to send for 6.1
>>> as part of fixes flow? In which case what are the per-requisites?
>>
>> This one is only for DG2, which is still hidden behind force_probe, so
>> not too sure if it needs stable? I think the only pre-requisite is
>> 999f45620772 ("drm/i915: allow control over the flags when
>> migrating"), but again I'm not too sure how much we care about fixes
>> for platforms hidden behind force_probe? What do you think?
>
> It is certainly not mandatory, but now that cards are about to ship and
> reach end users it may be nice to have if not too hard - at least for
> 6.1 release candidates. I am not clear on the importance of the fix to
> say for sure. Like what goes bang and under what circumstances. So I do
> basically defer to someone who knows those answers.
It's important for small-bar DG2 systems, where it will potentially oops
somewhere in the driver without this, so if we want to support DG2 as a
platform in 6.1, then we also need this fix, along with 999f45620772.
>
> Regards,
>
> Tvrtko
>
>>
>>>
>>> Regards,
>>>
>>> Tvrtko
>>>
>>>> Reported-by: Jianshui Yu <jianshui.yu@intel.com>
>>>> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
>>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> Cc: Nirmoy Das <nirmoy.das@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/intel_fb_pin.c | 13 ++++++++++++-
>>>> 1 file changed, 12 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>>> b/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>>> index 5031ee5695dd..e12339f46640 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
>>>> @@ -50,7 +50,18 @@ intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
>>>> continue;
>>>> if (HAS_LMEM(dev_priv)) {
>>>> - ret = i915_gem_object_migrate(obj, &ww,
>>>> INTEL_REGION_LMEM_0);
>>>> + unsigned int flags = obj->flags;
>>>> +
>>>> + /*
>>>> + * For this type of buffer we need to able to read from
>>>> the CPU
>>>> + * the clear color value found in the buffer, hence we
>>>> need to
>>>> + * ensure it is always in the mappable part of lmem, if
>>>> this is
>>>> + * a small-bar device.
>>>> + */
>>>> + if (intel_fb_rc_ccs_cc_plane(fb) >= 0)
>>>> + flags &= ~I915_BO_ALLOC_GPU_ONLY;
>>>> + ret = __i915_gem_object_migrate(obj, &ww,
>>>> INTEL_REGION_LMEM_0,
>>>> + flags);
>>>> if (ret)
>>>> continue;
>>>> }
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers
2022-10-11 15:28 ` Matthew Auld
@ 2022-10-11 16:35 ` Tvrtko Ursulin
0 siblings, 0 replies; 18+ messages in thread
From: Tvrtko Ursulin @ 2022-10-11 16:35 UTC (permalink / raw)
To: Matthew Auld, intel-gfx; +Cc: Jianshui Yu, Nirmoy Das
On 11/10/2022 16:28, Matthew Auld wrote:
> On 11/10/2022 16:03, Tvrtko Ursulin wrote:
>>
>> On 11/10/2022 15:39, Matthew Auld wrote:
>>> Hi,
>>>
>>> On 11/10/2022 14:54, Tvrtko Ursulin wrote:
>>>>
>>>> Hi Matt,
>>>>
>>>> On 04/10/2022 14:19, Matthew Auld wrote:
>>>>> For these types of display buffers, we need to able to CPU access some
>>>>> part of the backing memory in prepare_plane_clear_colors(). As a
>>>>> result
>>>>> we need to ensure we always place in the mappable part of lmem, which
>>>>> becomes necessary on small-bar systems.
>>>>>
>>>>> v2(Nirmoy & Ville):
>>>>> - Add some commentary for why we need to CPU access the buffer.
>>>>> - Split out the other changes, so we just consider the display
>>>>> change
>>>>> here.
>>>>> v3:
>>>>> - Handle this in the dpt path.
>>>>> v4(Ville):
>>>>> - Drop the intel_fb_rc_ccs_cc_plane() sanity check in
>>>>> pin_and_fence_fb_obj(), since we can also trigger this on DG1 it
>>>>> seems.
>>>>>
>>>>> Fixes: eb1c535f0d69 ("drm/i915: turn on small BAR support")
>>>>
>>>> That one landed in 6.0 - do you want to send this (with
>>>> pre-requisite(s)) to stable? Or if not do you want me to send for
>>>> 6.1 as part of fixes flow? In which case what are the per-requisites?
>>>
>>> This one is only for DG2, which is still hidden behind force_probe,
>>> so not too sure if it needs stable? I think the only pre-requisite is
>>> 999f45620772 ("drm/i915: allow control over the flags when
>>> migrating"), but again I'm not too sure how much we care about fixes
>>> for platforms hidden behind force_probe? What do you think?
>>
>> It is certainly not mandatory, but now that cards are about to ship
>> and reach end users it may be nice to have if not too hard - at least
>> for 6.1 release candidates. I am not clear on the importance of the
>> fix to say for sure. Like what goes bang and under what circumstances.
>> So I do basically defer to someone who knows those answers.
>
> It's important for small-bar DG2 systems, where it will potentially oops
> somewhere in the driver without this, so if we want to support DG2 as a
> platform in 6.1, then we also need this fix, along with 999f45620772.
Now that you mention an oops I will definitely aim to pull it in. Thanks!
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2022-10-11 16:50 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-10-04 13:19 [Intel-gfx] [PATCH v5 1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 2/5] drm/i915/display: handle migration for dpt Matthew Auld
2022-10-04 13:31 ` Ville Syrjälä
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 3/5] drm/i915: allow control over the flags when migrating Matthew Auld
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
2022-10-04 13:39 ` Ville Syrjälä
2022-10-04 13:40 ` Das, Nirmoy
2022-10-11 13:54 ` Tvrtko Ursulin
2022-10-11 14:39 ` Matthew Auld
2022-10-11 15:03 ` Tvrtko Ursulin
2022-10-11 15:28 ` Matthew Auld
2022-10-11 16:35 ` Tvrtko Ursulin
2022-10-04 13:19 ` [Intel-gfx] [PATCH v5 5/5] drm/i915: check memory is mappable in read_from_page Matthew Auld
2022-10-04 19:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/5] drm/i915: remove the TODO in pin_and_fence_fb_obj Patchwork
2022-10-04 19:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-04 19:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-05 5:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2022-10-04 10:51 [Intel-gfx] [PATCH v5 1/5] " Matthew Auld
2022-10-04 10:51 ` [Intel-gfx] [PATCH v5 4/5] drm/i915/display: consider DG2_RC_CCS_CC when migrating buffers Matthew Auld
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