From: Inki Dae <daeinki@gmail.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 01/11] drm: add plane support
Date: Mon, 31 Oct 2011 11:40:57 +0000 (UTC) [thread overview]
Message-ID: <loom.20111031T113759-104@post.gmane.org> (raw)
In-Reply-To: loom.20111027T153300-610@post.gmane.org
Hi, all.
SW Kim <devusr.opensw <at> gmail.com> writes:
>
> Daniel Vetter <daniel <at> ffwll.ch> writes:
>
> [snip]
>
> > > struct drm_mode_fb_cmd2 {
> > > __u32 fb_id;
> > > __u32 width, height;
> > > __u32 pixel_format; /* fourcc code from videodev2.h */
> > > __u64 priv; /* private data, depends on pixelformat */
> > >
>
> [snip]
>
> > > struct {
> > > __u32 pitch;
> > > /* driver specific handle */
> > > __u32 handle;
> >
> > Why not just add a
> > __u32 offset;
> > __u32 rsvd;
>
> For normal NV12 format, I agree that just offset is enough.
> But considering more specific format like NV12M, that has two separated
memory
> spaces, IMHO, it needs handle per each plane.
>
> Each plane of NV12M has it own base address and space between these two
memory
> spaces can be used by others.
>
> You can refer following link about NV12M used by V4L2.
> http://linuxtv.org/downloads/v4l-dvb-apis/V4L2-PIX-FMT-NV12M.html
>
> > and call it a day. This thing is pretty big already, so that bloat doesn't
> > matter that much. Maybe spec that buffer[0].offset must be zero. With that
> > you can also do I420 with the following layout
> > +-------+
> > |YYYYYYY|
> > |YYYYYYY|
> > |YYYYYYY|
> > |YYYYYYY|
> > +---+---+
> > |UUU|VVV|
> > |UUU|VVV|
> > +---+---+
> >
> > i.e. stride_U == stride_V, with their lines meshed into one line.
> > -Daniel
> >
> > > } buffer[16];
>
> and just question, is there any meaning about buffer array size 16?
>
> > > };
>
> [snip]
>
> Thanks and Regards,
> - SW Kim
>
I have a opinion for multi planer. before that, I'd like to mention some
considerations.
I think adding any variables such as offset or handle(as plane count) to
drm_mode_fb_cmd2 structure could occurs that in application point of view,
user could be confused because with the ways above, user needs to allocate
buffers as plane count(it depends on pixel format) and also user should know
buffer size according to pixel format. so I think it's good way that user sets
only pixel format and resolution(width, height) and then specific gem
framework allocates buffers according to pixel format as plane count and then
user sets the gem handle to drm_mode_fb_cmd2 structure. specific gem framework
could get all buffers through only the gem handle.
below is my simple idea.
1. user requests buffer allocation with pixel format and resolution through
gem framework.
2. gem framework checks pixel format.
3. specific gem framework allocates buffers as plane count according to the
pixel format. (please, know that gem framework provides just interface so
acctual implementation would be done at specific gem framework)
4. user gets the gem handle from gem framework.
5. user sets the gem handle to specific drm framebuffer through
drm_mode_addfb2 function.
6. user requests setcrtc with fb id and crtc id.
7. drm framework sets framebuffer(corresponding to fb id) to drm_mode_set.
8. crtc calls set_config callbacks to configure hardware.
9. specific crtc framework gets all buffers through framebuffer(actually, it
would be specific framebuffer)and sets them to overlay registers of hardware
appropriately.
like this, how about using framebuffer and gem framework instead of plane? I'd
be glad to give me your opinions.
Thank you,
Inki Dae.
next prev parent reply other threads:[~2011-10-31 11:55 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-10-25 9:46 DRM planes and new fb creation ioctl Jesse Barnes
2011-10-25 9:46 ` [PATCH 01/11] drm: add plane support Jesse Barnes
2011-10-25 10:53 ` Joonyoung Shim
2011-10-25 11:18 ` Jesse Barnes
2011-10-26 0:19 ` Joonyoung Shim
2011-10-25 11:58 ` Daniel Vetter
2011-10-25 12:26 ` Jesse Barnes
2011-10-25 13:26 ` Alan Cox
2011-10-25 13:32 ` Jesse Barnes
2011-10-25 13:42 ` Daniel Vetter
2011-10-25 14:09 ` Jesse Barnes
2011-10-25 16:43 ` Rob Clark
2011-10-25 19:41 ` Daniel Vetter
2011-10-25 20:14 ` Rob Clark
2011-10-27 14:05 ` SW Kim
2011-10-31 11:40 ` Inki Dae [this message]
2011-10-31 16:52 ` Jesse Barnes
2011-11-02 2:20 ` Inki Dae
2011-11-02 15:57 ` Jesse Barnes
2011-10-26 5:40 ` Joonyoung Shim
2011-10-27 15:31 ` Jesse Barnes
2011-10-25 9:46 ` [PATCH 02/11] drm: add an fb creation ioctl that takes a pixel format Jesse Barnes
2011-10-25 9:46 ` [PATCH 03/11] drm/i915: rename existing overlay support to "legacy" Jesse Barnes
2011-10-25 9:46 ` [PATCH 04/11] drm/i915: add SNB video sprite support Jesse Barnes
2011-11-02 5:56 ` Inki Dae
2011-11-02 15:58 ` Jesse Barnes
2011-10-25 9:47 ` [PATCH 05/11] drm/i915: move pin & fence for plane past potential error paths Jesse Barnes
2011-10-25 9:47 ` [PATCH 06/11] drm/i915: plane teardown fixes Jesse Barnes
2011-10-25 9:47 ` [PATCH 07/11] drm/i915: enable new overlay code on IVB too Jesse Barnes
2011-10-25 9:47 ` [PATCH 08/11] drm/i915: overlay watermark hack Jesse Barnes
2011-10-25 9:47 ` [PATCH 09/11] drm/i915: fix overlay fb object handling Jesse Barnes
2011-10-25 9:47 ` [PATCH 10/11] drm/i915: clamp sprite to viewable area Jesse Barnes
2011-10-25 9:47 ` [PATCH 11/11] drm/i915: add sprite scaling support Jesse Barnes
2011-10-25 10:47 ` DRM planes and new fb creation ioctl Joonyoung Shim
2011-10-25 11:13 ` Jesse Barnes
2011-10-26 1:04 ` Joonyoung Shim
2011-10-25 11:20 ` Jesse Barnes
2011-10-25 11:22 ` [PATCH] drm/i915: add SNB video sprite support Jesse Barnes
2011-10-25 11:30 ` Jesse Barnes
2011-11-01 14:11 ` Lan, Hai
2011-11-03 18:44 ` [Intel-gfx] " Jesse Barnes
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