From: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
To: intel-xe@lists.freedesktop.org
Subject: [CI 06/14] drm/xe/xelp: Wait for AuxCCS invalidation to complete
Date: Wed, 22 Oct 2025 08:32:31 +0100 [thread overview]
Message-ID: <20251022073241.71401-7-tvrtko.ursulin@igalia.com> (raw)
In-Reply-To: <20251022073241.71401-1-tvrtko.ursulin@igalia.com>
On AuxCCS platforms we need to wait for AuxCCS invalidations to complete.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/instructions/xe_mi_commands.h | 6 ++++++
drivers/gpu/drm/xe/xe_ring_ops.c | 9 ++++++++-
drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +-
3 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
index c47b290e0e9f..49d8ffd026d5 100644
--- a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
@@ -81,4 +81,10 @@
#define MI_SET_APPID_SESSION_ID_MASK REG_GENMASK(6, 0)
#define MI_SET_APPID_SESSION_ID(x) REG_FIELD_PREP(MI_SET_APPID_SESSION_ID_MASK, x)
+#define MI_SEMAPHORE_WAIT_TOKEN (__MI_INSTR(0x1c) | XE_INSTR_NUM_DW(5)) /* XeLP+ */
+#define MI_SEMAPHORE_REGISTER_POLL REG_BIT(16)
+#define MI_SEMAPHORE_POLL REG_BIT(15)
+#define MI_SEMAPHORE_CMP_OP_MASK REG_GENMASK(14, 12)
+#define MI_SEMAPHORE_SAD_EQ_SDD REG_FIELD_PREP(MI_SEMAPHORE_CMP_OP_MASK, 4)
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index d226d3228199..071c45abda2a 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -56,7 +56,14 @@ static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
dw[i++] = reg.addr + gt->mmio.adj_offset;
dw[i++] = AUX_INV;
- dw[i++] = MI_NOOP;
+ dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
+ MI_SEMAPHORE_REGISTER_POLL |
+ MI_SEMAPHORE_POLL |
+ MI_SEMAPHORE_SAD_EQ_SDD;
+ dw[i++] = 0;
+ dw[i++] = reg.addr + gt->mmio.adj_offset;
+ dw[i++] = 0;
+ dw[i++] = 0;
return i;
}
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index 477dc7defd72..1197fc0bf2af 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -8,7 +8,7 @@
struct xe_sched_job;
-#define MAX_JOB_SIZE_DW 70
+#define MAX_JOB_SIZE_DW 74
#define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
/**
--
2.48.0
next prev parent reply other threads:[~2025-10-22 7:32 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 7:32 [CI 00/14] auxccs ci run no stolen with flush Tvrtko Ursulin
2025-10-22 7:32 ` [CI 01/14] drm/xe: Fix ggtt fb alignment Tvrtko Ursulin
2025-10-22 7:32 ` [CI 02/14] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
2025-10-22 7:32 ` [CI 03/14] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
2025-10-22 7:32 ` [CI 04/14] drm/xe/xelp: Support auxccs invalidation on blitter Tvrtko Ursulin
2025-10-22 7:32 ` [CI 05/14] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Tvrtko Ursulin
2025-10-22 7:32 ` Tvrtko Ursulin [this message]
2025-10-22 7:32 ` [CI 07/14] drm/xe: Export xe_emit_aux_table_inv Tvrtko Ursulin
2025-10-22 7:32 ` [CI 08/14] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
2025-10-22 7:32 ` [CI 09/14] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-10-22 7:32 ` [CI 10/14] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-10-22 7:32 ` [CI 11/14] drm/xe: Do not use stolen memory for DPT on IGFX and AuxCCS Tvrtko Ursulin
2025-10-22 7:32 ` [CI 12/14] drm/xe: Force flush system memory AuxCCS framebuffers before scan out Tvrtko Ursulin
2025-10-22 7:32 ` [CI 13/14] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-10-22 7:32 ` [CI 14/14] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe Tvrtko Ursulin
2025-10-22 8:53 ` ✗ CI.checkpatch: warning for auxccs ci run no stolen with flush Patchwork
2025-10-22 8:54 ` ✓ CI.KUnit: success " Patchwork
2025-10-22 9:36 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-22 11:39 ` ✗ Xe.CI.Full: failure " Patchwork
2025-10-22 17:16 ` ✗ CI.checkpatch: warning for auxccs ci run no stolen with flush (rev2) Patchwork
2025-10-22 17:17 ` ✓ CI.KUnit: success " Patchwork
2025-10-22 17:55 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-22 20:47 ` ✗ Xe.CI.Full: failure " Patchwork
2025-10-23 9:31 ` ✗ CI.checkpatch: warning for auxccs ci run no stolen with flush (rev3) Patchwork
2025-10-23 9:32 ` ✓ CI.KUnit: success " Patchwork
2025-10-23 10:42 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-23 16:11 ` ✗ Xe.CI.Full: failure " Patchwork
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