From: "Anoop, Vijay" <anoop.c.vijay@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: umesh.nerlige.ramappa@intel.com, badal.nilawar@intel.com,
rodrigo.vivi@intel.com, aravind.iddamsetty@intel.com,
riana.tauro@intel.com, anshuman.gupta@intel.com,
matthew.d.roper@intel.com, michael.j.ruhl@intel.com,
paul.e.luse@intel.com, mohamed.mansoor.v@intel.com,
kam.nasim@intel.com, anoop.c.vijay@intel.com
Subject: [PATCH v9 4/6] drm/xe/sysctrl: Add System Controller initialization
Date: Tue, 10 Mar 2026 11:23:23 -0700 [thread overview]
Message-ID: <20260310182336.611041-12-anoop.c.vijay@intel.com> (raw)
In-Reply-To: <20260310182336.611041-8-anoop.c.vijay@intel.com>
From: Anoop Vijay <anoop.c.vijay@intel.com>
Add initialization infrastructure for System Controller subsystem:
- xe_sysctrl_init() and cleanup handler
- Integration into xe_device_probe()
- Makefile build inclusion
Initialization flow will check platform support via has_sysctrl flag and
configure mailbox region through SOC remapper interface
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
v8: (Matt, Michal, Shuicheng)
- Fixed include order
- Added VF check
- Converted runtime checks to assertions
- Added sc_to_xe() helper
- Fixed kernel-doc syntax
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 5 ++
drivers/gpu/drm/xe/xe_sysctrl.c | 82 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl.h | 21 +++++++++
4 files changed, 109 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index f63fdf80055a..76a86818986a 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -123,6 +123,7 @@ xe-y += xe_bb.o \
xe_step.o \
xe_survivability_mode.o \
xe_sync.o \
+ xe_sysctrl.o \
xe_tile.o \
xe_tile_sysfs.o \
xe_tlb_inval.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index e77a3a3db73d..c70d4ae413a9 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -65,6 +65,7 @@
#include "xe_survivability_mode.h"
#include "xe_sriov.h"
#include "xe_svm.h"
+#include "xe_sysctrl.h"
#include "xe_tile.h"
#include "xe_ttm_stolen_mgr.h"
#include "xe_ttm_sys_mgr.h"
@@ -985,6 +986,10 @@ int xe_device_probe(struct xe_device *xe)
if (err)
goto err_unregister_display;
+ err = xe_sysctrl_init(xe);
+ if (err)
+ goto err_unregister_display;
+
err = xe_device_sysfs_init(xe);
if (err)
goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c
new file mode 100644
index 000000000000..2751fe25a6ff
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl.c
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/mutex.h>
+
+#include <drm/drm_managed.h>
+
+#include "regs/xe_sysctrl_regs.h"
+#include "xe_assert.h"
+#include "xe_device.h"
+#include "xe_mmio.h"
+#include "xe_printk.h"
+#include "xe_soc_remapper.h"
+#include "xe_sriov.h"
+#include "xe_sysctrl.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_types.h"
+
+/**
+ * DOC: System Controller (sysctrl)
+ *
+ * The System Controller (sysctrl) is an embedded microcontroller in Intel GPUs
+ * responsible for managing various low-level platform functions. Communication
+ * between the driver and the System Controller occurs via a mailbox interface,
+ * enabling the exchange of commands and responses.
+ *
+ * This module provides initialization routines and helper functions to interact
+ * with the System Controller through the mailbox.
+ */
+static void sysctrl_fini(void *arg)
+{
+ struct xe_device *xe = arg;
+
+ xe->soc_remapper.set_sysctrl_region(xe, 0);
+}
+
+/**
+ * xe_sysctrl_init() - Initialize System Controller subsystem
+ * @xe: xe device instance
+ *
+ * Entry point for System Controller initialization, called from xe_device_probe.
+ * This function checks platform support and initializes the system controller.
+ *
+ * Return: 0 on success, error code on failure
+ */
+int xe_sysctrl_init(struct xe_device *xe)
+{
+ struct xe_tile *tile = xe_device_get_root_tile(xe);
+ struct xe_sysctrl *sc = &xe->sc;
+ int ret;
+
+ if (!xe->info.has_sysctrl)
+ return 0;
+
+ if (IS_SRIOV_VF(xe))
+ return 0;
+
+ xe_assert(xe, xe->soc_remapper.set_sysctrl_region);
+
+ xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
+
+ ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
+ if (ret)
+ return ret;
+
+ sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL);
+ if (!sc->mmio)
+ return -ENOMEM;
+
+ xe_mmio_init(sc->mmio, tile, tile->mmio.regs, tile->mmio.regs_size);
+ sc->mmio->adj_offset = SYSCTRL_BASE;
+ sc->mmio->adj_limit = U32_MAX;
+
+ ret = drmm_mutex_init(&xe->drm, &sc->cmd_lock);
+ if (ret)
+ return ret;
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h
new file mode 100644
index 000000000000..d5d8735038ae
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_H_
+#define _XE_SYSCTRL_H_
+
+#include <linux/container_of.h>
+
+#include "xe_device_types.h"
+#include "xe_sysctrl_types.h"
+
+static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc)
+{
+ return container_of(sc, struct xe_device, sc);
+}
+
+int xe_sysctrl_init(struct xe_device *xe);
+
+#endif
--
2.43.0
next prev parent reply other threads:[~2026-03-10 18:24 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 18:23 [PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms Anoop, Vijay
2026-03-10 18:23 ` [PATCH v9 1/6] drm/xe/sysctrl: Add System Controller types and device integration Anoop, Vijay
2026-03-18 16:07 ` Umesh Nerlige Ramappa
2026-03-10 18:23 ` [PATCH v9 2/6] drm/xe/sysctrl: Add System Controller register definitions Anoop, Vijay
2026-03-10 18:23 ` [PATCH v9 3/6] drm/xe/sysctrl: Add mailbox communication headers Anoop, Vijay
2026-03-11 7:29 ` Riana Tauro
2026-03-13 4:47 ` Nilawar, Badal
2026-03-10 18:23 ` Anoop, Vijay [this message]
2026-03-11 10:16 ` [PATCH v9 4/6] drm/xe/sysctrl: Add System Controller initialization Gupta, Anshuman
2026-03-11 10:59 ` Riana Tauro
2026-03-12 4:32 ` Umesh Nerlige Ramappa
2026-03-10 18:23 ` [PATCH v9 5/6] drm/xe/sysctrl: Add mailbox communication implementation Anoop, Vijay
2026-03-12 5:13 ` Riana Tauro
2026-03-10 18:23 ` [PATCH v9 6/6] drm/xe/pci: Enable System Controller for CRI platform Anoop, Vijay
2026-03-11 11:31 ` Riana Tauro
2026-03-12 5:54 ` Umesh Nerlige Ramappa
2026-03-10 18:30 ` ✗ CI.checkpatch: warning for drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms (rev10) Patchwork
2026-03-10 18:31 ` ✓ CI.KUnit: success " Patchwork
2026-03-10 19:08 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-11 12:30 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-03-12 5:18 ` [PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms Riana Tauro
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