From: Riana Tauro <riana.tauro@intel.com>
To: "Anoop, Vijay" <anoop.c.vijay@intel.com>,
<intel-xe@lists.freedesktop.org>
Cc: <umesh.nerlige.ramappa@intel.com>, <badal.nilawar@intel.com>,
<rodrigo.vivi@intel.com>, <aravind.iddamsetty@intel.com>,
<anshuman.gupta@intel.com>, <matthew.d.roper@intel.com>,
<michael.j.ruhl@intel.com>, <paul.e.luse@intel.com>,
<mohamed.mansoor.v@intel.com>, <kam.nasim@intel.com>
Subject: Re: [PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms
Date: Thu, 12 Mar 2026 10:48:04 +0530 [thread overview]
Message-ID: <f19652da-7b49-4d3a-b987-a6be59389d3d@intel.com> (raw)
In-Reply-To: <20260310182336.611041-8-anoop.c.vijay@intel.com>
Hi Anoop
Fix Title: drm/xe/xe_sysctrl in all patches
On 3/10/2026 11:53 PM, Anoop, Vijay wrote:
> From: Anoop Vijay <anoop.c.vijay@intel.com>
>
> This patch series introduces System Controller (sysctrl) component for Intel Xe3p
> dGPU platforms.
>
> This component provides the foundational infrastructure for communication
> with the System Controller firmware using MKHI protocol over a mailbox interface.
Add a brief about what System controller is.
Use either MKHI or SCHI. Not a mix of both
Maybe add a link to the usage patch series.
Thanks
Riana
>
> Key features introduced:
> - Detection and initialization of System Controller interface on Xe3p dGPU platforms
> - Mailbox communication with System Controller firmware
> - Fragmented message transfer for large command payloads
>
> This implementation establishes the base for future System Controller feature
> enablement and firmware command handling.
> ---
> v2: (Umesh)
> - Fix commit message to 75 chars per line
> - Address CI.Hooks and checkpatch warnings
> - Add sc_to_xe() helper for cleaner conversions
> - Alphabetical order for headers
> - Simplify write/read frame logic using memcpy
> - Drop redundant frame length checks
> - Use xe_mmio_rmw32() for register updates
> - Align FIELD_PREP macros
> - Improve error handling and timeout messages
> - Handle phase_bit revert on write-frame failure
> - Update rdata_len on partial receive before return
> - Remove unnecessary headers
>
> v3: (Matt, Riana, Umesh)
> - Split patch into logical series
> - Rename SC_* macros to SYSCTRL_* for consistency
> - Move MKHI_* defines to .c file
> - Pass xe directly to helpers
> - Place devm_add_action_or_reset() after set_sysctrl_region()
> - Add kernel-doc for xe_sysctrl_mailbox_init()
> - Add short documentation for System Controller in xe_sysctrl.c
> - Avoid hardcoded sizes
> - Move structs to _types.h
>
> v4: (Matt, Mike)
> - Code style improvements
> - Add domain-specific MMIO accessor
> - Change phase_bit to bool type
> - Add input validation and buffer overflow protection
>
> v5: (Umesh, Riana)
> - Reset phase bit to 0 on error conditions
> - Refactor mailbox receive path
> - Updated xe_err messages for consistency
>
> v6: (Matt)
> - Move protocol constants from xe_sysctrl_regs.h to xe_sysctrl_mailbox_types.h
> - Add SYSCTRL_MB_CTRL_MKHI_CMD helper macro
>
> v7:
> - Fix for CI failure
>
> v8: (Matt, Michal, Shuicheng)
> - Reordered patches for logical flow
> - Moved ABI definitions to dedicated header
> - Static functions renamed with short prefix
> - Fixed include order
> - Added VF check
> - Converted runtime checks to assertions
> - Changed xe_sysctrl_send_command() function parameter from 'xe' to 'sc'
> - Added frame length validation and command overflow protection
> - Use REG_FIELD_PREP for hardware registers
> - Changed error format to %pe
> - Removed unnecessary NULL checks and explicit zeros
> - Fixed kernel-doc syntax
> - Added sc_to_xe() helper
>
> v9: (Matt, Umesh, Badal)
> - Extended commit message to explain System Controller and purpose of
> `has_sysctrl` flag
> - Normalized hexadecimal literal casing
> - Renamed MKHI to SCHI (System Controller Host Interface)
> - Fixed kernel-doc syntax
> ---
>
> Anoop Vijay (6):
> drm/xe/sysctrl: Add System Controller types and device integration
> drm/xe/sysctrl: Add System Controller register definitions
> drm/xe/sysctrl: Add mailbox communication headers
> drm/xe/sysctrl: Add System Controller initialization
> drm/xe/sysctrl: Add mailbox communication implementation
> drm/xe/pci: Enable System Controller for CRI platform
>
> drivers/gpu/drm/xe/Makefile | 2 +
> drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 31 ++
> drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++
> drivers/gpu/drm/xe/xe_device.c | 5 +
> drivers/gpu/drm/xe/xe_device_types.h | 6 +
> drivers/gpu/drm/xe/xe_pci.c | 2 +
> drivers/gpu/drm/xe/xe_pci_types.h | 1 +
> drivers/gpu/drm/xe/xe_sysctrl.c | 84 ++++
> drivers/gpu/drm/xe/xe_sysctrl.h | 21 +
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 364 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 31 ++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 35 ++
> drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++
> 13 files changed, 650 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
> create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h
>
prev parent reply other threads:[~2026-03-12 5:18 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 18:23 [PATCH v9 0/6] drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms Anoop, Vijay
2026-03-10 18:23 ` [PATCH v9 1/6] drm/xe/sysctrl: Add System Controller types and device integration Anoop, Vijay
2026-03-18 16:07 ` Umesh Nerlige Ramappa
2026-03-10 18:23 ` [PATCH v9 2/6] drm/xe/sysctrl: Add System Controller register definitions Anoop, Vijay
2026-03-10 18:23 ` [PATCH v9 3/6] drm/xe/sysctrl: Add mailbox communication headers Anoop, Vijay
2026-03-11 7:29 ` Riana Tauro
2026-03-13 4:47 ` Nilawar, Badal
2026-03-10 18:23 ` [PATCH v9 4/6] drm/xe/sysctrl: Add System Controller initialization Anoop, Vijay
2026-03-11 10:16 ` Gupta, Anshuman
2026-03-11 10:59 ` Riana Tauro
2026-03-12 4:32 ` Umesh Nerlige Ramappa
2026-03-10 18:23 ` [PATCH v9 5/6] drm/xe/sysctrl: Add mailbox communication implementation Anoop, Vijay
2026-03-12 5:13 ` Riana Tauro
2026-03-10 18:23 ` [PATCH v9 6/6] drm/xe/pci: Enable System Controller for CRI platform Anoop, Vijay
2026-03-11 11:31 ` Riana Tauro
2026-03-12 5:54 ` Umesh Nerlige Ramappa
2026-03-10 18:30 ` ✗ CI.checkpatch: warning for drm/xe/sysctrl: Add system controller component for Xe3p dGPU platforms (rev10) Patchwork
2026-03-10 18:31 ` ✓ CI.KUnit: success " Patchwork
2026-03-10 19:08 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-11 12:30 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-03-12 5:18 ` Riana Tauro [this message]
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