[PATCH v1 1/2] drm/xe/xe_ras: Add structures and commands for RAS GPU health indicator

[Soham Purkait <soham.purkait@intel.com>]

Add the sysctrl commands and response structures for GPU health
indicator supported by RAS.

Signed-off-by: Soham Purkait <soham.purkait@intel.com>
---
 drivers/gpu/drm/xe/xe_ras_types.h             | 65 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 15 +++++
 2 files changed, 80 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h

diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
new file mode 100644
index 000000000000..a05cfd971acd
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_TYPES_H_
+#define _XE_RAS_TYPES_H_
+
+#include <linux/types.h>
+
+/**
+ * typedef xe_ras_health_status_t - Device health status values (8-bit)
+ *
+ * Three-state health indicator value reported by system controller commands.
+ *
+ * The expected values are:
+ * - 0: ok  - The device is healthy and operating within normal parameters.
+ * - 1: warning  - The device is experiencing minor issues but is still operational.
+ * - 2: critical  - The device is in a critical state and may not be operational.
+ */
+typedef u8 xe_ras_health_status_t;
+
+/**
+ * struct xe_ras_health_get_input - Input for XE_SYSCTRL_CMD_GET_HEALTH
+ */
+struct xe_ras_health_get_input {
+	/** @reserved: Reserved for future use, must be 0 */
+	u32 reserved[2];
+} __packed;
+
+/**
+ * struct xe_ras_health_get_response - Response for XE_SYSCTRL_CMD_GET_HEALTH
+ */
+struct xe_ras_health_get_response {
+	/** @current_health: Current health status (OK/WARNING/CRITICAL) */
+	xe_ras_health_status_t current_health;
+	/** @reserved: Reserved for alignment */
+	u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_health_set_input - Input for XE_SYSCTRL_CMD_SET_HEALTH
+ */
+struct xe_ras_health_set_input {
+	/** @new_health: New health status to set */
+	xe_ras_health_status_t new_health;
+	/** @reserved: Reserved for alignment */
+	u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_health_set_response - Response for XE_SYSCTRL_CMD_SET_HEALTH
+ */
+struct xe_ras_health_set_response {
+	/** @operation_status: Status of set operation (RAS_STATUS_*) */
+	u32 operation_status;
+	/** @current_health: Health status after this change */
+	xe_ras_health_status_t current_health;
+	/** @reserved: Reserved for alignment */
+	u8 reserved[3];
+	/** @reserved_2: Reserved for future expansion */
+	u32 reserved_2[2];
+} __packed;
+
+#endif /* _XE_RAS_TYPES_H_ */
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 89456aec6097..fc73e02c3202 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -10,6 +10,21 @@
 
 #include "abi/xe_sysctrl_abi.h"
 
+/**
+ * enum xe_sysctrl_mailbox_command_id - RAS Command ID's for GFSP group
+ *
+ * @XE_SYSCTRL_CMD_GET_HEALTH: Get current health status
+ * @XE_SYSCTRL_CMD_SET_HEALTH: Set new health status
+ */
+enum xe_sysctrl_mailbox_command_id {
+	XE_SYSCTRL_CMD_GET_HEALTH = 0x0B,
+	XE_SYSCTRL_CMD_SET_HEALTH = 0x0C
+};
+
+enum xe_sysctrl_group {
+	XE_SYSCTRL_GROUP_GFSP = 1
+};
+
 /**
  * struct xe_sysctrl_mailbox_command - System Controller mailbox command
  */
-- 
2.34.1