[PATCH v1 2/2] drm/xe/xe_ras: Add RAS support for GPU health indicator

[Soham Purkait <soham.purkait@intel.com>]

GPU health indicator exposes a single sysfs interface, gpu_health,
at the device level, allowing administrators and management tools to
query the GPU health status. The interface permits both read and write
operations on PF and native functions, while on VFs it is exposed as
read-only.

v1:
 - gpu_health is read-write on PFs and native functions. It is read-only
   on VFs. VF write attempts are rejected.

Signed-off-by: Soham Purkait <soham.purkait@intel.com>
---
 drivers/gpu/drm/xe/Makefile    |   1 +
 drivers/gpu/drm/xe/xe_device.c |   3 +
 drivers/gpu/drm/xe/xe_ras.c    | 181 +++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h    |  13 +++
 4 files changed, 198 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index e42e582aca5c..4bf98c3c9b25 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -112,6 +112,7 @@ xe-y += xe_bb.o \
 	xe_pxp_debugfs.o \
 	xe_pxp_submit.o \
 	xe_query.o \
+	xe_ras.o \
 	xe_range_fence.o \
 	xe_reg_sr.o \
 	xe_reg_whitelist.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4b45b617a039..cb5484712f1c 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -62,6 +62,7 @@
 #include "xe_psmi.h"
 #include "xe_pxp.h"
 #include "xe_query.h"
+#include "xe_ras.h"
 #include "xe_shrinker.h"
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
@@ -1067,6 +1068,8 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_vsec_init(xe);
 
+	xe_ras_init(xe);
+
 	err = xe_sriov_init_late(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
new file mode 100644
index 000000000000..925ef7738e6b
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "xe_device_types.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_sriov.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+static const char * const gpu_health_states[] = { "ok", "warning", "critical" };
+static const char * const gpu_health_fmt[] = {
+	"[%s] %s %s\n",
+	"%s [%s] %s\n",
+	"%s %s [%s]\n",
+};
+
+static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
+				    u32 cmd_mask, void *request, size_t request_len,
+				    void *response, size_t response_len)
+{
+	struct xe_sysctrl_app_msg_hdr hdr = {0};
+	u32 req_hdr;
+
+	req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+		  FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+	hdr.data = req_hdr;
+	command->header = hdr;
+	command->data_in = request;
+	command->data_in_len = request_len;
+	command->data_out = response;
+	command->data_out_len = response_len;
+}
+
+static ssize_t gpu_health_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_health_get_response response = {0};
+	struct xe_ras_health_get_input request = {0};
+	u8 health;
+	int ret;
+	size_t rlen = 0;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_HEALTH, &request,
+				sizeof(request), &response, sizeof(response));
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+		return -EIO;
+	}
+	if (rlen != sizeof(response)) {
+		xe_err(xe,
+		       "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n",
+		       rlen, sizeof(response));
+		return -EIO;
+	}
+	if (response.current_health >= ARRAY_SIZE(gpu_health_states)) {
+		xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n",
+		       response.current_health);
+		return -EIO;
+	}
+
+	health = response.current_health;
+
+	xe_dbg(xe, "[RAS]: current GPU health state = %d (%s)\n",
+	       health, gpu_health_states[health]);
+
+	return sysfs_emit(buf, gpu_health_fmt[health],
+			  gpu_health_states[0],
+			  gpu_health_states[1],
+			  gpu_health_states[2]);
+}
+
+static ssize_t gpu_health_store(struct device *dev, struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct xe_device *xe = kdev_to_xe_device(dev);
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_health_set_input request = {0};
+	struct xe_ras_health_set_response response = {0};
+	u8 health;
+	int ret;
+	size_t rlen = 0;
+	int state;
+
+	if (IS_SRIOV_VF(xe)) {
+		xe_dbg(xe, "[RAS]: GPU health state update rejected on VF\n");
+		return -EPERM;
+	}
+
+	state = sysfs_match_string(gpu_health_states,
+				   buf);
+	if (state < 0)
+		return -EINVAL;
+
+	request.new_health = (xe_ras_health_status_t)state;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_SET_HEALTH, &request,
+				sizeof(request), &response, sizeof(response));
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+		return -EIO;
+	}
+	if (rlen != sizeof(response)) {
+		xe_err(xe,
+		       "[RAS]: invalid Sysctrl response length %zu (expected %zu)\n",
+		       rlen, sizeof(response));
+		return -EIO;
+	}
+	if (response.current_health >= ARRAY_SIZE(gpu_health_states)) {
+		xe_err(xe, "[RAS]: invalid health state %u from Sysctrl\n",
+		       response.current_health);
+		return -EIO;
+	}
+
+	health = response.current_health;
+
+	xe_dbg(xe, "[RAS]: current GPU health state=%d (%s)\n",
+	       health, gpu_health_states[health]);
+
+	return count;
+}
+
+static struct device_attribute dev_attr_gpu_health_rw =
+	__ATTR_RW_MODE(gpu_health, 0600);
+
+static struct device_attribute dev_attr_gpu_health_ro =
+	__ATTR_RO_MODE(gpu_health, 0400);
+
+static struct device_attribute *gpu_health_attr(struct xe_device *xe)
+{
+	return IS_SRIOV_VF(xe) ? &dev_attr_gpu_health_ro : &dev_attr_gpu_health_rw;
+}
+
+static void gpu_health_sysfs_fini(void *arg)
+{
+	struct device *dev = arg;
+	struct xe_device *xe = kdev_to_xe_device(dev);
+
+	device_remove_file(dev, gpu_health_attr(xe));
+}
+
+static void gpu_health_indicator_sysfs_init(struct xe_device *xe)
+{
+	struct device *dev = xe->drm.dev;
+	int err;
+
+	err = device_create_file(dev, gpu_health_attr(xe));
+	if (err)
+		goto err;
+
+	err = devm_add_action_or_reset(dev, gpu_health_sysfs_fini, dev);
+	if (err)
+		goto err;
+
+	return;
+
+err:
+	xe_err(xe, "[RAS]: failed to initialize GPU health sysfs, err=%d\n", err);
+}
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+	if (!xe->info.has_sysctrl)
+		return;
+
+	gpu_health_indicator_sysfs_init(xe);
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
new file mode 100644
index 000000000000..14cb973603e7
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_H_
+#define _XE_RAS_H_
+
+struct xe_device;
+
+void xe_ras_init(struct xe_device *xe);
+
+#endif
-- 
2.34.1