* [PATCH 0/9] Add new debug infrastructure for configfs
@ 2026-05-04 4:43 Stuart Summers
2026-05-04 4:43 ` [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode Stuart Summers
` (13 more replies)
0 siblings, 14 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Add a new configfs debug group. The intent of this structure is
to allow us to separate ABI facing configfs entries from those
which are purely for debug purposes. And it allows us more flexibility
in how we define those parameters used for debug.
Add a new infrastructure to this debug configfs group that lets us
easily define the parameters in a quick list. This is primarily
useful for simple, single-type parameters such as enable/disable
features or simple values passed. For more complex parameters,
we will still need to define these separately.
Pull the GuC target related changes from [1] to fit within
this new structure and add a new definition for guc_log_level
on top of the existing module parameter (to ensure we aren't
impacting existing users of the module parameter).
Note that the debug parameters here are all to be used "at your
own risk". Without having in depth knowledge of how these impact
the software and hardware, there could be unforeseen consequences
of setting them. As such, they are all wrapped in a
CONFIG_DRM_XE_DEBUG configfs option.
In terms of the patches here, I'm also making a few organizational
changes like naming and sorting. I also know we have a few other
module parameters that could migrate here, but I didn't want to
overload this series too much, so the focus for now is on
the existing configfs entries and demonstrating the new structures
with the GuC log level and target parameters.
I used GitHub Copilot with Claude pretty extensively through the
process here and attributed as such. Happy to answer any questions
around this.
I also decided to drop John Harrison from the NPK patch. It has
been modified quite a bit from the original, but more importantly
John is no longer with Intel and that email address isn't available
any more. If it makes a difference here, John and I had both separately
implemented this same change at different occasions for debug. The
one I used to start that initial series was cherry-picked from his
latest variant.
Tested on BMG.
[1] https://patchwork.freedesktop.org/series/162087/
Stuart Summers (9):
drm/xe: Rename survivability_mode to enable_survivability_mode
drm/xe: Sort xe_config_device fields and defaults alphabetically
drm/xe: Split out configfs data structures
drm/xe: Add a new debug focused configfs group
drm/xe: Move debug configfs entries to xe_configfs_debug.c
drm/xe/guc: Add configfs support for guc_log_level
drm/xe/guc: Add support for NPK as a GuC log target
drm/xe: Add infrastructure for debug configfs parameters
drm/xe: Migrate existing debug configfs entries to params
infrastructure
drivers/gpu/drm/xe/Makefile | 2 +
drivers/gpu/drm/xe/abi/guc_log_abi.h | 8 +
drivers/gpu/drm/xe/xe_configfs.c | 952 ++----------------
drivers/gpu/drm/xe/xe_configfs.h | 23 -
drivers/gpu/drm/xe/xe_configfs_debug.c | 900 +++++++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug.h | 56 ++
drivers/gpu/drm/xe/xe_configfs_debug_params.c | 112 +++
drivers/gpu/drm/xe/xe_configfs_debug_params.h | 127 +++
drivers/gpu/drm/xe/xe_configfs_types.h | 73 ++
drivers/gpu/drm/xe/xe_defaults.h | 5 +
drivers/gpu/drm/xe/xe_guc.c | 12 +-
drivers/gpu/drm/xe/xe_guc_log.c | 3 +-
drivers/gpu/drm/xe/xe_hw_engine.c | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 1 +
drivers/gpu/drm/xe/xe_pci.c | 1 +
drivers/gpu/drm/xe/xe_psmi.c | 1 +
drivers/gpu/drm/xe/xe_rtp.c | 1 +
drivers/gpu/drm/xe/xe_survivability_mode.c | 3 +-
18 files changed, 1369 insertions(+), 912 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.c
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.h
create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
--
2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 13:29 ` Gustavo Sousa
2026-05-04 4:43 ` [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically Stuart Summers
` (12 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Rename the survivability_mode field in struct xe_config_device to
enable_survivability_mode to be consistent with the enable_psmi naming
convention used for similar boolean config flags.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-----------
drivers/gpu/drm/xe/xe_configfs.h | 4 +--
drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
3 files changed, 23 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 32102600a148..69abc69ec0f3 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -58,7 +58,7 @@
* │ └── ...
* :
* └── 0000:03:00.0
- * ├── survivability_mode
+ * ├── enable_survivability_mode
* ├── gt_types_allowed
* ├── engines_allowed
* └── enable_psmi
@@ -79,7 +79,7 @@
* Enable survivability mode on supported cards. This setting only takes
* effect when probing the device. Example to enable it::
*
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
*
* This attribute can only be set before binding to the device.
*
@@ -260,7 +260,7 @@ struct xe_config_group_device {
u64 engines_allowed;
struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- bool survivability_mode;
+ bool enable_survivability_mode;
bool enable_psmi;
struct {
unsigned int max_vfs;
@@ -279,7 +279,7 @@ struct xe_config_group_device {
static const struct xe_config_device device_defaults = {
.gt_types_allowed = U64_MAX,
.engines_allowed = U64_MAX,
- .survivability_mode = false,
+ .enable_survivability_mode = false,
.enable_psmi = false,
.sriov = {
.max_vfs = XE_DEFAULT_MAX_VFS,
@@ -357,20 +357,21 @@ static bool is_bound(struct xe_config_group_device *dev)
return ret;
}
-static ssize_t survivability_mode_show(struct config_item *item, char *page)
+static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
{
struct xe_config_device *dev = to_xe_config_device(item);
- return sprintf(page, "%d\n", dev->survivability_mode);
+ return sprintf(page, "%d\n", dev->enable_survivability_mode);
}
-static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
+static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
+ size_t len)
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
- bool survivability_mode;
+ bool enable_survivability_mode;
int ret;
- ret = kstrtobool(page, &survivability_mode);
+ ret = kstrtobool(page, &enable_survivability_mode);
if (ret)
return ret;
@@ -378,7 +379,7 @@ static ssize_t survivability_mode_store(struct config_item *item, const char *pa
if (is_bound(dev))
return -EBUSY;
- dev->config.survivability_mode = survivability_mode;
+ dev->config.enable_survivability_mode = enable_survivability_mode;
return len;
}
@@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
-CONFIGFS_ATTR(, survivability_mode);
+CONFIGFS_ATTR(, enable_survivability_mode);
static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_ctx_restore_mid_bb,
@@ -823,7 +824,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_enable_psmi,
&attr_engines_allowed,
&attr_gt_types_allowed,
- &attr_survivability_mode,
+ &attr_enable_survivability_mode,
NULL,
};
@@ -847,7 +848,7 @@ static bool xe_config_device_is_visible(struct config_item *item,
{
struct xe_config_group_device *dev = to_xe_config_group_device(item);
- if (attr == &attr_survivability_mode) {
+ if (attr == &attr_enable_survivability_mode) {
if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
return false;
}
@@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
PRI_CUSTOM_ATTR("%llx", engines_allowed);
PRI_CUSTOM_ATTR("%d", enable_psmi);
- PRI_CUSTOM_ATTR("%d", survivability_mode);
+ PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct pci_dev *pdev)
}
/**
- * xe_configfs_get_survivability_mode - get configfs survivability mode attribute
+ * xe_configfs_get_enable_survivability_mode - get configfs survivability mode attribute
* @pdev: pci device
*
- * Return: survivability_mode attribute in configfs
+ * Return: enable_survivability_mode attribute in configfs
*/
-bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
+bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
{
struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
bool mode;
if (!dev)
- return device_defaults.survivability_mode;
+ return device_defaults.enable_survivability_mode;
- mode = dev->config.survivability_mode;
+ mode = dev->config.enable_survivability_mode;
config_group_put(&dev->group);
return mode;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 07d62bf0c152..517de4946d35 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -18,7 +18,7 @@ struct pci_dev;
int xe_configfs_init(void);
void xe_configfs_exit(void);
void xe_configfs_check_device(struct pci_dev *pdev);
-bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
+bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev);
bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
@@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
static inline int xe_configfs_init(void) { return 0; }
static inline void xe_configfs_exit(void) { }
static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
-static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
+static inline bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) { return false; }
static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index db64cac39c94..7c85bdb267af 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -377,7 +377,7 @@ bool xe_survivability_mode_is_requested(struct xe_device *xe)
if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform < XE_BATTLEMAGE)
return false;
- survivability_mode = xe_configfs_get_survivability_mode(pdev);
+ survivability_mode = xe_configfs_get_enable_survivability_mode(pdev);
/* Enable survivability mode if set via configfs */
if (survivability_mode)
return true;
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
2026-05-04 4:43 ` [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 13:58 ` Gustavo Sousa
2026-05-04 15:47 ` Lin, Shuicheng
2026-05-04 4:43 ` [PATCH 3/9] drm/xe: Split out configfs data structures Stuart Summers
` (11 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Sort the fields in struct xe_config_device and the corresponding
device_defaults initializer in alphabetical order. Non-SRIOV fields
come first (alphabetically), followed by the SRIOV sub-struct with
its own fields in alphabetical order. Also sort the PRI_CUSTOM_ATTR
calls in dump_custom_dev_config() to match and the documentation for
each of the fields.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/xe_configfs.c | 192 +++++++++++++++----------------
1 file changed, 96 insertions(+), 96 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 69abc69ec0f3..1e134057fae8 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -73,53 +73,79 @@
* Configure Attributes
* ====================
*
- * Survivability mode:
- * -------------------
+ * Context restore BB
+ * ------------------
*
- * Enable survivability mode on supported cards. This setting only takes
- * effect when probing the device. Example to enable it::
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors: it's
+ * not intended for normal execution and will taint the kernel with TAINT_TEST
+ * when used.
*
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
+ * The syntax allows to pass straight instructions to be executed by the engine
+ * in a batch buffer or set specific registers.
*
- * This attribute can only be set before binding to the device.
+ * #. Generic instruction::
*
- * Allowed GT types:
- * -----------------
+ * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
*
- * Allow only specific types of GTs to be detected and initialized by the
- * driver. Any combination of GT types can be enabled/disabled, although
- * some settings will cause the device to fail to probe.
+ * #. Simple register setting::
*
- * Writes support both comma- and newline-separated input format. Reads
- * will always return one GT type per line. "primary" and "media" are the
- * GT type names supported by this interface.
+ * <engine-class> reg <address> <value>
*
- * This attribute can only be set before binding to the device.
+ * Commands are saved per engine class: all instances of that class will execute
+ * those commands during context switch. The instruction, dword arguments,
+ * addresses and values are in hex format like in the examples below.
*
- * Examples:
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
+ * normal context restore::
*
- * Allow both primary and media GTs to be initialized and used. This matches
- * the driver's default behavior::
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
*
- * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
+ * beginning of the context restore::
*
- * Allow only the primary GT of each tile to be initialized and used,
- * effectively disabling the media GT if it exists on the platform::
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
+
+ * #. Load certain values in a couple of registers (it can be used as a simpler
+ * alternative to the `cmd`) action::
*
- * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
+ * rcs reg 4F100 DEADBEEF
+ * rcs reg 4F104 FFFFFFFF
+ * EOF
*
- * Allow only the media GT of each tile to be initialized and used,
- * effectively disabling the primary GT. **This configuration will cause
- * device probe failure on all current platforms, but may be allowed on
- * igpu platforms in the future**::
+ * .. note::
*
- * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * When using multiple lines, make sure to use a command that is
+ * implemented with a single write syscall, like HEREDOC.
*
- * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
- * **This configuration will cause device probe failure on all current
- * platforms, but may be allowed on igpu platforms in the future**::
+ * Currently this is implemented only for post and mid context restore and
+ * these attributes can only be set before binding to the device.
*
- * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
+ * PSMI
+ * ----
+ *
+ * Enable extra debugging capabilities to trace engine execution. Only useful
+ * during early platform enabling and requires additional hardware connected.
+ * Once it's enabled, additionals WAs are added and runtime configuration is
+ * done via debugfs. Example to enable it::
+ *
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Survivability mode:
+ * -------------------
+ *
+ * Enable survivability mode on supported cards. This setting only takes
+ * effect when probing the device. Example to enable it::
+ *
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
+ *
+ * This attribute can only be set before binding to the device.
*
* Allowed engines:
* ----------------
@@ -147,69 +173,43 @@
*
* This attribute can only be set before binding to the device.
*
- * PSMI
- * ----
+ * Allowed GT types:
+ * -----------------
*
- * Enable extra debugging capabilities to trace engine execution. Only useful
- * during early platform enabling and requires additional hardware connected.
- * Once it's enabled, additionals WAs are added and runtime configuration is
- * done via debugfs. Example to enable it::
+ * Allow only specific types of GTs to be detected and initialized by the
+ * driver. Any combination of GT types can be enabled/disabled, although
+ * some settings will cause the device to fail to probe.
*
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
+ * Writes support both comma- and newline-separated input format. Reads
+ * will always return one GT type per line. "primary" and "media" are the
+ * GT type names supported by this interface.
*
* This attribute can only be set before binding to the device.
*
- * Context restore BB
- * ------------------
- *
- * Allow to execute a batch buffer during any context switches. When the
- * GPU is restoring the context, it executes additional commands. It's useful
- * for testing additional workarounds and validating certain HW behaviors: it's
- * not intended for normal execution and will taint the kernel with TAINT_TEST
- * when used.
- *
- * The syntax allows to pass straight instructions to be executed by the engine
- * in a batch buffer or set specific registers.
- *
- * #. Generic instruction::
- *
- * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
- *
- * #. Simple register setting::
- *
- * <engine-class> reg <address> <value>
- *
- * Commands are saved per engine class: all instances of that class will execute
- * those commands during context switch. The instruction, dword arguments,
- * addresses and values are in hex format like in the examples below.
+ * Examples:
*
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
- * normal context restore::
+ * Allow both primary and media GTs to be initialized and used. This matches
+ * the driver's default behavior::
*
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
- * beginning of the context restore::
+ * Allow only the primary GT of each tile to be initialized and used,
+ * effectively disabling the media GT if it exists on the platform::
*
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
-
- * #. Load certain values in a couple of registers (it can be used as a simpler
- * alternative to the `cmd`) action::
+ * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
- * rcs reg 4F100 DEADBEEF
- * rcs reg 4F104 FFFFFFFF
- * EOF
+ * Allow only the media GT of each tile to be initialized and used,
+ * effectively disabling the primary GT. **This configuration will cause
+ * device probe failure on all current platforms, but may be allowed on
+ * igpu platforms in the future**::
*
- * .. note::
+ * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
- * When using multiple lines, make sure to use a command that is
- * implemented with a single write syscall, like HEREDOC.
+ * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
+ * **This configuration will cause device probe failure on all current
+ * platforms, but may be allowed on igpu platforms in the future**::
*
- * Currently this is implemented only for post and mid context restore and
- * these attributes can only be set before binding to the device.
+ * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
*
* Max SR-IOV Virtual Functions
* ----------------------------
@@ -256,15 +256,15 @@ struct xe_config_group_device {
struct config_group sriov;
struct xe_config_device {
- u64 gt_types_allowed;
- u64 engines_allowed;
- struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- bool enable_survivability_mode;
+ struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
bool enable_psmi;
+ bool enable_survivability_mode;
+ u64 engines_allowed;
+ u64 gt_types_allowed;
struct {
- unsigned int max_vfs;
bool admin_only_pf;
+ unsigned int max_vfs;
} sriov;
} config;
@@ -277,13 +277,13 @@ struct xe_config_group_device {
};
static const struct xe_config_device device_defaults = {
- .gt_types_allowed = U64_MAX,
- .engines_allowed = U64_MAX,
- .enable_survivability_mode = false,
.enable_psmi = false,
+ .enable_survivability_mode = false,
+ .engines_allowed = U64_MAX,
+ .gt_types_allowed = U64_MAX,
.sriov = {
- .max_vfs = XE_DEFAULT_MAX_VFS,
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
+ .max_vfs = XE_DEFAULT_MAX_VFS,
},
};
@@ -814,17 +814,17 @@ static ssize_t ctx_restore_post_bb_store(struct config_item *item,
CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_psmi);
+CONFIGFS_ATTR(, enable_survivability_mode);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
-CONFIGFS_ATTR(, enable_survivability_mode);
static struct configfs_attribute *xe_config_device_attrs[] = {
&attr_ctx_restore_mid_bb,
&attr_ctx_restore_post_bb,
&attr_enable_psmi,
+ &attr_enable_survivability_mode,
&attr_engines_allowed,
&attr_gt_types_allowed,
- &attr_enable_survivability_mode,
NULL,
};
@@ -929,12 +929,12 @@ static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *p
return len;
}
-CONFIGFS_ATTR(sriov_, max_vfs);
CONFIGFS_ATTR(sriov_, admin_only_pf);
+CONFIGFS_ATTR(sriov_, max_vfs);
static struct configfs_attribute *xe_config_sriov_attrs[] = {
- &sriov_attr_max_vfs,
&sriov_attr_admin_only_pf,
+ &sriov_attr_max_vfs,
NULL,
};
@@ -1096,10 +1096,10 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
dev->config.attr_); \
} while (0)
- PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
- PRI_CUSTOM_ATTR("%llx", engines_allowed);
PRI_CUSTOM_ATTR("%d", enable_psmi);
PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
+ PRI_CUSTOM_ATTR("%llx", engines_allowed);
+ PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 3/9] drm/xe: Split out configfs data structures
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
2026-05-04 4:43 ` [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode Stuart Summers
2026-05-04 4:43 ` [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 4:52 ` Summers, Stuart
2026-05-04 8:47 ` Jani Nikula
2026-05-04 4:43 ` [PATCH 4/9] drm/xe: Add a new debug focused configfs group Stuart Summers
` (10 subsequent siblings)
13 siblings, 2 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Split the configfs data structures into their own _types.h file.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++-------------------
drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++
2 files changed, 80 insertions(+), 64 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 1e134057fae8..12b7fe65446d 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -4,7 +4,6 @@
*/
#include <linux/bitops.h>
-#include <linux/ctype.h>
#include <linux/configfs.h>
#include <linux/cleanup.h>
#include <linux/find.h>
@@ -15,12 +14,10 @@
#include "instructions/xe_mi_commands.h"
#include "xe_configfs.h"
+#include "xe_configfs_types.h"
#include "xe_defaults.h"
#include "xe_gt_types.h"
-#include "xe_hw_engine_types.h"
#include "xe_module.h"
-#include "xe_pci_types.h"
-#include "xe_sriov_types.h"
/**
* DOC: Xe Configfs
@@ -245,36 +242,6 @@
* # rmdir /sys/kernel/config/xe/0000:03:00.0/
*/
-/* Similar to struct xe_bb, but not tied to HW (yet) */
-struct wa_bb {
- u32 *cs;
- u32 len; /* in dwords */
-};
-
-struct xe_config_group_device {
- struct config_group group;
- struct config_group sriov;
-
- struct xe_config_device {
- struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
- bool enable_psmi;
- bool enable_survivability_mode;
- u64 engines_allowed;
- u64 gt_types_allowed;
- struct {
- bool admin_only_pf;
- unsigned int max_vfs;
- } sriov;
- } config;
-
- /* protects attributes */
- struct mutex lock;
- /* matching descriptor */
- const struct xe_device_desc *desc;
- /* tentative SR-IOV mode */
- enum xe_sriov_mode mode;
-};
static const struct xe_config_device device_defaults = {
.enable_psmi = false,
@@ -322,16 +289,6 @@ static const struct {
{ .name = "media", .type = XE_GT_TYPE_MEDIA },
};
-static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
-{
- return container_of(to_config_group(item), struct xe_config_group_device, group);
-}
-
-static struct xe_config_device *to_xe_config_device(struct config_item *item)
-{
- return &to_xe_config_group_device(item)->config;
-}
-
static bool is_bound(struct xe_config_group_device *dev)
{
unsigned int domain, bus, slot, function;
@@ -359,7 +316,7 @@ static bool is_bound(struct xe_config_group_device *dev)
static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
{
- struct xe_config_device *dev = to_xe_config_device(item);
+ struct xe_config_device *dev = xe_configfs_to_device(item);
return sprintf(page, "%d\n", dev->enable_survivability_mode);
}
@@ -367,7 +324,7 @@ static ssize_t enable_survivability_mode_show(struct config_item *item, char *pa
static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
bool enable_survivability_mode;
int ret;
@@ -386,7 +343,7 @@ static ssize_t enable_survivability_mode_store(struct config_item *item, const c
static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
{
- struct xe_config_device *dev = to_xe_config_device(item);
+ struct xe_config_device *dev = xe_configfs_to_device(item);
char *p = page;
for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
@@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
char *p = buf;
u64 typemask = 0;
@@ -437,7 +394,7 @@ static ssize_t gt_types_allowed_store(struct config_item *item, const char *page
static ssize_t engines_allowed_show(struct config_item *item, char *page)
{
- struct xe_config_device *dev = to_xe_config_device(item);
+ struct xe_config_device *dev = xe_configfs_to_device(item);
char *p = page;
for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
@@ -529,7 +486,7 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask,
static ssize_t engines_allowed_store(struct config_item *item, const char *page,
size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
ssize_t patternlen, p;
u64 mask, val = 0;
@@ -552,14 +509,14 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
static ssize_t enable_psmi_show(struct config_item *item, char *page)
{
- struct xe_config_device *dev = to_xe_config_device(item);
+ struct xe_config_device *dev = xe_configfs_to_device(item);
return sprintf(page, "%d\n", dev->enable_psmi);
}
static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
bool val;
int ret;
@@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct xe_config_group_device *dev,
static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K);
}
static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
}
@@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
const char *data, size_t sz)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz);
}
@@ -806,7 +763,7 @@ static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
static ssize_t ctx_restore_post_bb_store(struct config_item *item,
const char *data, size_t sz)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
}
@@ -830,7 +787,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
static void xe_config_device_release(struct config_item *item)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
mutex_destroy(&dev->lock);
@@ -846,7 +803,7 @@ static struct configfs_item_operations xe_config_device_ops = {
static bool xe_config_device_is_visible(struct config_item *item,
struct configfs_attribute *attr, int n)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
if (attr == &attr_enable_survivability_mode) {
if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
@@ -869,7 +826,7 @@ static const struct config_item_type xe_config_device_type = {
static ssize_t sriov_max_vfs_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
guard(mutex)(&dev->lock);
@@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct config_item *item, char *page)
static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
unsigned int max_vfs;
int ret;
@@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, s
static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *page)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
guard(mutex)(&dev->lock);
@@ -912,7 +869,7 @@ static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *page)
static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *page, size_t len)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
bool admin_only_pf;
int ret;
@@ -941,7 +898,7 @@ static struct configfs_attribute *xe_config_sriov_attrs[] = {
static bool xe_config_sriov_is_visible(struct config_item *item,
struct configfs_attribute *attr, int n)
{
- struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
if (attr == &sriov_attr_max_vfs && dev->mode != XE_SRIOV_MODE_PF)
return false;
@@ -1084,7 +1041,7 @@ static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev
if (!item)
return NULL;
- return to_xe_config_group_device(item);
+ return xe_configfs_to_group_device(item);
}
static void dump_custom_dev_config(struct pci_dev *pdev,
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
new file mode 100644
index 000000000000..935097aafa96
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#ifndef _XE_CONFIGFS_TYPES_H_
+#define _XE_CONFIGFS_TYPES_H_
+
+#include <linux/configfs.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+#include "xe_hw_engine_types.h"
+#include "xe_pci_types.h"
+#include "xe_sriov_types.h"
+
+struct config_item;
+
+/* Similar to struct xe_bb, but not tied to HW (yet) */
+struct wa_bb {
+ u32 *cs;
+ u32 len; /* in dwords */
+};
+
+struct xe_config_group_device {
+ struct config_group group;
+ struct config_group sriov;
+
+ struct xe_config_device {
+ struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
+ struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
+ bool enable_psmi;
+ bool enable_survivability_mode;
+ u64 engines_allowed;
+ u64 gt_types_allowed;
+ struct {
+ bool admin_only_pf;
+ unsigned int max_vfs;
+ } sriov;
+ } config;
+
+ /* protects attributes */
+ struct mutex lock;
+ /* matching descriptor */
+ const struct xe_device_desc *desc;
+ /* tentative SR-IOV mode */
+ enum xe_sriov_mode mode;
+};
+
+static inline struct xe_config_group_device *xe_configfs_to_group_device(struct config_item *item)
+{
+ return container_of(to_config_group(item), struct xe_config_group_device, group);
+}
+
+static inline struct xe_config_device *xe_configfs_to_device(struct config_item *item)
+{
+ return &xe_configfs_to_group_device(item)->config;
+}
+
+#endif /* _XE_CONFIGFS_TYPES_H_ */
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (2 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 3/9] drm/xe: Split out configfs data structures Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 15:42 ` Gustavo Sousa
2026-05-04 4:43 ` [PATCH 5/9] drm/xe: Move debug configfs entries to xe_configfs_debug.c Stuart Summers
` (9 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Add the skeleton code for a new debug specific configfs group.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/Makefile | 2 ++
drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
5 files changed, 35 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 09661f079d03..b58667b0b18e 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
+xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) := xe_configfs_debug.o
+xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
# graphics virtualization (SR-IOV) support
xe-y += \
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 12b7fe65446d..85df8ce5cf2a 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -1006,6 +1006,10 @@ static struct config_group *xe_config_make_device_group(struct config_group *gro
config_group_init_type_name(&dev->sriov, "sriov", &xe_config_sriov_type);
configfs_add_default_group(&dev->sriov, &dev->group);
}
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ config_group_init_type_name(&dev->debug, "debug", &xe_configfs_debug_type);
+ configfs_add_default_group(&dev->debug, &dev->group);
+#endif
mutex_init(&dev->lock);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
new file mode 100644
index 000000000000..45617282cec5
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/configfs.h>
+#include <linux/module.h>
+
+#include "xe_configfs_debug.h"
+#include "xe_configfs_types.h"
+
+const struct config_item_type xe_configfs_debug_type = {
+ .ct_owner = THIS_MODULE,
+};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
new file mode 100644
index 000000000000..01170dc2f97e
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#ifndef _XE_CONFIGFS_DEBUG_H_
+#define _XE_CONFIGFS_DEBUG_H_
+
+#endif /* _XE_CONFIGFS_DEBUG_H_ */
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 935097aafa96..c9d94a3c26a7 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -24,6 +24,9 @@ struct wa_bb {
struct xe_config_group_device {
struct config_group group;
struct config_group sriov;
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ struct config_group debug;
+#endif
struct xe_config_device {
struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
@@ -56,4 +59,8 @@ static inline struct xe_config_device *xe_configfs_to_device(struct config_item
return &xe_configfs_to_group_device(item)->config;
}
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+extern const struct config_item_type xe_configfs_debug_type;
+#endif
+
#endif /* _XE_CONFIGFS_TYPES_H_ */
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 5/9] drm/xe: Move debug configfs entries to xe_configfs_debug.c
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (3 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 4/9] drm/xe: Add a new debug focused configfs group Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 4:43 ` [PATCH 6/9] drm/xe/guc: Add configfs support for guc_log_level Stuart Summers
` (8 subsequent siblings)
13 siblings, 0 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Move the debug specific configfs attributes into the new
xe_configfs_debug.c file under a new debug configfs subdirectory.
Ensure these are wrapped in CONFIG_DRM_XE_DEBUG to allow finer grained
debug changes outside of more ABI specific configfs entries.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/xe_configfs.c | 889 ++-------------------
drivers/gpu/drm/xe/xe_configfs.h | 23 -
drivers/gpu/drm/xe/xe_configfs_debug.c | 861 +++++++++++++++++++-
drivers/gpu/drm/xe/xe_configfs_debug.h | 36 +
drivers/gpu/drm/xe/xe_configfs_types.h | 19 +-
drivers/gpu/drm/xe/xe_guc.c | 1 +
drivers/gpu/drm/xe/xe_hw_engine.c | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 1 +
drivers/gpu/drm/xe/xe_pci.c | 1 +
drivers/gpu/drm/xe/xe_psmi.c | 1 +
drivers/gpu/drm/xe/xe_rtp.c | 1 +
drivers/gpu/drm/xe/xe_survivability_mode.c | 1 +
12 files changed, 970 insertions(+), 865 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 85df8ce5cf2a..89e163ce56aa 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -6,13 +6,11 @@
#include <linux/bitops.h>
#include <linux/configfs.h>
#include <linux/cleanup.h>
-#include <linux/find.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/string.h>
-#include "instructions/xe_mi_commands.h"
#include "xe_configfs.h"
#include "xe_configfs_types.h"
#include "xe_defaults.h"
@@ -50,15 +48,11 @@
*
* /sys/kernel/config/xe/
* ├── 0000:00:02.0
- * │ └── ...
- * ├── 0000:00:02.1
- * │ └── ...
- * :
- * └── 0000:03:00.0
- * ├── enable_survivability_mode
- * ├── gt_types_allowed
- * ├── engines_allowed
- * └── enable_psmi
+ * │ └── sriov/
+ * │ ├── admin_only_pf
+ * │ └── max_vfs
+ * └── 0000:00:02.1
+ * └── ...
*
* After configuring the attributes as per next section, the device can be
* probed with::
@@ -70,144 +64,6 @@
* Configure Attributes
* ====================
*
- * Context restore BB
- * ------------------
- *
- * Allow to execute a batch buffer during any context switches. When the
- * GPU is restoring the context, it executes additional commands. It's useful
- * for testing additional workarounds and validating certain HW behaviors: it's
- * not intended for normal execution and will taint the kernel with TAINT_TEST
- * when used.
- *
- * The syntax allows to pass straight instructions to be executed by the engine
- * in a batch buffer or set specific registers.
- *
- * #. Generic instruction::
- *
- * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
- *
- * #. Simple register setting::
- *
- * <engine-class> reg <address> <value>
- *
- * Commands are saved per engine class: all instances of that class will execute
- * those commands during context switch. The instruction, dword arguments,
- * addresses and values are in hex format like in the examples below.
- *
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
- * normal context restore::
- *
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
- *
- * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
- * beginning of the context restore::
- *
- * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
- * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
-
- * #. Load certain values in a couple of registers (it can be used as a simpler
- * alternative to the `cmd`) action::
- *
- * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
- * rcs reg 4F100 DEADBEEF
- * rcs reg 4F104 FFFFFFFF
- * EOF
- *
- * .. note::
- *
- * When using multiple lines, make sure to use a command that is
- * implemented with a single write syscall, like HEREDOC.
- *
- * Currently this is implemented only for post and mid context restore and
- * these attributes can only be set before binding to the device.
- *
- * PSMI
- * ----
- *
- * Enable extra debugging capabilities to trace engine execution. Only useful
- * during early platform enabling and requires additional hardware connected.
- * Once it's enabled, additionals WAs are added and runtime configuration is
- * done via debugfs. Example to enable it::
- *
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
- *
- * This attribute can only be set before binding to the device.
- *
- * Survivability mode:
- * -------------------
- *
- * Enable survivability mode on supported cards. This setting only takes
- * effect when probing the device. Example to enable it::
- *
- * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
- *
- * This attribute can only be set before binding to the device.
- *
- * Allowed engines:
- * ----------------
- *
- * Allow only a set of engine(s) to be available, disabling the other engines
- * even if they are available in hardware. This is applied after HW fuses are
- * considered on each tile. Examples:
- *
- * Allow only one render and one copy engines, nothing else::
- *
- * # echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed
- *
- * Allow only compute engines and first copy engine::
- *
- * # echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/engines_allowed
- *
- * Note that the engine names are the per-GT hardware names. On multi-tile
- * platforms, writing ``rcs0,bcs0`` to this file would allow the first render
- * and copy engines on each tile.
- *
- * The requested configuration may not be supported by the platform and driver
- * may fail to probe. For example: if at least one copy engine is expected to be
- * available for migrations, but it's disabled. This is intended for debugging
- * purposes only.
- *
- * This attribute can only be set before binding to the device.
- *
- * Allowed GT types:
- * -----------------
- *
- * Allow only specific types of GTs to be detected and initialized by the
- * driver. Any combination of GT types can be enabled/disabled, although
- * some settings will cause the device to fail to probe.
- *
- * Writes support both comma- and newline-separated input format. Reads
- * will always return one GT type per line. "primary" and "media" are the
- * GT type names supported by this interface.
- *
- * This attribute can only be set before binding to the device.
- *
- * Examples:
- *
- * Allow both primary and media GTs to be initialized and used. This matches
- * the driver's default behavior::
- *
- * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
- * Allow only the primary GT of each tile to be initialized and used,
- * effectively disabling the media GT if it exists on the platform::
- *
- * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
- * Allow only the media GT of each tile to be initialized and used,
- * effectively disabling the primary GT. **This configuration will cause
- * device probe failure on all current platforms, but may be allowed on
- * igpu platforms in the future**::
- *
- * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
- * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
- * **This configuration will cause device probe failure on all current
- * platforms, but may be allowed on igpu platforms in the future**::
- *
- * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
- *
* Max SR-IOV Virtual Functions
* ----------------------------
*
@@ -243,11 +99,15 @@
*/
-static const struct xe_config_device device_defaults = {
- .enable_psmi = false,
- .enable_survivability_mode = false,
- .engines_allowed = U64_MAX,
- .gt_types_allowed = U64_MAX,
+const struct xe_config_device xe_configfs_device_defaults = {
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ .debug = {
+ .enable_psmi = false,
+ .enable_survivability_mode = false,
+ .engines_allowed = U64_MAX,
+ .gt_types_allowed = U64_MAX,
+ },
+#endif
.sriov = {
.admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
.max_vfs = XE_DEFAULT_MAX_VFS,
@@ -256,40 +116,22 @@ static const struct xe_config_device device_defaults = {
static void set_device_defaults(struct xe_config_device *config)
{
- *config = device_defaults;
+ *config = xe_configfs_device_defaults;
#ifdef CONFIG_PCI_IOV
config->sriov.max_vfs = xe_modparam.max_vfs;
#endif
}
-struct engine_info {
- const char *cls;
- u64 mask;
- enum xe_engine_class engine_class;
-};
-
-/* Some helpful macros to aid on the sizing of buffer allocation when parsing */
-#define MAX_ENGINE_CLASS_CHARS 5
-#define MAX_ENGINE_INSTANCE_CHARS 2
-
-static const struct engine_info engine_info[] = {
- { .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
- { .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
- { .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
- { .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
- { .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
- { .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
-};
-
-static const struct {
- const char *name;
- enum xe_gt_type type;
-} gt_types[] = {
- { .name = "primary", .type = XE_GT_TYPE_MAIN },
- { .name = "media", .type = XE_GT_TYPE_MEDIA },
-};
-
-static bool is_bound(struct xe_config_group_device *dev)
+/**
+ * xe_configfs_is_bound - check whether the matching pci device is bound
+ * @dev: configfs group device
+ *
+ * Caller must hold @dev->lock.
+ *
+ * Return: true if the matching pci_dev is already bound to a driver,
+ * false otherwise.
+ */
+bool xe_configfs_is_bound(struct xe_config_group_device *dev)
{
unsigned int domain, bus, slot, function;
struct pci_dev *pdev;
@@ -314,485 +156,14 @@ static bool is_bound(struct xe_config_group_device *dev)
return ret;
}
-static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_to_device(item);
-
- return sprintf(page, "%d\n", dev->enable_survivability_mode);
-}
-
-static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
- bool enable_survivability_mode;
- int ret;
-
- ret = kstrtobool(page, &enable_survivability_mode);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.enable_survivability_mode = enable_survivability_mode;
-
- return len;
-}
-
-static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_to_device(item);
- char *p = page;
-
- for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
- if (dev->gt_types_allowed & BIT_ULL(gt_types[i].type))
- p += sprintf(p, "%s\n", gt_types[i].name);
-
- return p - page;
-}
-
-static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
- char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
- char *p = buf;
- u64 typemask = 0;
-
- if (!buf)
- return -ENOMEM;
-
- while (p) {
- char *typename = strsep(&p, ",\n");
- bool matched = false;
-
- if (typename[0] == '\0')
- continue;
-
- for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++) {
- if (strcmp(typename, gt_types[i].name) == 0) {
- typemask |= BIT(gt_types[i].type);
- matched = true;
- break;
- }
- }
-
- if (!matched)
- return -EINVAL;
- }
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.gt_types_allowed = typemask;
-
- return len;
-}
-
-static ssize_t engines_allowed_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_to_device(item);
- char *p = page;
-
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- u64 mask = engine_info[i].mask;
-
- if ((dev->engines_allowed & mask) == mask) {
- p += sprintf(p, "%s*\n", engine_info[i].cls);
- } else if (mask & dev->engines_allowed) {
- u16 bit0 = __ffs64(mask), bit;
-
- mask &= dev->engines_allowed;
-
- for_each_set_bit(bit, (const unsigned long *)&mask, 64)
- p += sprintf(p, "%s%u\n", engine_info[i].cls,
- bit - bit0);
- }
- }
-
- return p - page;
-}
-
-/*
- * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
- * instance in @pattern.
- *
- * Examples of inputs:
- * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
- * mask == BIT_ULL(XE_HW_ENGINE_RCS0)
- * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
- * mask == XE_HW_ENGINE_RCS_MASK
- * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
- */
-static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
-{
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- u8 instance;
- u16 bit;
-
- if (!str_has_prefix(pattern, engine_info[i].cls))
- continue;
-
- pattern += strlen(engine_info[i].cls);
- if (!mask)
- return *pattern ? NULL : &engine_info[i];
-
- if (!strcmp(pattern, "*")) {
- *mask = engine_info[i].mask;
- return &engine_info[i];
- }
-
- if (kstrtou8(pattern, 10, &instance))
- return NULL;
-
- bit = __ffs64(engine_info[i].mask) + instance;
- if (bit >= fls64(engine_info[i].mask))
- return NULL;
-
- *mask = BIT_ULL(bit);
- return &engine_info[i];
- }
-
- return NULL;
-}
-
-static int parse_engine(const char *s, const char *end_chars, u64 *mask,
- const struct engine_info **pinfo)
-{
- char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
- const struct engine_info *info;
- size_t len;
-
- len = strcspn(s, end_chars);
- if (len >= sizeof(buf))
- return -EINVAL;
-
- memcpy(buf, s, len);
- buf[len] = '\0';
-
- info = lookup_engine_info(buf, mask);
- if (!info)
- return -ENOENT;
-
- if (pinfo)
- *pinfo = info;
-
- return len;
-}
-
-static ssize_t engines_allowed_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
- ssize_t patternlen, p;
- u64 mask, val = 0;
-
- for (p = 0; p < len; p += patternlen + 1) {
- patternlen = parse_engine(page + p, ",\n", &mask, NULL);
- if (patternlen < 0)
- return -EINVAL;
-
- val |= mask;
- }
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.engines_allowed = val;
-
- return len;
-}
-
-static ssize_t enable_psmi_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = xe_configfs_to_device(item);
-
- return sprintf(page, "%d\n", dev->enable_psmi);
-}
-
-static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (is_bound(dev))
- return -EBUSY;
-
- dev->config.enable_psmi = val;
-
- return len;
-}
-
-static bool wa_bb_read_advance(bool dereference, char **p,
- const char *append, size_t len,
- size_t *max_size)
-{
- if (dereference) {
- if (len >= *max_size)
- return false;
- *max_size -= len;
- if (append)
- memcpy(*p, append, len);
- }
-
- *p += len;
-
- return true;
-}
-
-static ssize_t wa_bb_show(struct xe_config_group_device *dev,
- struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
- char *data, size_t sz)
-{
- char *p = data;
-
- guard(mutex)(&dev->lock);
-
- for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
- enum xe_engine_class ec = engine_info[i].engine_class;
- size_t len;
-
- if (!wa_bb[ec].len)
- continue;
-
- len = snprintf(p, sz, "%s:", engine_info[i].cls);
- if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
- return -ENOBUFS;
-
- for (size_t j = 0; j < wa_bb[ec].len; j++) {
- len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
- if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
- return -ENOBUFS;
- }
-
- if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
- return -ENOBUFS;
- }
-
- if (!wa_bb_read_advance(data, &p, "", 1, &sz))
- return -ENOBUFS;
-
- /* Reserve one more to match check for '\0' */
- if (!data)
- p++;
-
- return p - data;
-}
-
-static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
-
- return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K);
-}
-
-static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
-
- return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
-}
-
-static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
-{
- if (wa_bb->cs)
- wa_bb->cs[wa_bb->len] = val;
-
- wa_bb->len++;
-}
-
-static ssize_t parse_hex(const char *line, u32 *pval)
-{
- char numstr[12];
- const char *p;
- ssize_t numlen;
-
- p = line + strspn(line, " \t");
- if (!*p || *p == '\n')
- return 0;
-
- numlen = strcspn(p, " \t\n");
- if (!numlen || numlen >= sizeof(numstr) - 1)
- return -EINVAL;
-
- memcpy(numstr, p, numlen);
- numstr[numlen] = '\0';
- p += numlen;
-
- if (kstrtou32(numstr, 16, pval))
- return -EINVAL;
-
- return p - line;
-}
-
-/*
- * Parse lines with the format
- *
- * <engine-class> cmd <u32> <u32...>
- * <engine-class> reg <u32_addr> <u32_val>
- *
- * and optionally save them in @wa_bb[i].cs is non-NULL.
- *
- * Return the number of dwords parsed.
- */
-static ssize_t parse_wa_bb_lines(const char *lines,
- struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
-{
- ssize_t dwords = 0, ret;
- const char *p;
-
- for (p = lines; *p; p++) {
- const struct engine_info *info = NULL;
- u32 val, val2;
-
- /* Also allow empty lines */
- p += strspn(p, " \t\n");
- if (!*p)
- break;
-
- ret = parse_engine(p, " \t\n", NULL, &info);
- if (ret < 0)
- return ret;
-
- p += ret;
- p += strspn(p, " \t");
-
- if (str_has_prefix(p, "cmd")) {
- for (p += strlen("cmd"); *p;) {
- ret = parse_hex(p, &val);
- if (ret < 0)
- return -EINVAL;
- if (!ret)
- break;
-
- p += ret;
- dwords++;
- wa_bb_append(&wa_bb[info->engine_class], val);
- }
- } else if (str_has_prefix(p, "reg")) {
- p += strlen("reg");
- ret = parse_hex(p, &val);
- if (ret <= 0)
- return -EINVAL;
-
- p += ret;
- ret = parse_hex(p, &val2);
- if (ret <= 0)
- return -EINVAL;
-
- p += ret;
- dwords += 3;
- wa_bb_append(&wa_bb[info->engine_class],
- MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
- wa_bb_append(&wa_bb[info->engine_class], val);
- wa_bb_append(&wa_bb[info->engine_class], val2);
- } else {
- return -EINVAL;
- }
- }
-
- return dwords;
-}
-
-static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
- struct xe_config_group_device *dev,
- const char *page, size_t len)
-{
- /* tmp_wa_bb must match wa_bb's size */
- struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
- ssize_t count, class;
- u32 *tmp;
-
- /* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
- count = parse_wa_bb_lines(page, tmp_wa_bb);
- if (count < 0)
- return count;
-
- guard(mutex)(&dev->lock);
-
- if (is_bound(dev))
- return -EBUSY;
-
- /*
- * 2. Allocate a u32 array and set the pointers to the right positions
- * according to the length of each class' wa_bb
- */
- tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
- if (!tmp)
- return -ENOMEM;
-
- if (!count) {
- memset(wa_bb, 0, sizeof(tmp_wa_bb));
- return len;
- }
-
- for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
- tmp_wa_bb[class].cs = tmp + count;
- count += tmp_wa_bb[class].len;
- tmp_wa_bb[class].len = 0;
- }
-
- /* 3. Parse wa_bb lines again, this time saving the values */
- count = parse_wa_bb_lines(page, tmp_wa_bb);
- if (count < 0)
- return count;
-
- memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
-
- return len;
-}
-
-static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
- const char *data, size_t sz)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
-
- return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz);
-}
-
-static ssize_t ctx_restore_post_bb_store(struct config_item *item,
- const char *data, size_t sz)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
-
- return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
-}
-
-CONFIGFS_ATTR(, ctx_restore_mid_bb);
-CONFIGFS_ATTR(, ctx_restore_post_bb);
-CONFIGFS_ATTR(, enable_psmi);
-CONFIGFS_ATTR(, enable_survivability_mode);
-CONFIGFS_ATTR(, engines_allowed);
-CONFIGFS_ATTR(, gt_types_allowed);
-
-static struct configfs_attribute *xe_config_device_attrs[] = {
- &attr_ctx_restore_mid_bb,
- &attr_ctx_restore_post_bb,
- &attr_enable_psmi,
- &attr_enable_survivability_mode,
- &attr_engines_allowed,
- &attr_gt_types_allowed,
- NULL,
-};
-
static void xe_config_device_release(struct config_item *item)
{
struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
mutex_destroy(&dev->lock);
- kfree(dev->config.ctx_restore_mid_bb[0].cs);
- kfree(dev->config.ctx_restore_post_bb[0].cs);
+ kfree(dev->config.debug.ctx_restore_mid_bb[0].cs);
+ kfree(dev->config.debug.ctx_restore_post_bb[0].cs);
kfree(dev);
}
@@ -800,27 +171,8 @@ static struct configfs_item_operations xe_config_device_ops = {
.release = xe_config_device_release,
};
-static bool xe_config_device_is_visible(struct config_item *item,
- struct configfs_attribute *attr, int n)
-{
- struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
-
- if (attr == &attr_enable_survivability_mode) {
- if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
- return false;
- }
-
- return true;
-}
-
-static struct configfs_group_operations xe_config_device_group_ops = {
- .is_visible = xe_config_device_is_visible,
-};
-
static const struct config_item_type xe_config_device_type = {
.ct_item_ops = &xe_config_device_ops,
- .ct_group_ops = &xe_config_device_group_ops,
- .ct_attrs = xe_config_device_attrs,
.ct_owner = THIS_MODULE,
};
@@ -844,7 +196,7 @@ static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, s
guard(mutex)(&dev->lock);
- if (is_bound(dev))
+ if (xe_configfs_is_bound(dev))
return -EBUSY;
ret = kstrtouint(page, 0, &max_vfs);
@@ -875,7 +227,7 @@ static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *p
guard(mutex)(&dev->lock);
- if (is_bound(dev))
+ if (xe_configfs_is_bound(dev))
return -EBUSY;
ret = kstrtobool(page, &admin_only_pf);
@@ -886,12 +238,12 @@ static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *p
return len;
}
-CONFIGFS_ATTR(sriov_, admin_only_pf);
CONFIGFS_ATTR(sriov_, max_vfs);
+CONFIGFS_ATTR(sriov_, admin_only_pf);
static struct configfs_attribute *xe_config_sriov_attrs[] = {
- &sriov_attr_admin_only_pf,
&sriov_attr_max_vfs,
+ &sriov_attr_admin_only_pf,
NULL,
};
@@ -1048,19 +400,36 @@ static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev
return xe_configfs_to_group_device(item);
}
+/**
+ * xe_configfs_find_device - find the configfs group device for a pci_dev
+ * @pdev: pci device
+ *
+ * Look up the &xe_config_group_device associated with @pdev. On success,
+ * an additional reference is held on the returned group; the caller must
+ * drop it with config_group_put() when done.
+ *
+ * Return: pointer to &xe_config_group_device, or %NULL if no group exists.
+ */
+struct xe_config_group_device *xe_configfs_find_device(struct pci_dev *pdev)
+{
+ return find_xe_config_group_device(pdev);
+}
+
static void dump_custom_dev_config(struct pci_dev *pdev,
struct xe_config_group_device *dev)
{
#define PRI_CUSTOM_ATTR(fmt_, attr_) do { \
- if (dev->config.attr_ != device_defaults.attr_) \
+ if (dev->config.attr_ != xe_configfs_device_defaults.attr_) \
pci_info(pdev, "configfs: " __stringify(attr_) " = " fmt_ "\n", \
dev->config.attr_); \
} while (0)
- PRI_CUSTOM_ATTR("%d", enable_psmi);
- PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
- PRI_CUSTOM_ATTR("%llx", engines_allowed);
- PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
+ PRI_CUSTOM_ATTR("%d", debug.enable_psmi);
+ PRI_CUSTOM_ATTR("%d", debug.enable_survivability_mode);
+ PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
+ PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
+#endif
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
#undef PRI_CUSTOM_ATTR
@@ -1081,7 +450,7 @@ void xe_configfs_check_device(struct pci_dev *pdev)
return;
/* memcmp here is safe as both are zero-initialized */
- if (memcmp(&dev->config, &device_defaults, sizeof(dev->config))) {
+ if (memcmp(&dev->config, &xe_configfs_device_defaults, sizeof(dev->config))) {
pci_info(pdev, "Found custom settings in configfs\n");
dump_custom_dev_config(pdev, dev);
}
@@ -1089,156 +458,6 @@ void xe_configfs_check_device(struct pci_dev *pdev)
config_group_put(&dev->group);
}
-/**
- * xe_configfs_get_enable_survivability_mode - get configfs survivability mode attribute
- * @pdev: pci device
- *
- * Return: enable_survivability_mode attribute in configfs
- */
-bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool mode;
-
- if (!dev)
- return device_defaults.enable_survivability_mode;
-
- mode = dev->config.enable_survivability_mode;
- config_group_put(&dev->group);
-
- return mode;
-}
-
-static u64 get_gt_types_allowed(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u64 mask;
-
- if (!dev)
- return device_defaults.gt_types_allowed;
-
- mask = dev->config.gt_types_allowed;
- config_group_put(&dev->group);
-
- return mask;
-}
-
-/**
- * xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
- * @pdev: pci device
- *
- * Return: True if primary GTs are enabled, false if they have been disabled via
- * configfs.
- */
-bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)
-{
- return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MAIN);
-}
-
-/**
- * xe_configfs_media_gt_allowed - determine whether media GTs are supported
- * @pdev: pci device
- *
- * Return: True if the media GTs are enabled, false if they have been disabled
- * via configfs.
- */
-bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)
-{
- return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MEDIA);
-}
-
-/**
- * xe_configfs_get_engines_allowed - get engine allowed mask from configfs
- * @pdev: pci device
- *
- * Return: engine mask with allowed engines set in configfs
- */
-u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u64 engines_allowed;
-
- if (!dev)
- return device_defaults.engines_allowed;
-
- engines_allowed = dev->config.engines_allowed;
- config_group_put(&dev->group);
-
- return engines_allowed;
-}
-
-/**
- * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
- * @pdev: pci device
- *
- * Return: enable_psmi setting in configfs
- */
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- bool ret;
-
- if (!dev)
- return false;
-
- ret = dev->config.enable_psmi;
- config_group_put(&dev->group);
-
- return ret;
-}
-
-/**
- * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
- * @pdev: pci device
- * @class: hw engine class
- * @cs: pointer to the bb to use - only valid during probe
- *
- * Return: Number of dwords used in the mid_ctx_restore setting in configfs
- */
-u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u32 len;
-
- if (!dev)
- return 0;
-
- if (cs)
- *cs = dev->config.ctx_restore_mid_bb[class].cs;
-
- len = dev->config.ctx_restore_mid_bb[class].len;
- config_group_put(&dev->group);
-
- return len;
-}
-
-/**
- * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
- * @pdev: pci device
- * @class: hw engine class
- * @cs: pointer to the bb to use - only valid during probe
- *
- * Return: Number of dwords used in the post_ctx_restore setting in configfs
- */
-u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs)
-{
- struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
- u32 len;
-
- if (!dev)
- return 0;
-
- *cs = dev->config.ctx_restore_post_bb[class].cs;
- len = dev->config.ctx_restore_post_bb[class].len;
- config_group_put(&dev->group);
-
- return len;
-}
-
#ifdef CONFIG_PCI_IOV
/**
* xe_configfs_admin_only_pf() - Get PF's operational mode.
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 517de4946d35..67887923ea8b 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -9,7 +9,6 @@
#include <linux/types.h>
#include "xe_defaults.h"
-#include "xe_hw_engine_types.h"
#include "xe_module.h"
struct pci_dev;
@@ -18,17 +17,6 @@ struct pci_dev;
int xe_configfs_init(void);
void xe_configfs_exit(void);
void xe_configfs_check_device(struct pci_dev *pdev);
-bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev);
-bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
-bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
-u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
-bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
-u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs);
-u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs);
#ifdef CONFIG_PCI_IOV
unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev);
bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
@@ -37,17 +25,6 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
static inline int xe_configfs_init(void) { return 0; }
static inline void xe_configfs_exit(void) { }
static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
-static inline bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) { return false; }
-static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
-static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
-static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
-static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
-static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs) { return 0; }
-static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
- enum xe_engine_class class,
- const u32 **cs) { return 0; }
#ifdef CONFIG_PCI_IOV
static inline unsigned int xe_configfs_get_max_vfs(struct pci_dev *pdev)
{
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index 45617282cec5..adf193d48a63 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -3,12 +3,871 @@
* Copyright © 2026 Intel Corporation
*/
+#include <linux/bitops.h>
#include <linux/configfs.h>
-#include <linux/module.h>
+#include <linux/cleanup.h>
+#include <linux/find.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include "abi/guc_log_abi.h"
+#include "instructions/xe_mi_commands.h"
#include "xe_configfs_debug.h"
#include "xe_configfs_types.h"
+#include "xe_gt_types.h"
+#include "xe_hw_engine_types.h"
+#include "xe_pci_types.h"
+
+/**
+ * DOC: Xe Configfs Debug Attributes
+ *
+ * Overview
+ * ========
+ *
+ * The following configfs attributes are only available when the kernel is
+ * built with ``CONFIG_DRM_XE_DEBUG=y``. They appear under the ``debug/``
+ * subdirectory of each xe configfs device. They are intended for hardware
+ * and driver debugging and are not stable ABI. Using them is "at your own
+ * risk".
+ *
+ * See the top-level ``Xe Configfs`` documentation in ``xe_configfs.c``
+ * for how to create, probe and remove configfs devices. Once a device
+ * directory exists, the driver populates it with a ``debug/`` subdirectory
+ * containing the entries described below::
+ *
+ * /sys/kernel/config/xe/
+ * └── 0000:03:00.0
+ * └── debug/
+ * ├── ctx_restore_mid_bb
+ * ├── ctx_restore_post_bb
+ * ├── enable_psmi
+ * ├── enable_survivability_mode
+ * ├── engines_allowed
+ * └── gt_types_allowed
+ *
+ * Configure Attributes
+ * ====================
+ *
+ * Context restore BB
+ * ------------------
+ *
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors: it's
+ * not intended for normal execution and will taint the kernel with TAINT_TEST
+ * when used.
+ *
+ * The syntax allows to pass straight instructions to be executed by the engine
+ * in a batch buffer or set specific registers.
+ *
+ * #. Generic instruction::
+ *
+ * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
+ *
+ * #. Simple register setting::
+ *
+ * <engine-class> reg <address> <value>
+ *
+ * Commands are saved per engine class: all instances of that class will execute
+ * those commands during context switch. The instruction, dword arguments,
+ * addresses and values are in hex format like in the examples below.
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
+ * normal context restore::
+ *
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/debug/ctx_restore_post_bb
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
+ * beginning of the context restore::
+ *
+ * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ * > /sys/kernel/config/xe/0000:03:00.0/debug/ctx_restore_mid_bb
+ *
+ * #. Load certain values in a couple of registers (it can be used as a simpler
+ * alternative to the `cmd`) action::
+ *
+ * # cat > /sys/kernel/config/xe/0000:03:00.0/debug/ctx_restore_post_bb <<EOF
+ * rcs reg 4F100 DEADBEEF
+ * rcs reg 4F104 FFFFFFFF
+ * EOF
+ *
+ * .. note::
+ *
+ * When using multiple lines, make sure to use a command that is
+ * implemented with a single write syscall, like HEREDOC.
+ *
+ * Currently this is implemented only for post and mid context restore and
+ * these attributes can only be set before binding to the device.
+ *
+ * PSMI
+ * ----
+ *
+ * Enable extra debugging capabilities to trace engine execution. Only useful
+ * during early platform enabling and requires additional hardware connected.
+ * Once it's enabled, additionals WAs are added and runtime configuration is
+ * done via debugfs. Example to enable it::
+ *
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/debug/enable_psmi
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Survivability mode:
+ * -------------------
+ *
+ * Enable survivability mode on supported cards. Refer DOC in xe_survivability_mode.c for
+ * details of this mode. Example to enable it::
+ *
+ * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/debug/enable_survivability_mode
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Allowed engines:
+ * ----------------
+ *
+ * Allow only a set of engine(s) to be available, disabling the other engines
+ * even if they are available in hardware. This is applied after HW fuses are
+ * considered on each tile. Examples:
+ *
+ * Allow only one render and one copy engines, nothing else::
+ *
+ * # echo 'rcs0,bcs0' > /sys/kernel/config/xe/0000:03:00.0/debug/engines_allowed
+ *
+ * Allow only compute engines and first copy engine::
+ *
+ * # echo 'ccs*,bcs0' > /sys/kernel/config/xe/0000:03:00.0/debug/engines_allowed
+ *
+ * Note that the engine names are the per-GT hardware names. On multi-tile
+ * platforms, writing ``rcs0,bcs0`` to this file would allow the first render
+ * and copy engines on each tile.
+ *
+ * The requested configuration may not be supported by the platform and driver
+ * may fail to probe. For example: if at least one copy engine is expected to be
+ * available for migrations, but it's disabled. This is intended for debugging
+ * purposes only.
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Allowed GT types:
+ * -----------------
+ *
+ * Allow only specific types of GTs to be detected and initialized by the
+ * driver. Any combination of GT types can be enabled/disabled, although
+ * some settings will cause the device to fail to probe.
+ *
+ * Writes support both comma- and newline-separated input format. Reads
+ * will always return one GT type per line. "primary," "media," and "hl_media"
+ * are the GT type names supported by this interface.
+ *
+ * This attribute can only be set before binding to the device.
+ *
+ * Examples:
+ *
+ * Allow both primary and media GTs to be initialized and used. This matches
+ * the driver's default behavior::
+ *
+ * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * Allow only the primary GT of each tile to be initialized and used,
+ * effectively disabling the media GT if it exists on the platform::
+ *
+ * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * Allow only the media GT of each tile to be initialized and used,
+ * effectively disabling the primary GT. **This configuration will cause
+ * device probe failure on all current platforms, but may be allowed on
+ * igpu platforms in the future**::
+ *
+ * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
+ * **This configuration will cause device probe failure on all current
+ * platforms, but may be allowed on igpu platforms in the future**::
+ *
+ * # echo '' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
+ *
+ */
+
+struct engine_info {
+ const char *cls;
+ u64 mask;
+ enum xe_engine_class engine_class;
+};
+
+/* Some helpful macros to aid on the sizing of buffer allocation when parsing */
+#define MAX_ENGINE_CLASS_CHARS 5
+#define MAX_ENGINE_INSTANCE_CHARS 2
+
+static const struct engine_info engine_info[] = {
+ { .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
+ { .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
+ { .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK,
+ .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
+ { .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK,
+ .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
+ { .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
+ { .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
+};
+
+static const struct {
+ const char *name;
+ enum xe_gt_type type;
+} gt_types[] = {
+ { .name = "primary", .type = XE_GT_TYPE_MAIN },
+ { .name = "media", .type = XE_GT_TYPE_MEDIA },
+};
+
+static struct xe_config_group_device *debug_to_group_device(struct config_item *item)
+{
+ return xe_configfs_to_group_device(item->ci_parent);
+}
+
+static struct xe_config_device *debug_to_device(struct config_item *item)
+{
+ return xe_configfs_to_device(item->ci_parent);
+}
+
+static u64 get_gt_types_allowed(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ u64 mask;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.gt_types_allowed;
+
+ mask = dev->config.debug.gt_types_allowed;
+ config_group_put(&dev->group);
+
+ return mask;
+}
+
+/**
+ * xe_configfs_get_enable_survivability_mode - get configfs survivability mode attribute
+ * @pdev: pci device
+ *
+ * Return: enable_survivability_mode attribute in configfs
+ */
+bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ bool mode;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.enable_survivability_mode;
+
+ mode = dev->config.debug.enable_survivability_mode;
+ config_group_put(&dev->group);
+
+ return mode;
+}
+
+/**
+ * xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
+ * @pdev: pci device
+ *
+ * Return: True if primary GTs are enabled, false if they have been disabled via
+ * configfs.
+ */
+bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev)
+{
+ return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MAIN);
+}
+
+/**
+ * xe_configfs_media_gt_allowed - determine whether media GTs are supported
+ * @pdev: pci device
+ *
+ * Return: True if the media GTs are enabled, false if they have been disabled
+ * via configfs.
+ */
+bool xe_configfs_media_gt_allowed(struct pci_dev *pdev)
+{
+ return get_gt_types_allowed(pdev) & BIT_ULL(XE_GT_TYPE_MEDIA);
+}
+
+/**
+ * xe_configfs_get_engines_allowed - get engine allowed mask from configfs
+ * @pdev: pci device
+ *
+ * Return: engine mask with allowed engines set in configfs
+ */
+u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ u64 engines_allowed;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.engines_allowed;
+
+ engines_allowed = dev->config.debug.engines_allowed;
+ config_group_put(&dev->group);
+
+ return engines_allowed;
+}
+
+/**
+ * xe_configfs_get_psmi_enabled - get configfs enable_psmi setting
+ * @pdev: pci device
+ *
+ * Return: enable_psmi setting in configfs
+ */
+bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ bool ret;
+
+ if (!dev)
+ return false;
+
+ ret = dev->config.debug.enable_psmi;
+ config_group_put(&dev->group);
+
+ return ret;
+}
+
+/**
+ * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
+ * @pdev: pci device
+ * @class: hw engine class
+ * @cs: pointer to the bb to use - only valid during probe
+ *
+ * Return: Number of dwords used in the mid_ctx_restore setting in configfs
+ */
+u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ const u32 **cs)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ u32 len;
+
+ if (!dev)
+ return 0;
+
+ if (cs)
+ *cs = dev->config.debug.ctx_restore_mid_bb[class].cs;
+
+ len = dev->config.debug.ctx_restore_mid_bb[class].len;
+ config_group_put(&dev->group);
+
+ return len;
+}
+
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ * @class: hw engine class
+ * @cs: pointer to the bb to use - only valid during probe
+ *
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs
+ */
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ const u32 **cs)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ u32 len;
+
+ if (!dev)
+ return 0;
+
+ *cs = dev->config.debug.ctx_restore_post_bb[class].cs;
+ len = dev->config.debug.ctx_restore_post_bb[class].len;
+ config_group_put(&dev->group);
+
+ return len;
+}
+
+static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = debug_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.enable_survivability_mode);
+}
+
+static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
+ size_t len)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+ bool enable_survivability_mode;
+ int ret;
+
+ ret = kstrtobool(page, &enable_survivability_mode);
+ if (ret)
+ return ret;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.enable_survivability_mode = enable_survivability_mode;
+
+ return len;
+}
+
+static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = debug_to_device(item);
+ char *p = page;
+
+ for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
+ if (dev->debug.gt_types_allowed & BIT_ULL(gt_types[i].type))
+ p += sprintf(p, "%s\n", gt_types[i].name);
+
+ return p - page;
+}
+
+static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
+ size_t len)
+{
+ char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+ u64 typemask = 0;
+ char *p = buf;
+
+ if (!buf)
+ return -ENOMEM;
+
+ while (p) {
+ char *typename = strsep(&p, ",\n");
+ bool matched = false;
+
+ if (typename[0] == '\0')
+ continue;
+
+ for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++) {
+ if (strcmp(typename, gt_types[i].name) == 0) {
+ typemask |= BIT(gt_types[i].type);
+ matched = true;
+ break;
+ }
+ }
+
+ if (!matched)
+ return -EINVAL;
+ }
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.gt_types_allowed = typemask;
+
+ return len;
+}
+
+static ssize_t engines_allowed_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = debug_to_device(item);
+ char *p = page;
+
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ u64 mask = engine_info[i].mask;
+
+ if ((dev->debug.engines_allowed & mask) == mask) {
+ p += sprintf(p, "%s*\n", engine_info[i].cls);
+ } else if (mask & dev->debug.engines_allowed) {
+ u16 bit0 = __ffs64(mask), bit;
+
+ mask &= dev->debug.engines_allowed;
+
+ for_each_set_bit(bit, (const unsigned long *)&mask, 64)
+ p += sprintf(p, "%s%u\n", engine_info[i].cls,
+ bit - bit0);
+ }
+ }
+
+ return p - page;
+}
+
+/*
+ * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
+ * instance in @pattern.
+ *
+ * Examples of inputs:
+ * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
+ * mask == BIT_ULL(XE_HW_ENGINE_RCS0)
+ * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
+ * mask == XE_HW_ENGINE_RCS_MASK
+ * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
+ */
+static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
+{
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ u8 instance;
+ u16 bit;
+
+ if (!str_has_prefix(pattern, engine_info[i].cls))
+ continue;
+
+ pattern += strlen(engine_info[i].cls);
+ if (!mask)
+ return *pattern ? NULL : &engine_info[i];
+
+ if (!strcmp(pattern, "*")) {
+ *mask = engine_info[i].mask;
+ return &engine_info[i];
+ }
+
+ if (kstrtou8(pattern, 10, &instance))
+ return NULL;
+
+ bit = __ffs64(engine_info[i].mask) + instance;
+ if (bit >= fls64(engine_info[i].mask))
+ return NULL;
+
+ *mask = BIT_ULL(bit);
+ return &engine_info[i];
+ }
+
+ return NULL;
+}
+
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+ const struct engine_info **pinfo)
+{
+ char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+ const struct engine_info *info;
+ size_t len;
+
+ len = strcspn(s, end_chars);
+ if (len >= sizeof(buf))
+ return -EINVAL;
+
+ memcpy(buf, s, len);
+ buf[len] = '\0';
+
+ info = lookup_engine_info(buf, mask);
+ if (!info)
+ return -ENOENT;
+
+ if (pinfo)
+ *pinfo = info;
+
+ return len;
+}
+
+static ssize_t engines_allowed_store(struct config_item *item, const char *page,
+ size_t len)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+ ssize_t patternlen, p;
+ u64 mask, val = 0;
+
+ for (p = 0; p < len; p += patternlen + 1) {
+ patternlen = parse_engine(page + p, ",\n", &mask, NULL);
+ if (patternlen < 0)
+ return -EINVAL;
+
+ val |= mask;
+ }
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.engines_allowed = val;
+
+ return len;
+}
+
+static ssize_t enable_psmi_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = debug_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.enable_psmi);
+}
+
+static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+ bool val;
+ int ret;
+
+ ret = kstrtobool(page, &val);
+ if (ret)
+ return ret;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.enable_psmi = val;
+
+ return len;
+}
+
+static bool wa_bb_read_advance(bool dereference, char **p,
+ const char *append, size_t len,
+ size_t *max_size)
+{
+ if (dereference) {
+ if (len >= *max_size)
+ return false;
+ *max_size -= len;
+ if (append)
+ memcpy(*p, append, len);
+ }
+
+ *p += len;
+
+ return true;
+}
+
+static ssize_t wa_bb_show(struct xe_config_group_device *dev,
+ struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+ char *data, size_t sz)
+{
+ char *p = data;
+
+ guard(mutex)(&dev->lock);
+
+ for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+ enum xe_engine_class ec = engine_info[i].engine_class;
+ size_t len;
+
+ if (!wa_bb[ec].len)
+ continue;
+
+ len = snprintf(p, sz, "%s:", engine_info[i].cls);
+ if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+ return -ENOBUFS;
+
+ for (size_t j = 0; j < wa_bb[ec].len; j++) {
+ len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
+ if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+ return -ENOBUFS;
+ }
+
+ if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
+ return -ENOBUFS;
+ }
+
+ if (!wa_bb_read_advance(data, &p, "", 1, &sz))
+ return -ENOBUFS;
+
+ /* Reserve one more to match check for '\0' */
+ if (!data)
+ p++;
+
+ return p - data;
+}
+
+static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+
+ return wa_bb_show(dev, dev->config.debug.ctx_restore_mid_bb, page, SZ_4K);
+}
+
+static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+
+ return wa_bb_show(dev, dev->config.debug.ctx_restore_post_bb, page, SZ_4K);
+}
+
+static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
+{
+ if (wa_bb->cs)
+ wa_bb->cs[wa_bb->len] = val;
+
+ wa_bb->len++;
+}
+
+static ssize_t parse_hex(const char *line, u32 *pval)
+{
+ char numstr[12];
+ const char *p;
+ ssize_t numlen;
+
+ p = line + strspn(line, " \t");
+ if (!*p || *p == '\n')
+ return 0;
+
+ numlen = strcspn(p, " \t\n");
+ if (!numlen || numlen >= sizeof(numstr) - 1)
+ return -EINVAL;
+
+ memcpy(numstr, p, numlen);
+ numstr[numlen] = '\0';
+ p += numlen;
+
+ if (kstrtou32(numstr, 16, pval))
+ return -EINVAL;
+
+ return p - line;
+}
+
+/*
+ * Parse lines with the format
+ *
+ * <engine-class> cmd <u32> <u32...>
+ * <engine-class> reg <u32_addr> <u32_val>
+ *
+ * and optionally save them in @wa_bb[i].cs is non-NULL.
+ *
+ * Return the number of dwords parsed.
+ */
+static ssize_t parse_wa_bb_lines(const char *lines,
+ struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+{
+ ssize_t dwords = 0, ret;
+ const char *p;
+
+ for (p = lines; *p; p++) {
+ const struct engine_info *info = NULL;
+ u32 val, val2;
+
+ /* Also allow empty lines */
+ p += strspn(p, " \t\n");
+ if (!*p)
+ break;
+
+ ret = parse_engine(p, " \t\n", NULL, &info);
+ if (ret < 0)
+ return ret;
+
+ p += ret;
+ p += strspn(p, " \t");
+
+ if (str_has_prefix(p, "cmd")) {
+ for (p += strlen("cmd"); *p;) {
+ ret = parse_hex(p, &val);
+ if (ret < 0)
+ return -EINVAL;
+ if (!ret)
+ break;
+
+ p += ret;
+ dwords++;
+ wa_bb_append(&wa_bb[info->engine_class], val);
+ }
+ } else if (str_has_prefix(p, "reg")) {
+ p += strlen("reg");
+ ret = parse_hex(p, &val);
+ if (ret <= 0)
+ return -EINVAL;
+
+ p += ret;
+ ret = parse_hex(p, &val2);
+ if (ret <= 0)
+ return -EINVAL;
+
+ p += ret;
+ dwords += 3;
+ wa_bb_append(&wa_bb[info->engine_class],
+ MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
+ wa_bb_append(&wa_bb[info->engine_class], val);
+ wa_bb_append(&wa_bb[info->engine_class], val2);
+ } else {
+ return -EINVAL;
+ }
+ }
+
+ return dwords;
+}
+
+static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+ struct xe_config_group_device *dev,
+ const char *page, size_t len)
+{
+ /* tmp_wa_bb must match wa_bb's size */
+ struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
+ ssize_t count, class;
+ u32 *tmp;
+
+ /* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
+ count = parse_wa_bb_lines(page, tmp_wa_bb);
+ if (count < 0)
+ return count;
+
+ guard(mutex)(&dev->lock);
+
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ /*
+ * 2. Allocate a u32 array and set the pointers to the right positions
+ * according to the length of each class' wa_bb
+ */
+ tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
+ if (!tmp)
+ return -ENOMEM;
+
+ if (!count) {
+ memset(wa_bb, 0, sizeof(tmp_wa_bb));
+ return len;
+ }
+
+ for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
+ tmp_wa_bb[class].cs = tmp + count;
+ count += tmp_wa_bb[class].len;
+ tmp_wa_bb[class].len = 0;
+ }
+
+ /* 3. Parse wa_bb lines again, this time saving the values */
+ count = parse_wa_bb_lines(page, tmp_wa_bb);
+ if (count < 0)
+ return count;
+
+ memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+
+ return len;
+}
+
+static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
+ const char *data, size_t sz)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+
+ return wa_bb_store(dev->config.debug.ctx_restore_mid_bb, dev, data, sz);
+}
+
+static ssize_t ctx_restore_post_bb_store(struct config_item *item,
+ const char *data, size_t sz)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+
+ return wa_bb_store(dev->config.debug.ctx_restore_post_bb, dev, data, sz);
+}
+
+CONFIGFS_ATTR(, ctx_restore_mid_bb);
+CONFIGFS_ATTR(, ctx_restore_post_bb);
+CONFIGFS_ATTR(, enable_psmi);
+CONFIGFS_ATTR(, enable_survivability_mode);
+CONFIGFS_ATTR(, engines_allowed);
+CONFIGFS_ATTR(, gt_types_allowed);
+
+static bool xe_configfs_debug_is_visible(struct config_item *item,
+ struct configfs_attribute *attr,
+ int n)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+
+ if (attr == &attr_enable_survivability_mode) {
+ if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
+ return false;
+ }
+
+ return true;
+}
+
+static struct configfs_group_operations xe_configfs_debug_group_ops = {
+ .is_visible = xe_configfs_debug_is_visible,
+};
+
+static struct configfs_attribute *xe_configfs_debug_attrs[] = {
+ &attr_ctx_restore_mid_bb,
+ &attr_ctx_restore_post_bb,
+ &attr_enable_psmi,
+ &attr_enable_survivability_mode,
+ &attr_engines_allowed,
+ &attr_gt_types_allowed,
+ NULL,
+};
const struct config_item_type xe_configfs_debug_type = {
+ .ct_group_ops = &xe_configfs_debug_group_ops,
+ .ct_attrs = xe_configfs_debug_attrs,
.ct_owner = THIS_MODULE,
};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index 01170dc2f97e..bfbfbda1073f 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -5,4 +5,40 @@
#ifndef _XE_CONFIGFS_DEBUG_H_
#define _XE_CONFIGFS_DEBUG_H_
+#include <linux/types.h>
+
+#include "xe_hw_engine_types.h"
+
+struct pci_dev;
+
+#if IS_ENABLED(CONFIG_DRM_XE_DEBUG) && IS_ENABLED(CONFIG_CONFIGFS_FS)
+bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev);
+bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
+bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
+u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
+bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ const u32 **cs);
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ const u32 **cs);
+#else
+/*
+ * Dummy values here are not used since these function accesses are always
+ * wrapped in CONFIG_DRM_XE_DEBUG.
+ */
+static inline bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) { return false; }
+static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
+static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
+static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ const u32 **cs) { return 0; }
+static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+ enum xe_engine_class class,
+ const u32 **cs) { return 0; }
+#endif
+
#endif /* _XE_CONFIGFS_DEBUG_H_ */
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index c9d94a3c26a7..02d5709bcfd3 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -14,6 +14,7 @@
#include "xe_sriov_types.h"
struct config_item;
+struct pci_dev;
/* Similar to struct xe_bb, but not tied to HW (yet) */
struct wa_bb {
@@ -29,12 +30,14 @@ struct xe_config_group_device {
#endif
struct xe_config_device {
- struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
- struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
- bool enable_psmi;
- bool enable_survivability_mode;
- u64 engines_allowed;
- u64 gt_types_allowed;
+ struct {
+ struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
+ struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
+ bool enable_psmi;
+ bool enable_survivability_mode;
+ u64 engines_allowed;
+ u64 gt_types_allowed;
+ } debug;
struct {
bool admin_only_pf;
unsigned int max_vfs;
@@ -59,6 +62,10 @@ static inline struct xe_config_device *xe_configfs_to_device(struct config_item
return &xe_configfs_to_group_device(item)->config;
}
+bool xe_configfs_is_bound(struct xe_config_group_device *dev);
+struct xe_config_group_device *xe_configfs_find_device(struct pci_dev *pdev);
+extern const struct xe_config_device xe_configfs_device_defaults;
+
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
extern const struct config_item_type xe_configfs_debug_type;
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index e468b638271b..e520afbf1f22 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -18,6 +18,7 @@
#include "regs/xe_irq_regs.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_force_wake.h"
#include "xe_gt.h"
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 0f0e08bcc182..7cefa91e37af 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -18,6 +18,7 @@
#include "xe_assert.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_execlist.h"
#include "xe_force_wake.h"
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 9db914584347..e801d28e13af 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -19,6 +19,7 @@
#include "xe_bb.h"
#include "xe_bo.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_drm_client.h"
#include "xe_exec_queue_types.h"
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index e30f293ae825..051bd045e1bb 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -19,6 +19,7 @@
#include "regs/xe_gt_regs.h"
#include "regs/xe_regs.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_drv.h"
#include "xe_gt.h"
diff --git a/drivers/gpu/drm/xe/xe_psmi.c b/drivers/gpu/drm/xe/xe_psmi.c
index 899b01f72ba3..59af3d145418 100644
--- a/drivers/gpu/drm/xe/xe_psmi.c
+++ b/drivers/gpu/drm/xe/xe_psmi.c
@@ -8,6 +8,7 @@
#include "xe_bo.h"
#include "xe_device_types.h"
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_psmi.h"
/*
diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
index 1a4dcbbbc176..02c33ff41b5e 100644
--- a/drivers/gpu/drm/xe/xe_rtp.c
+++ b/drivers/gpu/drm/xe/xe_rtp.c
@@ -10,6 +10,7 @@
#include <uapi/drm/xe_drm.h>
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_gt.h"
#include "xe_gt_topology.h"
diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index 7c85bdb267af..3e3fe1e5b1c1 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -11,6 +11,7 @@
#include <linux/sysfs.h>
#include "xe_configfs.h"
+#include "xe_configfs_debug.h"
#include "xe_device.h"
#include "xe_heci_gsc.h"
#include "xe_i2c.h"
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 6/9] drm/xe/guc: Add configfs support for guc_log_level
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (4 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 5/9] drm/xe: Move debug configfs entries to xe_configfs_debug.c Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-05 23:54 ` Daniele Ceraolo Spurio
2026-05-04 4:43 ` [PATCH 7/9] drm/xe/guc: Add support for NPK as a GuC log target Stuart Summers
` (7 subsequent siblings)
13 siblings, 1 reply; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Allow the GuC log level to be selected per-device via configfs in
addition to the existing 'guc_log_level' module parameter. The configfs
attribute lives under the new 'debug' configfs subdirectory:
/sys/kernel/config/xe/<bdf>/debug/guc_log_level
When the configfs attribute is set to a valid level (0-5), it overrides
the module parameter for that device. The default value is -1
(XE_GUC_LOG_LEVEL_UNSET), which means 'unset' and falls back to the
'guc_log_level' module parameter, ensuring existing users that rely
solely on the module parameter are unaffected by this change.
The module parameter implementation itself is untouched.
Note that the expectation is a user will only set the log level when
CONFIG_DRM_XE_DEBUG is set. Otherwise the expectation is a user will
always just use the default (1).
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/xe_configfs.c | 2 +
drivers/gpu/drm/xe/xe_configfs_debug.c | 84 +++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_configfs_debug.h | 7 +++
drivers/gpu/drm/xe/xe_configfs_types.h | 1 +
drivers/gpu/drm/xe/xe_defaults.h | 3 +
drivers/gpu/drm/xe/xe_guc_log.c | 3 +-
6 files changed, 98 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 89e163ce56aa..babe33e84af2 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -106,6 +106,7 @@ const struct xe_config_device xe_configfs_device_defaults = {
.enable_survivability_mode = false,
.engines_allowed = U64_MAX,
.gt_types_allowed = U64_MAX,
+ .guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
},
#endif
.sriov = {
@@ -429,6 +430,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%d", debug.enable_survivability_mode);
PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
+ PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
#endif
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index adf193d48a63..b5c06d1ec7c9 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -15,6 +15,7 @@
#include "xe_configfs_debug.h"
#include "xe_configfs_types.h"
#include "xe_gt_types.h"
+#include "xe_guc_log.h"
#include "xe_hw_engine_types.h"
#include "xe_pci_types.h"
@@ -43,7 +44,8 @@
* ├── enable_psmi
* ├── enable_survivability_mode
* ├── engines_allowed
- * └── gt_types_allowed
+ * ├── gt_types_allowed
+ * └── guc_log_level
*
* Configure Attributes
* ====================
@@ -186,6 +188,27 @@
*
* # echo '' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
*
+ * GuC log level:
+ * --------------
+ *
+ * Set the GuC firmware logging verbosity for this device. Accepted values
+ * match the ``guc_log_level`` module parameter:
+ *
+ * - 0: disable
+ * - 1: normal (non-verbose)
+ * - 2..%GUC_LOG_LEVEL_MAX: verbose levels
+ *
+ * Example::
+ *
+ * # echo 3 > /sys/kernel/config/xe/0000:03:00.0/debug/guc_log_level
+ *
+ * The default value is %XE_GUC_LOG_LEVEL_UNSET (-1), which means the value
+ * of the ``guc_log_level`` module parameter is used. Any value greater
+ * than -1 written to this attribute overrides the module parameter for
+ * this device.
+ *
+ * This attribute can only be set before binding to the device.
+ *
*/
struct engine_info {
@@ -325,6 +348,34 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
return ret;
}
+/**
+ * xe_configfs_get_guc_log_level - get configfs guc_log_level setting
+ * @pdev: pci device
+ *
+ * Returns the guc_log_level value configured via configfs. If the configfs
+ * value is negative (the default is %XE_GUC_LOG_LEVEL_UNSET, -1), the value
+ * of the ``guc_log_level`` module parameter is returned instead, allowing
+ * the configfs entry to override the module parameter without affecting
+ * users that rely solely on the module parameter.
+ *
+ * Return: GuC log level to use for this device.
+ */
+int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ int level = xe_modparam.guc_log_level;
+
+ if (!dev)
+ goto out;
+
+ if (dev->config.debug.guc_log_level >= 0)
+ level = dev->config.debug.guc_log_level;
+
+ config_group_put(&dev->group);
+out:
+ return level;
+}
+
/**
* xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
* @pdev: pci device
@@ -596,6 +647,35 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
return len;
}
+static ssize_t guc_log_level_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = debug_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.guc_log_level);
+}
+
+static ssize_t guc_log_level_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+ int val;
+ int ret;
+
+ ret = kstrtoint(page, 0, &val);
+ if (ret)
+ return ret;
+
+ if (val > GUC_LOG_LEVEL_MAX)
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.guc_log_level = val;
+
+ return len;
+}
+
static bool wa_bb_read_advance(bool dereference, char **p,
const char *append, size_t len,
size_t *max_size)
@@ -837,6 +917,7 @@ CONFIGFS_ATTR(, enable_psmi);
CONFIGFS_ATTR(, enable_survivability_mode);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
+CONFIGFS_ATTR(, guc_log_level);
static bool xe_configfs_debug_is_visible(struct config_item *item,
struct configfs_attribute *attr,
@@ -863,6 +944,7 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_enable_survivability_mode,
&attr_engines_allowed,
&attr_gt_types_allowed,
+ &attr_guc_log_level,
NULL,
};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index bfbfbda1073f..b29c739435c5 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -7,7 +7,9 @@
#include <linux/types.h>
+#include "xe_defaults.h"
#include "xe_hw_engine_types.h"
+#include "xe_module.h"
struct pci_dev;
@@ -17,6 +19,7 @@ bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+int xe_configfs_get_guc_log_level(struct pci_dev *pdev);
u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs);
@@ -33,6 +36,10 @@ static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
+{
+ return xe_modparam.guc_log_level;
+}
static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
enum xe_engine_class class,
const u32 **cs) { return 0; }
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 02d5709bcfd3..ba920c37c44d 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -37,6 +37,7 @@ struct xe_config_group_device {
bool enable_survivability_mode;
u64 engines_allowed;
u64 gt_types_allowed;
+ int guc_log_level;
} debug;
struct {
bool admin_only_pf;
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index c8ae1d5f3d60..df88078e84b8 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -13,6 +13,9 @@
#define XE_DEFAULT_GUC_LOG_LEVEL 1
#endif
+/* Sentinel value for guc_log_level configfs: not set, fall back to module param */
+#define XE_GUC_LOG_LEVEL_UNSET -1
+
#define XE_DEFAULT_PROBE_DISPLAY IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
#define XE_DEFAULT_VRAM_BAR_SIZE 0
#define XE_DEFAULT_FORCE_PROBE CONFIG_DRM_XE_FORCE_PROBE
diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
index 538d4df0f7aa..531b9759d520 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.c
+++ b/drivers/gpu/drm/xe/xe_guc_log.c
@@ -13,6 +13,7 @@
#include "abi/guc_lfd_abi.h"
#include "regs/xe_guc_regs.h"
#include "xe_bo.h"
+#include "xe_configfs_debug.h"
#include "xe_devcoredump.h"
#include "xe_force_wake.h"
#include "xe_gt_printk.h"
@@ -637,7 +638,7 @@ int xe_guc_log_init(struct xe_guc_log *log)
xe_map_memset(xe, &bo->vmap, 0, 0, xe_bo_size(bo));
log->bo = bo;
- log->level = xe_modparam.guc_log_level;
+ log->level = xe_configfs_get_guc_log_level(to_pci_dev(xe->drm.dev));
return 0;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 7/9] drm/xe/guc: Add support for NPK as a GuC log target
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (5 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 6/9] drm/xe/guc: Add configfs support for guc_log_level Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 4:43 ` [PATCH 8/9] drm/xe: Add infrastructure for debug configfs parameters Stuart Summers
` (6 subsequent siblings)
13 siblings, 0 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
GuC provides the ability to gather logs through a hardware interface
called NPK. For certain debugging scenarios this can be advantageous
over getting logs from memory (or in addition to).
Add a hook for this alternate debugging mode via a configfs. This
translates into a parameter passed to GuC during load time.
v2: Convert to configfs from modparam (Matt)
v3: Configfs documentation formatting (Shuicheng)
Kerneldoc/comment add + configfs entry ordering
Only set the guc_log_target when GuC log is enabled (Daniele)
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/abi/guc_log_abi.h | 8 ++++
drivers/gpu/drm/xe/xe_configfs.c | 2 +
drivers/gpu/drm/xe/xe_configfs_debug.c | 64 +++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_configfs_debug.h | 5 ++
drivers/gpu/drm/xe/xe_configfs_types.h | 1 +
drivers/gpu/drm/xe/xe_defaults.h | 2 +
drivers/gpu/drm/xe/xe_guc.c | 11 +++--
7 files changed, 89 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h
index fbf212d59a40..e1b121bff549 100644
--- a/drivers/gpu/drm/xe/abi/guc_log_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h
@@ -51,6 +51,14 @@ enum guc_log_type {
#define GUC_LOG_BUFFER_TYPE_MAX 3
+enum guc_log_target {
+ GUC_LOG_TARGET_MEM = 0,
+ GUC_LOG_TARGET_NPK,
+ GUC_LOG_TARGET_MEM_AND_NPK,
+};
+
+#define GUC_LOG_TARGET_MAX GUC_LOG_TARGET_MEM_AND_NPK
+
/**
* struct guc_log_buffer_state - GuC log buffer state
*
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index babe33e84af2..4a5bd53af443 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -107,6 +107,7 @@ const struct xe_config_device xe_configfs_device_defaults = {
.engines_allowed = U64_MAX,
.gt_types_allowed = U64_MAX,
.guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
+ .guc_log_target = XE_DEFAULT_GUC_LOG_TARGET,
},
#endif
.sriov = {
@@ -431,6 +432,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
+ PRI_CUSTOM_ATTR("%d", debug.guc_log_target);
#endif
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index b5c06d1ec7c9..af4ee420cf6f 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -45,7 +45,8 @@
* ├── enable_survivability_mode
* ├── engines_allowed
* ├── gt_types_allowed
- * └── guc_log_level
+ * ├── guc_log_level
+ * └── guc_log_target
*
* Configure Attributes
* ====================
@@ -209,6 +210,16 @@
*
* This attribute can only be set before binding to the device.
*
+ * GuC log target:
+ * ---------------
+ *
+ * Set the destination for the GuC log. 0 - memory only (default),
+ * 1 - NPK only, 2 - memory + NPK. Example::
+ *
+ * # echo 2 > /sys/kernel/config/xe/0000:03:00.0/debug/guc_log_target
+ *
+ * This attribute can only be set before binding to the device.
+ *
*/
struct engine_info {
@@ -284,6 +295,26 @@ bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
return mode;
}
+/**
+ * xe_configfs_get_guc_log_target - get configfs GuC log target attribute
+ * @pdev: pci device
+ *
+ * Return: guc_log_target attribute in configfs
+ */
+u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
+{
+ struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
+ u8 target;
+
+ if (!dev)
+ return xe_configfs_device_defaults.debug.guc_log_target;
+
+ target = dev->config.debug.guc_log_target;
+ config_group_put(&dev->group);
+
+ return target;
+}
+
/**
* xe_configfs_primary_gt_allowed - determine whether primary GTs are supported
* @pdev: pci device
@@ -911,6 +942,35 @@ static ssize_t ctx_restore_post_bb_store(struct config_item *item,
return wa_bb_store(dev->config.debug.ctx_restore_post_bb, dev, data, sz);
}
+static ssize_t guc_log_target_show(struct config_item *item, char *page)
+{
+ struct xe_config_device *dev = debug_to_device(item);
+
+ return sprintf(page, "%d\n", dev->debug.guc_log_target);
+}
+
+static ssize_t guc_log_target_store(struct config_item *item, const char *page, size_t len)
+{
+ struct xe_config_group_device *dev = debug_to_group_device(item);
+ u8 guc_log_target;
+ int ret;
+
+ ret = kstrtou8(page, 0, &guc_log_target);
+ if (ret)
+ return ret;
+
+ if (guc_log_target > GUC_LOG_TARGET_MAX)
+ return -EINVAL;
+
+ guard(mutex)(&dev->lock);
+ if (xe_configfs_is_bound(dev))
+ return -EBUSY;
+
+ dev->config.debug.guc_log_target = guc_log_target;
+
+ return len;
+}
+
CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
CONFIGFS_ATTR(, enable_psmi);
@@ -918,6 +978,7 @@ CONFIGFS_ATTR(, enable_survivability_mode);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
CONFIGFS_ATTR(, guc_log_level);
+CONFIGFS_ATTR(, guc_log_target);
static bool xe_configfs_debug_is_visible(struct config_item *item,
struct configfs_attribute *attr,
@@ -945,6 +1006,7 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_engines_allowed,
&attr_gt_types_allowed,
&attr_guc_log_level,
+ &attr_guc_log_target,
NULL,
};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
index b29c739435c5..68e34307b560 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
@@ -15,6 +15,7 @@ struct pci_dev;
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG) && IS_ENABLED(CONFIG_CONFIGFS_FS)
bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev);
+u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev);
bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
@@ -32,6 +33,10 @@ u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
* wrapped in CONFIG_DRM_XE_DEBUG.
*/
static inline bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) { return false; }
+static inline u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
+{
+ return XE_DEFAULT_GUC_LOG_TARGET;
+}
static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index ba920c37c44d..8773adeffd4e 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -38,6 +38,7 @@ struct xe_config_group_device {
u64 engines_allowed;
u64 gt_types_allowed;
int guc_log_level;
+ u8 guc_log_target;
} debug;
struct {
bool admin_only_pf;
diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
index df88078e84b8..9330e08727a8 100644
--- a/drivers/gpu/drm/xe/xe_defaults.h
+++ b/drivers/gpu/drm/xe/xe_defaults.h
@@ -5,6 +5,7 @@
#ifndef _XE_DEFAULTS_H_
#define _XE_DEFAULTS_H_
+#include "abi/guc_log_abi.h"
#include "xe_device_types.h"
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
@@ -12,6 +13,7 @@
#else
#define XE_DEFAULT_GUC_LOG_LEVEL 1
#endif
+#define XE_DEFAULT_GUC_LOG_TARGET GUC_LOG_TARGET_MEM
/* Sentinel value for guc_log_level configfs: not set, fall back to module param */
#define XE_GUC_LOG_LEVEL_UNSET -1
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index e520afbf1f22..c486b9641178 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -74,13 +74,18 @@ static u32 guc_bo_ggtt_addr(struct xe_guc *guc,
static u32 guc_ctl_debug_flags(struct xe_guc *guc)
{
+ struct pci_dev *pdev = to_pci_dev(guc_to_xe(guc)->drm.dev);
u32 level = xe_guc_log_get_level(&guc->log);
u32 flags = 0;
- if (!GUC_LOG_LEVEL_IS_VERBOSE(level))
+ if (!GUC_LOG_LEVEL_IS_VERBOSE(level)) {
flags |= GUC_LOG_DISABLED;
- else
- flags |= FIELD_PREP(GUC_LOG_VERBOSITY, GUC_LOG_LEVEL_TO_VERBOSITY(level));
+ } else {
+ flags |= FIELD_PREP(GUC_LOG_VERBOSITY,
+ GUC_LOG_LEVEL_TO_VERBOSITY(level));
+ flags |= FIELD_PREP(GUC_LOG_DESTINATION,
+ xe_configfs_get_guc_log_target(pdev));
+ }
return flags;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 8/9] drm/xe: Add infrastructure for debug configfs parameters
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (6 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 7/9] drm/xe/guc: Add support for NPK as a GuC log target Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 4:43 ` [PATCH 9/9] drm/xe: Migrate existing debug configfs entries to params infrastructure Stuart Summers
` (5 subsequent siblings)
13 siblings, 0 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Borrow the X-macro pattern from i915_debugfs_params.c and adapt it to
the Xe debug configfs interface, so future debug-only configfs entries
can be added with a single line.
Add a new header xe_configfs_debug_params.h that defines:
XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(param)
invoked as 'param(type, name, default, validator)' for each debug
configfs parameter. The matching backing struct, default initializer
fragment, configfs_attribute objects, show/store handlers and entries
in xe_configfs_debug_attrs[] are all generated from this single list.
Supported type tokens are int, bool, u8, u16, u32 and u64. Sized
unsigned types are used directly rather than mirroring i915's
int/unsigned int (which exists there only because those debugfs
entries shadow module_param values, and module_param itself does not
support sized types).
The validator slot is a function-like macro that takes the parsed
typed value and returns 0 or a negative errno. XE_PARAM_VALIDATE_NONE
is provided for parameters whose full type range is acceptable.
Function-like macros (rather than function pointers) let the compiler
fold trivial validators away entirely.
The auto-generated handlers and configfs_attribute objects live in a
new xe_configfs_debug_params.c so they do not crowd the hand-written
entries in xe_configfs_debug.c. The attribute objects are non-static
(declared 'extern' in the header) so xe_configfs_debug.c can splice
them into xe_configfs_debug_attrs[] and reference them from
is_visible().
The parameter list is intentionally empty in this patch; converting
existing entries (or adding new ones) is left to follow-up changes so
this infrastructure can be reviewed in isolation.
Note that the expectation is a user will only set these debug
parameters when CONFIG_DRM_XE_DEBUG is set; the entire facility lives
behind that Kconfig.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/Makefile | 2 +-
drivers/gpu/drm/xe/xe_configfs.c | 7 ++
drivers/gpu/drm/xe/xe_configfs_debug.c | 2 +
drivers/gpu/drm/xe/xe_configfs_debug_params.c | 112 +++++++++++++++++
drivers/gpu/drm/xe/xe_configfs_debug_params.h | 117 ++++++++++++++++++
drivers/gpu/drm/xe/xe_configfs_types.h | 2 +
6 files changed, 241 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.c
create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index b58667b0b18e..d7b165356bb8 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -161,7 +161,7 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
-xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) := xe_configfs_debug.o
+xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) := xe_configfs_debug.o xe_configfs_debug_params.o
xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
# graphics virtualization (SR-IOV) support
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 4a5bd53af443..59cd83c2ac53 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -108,6 +108,9 @@ const struct xe_config_device xe_configfs_device_defaults = {
.gt_types_allowed = U64_MAX,
.guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
.guc_log_target = XE_DEFAULT_GUC_LOG_TARGET,
+ .params = {
+ XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS
+ },
},
#endif
.sriov = {
@@ -433,6 +436,10 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
PRI_CUSTOM_ATTR("%d", debug.guc_log_target);
+#define _XE_PARAM_DUMP(_T, _name, _def, _val) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DUMP)
+#undef _XE_PARAM_DUMP
#endif
PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index af4ee420cf6f..fcd6c81de3bb 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -13,6 +13,7 @@
#include "abi/guc_log_abi.h"
#include "instructions/xe_mi_commands.h"
#include "xe_configfs_debug.h"
+#include "xe_configfs_debug_params.h"
#include "xe_configfs_types.h"
#include "xe_gt_types.h"
#include "xe_guc_log.h"
@@ -1007,6 +1008,7 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_gt_types_allowed,
&attr_guc_log_level,
&attr_guc_log_target,
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(XE_PARAM_ATTR_PTR)
NULL,
};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.c b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
new file mode 100644
index 000000000000..09500e7ebe3c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.c
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+/*
+ * Auto-generated debug configfs parameters.
+ *
+ * This file expands XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH() (defined in
+ * xe_configfs_debug_params.h) to define the show/store handlers and
+ * configfs_attribute objects for every parameter in the list.
+ *
+ * Per-type ops generators are provided for the simple scalar types
+ * supported by &struct xe_configfs_debug_params: int, bool, u8, u16,
+ * u32, u64. The integer template is parameterised on the kstrto helper
+ * and the printf format string; bool gets its own template because
+ * kstrtobool() has a different signature.
+ *
+ * Each store handler invokes the per-parameter validator (a
+ * function-like macro from the X-macro list), allowing range or
+ * sentinel checks to be expressed declaratively next to the parameter
+ * definition.
+ *
+ * Generated configfs_attribute objects are non-static so that
+ * xe_configfs_debug.c can reference them by symbol (attr_<name>) when
+ * assembling its xe_configfs_debug_attrs[] array and its is_visible()
+ * callback.
+ */
+
+#include <linux/cleanup.h>
+#include <linux/configfs.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+
+#include "xe_configfs_debug_params.h"
+#include "xe_configfs_types.h"
+
+#define _XE_PARAM_DEFINE_OPS_NUMERIC(_T, _name, _kstrto, _fmt, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_device *dev = xe_configfs_to_device(item->ci_parent); \
+ return sprintf(page, _fmt "\n", dev->debug.params._name); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent); \
+ XE_PARAM_TYPE_##_T val; \
+ int ret = _kstrto(page, 0, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
+
+#define _XE_PARAM_DEFINE_OPS_int(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(int, _name, kstrtoint, "%d", _validator)
+#define _XE_PARAM_DEFINE_OPS_u8(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u8, _name, kstrtou8, "%u", _validator)
+#define _XE_PARAM_DEFINE_OPS_u16(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u16, _name, kstrtou16, "%u", _validator)
+#define _XE_PARAM_DEFINE_OPS_u32(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u32, _name, kstrtou32, "%u", _validator)
+#define _XE_PARAM_DEFINE_OPS_u64(_name, _validator) \
+ _XE_PARAM_DEFINE_OPS_NUMERIC(u64, _name, kstrtou64, "%llu", _validator)
+#define _XE_PARAM_DEFINE_OPS_bool(_name, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_device *dev = xe_configfs_to_device(item->ci_parent); \
+ return sprintf(page, "%d\n", dev->debug.params._name); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent); \
+ bool val; \
+ int ret = kstrtobool(page, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
+
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFINE_OPS)
+
+/*
+ * Define the configfs_attribute objects. These are non-static so they
+ * can be referenced from xe_configfs_debug.c.
+ */
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val) \
+struct configfs_attribute attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
+
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFINE_ATTR)
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.h b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
new file mode 100644
index 000000000000..9cf9256eb851
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
@@ -0,0 +1,117 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_CONFIGFS_DEBUG_PARAMS_H_
+#define _XE_CONFIGFS_DEBUG_PARAMS_H_
+
+#include <linux/configfs.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+
+/*
+ * Internal type/format aliases resolved by XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH().
+ *
+ * Each parameter declares its type using one of these tokens; the helper
+ * macros below and in xe_configfs_debug_params.c resolve the token to the
+ * underlying C type, printf format, and kstrto helper.
+ *
+ * Supported type tokens: int, bool, u8, u16, u32, u64. Add new types by
+ * defining matching XE_PARAM_TYPE_<token> and XE_PARAM_FMT_<token> here,
+ * plus an ops generator in xe_configfs_debug_params.c.
+ */
+#define XE_PARAM_TYPE_int int
+#define XE_PARAM_TYPE_bool bool
+#define XE_PARAM_TYPE_u8 u8
+#define XE_PARAM_TYPE_u16 u16
+#define XE_PARAM_TYPE_u32 u32
+#define XE_PARAM_TYPE_u64 u64
+
+#define XE_PARAM_FMT_int "%d"
+#define XE_PARAM_FMT_bool "%d"
+#define XE_PARAM_FMT_u8 "%u"
+#define XE_PARAM_FMT_u16 "%u"
+#define XE_PARAM_FMT_u32 "%u"
+#define XE_PARAM_FMT_u64 "%llu"
+
+/*
+ * Per-parameter validators
+ *
+ * A validator is a function-like macro that takes the (already-parsed)
+ * typed value and expands to an int expression: 0 if the value is
+ * acceptable, a negative errno (typically -EINVAL) otherwise.
+ *
+ * XE_PARAM_VALIDATE_NONE is the no-op validator for parameters whose
+ * full type range is acceptable. Param-specific validators are defined
+ * alongside the X-macro list below so that the constraints live next to
+ * the entries that depend on them.
+ */
+#define XE_PARAM_VALIDATE_NONE(_v) (0)
+
+/**
+ * XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH - iterate over debug configfs params
+ * @param: function-like macro called as
+ * ``param(type, name, default, validator)``
+ *
+ * type: parameter type token, one of {int, bool, u8, u16, u32, u64}
+ * name: parameter name; appears as a configfs file at
+ * /sys/kernel/config/xe/<bdf>/debug/<name>
+ * default: initial/default value of the parameter
+ * validator: function-like macro ``v -> int`` returning 0 or a negative
+ * errno; use XE_PARAM_VALIDATE_NONE when no extra constraints
+ * apply beyond the underlying type's range
+ *
+ * To add a new debug-only configfs parameter, append a single line to
+ * this list. The infrastructure auto-generates the struct member,
+ * default initialization, configfs attribute (show/store), inclusion in
+ * the debug attrs[] array, and the diagnostic dump in
+ * dump_custom_dev_config().
+ *
+ * Generated configfs files use the default permissions provided by the
+ * configfs core (read-write); a system administrator can restrict them
+ * at runtime if needed.
+ */
+#define XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(param) \
+ /* No parameters yet - add entries above this line. */
+
+/* Generate the struct that backs all debug params in xe_config_device. */
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val) XE_PARAM_TYPE_##_T _name;
+struct xe_configfs_debug_params {
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_MEMBER)
+};
+
+#undef _XE_PARAM_MEMBER
+
+/*
+ * Designated-initializer fragment for &xe_configfs_device_defaults. Use as:
+ *
+ * .debug.params = {
+ * XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS
+ * },
+ */
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val) ._name = (_def),
+#define XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS \
+ XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DEFAULT_INIT)
+
+/*
+ * Forward declarations of the per-parameter configfs_attribute objects.
+ *
+ * The objects themselves are defined in xe_configfs_debug_params.c (as
+ * non-static so they can be referenced from xe_configfs_debug.c's
+ * xe_configfs_debug_attrs[] array and is_visible() callback). They live
+ * in the same translation unit as the X-macro-generated show/store
+ * handlers; consumers should reference them via attr_<name>.
+ */
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val) \
+ extern struct configfs_attribute attr_##_name;
+XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DECLARE_ATTR)
+#undef _XE_PARAM_DECLARE_ATTR
+
+/*
+ * Helper used by xe_configfs_debug.c to splice the auto-generated
+ * attribute pointers into its xe_configfs_debug_attrs[] array.
+ */
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val) &attr_##_name,
+
+#endif /* _XE_CONFIGFS_DEBUG_PARAMS_H_ */
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 8773adeffd4e..16e91d8072f4 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -9,6 +9,7 @@
#include <linux/mutex.h>
#include <linux/types.h>
+#include "xe_configfs_debug_params.h"
#include "xe_hw_engine_types.h"
#include "xe_pci_types.h"
#include "xe_sriov_types.h"
@@ -39,6 +40,7 @@ struct xe_config_group_device {
u64 gt_types_allowed;
int guc_log_level;
u8 guc_log_target;
+ struct xe_configfs_debug_params params;
} debug;
struct {
bool admin_only_pf;
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* [PATCH 9/9] drm/xe: Migrate existing debug configfs entries to params infrastructure
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (7 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 8/9] drm/xe: Add infrastructure for debug configfs parameters Stuart Summers
@ 2026-05-04 4:43 ` Stuart Summers
2026-05-04 4:54 ` [PATCH 0/9] Add new debug infrastructure for configfs Summers, Stuart
` (4 subsequent siblings)
13 siblings, 0 replies; 37+ messages in thread
From: Stuart Summers @ 2026-05-04 4:43 UTC (permalink / raw)
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Move the four existing debug configfs entries whose semantics fit the
generic show/store template into the new parameter list:
- enable_psmi (bool)
- enable_survivability_mode (bool)
- guc_log_level (int, validated against GUC_LOG_LEVEL_MAX,
accepting any negative value as "unset")
- guc_log_target (u8, validated against GUC_LOG_TARGET_MAX)
guc_log_level keeps its module-parameter fallback in the public getter
xe_configfs_get_guc_log_level(): a negative value stored in configfs
(the default is %XE_GUC_LOG_LEVEL_UNSET, -1) means "use the modparam";
only a value >= 0 overrides it. The validator therefore allows any
negative value through so the sentinel can be written back from
userspace.
The remaining hand-written entries (ctx_restore_mid_bb,
ctx_restore_post_bb, engines_allowed, gt_types_allowed) all have
custom string parsing or per-class indexing that does not fit the
generic template and stay as-is.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
---
drivers/gpu/drm/xe/xe_configfs.c | 8 --
drivers/gpu/drm/xe/xe_configfs_debug.c | 133 +-----------------
drivers/gpu/drm/xe/xe_configfs_debug_params.h | 18 ++-
drivers/gpu/drm/xe/xe_configfs_types.h | 4 -
4 files changed, 21 insertions(+), 142 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 59cd83c2ac53..aa4d9fbb967a 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -102,12 +102,8 @@
const struct xe_config_device xe_configfs_device_defaults = {
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
.debug = {
- .enable_psmi = false,
- .enable_survivability_mode = false,
.engines_allowed = U64_MAX,
.gt_types_allowed = U64_MAX,
- .guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
- .guc_log_target = XE_DEFAULT_GUC_LOG_TARGET,
.params = {
XE_CONFIGFS_DEBUG_PARAMS_DEFAULTS
},
@@ -430,12 +426,8 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
} while (0)
#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
- PRI_CUSTOM_ATTR("%d", debug.enable_psmi);
- PRI_CUSTOM_ATTR("%d", debug.enable_survivability_mode);
PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
- PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
- PRI_CUSTOM_ATTR("%d", debug.guc_log_target);
#define _XE_PARAM_DUMP(_T, _name, _def, _val) \
PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(_XE_PARAM_DUMP)
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
index fcd6c81de3bb..87ec6ee0f05a 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug.c
+++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
@@ -288,9 +288,9 @@ bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
bool mode;
if (!dev)
- return xe_configfs_device_defaults.debug.enable_survivability_mode;
+ return xe_configfs_device_defaults.debug.params.enable_survivability_mode;
- mode = dev->config.debug.enable_survivability_mode;
+ mode = dev->config.debug.params.enable_survivability_mode;
config_group_put(&dev->group);
return mode;
@@ -308,9 +308,9 @@ u8 xe_configfs_get_guc_log_target(struct pci_dev *pdev)
u8 target;
if (!dev)
- return xe_configfs_device_defaults.debug.guc_log_target;
+ return xe_configfs_device_defaults.debug.params.guc_log_target;
- target = dev->config.debug.guc_log_target;
+ target = dev->config.debug.params.guc_log_target;
config_group_put(&dev->group);
return target;
@@ -374,7 +374,7 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
if (!dev)
return false;
- ret = dev->config.debug.enable_psmi;
+ ret = dev->config.debug.params.enable_psmi;
config_group_put(&dev->group);
return ret;
@@ -400,8 +400,8 @@ int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
if (!dev)
goto out;
- if (dev->config.debug.guc_log_level >= 0)
- level = dev->config.debug.guc_log_level;
+ if (dev->config.debug.params.guc_log_level >= 0)
+ level = dev->config.debug.params.guc_log_level;
config_group_put(&dev->group);
out:
@@ -460,33 +460,6 @@ u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
return len;
}
-static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = debug_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.enable_survivability_mode);
-}
-
-static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
- size_t len)
-{
- struct xe_config_group_device *dev = debug_to_group_device(item);
- bool enable_survivability_mode;
- int ret;
-
- ret = kstrtobool(page, &enable_survivability_mode);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.enable_survivability_mode = enable_survivability_mode;
-
- return len;
-}
-
static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
{
struct xe_config_device *dev = debug_to_device(item);
@@ -653,61 +626,6 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
return len;
}
-static ssize_t enable_psmi_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = debug_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.enable_psmi);
-}
-
-static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = debug_to_group_device(item);
- bool val;
- int ret;
-
- ret = kstrtobool(page, &val);
- if (ret)
- return ret;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.enable_psmi = val;
-
- return len;
-}
-
-static ssize_t guc_log_level_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = debug_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.guc_log_level);
-}
-
-static ssize_t guc_log_level_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = debug_to_group_device(item);
- int val;
- int ret;
-
- ret = kstrtoint(page, 0, &val);
- if (ret)
- return ret;
-
- if (val > GUC_LOG_LEVEL_MAX)
- return -EINVAL;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.guc_log_level = val;
-
- return len;
-}
-
static bool wa_bb_read_advance(bool dereference, char **p,
const char *append, size_t len,
size_t *max_size)
@@ -943,43 +861,10 @@ static ssize_t ctx_restore_post_bb_store(struct config_item *item,
return wa_bb_store(dev->config.debug.ctx_restore_post_bb, dev, data, sz);
}
-static ssize_t guc_log_target_show(struct config_item *item, char *page)
-{
- struct xe_config_device *dev = debug_to_device(item);
-
- return sprintf(page, "%d\n", dev->debug.guc_log_target);
-}
-
-static ssize_t guc_log_target_store(struct config_item *item, const char *page, size_t len)
-{
- struct xe_config_group_device *dev = debug_to_group_device(item);
- u8 guc_log_target;
- int ret;
-
- ret = kstrtou8(page, 0, &guc_log_target);
- if (ret)
- return ret;
-
- if (guc_log_target > GUC_LOG_TARGET_MAX)
- return -EINVAL;
-
- guard(mutex)(&dev->lock);
- if (xe_configfs_is_bound(dev))
- return -EBUSY;
-
- dev->config.debug.guc_log_target = guc_log_target;
-
- return len;
-}
-
CONFIGFS_ATTR(, ctx_restore_mid_bb);
CONFIGFS_ATTR(, ctx_restore_post_bb);
-CONFIGFS_ATTR(, enable_psmi);
-CONFIGFS_ATTR(, enable_survivability_mode);
CONFIGFS_ATTR(, engines_allowed);
CONFIGFS_ATTR(, gt_types_allowed);
-CONFIGFS_ATTR(, guc_log_level);
-CONFIGFS_ATTR(, guc_log_target);
static bool xe_configfs_debug_is_visible(struct config_item *item,
struct configfs_attribute *attr,
@@ -1002,12 +887,8 @@ static struct configfs_group_operations xe_configfs_debug_group_ops = {
static struct configfs_attribute *xe_configfs_debug_attrs[] = {
&attr_ctx_restore_mid_bb,
&attr_ctx_restore_post_bb,
- &attr_enable_psmi,
- &attr_enable_survivability_mode,
&attr_engines_allowed,
&attr_gt_types_allowed,
- &attr_guc_log_level,
- &attr_guc_log_target,
XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(XE_PARAM_ATTR_PTR)
NULL,
};
diff --git a/drivers/gpu/drm/xe/xe_configfs_debug_params.h b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
index 9cf9256eb851..a5f8766d897c 100644
--- a/drivers/gpu/drm/xe/xe_configfs_debug_params.h
+++ b/drivers/gpu/drm/xe/xe_configfs_debug_params.h
@@ -10,6 +10,10 @@
#include <linux/errno.h>
#include <linux/types.h>
+#include "abi/guc_log_abi.h"
+#include "xe_guc_fwif.h"
+#include "xe_guc_log.h"
+
/*
* Internal type/format aliases resolved by XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH().
*
@@ -43,12 +47,15 @@
* acceptable, a negative errno (typically -EINVAL) otherwise.
*
* XE_PARAM_VALIDATE_NONE is the no-op validator for parameters whose
- * full type range is acceptable. Param-specific validators are defined
- * alongside the X-macro list below so that the constraints live next to
- * the entries that depend on them.
+ * full type range is acceptable.
*/
#define XE_PARAM_VALIDATE_NONE(_v) (0)
+#define XE_PARAM_VALIDATE_GUC_LOG_LEVEL(_v) \
+ ((((_v) < 0) || ((_v) <= GUC_LOG_LEVEL_MAX)) ? 0 : -EINVAL)
+#define XE_PARAM_VALIDATE_GUC_LOG_TARGET(_v) \
+ (((_v) <= GUC_LOG_TARGET_MAX) ? 0 : -EINVAL)
+
/**
* XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH - iterate over debug configfs params
* @param: function-like macro called as
@@ -73,7 +80,10 @@
* at runtime if needed.
*/
#define XE_CONFIGFS_DEBUG_PARAMS_FOR_EACH(param) \
- /* No parameters yet - add entries above this line. */
+ param(bool, enable_psmi, false, XE_PARAM_VALIDATE_NONE) \
+ param(bool, enable_survivability_mode, false, XE_PARAM_VALIDATE_NONE) \
+ param(int, guc_log_level, XE_GUC_LOG_LEVEL_UNSET, XE_PARAM_VALIDATE_GUC_LOG_LEVEL) \
+ param(u8, guc_log_target, XE_DEFAULT_GUC_LOG_TARGET, XE_PARAM_VALIDATE_GUC_LOG_TARGET)
/* Generate the struct that backs all debug params in xe_config_device. */
#define _XE_PARAM_MEMBER(_T, _name, _def, _val) XE_PARAM_TYPE_##_T _name;
diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
index 16e91d8072f4..a84a0c8eae7b 100644
--- a/drivers/gpu/drm/xe/xe_configfs_types.h
+++ b/drivers/gpu/drm/xe/xe_configfs_types.h
@@ -34,12 +34,8 @@ struct xe_config_group_device {
struct {
struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
- bool enable_psmi;
- bool enable_survivability_mode;
u64 engines_allowed;
u64 gt_types_allowed;
- int guc_log_level;
- u8 guc_log_target;
struct xe_configfs_debug_params params;
} debug;
struct {
--
2.43.0
^ permalink raw reply related [flat|nested] 37+ messages in thread
* Re: [PATCH 3/9] drm/xe: Split out configfs data structures
2026-05-04 4:43 ` [PATCH 3/9] drm/xe: Split out configfs data structures Stuart Summers
@ 2026-05-04 4:52 ` Summers, Stuart
2026-05-04 8:47 ` Jani Nikula
1 sibling, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 4:52 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 04:43 +0000, Stuart Summers wrote:
> Split the configfs data structures into their own _types.h file.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++-----------------
> --
> drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++
> 2 files changed, 80 insertions(+), 64 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> b/drivers/gpu/drm/xe/xe_configfs.c
> index 1e134057fae8..12b7fe65446d 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -4,7 +4,6 @@
> */
>
> #include <linux/bitops.h>
> -#include <linux/ctype.h>
> #include <linux/configfs.h>
> #include <linux/cleanup.h>
> #include <linux/find.h>
> @@ -15,12 +14,10 @@
>
> #include "instructions/xe_mi_commands.h"
> #include "xe_configfs.h"
> +#include "xe_configfs_types.h"
> #include "xe_defaults.h"
> #include "xe_gt_types.h"
> -#include "xe_hw_engine_types.h"
> #include "xe_module.h"
> -#include "xe_pci_types.h"
> -#include "xe_sriov_types.h"
>
> /**
> * DOC: Xe Configfs
> @@ -245,36 +242,6 @@
> * # rmdir /sys/kernel/config/xe/0000:03:00.0/
> */
>
> -/* Similar to struct xe_bb, but not tied to HW (yet) */
> -struct wa_bb {
> - u32 *cs;
> - u32 len; /* in dwords */
> -};
> -
> -struct xe_config_group_device {
> - struct config_group group;
> - struct config_group sriov;
> -
> - struct xe_config_device {
> - struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> - struct wa_bb
> ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> - bool enable_psmi;
> - bool enable_survivability_mode;
> - u64 engines_allowed;
> - u64 gt_types_allowed;
> - struct {
> - bool admin_only_pf;
> - unsigned int max_vfs;
> - } sriov;
> - } config;
> -
> - /* protects attributes */
> - struct mutex lock;
> - /* matching descriptor */
> - const struct xe_device_desc *desc;
> - /* tentative SR-IOV mode */
> - enum xe_sriov_mode mode;
> -};
>
> static const struct xe_config_device device_defaults = {
> .enable_psmi = false,
> @@ -322,16 +289,6 @@ static const struct {
> { .name = "media", .type = XE_GT_TYPE_MEDIA },
> };
>
> -static struct xe_config_group_device
> *to_xe_config_group_device(struct config_item *item)
> -{
> - return container_of(to_config_group(item), struct
> xe_config_group_device, group);
> -}
> -
> -static struct xe_config_device *to_xe_config_device(struct
> config_item *item)
> -{
> - return &to_xe_config_group_device(item)->config;
> -}
> -
> static bool is_bound(struct xe_config_group_device *dev)
> {
> unsigned int domain, bus, slot, function;
> @@ -359,7 +316,7 @@ static bool is_bound(struct
> xe_config_group_device *dev)
>
> static ssize_t enable_survivability_mode_show(struct config_item
> *item, char *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
>
> return sprintf(page, "%d\n", dev->enable_survivability_mode);
> }
> @@ -367,7 +324,7 @@ static ssize_t
> enable_survivability_mode_show(struct config_item *item, char *pa
> static ssize_t enable_survivability_mode_store(struct config_item
> *item, const char *page,
> size_t len)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
> bool enable_survivability_mode;
> int ret;
>
> @@ -386,7 +343,7 @@ static ssize_t
> enable_survivability_mode_store(struct config_item *item, const c
>
> static ssize_t gt_types_allowed_show(struct config_item *item, char
> *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
> char *p = page;
>
> for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
> @@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct
> config_item *item, char *page)
> static ssize_t gt_types_allowed_store(struct config_item *item,
> const char *page,
> size_t len)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
> char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
> char *p = buf;
> u64 typemask = 0;
> @@ -437,7 +394,7 @@ static ssize_t gt_types_allowed_store(struct
> config_item *item, const char *page
>
> static ssize_t engines_allowed_show(struct config_item *item, char
> *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
> char *p = page;
>
> for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> @@ -529,7 +486,7 @@ static int parse_engine(const char *s, const char
> *end_chars, u64 *mask,
> static ssize_t engines_allowed_store(struct config_item *item, const
> char *page,
> size_t len)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
> ssize_t patternlen, p;
> u64 mask, val = 0;
>
> @@ -552,14 +509,14 @@ static ssize_t engines_allowed_store(struct
> config_item *item, const char *page,
>
> static ssize_t enable_psmi_show(struct config_item *item, char
> *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
>
> return sprintf(page, "%d\n", dev->enable_psmi);
> }
>
> static ssize_t enable_psmi_store(struct config_item *item, const
> char *page, size_t len)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
> bool val;
> int ret;
>
> @@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct
> xe_config_group_device *dev,
>
> static ssize_t ctx_restore_mid_bb_show(struct config_item *item,
> char *page)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
>
> return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page,
> SZ_4K);
> }
>
> static ssize_t ctx_restore_post_bb_show(struct config_item *item,
> char *page)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
>
> return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page,
> SZ_4K);
> }
> @@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb
> wa_bb[static XE_ENGINE_CLASS_MAX],
> static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
> const char *data, size_t sz)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
>
> return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data,
> sz);
> }
> @@ -806,7 +763,7 @@ static ssize_t ctx_restore_mid_bb_store(struct
> config_item *item,
> static ssize_t ctx_restore_post_bb_store(struct config_item *item,
> const char *data, size_t sz)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
>
> return wa_bb_store(dev->config.ctx_restore_post_bb, dev,
> data, sz);
> }
> @@ -830,7 +787,7 @@ static struct configfs_attribute
> *xe_config_device_attrs[] = {
>
> static void xe_config_device_release(struct config_item *item)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
>
> mutex_destroy(&dev->lock);
>
> @@ -846,7 +803,7 @@ static struct configfs_item_operations
> xe_config_device_ops = {
> static bool xe_config_device_is_visible(struct config_item *item,
> struct configfs_attribute
> *attr, int n)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item);
>
> if (attr == &attr_enable_survivability_mode) {
> if (!dev->desc->is_dgfx || dev->desc->platform <
> XE_BATTLEMAGE)
> @@ -869,7 +826,7 @@ static const struct config_item_type
> xe_config_device_type = {
>
> static ssize_t sriov_max_vfs_show(struct config_item *item, char
> *page)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item->ci_parent);
>
> guard(mutex)(&dev->lock);
>
> @@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct
> config_item *item, char *page)
>
> static ssize_t sriov_max_vfs_store(struct config_item *item, const
> char *page, size_t len)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item->ci_parent);
> unsigned int max_vfs;
> int ret;
>
> @@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct
> config_item *item, const char *page, s
>
> static ssize_t sriov_admin_only_pf_show(struct config_item *item,
> char *page)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item->ci_parent);
>
> guard(mutex)(&dev->lock);
>
> @@ -912,7 +869,7 @@ static ssize_t sriov_admin_only_pf_show(struct
> config_item *item, char *page)
>
> static ssize_t sriov_admin_only_pf_store(struct config_item *item,
> const char *page, size_t len)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item->ci_parent);
> bool admin_only_pf;
> int ret;
>
> @@ -941,7 +898,7 @@ static struct configfs_attribute
> *xe_config_sriov_attrs[] = {
> static bool xe_config_sriov_is_visible(struct config_item *item,
> struct configfs_attribute
> *attr, int n)
> {
> - struct xe_config_group_device *dev =
> to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev =
> xe_configfs_to_group_device(item->ci_parent);
>
> if (attr == &sriov_attr_max_vfs && dev->mode !=
> XE_SRIOV_MODE_PF)
> return false;
> @@ -1084,7 +1041,7 @@ static struct xe_config_group_device
> *find_xe_config_group_device(struct pci_dev
> if (!item)
> return NULL;
>
> - return to_xe_config_group_device(item);
> + return xe_configfs_to_group_device(item);
> }
>
> static void dump_custom_dev_config(struct pci_dev *pdev,
> diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> b/drivers/gpu/drm/xe/xe_configfs_types.h
> new file mode 100644
> index 000000000000..935097aafa96
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> @@ -0,0 +1,59 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +#ifndef _XE_CONFIGFS_TYPES_H_
> +#define _XE_CONFIGFS_TYPES_H_
> +
> +#include <linux/configfs.h>
> +#include <linux/mutex.h>
> +#include <linux/types.h>
> +
> +#include "xe_hw_engine_types.h"
> +#include "xe_pci_types.h"
> +#include "xe_sriov_types.h"
> +
> +struct config_item;
> +
> +/* Similar to struct xe_bb, but not tied to HW (yet) */
> +struct wa_bb {
> + u32 *cs;
> + u32 len; /* in dwords */
> +};
> +
> +struct xe_config_group_device {
> + struct config_group group;
> + struct config_group sriov;
> +
> + struct xe_config_device {
> + struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> + struct wa_bb
> ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> + bool enable_psmi;
> + bool enable_survivability_mode;
> + u64 engines_allowed;
> + u64 gt_types_allowed;
> + struct {
> + bool admin_only_pf;
> + unsigned int max_vfs;
> + } sriov;
> + } config;
> +
> + /* protects attributes */
> + struct mutex lock;
> + /* matching descriptor */
> + const struct xe_device_desc *desc;
> + /* tentative SR-IOV mode */
> + enum xe_sriov_mode mode;
> +};
> +
> +static inline struct xe_config_group_device
> *xe_configfs_to_group_device(struct config_item *item)
Sorry about that, I'll split these up into multiple lines so we aren't
going too long here...
-Stuart
> +{
> + return container_of(to_config_group(item), struct
> xe_config_group_device, group);
> +}
> +
> +static inline struct xe_config_device *xe_configfs_to_device(struct
> config_item *item)
> +{
> + return &xe_configfs_to_group_device(item)->config;
> +}
> +
> +#endif /* _XE_CONFIGFS_TYPES_H_ */
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 0/9] Add new debug infrastructure for configfs
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (8 preceding siblings ...)
2026-05-04 4:43 ` [PATCH 9/9] drm/xe: Migrate existing debug configfs entries to params infrastructure Stuart Summers
@ 2026-05-04 4:54 ` Summers, Stuart
2026-05-04 5:30 ` ✗ CI.checkpatch: warning for " Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 4:54 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 04:43 +0000, Stuart Summers wrote:
> Add a new configfs debug group. The intent of this structure is
> to allow us to separate ABI facing configfs entries from those
> which are purely for debug purposes. And it allows us more
> flexibility
> in how we define those parameters used for debug.
>
> Add a new infrastructure to this debug configfs group that lets us
> easily define the parameters in a quick list. This is primarily
> useful for simple, single-type parameters such as enable/disable
> features or simple values passed. For more complex parameters,
> we will still need to define these separately.
>
> Pull the GuC target related changes from [1] to fit within
> this new structure and add a new definition for guc_log_level
> on top of the existing module parameter (to ensure we aren't
> impacting existing users of the module parameter).
>
> Note that the debug parameters here are all to be used "at your
> own risk". Without having in depth knowledge of how these impact
> the software and hardware, there could be unforeseen consequences
> of setting them. As such, they are all wrapped in a
> CONFIG_DRM_XE_DEBUG configfs option.
>
> In terms of the patches here, I'm also making a few organizational
> changes like naming and sorting. I also know we have a few other
> module parameters that could migrate here, but I didn't want to
> overload this series too much, so the focus for now is on
> the existing configfs entries and demonstrating the new structures
> with the GuC log level and target parameters.
>
> I used GitHub Copilot with Claude pretty extensively through the
> process here and attributed as such. Happy to answer any questions
> around this.
>
> I also decided to drop John Harrison from the NPK patch. It has
> been modified quite a bit from the original, but more importantly
> John is no longer with Intel and that email address isn't available
> any more. If it makes a difference here, John and I had both
> separately
> implemented this same change at different occasions for debug. The
> one I used to start that initial series was cherry-picked from his
> latest variant.
Quick note here that I still need to do some IGT updates here to take
the new directory structure into account... I did a little manual
testing so far. But I'd really appreciate any feedback you have in the
meantime. I just want to make sure there aren't any major complaints
with the overall idea here.
Thanks,
Stuart
>
> Tested on BMG.
>
> [1] https://patchwork.freedesktop.org/series/162087/
>
> Stuart Summers (9):
> drm/xe: Rename survivability_mode to enable_survivability_mode
> drm/xe: Sort xe_config_device fields and defaults alphabetically
> drm/xe: Split out configfs data structures
> drm/xe: Add a new debug focused configfs group
> drm/xe: Move debug configfs entries to xe_configfs_debug.c
> drm/xe/guc: Add configfs support for guc_log_level
> drm/xe/guc: Add support for NPK as a GuC log target
> drm/xe: Add infrastructure for debug configfs parameters
> drm/xe: Migrate existing debug configfs entries to params
> infrastructure
>
> drivers/gpu/drm/xe/Makefile | 2 +
> drivers/gpu/drm/xe/abi/guc_log_abi.h | 8 +
> drivers/gpu/drm/xe/xe_configfs.c | 952 ++--------------
> --
> drivers/gpu/drm/xe/xe_configfs.h | 23 -
> drivers/gpu/drm/xe/xe_configfs_debug.c | 900
> +++++++++++++++++
> drivers/gpu/drm/xe/xe_configfs_debug.h | 56 ++
> drivers/gpu/drm/xe/xe_configfs_debug_params.c | 112 +++
> drivers/gpu/drm/xe/xe_configfs_debug_params.h | 127 +++
> drivers/gpu/drm/xe/xe_configfs_types.h | 73 ++
> drivers/gpu/drm/xe/xe_defaults.h | 5 +
> drivers/gpu/drm/xe/xe_guc.c | 12 +-
> drivers/gpu/drm/xe/xe_guc_log.c | 3 +-
> drivers/gpu/drm/xe/xe_hw_engine.c | 1 +
> drivers/gpu/drm/xe/xe_lrc.c | 1 +
> drivers/gpu/drm/xe/xe_pci.c | 1 +
> drivers/gpu/drm/xe/xe_psmi.c | 1 +
> drivers/gpu/drm/xe/xe_rtp.c | 1 +
> drivers/gpu/drm/xe/xe_survivability_mode.c | 3 +-
> 18 files changed, 1369 insertions(+), 912 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.c
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug_params.h
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* ✗ CI.checkpatch: warning for Add new debug infrastructure for configfs
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (9 preceding siblings ...)
2026-05-04 4:54 ` [PATCH 0/9] Add new debug infrastructure for configfs Summers, Stuart
@ 2026-05-04 5:30 ` Patchwork
2026-05-04 5:32 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 37+ messages in thread
From: Patchwork @ 2026-05-04 5:30 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
== Series Details ==
Series: Add new debug infrastructure for configfs
URL : https://patchwork.freedesktop.org/series/165879/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c8c12e558adaef7a4d125d83b6e1f8824bc13b82
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b22dcaff1c2ae70ee14a72f3a51f0ae7ab2e49e4
Author: Stuart Summers <stuart.summers@intel.com>
Date: Mon May 4 04:43:46 2026 +0000
drm/xe: Migrate existing debug configfs entries to params infrastructure
Move the four existing debug configfs entries whose semantics fit the
generic show/store template into the new parameter list:
- enable_psmi (bool)
- enable_survivability_mode (bool)
- guc_log_level (int, validated against GUC_LOG_LEVEL_MAX,
accepting any negative value as "unset")
- guc_log_target (u8, validated against GUC_LOG_TARGET_MAX)
guc_log_level keeps its module-parameter fallback in the public getter
xe_configfs_get_guc_log_level(): a negative value stored in configfs
(the default is %XE_GUC_LOG_LEVEL_UNSET, -1) means "use the modparam";
only a value >= 0 overrides it. The validator therefore allows any
negative value through so the sentinel can be written back from
userspace.
The remaining hand-written entries (ctx_restore_mid_bb,
ctx_restore_post_bb, engines_allowed, gt_types_allowed) all have
custom string parsing or per-class indexing that does not fit the
generic template and stay as-is.
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-opus-4.7
+ /mt/dim checkpatch 59b0faed1d239bc0f433999671c2d195bd62f9b8 drm-intel
a43da1486476 drm/xe: Rename survivability_mode to enable_survivability_mode
bcb4520c13a0 drm/xe: Sort xe_config_device fields and defaults alphabetically
1b67b92aeb7d drm/xe: Split out configfs data structures
-:270: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#270:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 291 lines checked
7b8d7a78f666 drm/xe: Add a new debug focused configfs group
-:40: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#40:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 57 lines checked
f156c79f9fce drm/xe: Move debug configfs entries to xe_configfs_debug.c
fab710158ad5 drm/xe/guc: Add configfs support for guc_log_level
8ac835cbc4de drm/xe/guc: Add support for NPK as a GuC log target
0d59bf681606 drm/xe: Add infrastructure for debug configfs parameters
-:80: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#80: FILE: drivers/gpu/drm/xe/xe_configfs.c:439:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:80: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#80: FILE: drivers/gpu/drm/xe/xe_configfs.c:439:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:80: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#80: FILE: drivers/gpu/drm/xe/xe_configfs.c:439:
+#define _XE_PARAM_DUMP(_T, _name, _def, _val) \
+ PRI_CUSTOM_ATTR(XE_PARAM_FMT_##_T, debug.params._name);
-:108: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#108:
new file mode 100644
-:151: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_name' - possible side-effects?
#151: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:39:
+#define _XE_PARAM_DEFINE_OPS_NUMERIC(_T, _name, _kstrto, _fmt, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_device *dev = xe_configfs_to_device(item->ci_parent); \
+ return sprintf(page, _fmt "\n", dev->debug.params._name); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent); \
+ XE_PARAM_TYPE_##_T val; \
+ int ret = _kstrto(page, 0, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
-:184: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_name' - possible side-effects?
#184: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:72:
+#define _XE_PARAM_DEFINE_OPS_bool(_name, _validator) \
+static ssize_t _name##_show(struct config_item *item, char *page) \
+{ \
+ struct xe_config_device *dev = xe_configfs_to_device(item->ci_parent); \
+ return sprintf(page, "%d\n", dev->debug.params._name); \
+} \
+static ssize_t _name##_store(struct config_item *item, const char *page, size_t len) \
+{ \
+ struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent); \
+ bool val; \
+ int ret = kstrtobool(page, &val); \
+ if (ret) \
+ return ret; \
+ ret = _validator(val); \
+ if (ret) \
+ return ret; \
+ guard(mutex)(&dev->lock); \
+ if (xe_configfs_is_bound(dev)) \
+ return -EBUSY; \
+ dev->config.debug.params._name = val; \
+ return len; \
+}
-:207: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#207: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:95:
+#define _XE_PARAM_DEFINE_OPS(_T, _name, _def, _validator) \
+ _XE_PARAM_DEFINE_OPS_##_T(_name, _validator)
-:215: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#215: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:103:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val) \
+struct configfs_attribute attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:215: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#215: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:103:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val) \
+struct configfs_attribute attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:215: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#215: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:103:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val) \
+struct configfs_attribute attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:215: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#215: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.c:103:
+#define _XE_PARAM_DEFINE_ATTR(_T, _name, _def, _val) \
+struct configfs_attribute attr_##_name = { \
+ .ca_name = __stringify(_name), \
+ .ca_owner = THIS_MODULE, \
+ .ca_mode = 0644, \
+ .show = _name##_show, \
+ .store = _name##_store, \
+};
-:280: WARNING:MACRO_ARG_UNUSED: Argument '_v' is not used in function-like macro
#280: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:50:
+#define XE_PARAM_VALIDATE_NONE(_v) (0)
-:309: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#309: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:79:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val) XE_PARAM_TYPE_##_T _name;
-:309: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#309: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:79:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val) XE_PARAM_TYPE_##_T _name;
-:309: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#309: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:79:
+#define _XE_PARAM_MEMBER(_T, _name, _def, _val) XE_PARAM_TYPE_##_T _name;
-:323: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#323: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:93:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val) ._name = (_def),
-:323: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#323: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:93:
+#define _XE_PARAM_DEFAULT_INIT(_T, _name, _def, _val) ._name = (_def),
-:336: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#336: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:106:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val) \
+ extern struct configfs_attribute attr_##_name;
-:336: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#336: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:106:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val) \
+ extern struct configfs_attribute attr_##_name;
-:336: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#336: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:106:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val) \
+ extern struct configfs_attribute attr_##_name;
-:336: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#336: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:106:
+#define _XE_PARAM_DECLARE_ATTR(_T, _name, _def, _val) \
+ extern struct configfs_attribute attr_##_name;
-:345: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#345: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:115:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val) &attr_##_name,
BUT SEE:
do {} while (0) advice is over-stated in a few situations:
The more obvious case is macros, like MODULE_PARM_DESC, invoked at
file-scope, where C disallows code (it must be in functions). See
$exceptions if you have one to add by name.
More troublesome is declarative macros used at top of new scope,
like DECLARE_PER_CPU. These might just compile with a do-while-0
wrapper, but would be incorrect. Most of these are handled by
detecting struct,union,etc declaration primitives in $exceptions.
Theres also macros called inside an if (block), which "return" an
expression. These cannot do-while, and need a ({}) wrapper.
Enjoy this qualification while we work to improve our heuristics.
-:345: WARNING:MACRO_ARG_UNUSED: Argument '_T' is not used in function-like macro
#345: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:115:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val) &attr_##_name,
-:345: WARNING:MACRO_ARG_UNUSED: Argument '_def' is not used in function-like macro
#345: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:115:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val) &attr_##_name,
-:345: WARNING:MACRO_ARG_UNUSED: Argument '_val' is not used in function-like macro
#345: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:115:
+#define XE_PARAM_ATTR_PTR(_T, _name, _def, _val) &attr_##_name,
total: 1 errors, 22 warnings, 2 checks, 284 lines checked
b22dcaff1c2a drm/xe: Migrate existing debug configfs entries to params infrastructure
-:288: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_v' - possible side-effects?
#288: FILE: drivers/gpu/drm/xe/xe_configfs_debug_params.h:54:
+#define XE_PARAM_VALIDATE_GUC_LOG_LEVEL(_v) \
+ ((((_v) < 0) || ((_v) <= GUC_LOG_LEVEL_MAX)) ? 0 : -EINVAL)
total: 0 errors, 0 warnings, 1 checks, 264 lines checked
^ permalink raw reply [flat|nested] 37+ messages in thread
* ✓ CI.KUnit: success for Add new debug infrastructure for configfs
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (10 preceding siblings ...)
2026-05-04 5:30 ` ✗ CI.checkpatch: warning for " Patchwork
@ 2026-05-04 5:32 ` Patchwork
2026-05-04 6:44 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-04 8:42 ` ✗ Xe.CI.FULL: failure " Patchwork
13 siblings, 0 replies; 37+ messages in thread
From: Patchwork @ 2026-05-04 5:32 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
== Series Details ==
Series: Add new debug infrastructure for configfs
URL : https://patchwork.freedesktop.org/series/165879/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:30:52] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:30:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:31:29] Starting KUnit Kernel (1/1)...
[05:31:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:31:29] ================== guc_buf (11 subtests) ===================
[05:31:29] [PASSED] test_smallest
[05:31:29] [PASSED] test_largest
[05:31:29] [PASSED] test_granular
[05:31:29] [PASSED] test_unique
[05:31:29] [PASSED] test_overlap
[05:31:29] [PASSED] test_reusable
[05:31:29] [PASSED] test_too_big
[05:31:29] [PASSED] test_flush
[05:31:29] [PASSED] test_lookup
[05:31:29] [PASSED] test_data
[05:31:29] [PASSED] test_class
[05:31:29] ===================== [PASSED] guc_buf =====================
[05:31:29] =================== guc_dbm (7 subtests) ===================
[05:31:29] [PASSED] test_empty
[05:31:29] [PASSED] test_default
[05:31:29] ======================== test_size ========================
[05:31:29] [PASSED] 4
[05:31:29] [PASSED] 8
[05:31:29] [PASSED] 32
[05:31:29] [PASSED] 256
[05:31:29] ==================== [PASSED] test_size ====================
[05:31:29] ======================= test_reuse ========================
[05:31:29] [PASSED] 4
[05:31:29] [PASSED] 8
[05:31:29] [PASSED] 32
[05:31:29] [PASSED] 256
[05:31:29] =================== [PASSED] test_reuse ====================
[05:31:29] =================== test_range_overlap ====================
[05:31:29] [PASSED] 4
[05:31:29] [PASSED] 8
[05:31:29] [PASSED] 32
[05:31:29] [PASSED] 256
[05:31:29] =============== [PASSED] test_range_overlap ================
[05:31:29] =================== test_range_compact ====================
[05:31:29] [PASSED] 4
[05:31:29] [PASSED] 8
[05:31:29] [PASSED] 32
[05:31:29] [PASSED] 256
[05:31:29] =============== [PASSED] test_range_compact ================
[05:31:29] ==================== test_range_spare =====================
[05:31:29] [PASSED] 4
[05:31:29] [PASSED] 8
[05:31:29] [PASSED] 32
[05:31:29] [PASSED] 256
[05:31:29] ================ [PASSED] test_range_spare =================
[05:31:29] ===================== [PASSED] guc_dbm =====================
[05:31:29] =================== guc_idm (6 subtests) ===================
[05:31:29] [PASSED] bad_init
[05:31:29] [PASSED] no_init
[05:31:29] [PASSED] init_fini
[05:31:29] [PASSED] check_used
[05:31:29] [PASSED] check_quota
[05:31:29] [PASSED] check_all
[05:31:29] ===================== [PASSED] guc_idm =====================
[05:31:29] ================== no_relay (3 subtests) ===================
[05:31:29] [PASSED] xe_drops_guc2pf_if_not_ready
[05:31:29] [PASSED] xe_drops_guc2vf_if_not_ready
[05:31:29] [PASSED] xe_rejects_send_if_not_ready
[05:31:29] ==================== [PASSED] no_relay =====================
[05:31:29] ================== pf_relay (14 subtests) ==================
[05:31:29] [PASSED] pf_rejects_guc2pf_too_short
[05:31:29] [PASSED] pf_rejects_guc2pf_too_long
[05:31:29] [PASSED] pf_rejects_guc2pf_no_payload
[05:31:29] [PASSED] pf_fails_no_payload
[05:31:29] [PASSED] pf_fails_bad_origin
[05:31:29] [PASSED] pf_fails_bad_type
[05:31:29] [PASSED] pf_txn_reports_error
[05:31:29] [PASSED] pf_txn_sends_pf2guc
[05:31:29] [PASSED] pf_sends_pf2guc
[05:31:29] [SKIPPED] pf_loopback_nop
[05:31:29] [SKIPPED] pf_loopback_echo
[05:31:29] [SKIPPED] pf_loopback_fail
[05:31:29] [SKIPPED] pf_loopback_busy
[05:31:29] [SKIPPED] pf_loopback_retry
[05:31:29] ==================== [PASSED] pf_relay =====================
[05:31:29] ================== vf_relay (3 subtests) ===================
[05:31:29] [PASSED] vf_rejects_guc2vf_too_short
[05:31:29] [PASSED] vf_rejects_guc2vf_too_long
[05:31:29] [PASSED] vf_rejects_guc2vf_no_payload
[05:31:29] ==================== [PASSED] vf_relay =====================
[05:31:29] ================ pf_gt_config (9 subtests) =================
[05:31:29] [PASSED] fair_contexts_1vf
[05:31:29] [PASSED] fair_doorbells_1vf
[05:31:29] [PASSED] fair_ggtt_1vf
[05:31:29] ====================== fair_vram_1vf ======================
[05:31:29] [PASSED] 3.50 GiB
[05:31:29] [PASSED] 11.5 GiB
[05:31:29] [PASSED] 15.5 GiB
[05:31:29] [PASSED] 31.5 GiB
[05:31:29] [PASSED] 63.5 GiB
[05:31:29] [PASSED] 1.91 GiB
[05:31:29] ================== [PASSED] fair_vram_1vf ==================
[05:31:29] ================ fair_vram_1vf_admin_only =================
[05:31:29] [PASSED] 3.50 GiB
[05:31:29] [PASSED] 11.5 GiB
[05:31:29] [PASSED] 15.5 GiB
[05:31:29] [PASSED] 31.5 GiB
[05:31:29] [PASSED] 63.5 GiB
[05:31:29] [PASSED] 1.91 GiB
[05:31:29] ============ [PASSED] fair_vram_1vf_admin_only =============
[05:31:29] ====================== fair_contexts ======================
[05:31:29] [PASSED] 1 VF
[05:31:29] [PASSED] 2 VFs
[05:31:29] [PASSED] 3 VFs
[05:31:29] [PASSED] 4 VFs
[05:31:29] [PASSED] 5 VFs
[05:31:29] [PASSED] 6 VFs
[05:31:29] [PASSED] 7 VFs
[05:31:29] [PASSED] 8 VFs
[05:31:29] [PASSED] 9 VFs
[05:31:29] [PASSED] 10 VFs
[05:31:29] [PASSED] 11 VFs
[05:31:29] [PASSED] 12 VFs
[05:31:29] [PASSED] 13 VFs
[05:31:29] [PASSED] 14 VFs
[05:31:29] [PASSED] 15 VFs
[05:31:29] [PASSED] 16 VFs
[05:31:29] [PASSED] 17 VFs
[05:31:29] [PASSED] 18 VFs
[05:31:29] [PASSED] 19 VFs
[05:31:29] [PASSED] 20 VFs
[05:31:29] [PASSED] 21 VFs
[05:31:29] [PASSED] 22 VFs
[05:31:29] [PASSED] 23 VFs
[05:31:29] [PASSED] 24 VFs
[05:31:29] [PASSED] 25 VFs
[05:31:29] [PASSED] 26 VFs
[05:31:29] [PASSED] 27 VFs
[05:31:29] [PASSED] 28 VFs
[05:31:29] [PASSED] 29 VFs
[05:31:29] [PASSED] 30 VFs
[05:31:29] [PASSED] 31 VFs
[05:31:29] [PASSED] 32 VFs
[05:31:29] [PASSED] 33 VFs
[05:31:29] [PASSED] 34 VFs
[05:31:29] [PASSED] 35 VFs
[05:31:29] [PASSED] 36 VFs
[05:31:29] [PASSED] 37 VFs
[05:31:29] [PASSED] 38 VFs
[05:31:29] [PASSED] 39 VFs
[05:31:29] [PASSED] 40 VFs
[05:31:29] [PASSED] 41 VFs
[05:31:29] [PASSED] 42 VFs
[05:31:29] [PASSED] 43 VFs
[05:31:29] [PASSED] 44 VFs
[05:31:29] [PASSED] 45 VFs
[05:31:29] [PASSED] 46 VFs
[05:31:29] [PASSED] 47 VFs
[05:31:29] [PASSED] 48 VFs
[05:31:29] [PASSED] 49 VFs
[05:31:29] [PASSED] 50 VFs
[05:31:29] [PASSED] 51 VFs
[05:31:29] [PASSED] 52 VFs
[05:31:29] [PASSED] 53 VFs
[05:31:29] [PASSED] 54 VFs
[05:31:29] [PASSED] 55 VFs
[05:31:29] [PASSED] 56 VFs
[05:31:29] [PASSED] 57 VFs
[05:31:29] [PASSED] 58 VFs
[05:31:29] [PASSED] 59 VFs
[05:31:29] [PASSED] 60 VFs
[05:31:29] [PASSED] 61 VFs
[05:31:29] [PASSED] 62 VFs
[05:31:29] [PASSED] 63 VFs
[05:31:29] ================== [PASSED] fair_contexts ==================
[05:31:29] ===================== fair_doorbells ======================
[05:31:29] [PASSED] 1 VF
[05:31:29] [PASSED] 2 VFs
[05:31:29] [PASSED] 3 VFs
[05:31:29] [PASSED] 4 VFs
[05:31:29] [PASSED] 5 VFs
[05:31:29] [PASSED] 6 VFs
[05:31:29] [PASSED] 7 VFs
[05:31:29] [PASSED] 8 VFs
[05:31:29] [PASSED] 9 VFs
[05:31:29] [PASSED] 10 VFs
[05:31:29] [PASSED] 11 VFs
[05:31:29] [PASSED] 12 VFs
[05:31:29] [PASSED] 13 VFs
[05:31:29] [PASSED] 14 VFs
[05:31:29] [PASSED] 15 VFs
[05:31:29] [PASSED] 16 VFs
[05:31:29] [PASSED] 17 VFs
[05:31:29] [PASSED] 18 VFs
[05:31:29] [PASSED] 19 VFs
[05:31:29] [PASSED] 20 VFs
[05:31:29] [PASSED] 21 VFs
[05:31:29] [PASSED] 22 VFs
[05:31:29] [PASSED] 23 VFs
[05:31:29] [PASSED] 24 VFs
[05:31:29] [PASSED] 25 VFs
[05:31:29] [PASSED] 26 VFs
[05:31:29] [PASSED] 27 VFs
[05:31:29] [PASSED] 28 VFs
[05:31:29] [PASSED] 29 VFs
[05:31:29] [PASSED] 30 VFs
[05:31:29] [PASSED] 31 VFs
[05:31:29] [PASSED] 32 VFs
[05:31:29] [PASSED] 33 VFs
[05:31:29] [PASSED] 34 VFs
[05:31:29] [PASSED] 35 VFs
[05:31:29] [PASSED] 36 VFs
[05:31:29] [PASSED] 37 VFs
[05:31:29] [PASSED] 38 VFs
[05:31:29] [PASSED] 39 VFs
[05:31:29] [PASSED] 40 VFs
[05:31:29] [PASSED] 41 VFs
[05:31:29] [PASSED] 42 VFs
[05:31:29] [PASSED] 43 VFs
[05:31:29] [PASSED] 44 VFs
[05:31:29] [PASSED] 45 VFs
[05:31:29] [PASSED] 46 VFs
[05:31:29] [PASSED] 47 VFs
[05:31:29] [PASSED] 48 VFs
[05:31:29] [PASSED] 49 VFs
[05:31:29] [PASSED] 50 VFs
[05:31:29] [PASSED] 51 VFs
[05:31:29] [PASSED] 52 VFs
[05:31:29] [PASSED] 53 VFs
[05:31:29] [PASSED] 54 VFs
[05:31:29] [PASSED] 55 VFs
[05:31:29] [PASSED] 56 VFs
[05:31:29] [PASSED] 57 VFs
[05:31:29] [PASSED] 58 VFs
[05:31:29] [PASSED] 59 VFs
[05:31:29] [PASSED] 60 VFs
[05:31:29] [PASSED] 61 VFs
[05:31:29] [PASSED] 62 VFs
[05:31:29] [PASSED] 63 VFs
[05:31:29] ================= [PASSED] fair_doorbells ==================
[05:31:29] ======================== fair_ggtt ========================
[05:31:29] [PASSED] 1 VF
[05:31:29] [PASSED] 2 VFs
[05:31:29] [PASSED] 3 VFs
[05:31:29] [PASSED] 4 VFs
[05:31:29] [PASSED] 5 VFs
[05:31:29] [PASSED] 6 VFs
[05:31:29] [PASSED] 7 VFs
[05:31:29] [PASSED] 8 VFs
[05:31:29] [PASSED] 9 VFs
[05:31:29] [PASSED] 10 VFs
[05:31:29] [PASSED] 11 VFs
[05:31:29] [PASSED] 12 VFs
[05:31:29] [PASSED] 13 VFs
[05:31:29] [PASSED] 14 VFs
[05:31:29] [PASSED] 15 VFs
[05:31:29] [PASSED] 16 VFs
[05:31:29] [PASSED] 17 VFs
[05:31:29] [PASSED] 18 VFs
[05:31:29] [PASSED] 19 VFs
[05:31:29] [PASSED] 20 VFs
[05:31:29] [PASSED] 21 VFs
[05:31:29] [PASSED] 22 VFs
[05:31:29] [PASSED] 23 VFs
[05:31:29] [PASSED] 24 VFs
[05:31:29] [PASSED] 25 VFs
[05:31:29] [PASSED] 26 VFs
[05:31:29] [PASSED] 27 VFs
[05:31:29] [PASSED] 28 VFs
[05:31:29] [PASSED] 29 VFs
[05:31:29] [PASSED] 30 VFs
[05:31:29] [PASSED] 31 VFs
[05:31:29] [PASSED] 32 VFs
[05:31:29] [PASSED] 33 VFs
[05:31:29] [PASSED] 34 VFs
[05:31:29] [PASSED] 35 VFs
[05:31:29] [PASSED] 36 VFs
[05:31:29] [PASSED] 37 VFs
[05:31:29] [PASSED] 38 VFs
[05:31:29] [PASSED] 39 VFs
[05:31:29] [PASSED] 40 VFs
[05:31:29] [PASSED] 41 VFs
[05:31:29] [PASSED] 42 VFs
[05:31:29] [PASSED] 43 VFs
[05:31:29] [PASSED] 44 VFs
[05:31:29] [PASSED] 45 VFs
[05:31:29] [PASSED] 46 VFs
[05:31:29] [PASSED] 47 VFs
[05:31:29] [PASSED] 48 VFs
[05:31:29] [PASSED] 49 VFs
[05:31:29] [PASSED] 50 VFs
[05:31:29] [PASSED] 51 VFs
[05:31:29] [PASSED] 52 VFs
[05:31:29] [PASSED] 53 VFs
[05:31:29] [PASSED] 54 VFs
[05:31:29] [PASSED] 55 VFs
[05:31:29] [PASSED] 56 VFs
[05:31:29] [PASSED] 57 VFs
[05:31:29] [PASSED] 58 VFs
[05:31:29] [PASSED] 59 VFs
[05:31:29] [PASSED] 60 VFs
[05:31:29] [PASSED] 61 VFs
[05:31:29] [PASSED] 62 VFs
[05:31:29] [PASSED] 63 VFs
[05:31:29] ==================== [PASSED] fair_ggtt ====================
[05:31:29] ======================== fair_vram ========================
[05:31:29] [PASSED] 1 VF
[05:31:29] [PASSED] 2 VFs
[05:31:29] [PASSED] 3 VFs
[05:31:29] [PASSED] 4 VFs
[05:31:29] [PASSED] 5 VFs
[05:31:29] [PASSED] 6 VFs
[05:31:29] [PASSED] 7 VFs
[05:31:29] [PASSED] 8 VFs
[05:31:29] [PASSED] 9 VFs
[05:31:29] [PASSED] 10 VFs
[05:31:29] [PASSED] 11 VFs
[05:31:29] [PASSED] 12 VFs
[05:31:29] [PASSED] 13 VFs
[05:31:29] [PASSED] 14 VFs
[05:31:29] [PASSED] 15 VFs
[05:31:29] [PASSED] 16 VFs
[05:31:29] [PASSED] 17 VFs
[05:31:29] [PASSED] 18 VFs
[05:31:29] [PASSED] 19 VFs
[05:31:29] [PASSED] 20 VFs
[05:31:29] [PASSED] 21 VFs
[05:31:29] [PASSED] 22 VFs
[05:31:29] [PASSED] 23 VFs
[05:31:29] [PASSED] 24 VFs
[05:31:29] [PASSED] 25 VFs
[05:31:29] [PASSED] 26 VFs
[05:31:29] [PASSED] 27 VFs
[05:31:29] [PASSED] 28 VFs
[05:31:29] [PASSED] 29 VFs
[05:31:29] [PASSED] 30 VFs
[05:31:29] [PASSED] 31 VFs
[05:31:29] [PASSED] 32 VFs
[05:31:29] [PASSED] 33 VFs
[05:31:29] [PASSED] 34 VFs
[05:31:29] [PASSED] 35 VFs
[05:31:29] [PASSED] 36 VFs
[05:31:29] [PASSED] 37 VFs
[05:31:29] [PASSED] 38 VFs
[05:31:29] [PASSED] 39 VFs
[05:31:29] [PASSED] 40 VFs
[05:31:29] [PASSED] 41 VFs
[05:31:29] [PASSED] 42 VFs
[05:31:29] [PASSED] 43 VFs
[05:31:29] [PASSED] 44 VFs
[05:31:29] [PASSED] 45 VFs
[05:31:29] [PASSED] 46 VFs
[05:31:29] [PASSED] 47 VFs
[05:31:29] [PASSED] 48 VFs
[05:31:29] [PASSED] 49 VFs
[05:31:29] [PASSED] 50 VFs
[05:31:29] [PASSED] 51 VFs
[05:31:29] [PASSED] 52 VFs
[05:31:29] [PASSED] 53 VFs
[05:31:29] [PASSED] 54 VFs
[05:31:29] [PASSED] 55 VFs
[05:31:29] [PASSED] 56 VFs
[05:31:29] [PASSED] 57 VFs
[05:31:29] [PASSED] 58 VFs
[05:31:29] [PASSED] 59 VFs
[05:31:29] [PASSED] 60 VFs
[05:31:29] [PASSED] 61 VFs
[05:31:29] [PASSED] 62 VFs
[05:31:29] [PASSED] 63 VFs
[05:31:29] ==================== [PASSED] fair_vram ====================
[05:31:29] ================== [PASSED] pf_gt_config ===================
[05:31:29] ===================== lmtt (1 subtest) =====================
[05:31:29] ======================== test_ops =========================
[05:31:29] [PASSED] 2-level
[05:31:29] [PASSED] multi-level
[05:31:29] ==================== [PASSED] test_ops =====================
[05:31:29] ====================== [PASSED] lmtt =======================
[05:31:29] ================= pf_service (11 subtests) =================
[05:31:29] [PASSED] pf_negotiate_any
[05:31:29] [PASSED] pf_negotiate_base_match
[05:31:29] [PASSED] pf_negotiate_base_newer
[05:31:29] [PASSED] pf_negotiate_base_next
[05:31:29] [SKIPPED] pf_negotiate_base_older
[05:31:29] [PASSED] pf_negotiate_base_prev
[05:31:29] [PASSED] pf_negotiate_latest_match
[05:31:29] [PASSED] pf_negotiate_latest_newer
[05:31:29] [PASSED] pf_negotiate_latest_next
[05:31:29] [SKIPPED] pf_negotiate_latest_older
[05:31:29] [SKIPPED] pf_negotiate_latest_prev
[05:31:29] =================== [PASSED] pf_service ====================
[05:31:29] ================= xe_guc_g2g (2 subtests) ==================
[05:31:29] ============== xe_live_guc_g2g_kunit_default ==============
[05:31:29] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:31:29] ============== xe_live_guc_g2g_kunit_allmem ===============
[05:31:29] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:31:29] =================== [SKIPPED] xe_guc_g2g ===================
[05:31:29] =================== xe_mocs (2 subtests) ===================
[05:31:29] ================ xe_live_mocs_kernel_kunit ================
[05:31:29] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:31:29] ================ xe_live_mocs_reset_kunit =================
[05:31:29] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:31:29] ==================== [SKIPPED] xe_mocs =====================
[05:31:29] ================= xe_migrate (2 subtests) ==================
[05:31:29] ================= xe_migrate_sanity_kunit =================
[05:31:29] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:31:29] ================== xe_validate_ccs_kunit ==================
[05:31:29] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:31:29] =================== [SKIPPED] xe_migrate ===================
[05:31:29] ================== xe_dma_buf (1 subtest) ==================
[05:31:29] ==================== xe_dma_buf_kunit =====================
[05:31:29] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:31:29] =================== [SKIPPED] xe_dma_buf ===================
[05:31:29] ================= xe_bo_shrink (1 subtest) =================
[05:31:29] =================== xe_bo_shrink_kunit ====================
[05:31:29] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:31:29] ================== [SKIPPED] xe_bo_shrink ==================
[05:31:29] ==================== xe_bo (2 subtests) ====================
[05:31:29] ================== xe_ccs_migrate_kunit ===================
[05:31:29] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:31:29] ==================== xe_bo_evict_kunit ====================
[05:31:29] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:31:29] ===================== [SKIPPED] xe_bo ======================
[05:31:29] ==================== args (13 subtests) ====================
[05:31:29] [PASSED] count_args_test
[05:31:29] [PASSED] call_args_example
[05:31:29] [PASSED] call_args_test
[05:31:29] [PASSED] drop_first_arg_example
[05:31:29] [PASSED] drop_first_arg_test
[05:31:29] [PASSED] first_arg_example
[05:31:29] [PASSED] first_arg_test
[05:31:29] [PASSED] last_arg_example
[05:31:29] [PASSED] last_arg_test
[05:31:29] [PASSED] pick_arg_example
[05:31:29] [PASSED] if_args_example
[05:31:29] [PASSED] if_args_test
[05:31:29] [PASSED] sep_comma_example
[05:31:29] ====================== [PASSED] args =======================
[05:31:29] =================== xe_pci (3 subtests) ====================
[05:31:29] ==================== check_graphics_ip ====================
[05:31:29] [PASSED] 12.00 Xe_LP
[05:31:29] [PASSED] 12.10 Xe_LP+
[05:31:29] [PASSED] 12.55 Xe_HPG
[05:31:29] [PASSED] 12.60 Xe_HPC
[05:31:29] [PASSED] 12.70 Xe_LPG
[05:31:29] [PASSED] 12.71 Xe_LPG
[05:31:29] [PASSED] 12.74 Xe_LPG+
[05:31:29] [PASSED] 20.01 Xe2_HPG
[05:31:29] [PASSED] 20.02 Xe2_HPG
[05:31:29] [PASSED] 20.04 Xe2_LPG
[05:31:29] [PASSED] 30.00 Xe3_LPG
[05:31:29] [PASSED] 30.01 Xe3_LPG
[05:31:29] [PASSED] 30.03 Xe3_LPG
[05:31:29] [PASSED] 30.04 Xe3_LPG
[05:31:29] [PASSED] 30.05 Xe3_LPG
[05:31:29] [PASSED] 35.10 Xe3p_LPG
[05:31:29] [PASSED] 35.11 Xe3p_XPC
[05:31:29] ================ [PASSED] check_graphics_ip ================
[05:31:29] ===================== check_media_ip ======================
[05:31:29] [PASSED] 12.00 Xe_M
[05:31:29] [PASSED] 12.55 Xe_HPM
[05:31:29] [PASSED] 13.00 Xe_LPM+
[05:31:29] [PASSED] 13.01 Xe2_HPM
[05:31:29] [PASSED] 20.00 Xe2_LPM
[05:31:29] [PASSED] 30.00 Xe3_LPM
[05:31:29] [PASSED] 30.02 Xe3_LPM
[05:31:29] [PASSED] 35.00 Xe3p_LPM
[05:31:29] [PASSED] 35.03 Xe3p_HPM
[05:31:29] ================= [PASSED] check_media_ip ==================
[05:31:29] =================== check_platform_desc ===================
[05:31:29] [PASSED] 0x9A60 (TIGERLAKE)
[05:31:29] [PASSED] 0x9A68 (TIGERLAKE)
[05:31:29] [PASSED] 0x9A70 (TIGERLAKE)
[05:31:29] [PASSED] 0x9A40 (TIGERLAKE)
[05:31:29] [PASSED] 0x9A49 (TIGERLAKE)
[05:31:29] [PASSED] 0x9A59 (TIGERLAKE)
[05:31:29] [PASSED] 0x9A78 (TIGERLAKE)
[05:31:29] [PASSED] 0x9AC0 (TIGERLAKE)
[05:31:29] [PASSED] 0x9AC9 (TIGERLAKE)
[05:31:29] [PASSED] 0x9AD9 (TIGERLAKE)
[05:31:29] [PASSED] 0x9AF8 (TIGERLAKE)
[05:31:29] [PASSED] 0x4C80 (ROCKETLAKE)
[05:31:29] [PASSED] 0x4C8A (ROCKETLAKE)
[05:31:29] [PASSED] 0x4C8B (ROCKETLAKE)
[05:31:29] [PASSED] 0x4C8C (ROCKETLAKE)
[05:31:29] [PASSED] 0x4C90 (ROCKETLAKE)
[05:31:29] [PASSED] 0x4C9A (ROCKETLAKE)
[05:31:29] [PASSED] 0x4680 (ALDERLAKE_S)
[05:31:29] [PASSED] 0x4682 (ALDERLAKE_S)
[05:31:29] [PASSED] 0x4688 (ALDERLAKE_S)
[05:31:29] [PASSED] 0x468A (ALDERLAKE_S)
[05:31:29] [PASSED] 0x468B (ALDERLAKE_S)
[05:31:29] [PASSED] 0x4690 (ALDERLAKE_S)
[05:31:29] [PASSED] 0x4692 (ALDERLAKE_S)
[05:31:29] [PASSED] 0x4693 (ALDERLAKE_S)
[05:31:29] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46AA (ALDERLAKE_P)
[05:31:29] [PASSED] 0x462A (ALDERLAKE_P)
[05:31:29] [PASSED] 0x4626 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x4628 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:31:29] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:31:29] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:31:29] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:31:29] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:31:29] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:31:29] [PASSED] 0xA721 (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA720 (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:31:29] [PASSED] 0xA780 (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA781 (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA782 (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA783 (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA788 (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA789 (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA78A (ALDERLAKE_S)
[05:31:29] [PASSED] 0xA78B (ALDERLAKE_S)
[05:31:29] [PASSED] 0x4905 (DG1)
[05:31:29] [PASSED] 0x4906 (DG1)
[05:31:29] [PASSED] 0x4907 (DG1)
[05:31:29] [PASSED] 0x4908 (DG1)
[05:31:29] [PASSED] 0x4909 (DG1)
[05:31:29] [PASSED] 0x56C0 (DG2)
[05:31:29] [PASSED] 0x56C2 (DG2)
[05:31:29] [PASSED] 0x56C1 (DG2)
[05:31:29] [PASSED] 0x7D51 (METEORLAKE)
[05:31:29] [PASSED] 0x7DD1 (METEORLAKE)
[05:31:29] [PASSED] 0x7D41 (METEORLAKE)
[05:31:29] [PASSED] 0x7D67 (METEORLAKE)
[05:31:29] [PASSED] 0xB640 (METEORLAKE)
[05:31:29] [PASSED] 0x56A0 (DG2)
[05:31:29] [PASSED] 0x56A1 (DG2)
[05:31:29] [PASSED] 0x56A2 (DG2)
[05:31:29] [PASSED] 0x56BE (DG2)
[05:31:29] [PASSED] 0x56BF (DG2)
[05:31:29] [PASSED] 0x5690 (DG2)
[05:31:29] [PASSED] 0x5691 (DG2)
[05:31:29] [PASSED] 0x5692 (DG2)
[05:31:29] [PASSED] 0x56A5 (DG2)
[05:31:29] [PASSED] 0x56A6 (DG2)
[05:31:29] [PASSED] 0x56B0 (DG2)
[05:31:29] [PASSED] 0x56B1 (DG2)
[05:31:29] [PASSED] 0x56BA (DG2)
[05:31:29] [PASSED] 0x56BB (DG2)
[05:31:29] [PASSED] 0x56BC (DG2)
[05:31:29] [PASSED] 0x56BD (DG2)
[05:31:29] [PASSED] 0x5693 (DG2)
[05:31:29] [PASSED] 0x5694 (DG2)
[05:31:29] [PASSED] 0x5695 (DG2)
[05:31:29] [PASSED] 0x56A3 (DG2)
[05:31:29] [PASSED] 0x56A4 (DG2)
[05:31:29] [PASSED] 0x56B2 (DG2)
[05:31:29] [PASSED] 0x56B3 (DG2)
[05:31:29] [PASSED] 0x5696 (DG2)
[05:31:29] [PASSED] 0x5697 (DG2)
[05:31:29] [PASSED] 0xB69 (PVC)
[05:31:29] [PASSED] 0xB6E (PVC)
[05:31:29] [PASSED] 0xBD4 (PVC)
[05:31:29] [PASSED] 0xBD5 (PVC)
[05:31:29] [PASSED] 0xBD6 (PVC)
[05:31:29] [PASSED] 0xBD7 (PVC)
[05:31:29] [PASSED] 0xBD8 (PVC)
[05:31:29] [PASSED] 0xBD9 (PVC)
[05:31:29] [PASSED] 0xBDA (PVC)
[05:31:29] [PASSED] 0xBDB (PVC)
[05:31:29] [PASSED] 0xBE0 (PVC)
[05:31:29] [PASSED] 0xBE1 (PVC)
[05:31:29] [PASSED] 0xBE5 (PVC)
[05:31:29] [PASSED] 0x7D40 (METEORLAKE)
[05:31:29] [PASSED] 0x7D45 (METEORLAKE)
[05:31:29] [PASSED] 0x7D55 (METEORLAKE)
[05:31:29] [PASSED] 0x7D60 (METEORLAKE)
[05:31:29] [PASSED] 0x7DD5 (METEORLAKE)
[05:31:29] [PASSED] 0x6420 (LUNARLAKE)
[05:31:29] [PASSED] 0x64A0 (LUNARLAKE)
[05:31:29] [PASSED] 0x64B0 (LUNARLAKE)
[05:31:29] [PASSED] 0xE202 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE209 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE20B (BATTLEMAGE)
[05:31:29] [PASSED] 0xE20C (BATTLEMAGE)
[05:31:29] [PASSED] 0xE20D (BATTLEMAGE)
[05:31:29] [PASSED] 0xE210 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE211 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE212 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE216 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE220 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE221 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE222 (BATTLEMAGE)
[05:31:29] [PASSED] 0xE223 (BATTLEMAGE)
[05:31:29] [PASSED] 0xB080 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB081 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB082 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB083 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB084 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB085 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB086 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB087 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB08F (PANTHERLAKE)
[05:31:29] [PASSED] 0xB090 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:31:29] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:31:29] [PASSED] 0xFD80 (PANTHERLAKE)
[05:31:29] [PASSED] 0xFD81 (PANTHERLAKE)
[05:31:29] [PASSED] 0xD740 (NOVALAKE_S)
[05:31:29] [PASSED] 0xD741 (NOVALAKE_S)
[05:31:29] [PASSED] 0xD742 (NOVALAKE_S)
[05:31:29] [PASSED] 0xD743 (NOVALAKE_S)
[05:31:29] [PASSED] 0xD744 (NOVALAKE_S)
[05:31:29] [PASSED] 0xD745 (NOVALAKE_S)
[05:31:29] [PASSED] 0x674C (CRESCENTISLAND)
[05:31:29] [PASSED] 0xD750 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD751 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD752 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD753 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD754 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD755 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD756 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD757 (NOVALAKE_P)
[05:31:29] [PASSED] 0xD75F (NOVALAKE_P)
[05:31:29] =============== [PASSED] check_platform_desc ===============
[05:31:29] ===================== [PASSED] xe_pci ======================
[05:31:29] =================== xe_rtp (2 subtests) ====================
[05:31:29] =============== xe_rtp_process_to_sr_tests ================
[05:31:29] [PASSED] coalesce-same-reg
[05:31:29] [PASSED] no-match-no-add
[05:31:29] [PASSED] match-or
[05:31:29] [PASSED] match-or-xfail
[05:31:29] [PASSED] no-match-no-add-multiple-rules
[05:31:29] [PASSED] two-regs-two-entries
[05:31:29] [PASSED] clr-one-set-other
[05:31:29] [PASSED] set-field
[05:31:29] [PASSED] conflict-duplicate
[05:31:29] [PASSED] conflict-not-disjoint
[05:31:29] [PASSED] conflict-reg-type
[05:31:29] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:31:29] ================== xe_rtp_process_tests ===================
[05:31:29] [PASSED] active1
[05:31:29] [PASSED] active2
[05:31:29] [PASSED] active-inactive
[05:31:29] [PASSED] inactive-active
[05:31:29] [PASSED] inactive-1st_or_active-inactive
[05:31:29] [PASSED] inactive-2nd_or_active-inactive
[05:31:29] [PASSED] inactive-last_or_active-inactive
[05:31:29] [PASSED] inactive-no_or_active-inactive
[05:31:29] ============== [PASSED] xe_rtp_process_tests ===============
[05:31:29] ===================== [PASSED] xe_rtp ======================
[05:31:29] ==================== xe_wa (1 subtest) =====================
[05:31:29] ======================== xe_wa_gt =========================
[05:31:29] [PASSED] TIGERLAKE B0
[05:31:29] [PASSED] DG1 A0
[05:31:29] [PASSED] DG1 B0
[05:31:29] [PASSED] ALDERLAKE_S A0
[05:31:29] [PASSED] ALDERLAKE_S B0
[05:31:29] [PASSED] ALDERLAKE_S C0
[05:31:29] [PASSED] ALDERLAKE_S D0
[05:31:29] [PASSED] ALDERLAKE_P A0
[05:31:29] [PASSED] ALDERLAKE_P B0
[05:31:29] [PASSED] ALDERLAKE_P C0
[05:31:29] [PASSED] ALDERLAKE_S RPLS D0
[05:31:29] [PASSED] ALDERLAKE_P RPLU E0
[05:31:29] [PASSED] DG2 G10 C0
[05:31:29] [PASSED] DG2 G11 B1
[05:31:29] [PASSED] DG2 G12 A1
[05:31:29] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:31:29] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:31:29] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:31:29] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:31:29] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:31:29] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:31:29] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:31:29] ==================== [PASSED] xe_wa_gt =====================
[05:31:29] ====================== [PASSED] xe_wa ======================
[05:31:29] ============================================================
[05:31:29] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[05:31:30] Elapsed time: 37.624s total, 4.773s configuring, 32.185s building, 0.628s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:31:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:31:31] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:31:56] Starting KUnit Kernel (1/1)...
[05:31:56] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:31:56] ============ drm_test_pick_cmdline (2 subtests) ============
[05:31:56] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:31:56] =============== drm_test_pick_cmdline_named ===============
[05:31:56] [PASSED] NTSC
[05:31:56] [PASSED] NTSC-J
[05:31:56] [PASSED] PAL
[05:31:56] [PASSED] PAL-M
[05:31:56] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:31:56] ============== [PASSED] drm_test_pick_cmdline ==============
[05:31:56] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:31:56] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:31:56] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:31:56] =========== drm_validate_clone_mode (2 subtests) ===========
[05:31:56] ============== drm_test_check_in_clone_mode ===============
[05:31:56] [PASSED] in_clone_mode
[05:31:56] [PASSED] not_in_clone_mode
[05:31:56] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:31:56] =============== drm_test_check_valid_clones ===============
[05:31:56] [PASSED] not_in_clone_mode
[05:31:56] [PASSED] valid_clone
[05:31:56] [PASSED] invalid_clone
[05:31:56] =========== [PASSED] drm_test_check_valid_clones ===========
[05:31:56] ============= [PASSED] drm_validate_clone_mode =============
[05:31:56] ============= drm_validate_modeset (1 subtest) =============
[05:31:56] [PASSED] drm_test_check_connector_changed_modeset
[05:31:56] ============== [PASSED] drm_validate_modeset ===============
[05:31:56] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:31:56] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:31:56] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:31:56] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:31:56] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:31:56] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:31:56] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:31:56] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:31:56] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:31:56] ============== drm_bridge_alloc (2 subtests) ===============
[05:31:56] [PASSED] drm_test_drm_bridge_alloc_basic
[05:31:56] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:31:56] ================ [PASSED] drm_bridge_alloc =================
[05:31:56] ============= drm_cmdline_parser (40 subtests) =============
[05:31:56] [PASSED] drm_test_cmdline_force_d_only
[05:31:56] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:31:56] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:31:56] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:31:56] [PASSED] drm_test_cmdline_force_e_only
[05:31:56] [PASSED] drm_test_cmdline_res
[05:31:56] [PASSED] drm_test_cmdline_res_vesa
[05:31:56] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:31:56] [PASSED] drm_test_cmdline_res_rblank
[05:31:56] [PASSED] drm_test_cmdline_res_bpp
[05:31:56] [PASSED] drm_test_cmdline_res_refresh
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:31:56] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:31:56] [PASSED] drm_test_cmdline_res_margins_force_on
[05:31:56] [PASSED] drm_test_cmdline_res_vesa_margins
[05:31:56] [PASSED] drm_test_cmdline_name
[05:31:56] [PASSED] drm_test_cmdline_name_bpp
[05:31:56] [PASSED] drm_test_cmdline_name_option
[05:31:56] [PASSED] drm_test_cmdline_name_bpp_option
[05:31:56] [PASSED] drm_test_cmdline_rotate_0
[05:31:56] [PASSED] drm_test_cmdline_rotate_90
[05:31:56] [PASSED] drm_test_cmdline_rotate_180
[05:31:56] [PASSED] drm_test_cmdline_rotate_270
[05:31:56] [PASSED] drm_test_cmdline_hmirror
[05:31:56] [PASSED] drm_test_cmdline_vmirror
[05:31:56] [PASSED] drm_test_cmdline_margin_options
[05:31:56] [PASSED] drm_test_cmdline_multiple_options
[05:31:56] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:31:56] [PASSED] drm_test_cmdline_extra_and_option
[05:31:56] [PASSED] drm_test_cmdline_freestanding_options
[05:31:56] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:31:56] [PASSED] drm_test_cmdline_panel_orientation
[05:31:56] ================ drm_test_cmdline_invalid =================
[05:31:56] [PASSED] margin_only
[05:31:56] [PASSED] interlace_only
[05:31:56] [PASSED] res_missing_x
[05:31:56] [PASSED] res_missing_y
[05:31:56] [PASSED] res_bad_y
[05:31:56] [PASSED] res_missing_y_bpp
[05:31:56] [PASSED] res_bad_bpp
[05:31:56] [PASSED] res_bad_refresh
[05:31:56] [PASSED] res_bpp_refresh_force_on_off
[05:31:56] [PASSED] res_invalid_mode
[05:31:56] [PASSED] res_bpp_wrong_place_mode
[05:31:56] [PASSED] name_bpp_refresh
[05:31:56] [PASSED] name_refresh
[05:31:56] [PASSED] name_refresh_wrong_mode
[05:31:56] [PASSED] name_refresh_invalid_mode
[05:31:56] [PASSED] rotate_multiple
[05:31:56] [PASSED] rotate_invalid_val
[05:31:56] [PASSED] rotate_truncated
[05:31:56] [PASSED] invalid_option
[05:31:56] [PASSED] invalid_tv_option
[05:31:56] [PASSED] truncated_tv_option
[05:31:56] ============ [PASSED] drm_test_cmdline_invalid =============
[05:31:56] =============== drm_test_cmdline_tv_options ===============
[05:31:56] [PASSED] NTSC
[05:31:56] [PASSED] NTSC_443
[05:31:56] [PASSED] NTSC_J
[05:31:56] [PASSED] PAL
[05:31:56] [PASSED] PAL_M
[05:31:56] [PASSED] PAL_N
[05:31:56] [PASSED] SECAM
[05:31:56] [PASSED] MONO_525
[05:31:56] [PASSED] MONO_625
[05:31:56] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:31:56] =============== [PASSED] drm_cmdline_parser ================
[05:31:56] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:31:56] [PASSED] drm_test_connector_hdmi_init_valid
[05:31:56] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:31:56] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:31:56] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:31:56] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:31:56] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:31:56] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:31:56] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:31:56] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:31:56] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:31:56] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:31:56] [PASSED] supported_formats=0x5 yuv420_allowed=1
[05:31:56] [PASSED] supported_formats=0x5 yuv420_allowed=0
[05:31:56] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:31:56] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:31:56] [PASSED] drm_test_connector_hdmi_init_null_product
[05:31:56] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:31:56] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:31:56] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:31:56] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:31:56] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:31:56] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:31:56] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:31:56] ========= drm_test_connector_hdmi_init_type_valid =========
[05:31:56] [PASSED] HDMI-A
[05:31:56] [PASSED] HDMI-B
[05:31:56] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:31:56] ======== drm_test_connector_hdmi_init_type_invalid ========
[05:31:56] [PASSED] Unknown
[05:31:56] [PASSED] VGA
[05:31:56] [PASSED] DVI-I
[05:31:56] [PASSED] DVI-D
[05:31:56] [PASSED] DVI-A
[05:31:56] [PASSED] Composite
[05:31:56] [PASSED] SVIDEO
[05:31:56] [PASSED] LVDS
[05:31:56] [PASSED] Component
[05:31:56] [PASSED] DIN
[05:31:56] [PASSED] DP
[05:31:56] [PASSED] TV
[05:31:56] [PASSED] eDP
[05:31:56] [PASSED] Virtual
[05:31:56] [PASSED] DSI
[05:31:56] [PASSED] DPI
[05:31:56] [PASSED] Writeback
[05:31:56] [PASSED] SPI
[05:31:56] [PASSED] USB
[05:31:56] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:31:56] ============ [PASSED] drmm_connector_hdmi_init =============
[05:31:56] ============= drmm_connector_init (3 subtests) =============
[05:31:56] [PASSED] drm_test_drmm_connector_init
[05:31:56] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:31:56] ========= drm_test_drmm_connector_init_type_valid =========
[05:31:56] [PASSED] Unknown
[05:31:56] [PASSED] VGA
[05:31:56] [PASSED] DVI-I
[05:31:56] [PASSED] DVI-D
[05:31:56] [PASSED] DVI-A
[05:31:56] [PASSED] Composite
[05:31:56] [PASSED] SVIDEO
[05:31:56] [PASSED] LVDS
[05:31:56] [PASSED] Component
[05:31:56] [PASSED] DIN
[05:31:56] [PASSED] DP
[05:31:56] [PASSED] HDMI-A
[05:31:56] [PASSED] HDMI-B
[05:31:56] [PASSED] TV
[05:31:56] [PASSED] eDP
[05:31:56] [PASSED] Virtual
[05:31:56] [PASSED] DSI
[05:31:56] [PASSED] DPI
[05:31:56] [PASSED] Writeback
[05:31:56] [PASSED] SPI
[05:31:56] [PASSED] USB
[05:31:56] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:31:56] =============== [PASSED] drmm_connector_init ===============
[05:31:56] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_init
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:31:56] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[05:31:56] [PASSED] Unknown
[05:31:56] [PASSED] VGA
[05:31:56] [PASSED] DVI-I
[05:31:56] [PASSED] DVI-D
[05:31:56] [PASSED] DVI-A
[05:31:56] [PASSED] Composite
[05:31:56] [PASSED] SVIDEO
[05:31:56] [PASSED] LVDS
[05:31:56] [PASSED] Component
[05:31:56] [PASSED] DIN
[05:31:56] [PASSED] DP
[05:31:56] [PASSED] HDMI-A
[05:31:56] [PASSED] HDMI-B
[05:31:56] [PASSED] TV
[05:31:56] [PASSED] eDP
[05:31:56] [PASSED] Virtual
[05:31:56] [PASSED] DSI
[05:31:56] [PASSED] DPI
[05:31:56] [PASSED] Writeback
[05:31:56] [PASSED] SPI
[05:31:56] [PASSED] USB
[05:31:56] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:31:56] ======== drm_test_drm_connector_dynamic_init_name =========
[05:31:56] [PASSED] Unknown
[05:31:56] [PASSED] VGA
[05:31:56] [PASSED] DVI-I
[05:31:56] [PASSED] DVI-D
[05:31:56] [PASSED] DVI-A
[05:31:56] [PASSED] Composite
[05:31:56] [PASSED] SVIDEO
[05:31:56] [PASSED] LVDS
[05:31:56] [PASSED] Component
[05:31:56] [PASSED] DIN
[05:31:56] [PASSED] DP
[05:31:56] [PASSED] HDMI-A
[05:31:56] [PASSED] HDMI-B
[05:31:56] [PASSED] TV
[05:31:56] [PASSED] eDP
[05:31:56] [PASSED] Virtual
[05:31:56] [PASSED] DSI
[05:31:56] [PASSED] DPI
[05:31:56] [PASSED] Writeback
[05:31:56] [PASSED] SPI
[05:31:56] [PASSED] USB
[05:31:56] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:31:56] =========== [PASSED] drm_connector_dynamic_init ============
[05:31:56] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:31:56] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:31:56] ======= drm_connector_dynamic_register (7 subtests) ========
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:31:56] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:31:56] ========= [PASSED] drm_connector_dynamic_register ==========
[05:31:56] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:31:56] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:31:56] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:31:56] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:31:56] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:31:56] ========== drm_test_get_tv_mode_from_name_valid ===========
[05:31:56] [PASSED] NTSC
[05:31:56] [PASSED] NTSC-443
[05:31:56] [PASSED] NTSC-J
[05:31:56] [PASSED] PAL
[05:31:56] [PASSED] PAL-M
[05:31:56] [PASSED] PAL-N
[05:31:56] [PASSED] SECAM
[05:31:56] [PASSED] Mono
[05:31:56] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:31:56] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:31:56] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:31:56] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:31:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:31:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:31:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:31:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:31:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:31:56] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:31:56] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[05:31:56] [PASSED] VIC 96
[05:31:56] [PASSED] VIC 97
[05:31:56] [PASSED] VIC 101
[05:31:56] [PASSED] VIC 102
[05:31:56] [PASSED] VIC 106
[05:31:56] [PASSED] VIC 107
[05:31:56] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:31:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:31:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:31:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:31:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:31:56] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:31:56] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:31:56] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:31:56] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[05:31:56] [PASSED] Automatic
[05:31:56] [PASSED] Full
[05:31:56] [PASSED] Limited 16:235
[05:31:56] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:31:56] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:31:56] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:31:56] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:31:56] === drm_test_drm_hdmi_connector_get_output_format_name ====
[05:31:56] [PASSED] RGB
[05:31:56] [PASSED] YUV 4:2:0
[05:31:56] [PASSED] YUV 4:2:2
[05:31:56] [PASSED] YUV 4:4:4
[05:31:56] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:31:56] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:31:56] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:31:56] ============= drm_damage_helper (21 subtests) ==============
[05:31:56] [PASSED] drm_test_damage_iter_no_damage
[05:31:56] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:31:56] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:31:56] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:31:56] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:31:56] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:31:56] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:31:56] [PASSED] drm_test_damage_iter_simple_damage
[05:31:56] [PASSED] drm_test_damage_iter_single_damage
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:31:56] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:31:56] [PASSED] drm_test_damage_iter_damage
[05:31:56] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:31:56] [PASSED] drm_test_damage_iter_damage_one_outside
[05:31:56] [PASSED] drm_test_damage_iter_damage_src_moved
[05:31:56] [PASSED] drm_test_damage_iter_damage_not_visible
[05:31:56] ================ [PASSED] drm_damage_helper ================
[05:31:56] ============== drm_dp_mst_helper (3 subtests) ==============
[05:31:56] ============== drm_test_dp_mst_calc_pbn_mode ==============
[05:31:56] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:31:56] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:31:56] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:31:56] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:31:56] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:31:56] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:31:56] ============== drm_test_dp_mst_calc_pbn_div ===============
[05:31:56] [PASSED] Link rate 2000000 lane count 4
[05:31:56] [PASSED] Link rate 2000000 lane count 2
[05:31:56] [PASSED] Link rate 2000000 lane count 1
[05:31:56] [PASSED] Link rate 1350000 lane count 4
[05:31:56] [PASSED] Link rate 1350000 lane count 2
[05:31:56] [PASSED] Link rate 1350000 lane count 1
[05:31:56] [PASSED] Link rate 1000000 lane count 4
[05:31:56] [PASSED] Link rate 1000000 lane count 2
[05:31:56] [PASSED] Link rate 1000000 lane count 1
[05:31:56] [PASSED] Link rate 810000 lane count 4
[05:31:56] [PASSED] Link rate 810000 lane count 2
[05:31:56] [PASSED] Link rate 810000 lane count 1
[05:31:56] [PASSED] Link rate 540000 lane count 4
[05:31:56] [PASSED] Link rate 540000 lane count 2
[05:31:56] [PASSED] Link rate 540000 lane count 1
[05:31:56] [PASSED] Link rate 270000 lane count 4
[05:31:56] [PASSED] Link rate 270000 lane count 2
[05:31:56] [PASSED] Link rate 270000 lane count 1
[05:31:56] [PASSED] Link rate 162000 lane count 4
[05:31:56] [PASSED] Link rate 162000 lane count 2
[05:31:56] [PASSED] Link rate 162000 lane count 1
[05:31:56] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:31:56] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[05:31:56] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:31:56] [PASSED] DP_POWER_UP_PHY with port number
[05:31:56] [PASSED] DP_POWER_DOWN_PHY with port number
[05:31:56] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:31:56] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:31:56] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:31:56] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:31:56] [PASSED] DP_QUERY_PAYLOAD with port number
[05:31:56] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:31:56] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:31:56] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:31:56] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:31:56] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:31:56] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:31:56] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:31:56] [PASSED] DP_REMOTE_I2C_READ with port number
[05:31:56] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:31:56] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:31:56] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:31:56] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:31:56] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:31:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:31:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:31:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:31:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:31:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:31:56] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:31:56] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:31:56] ================ [PASSED] drm_dp_mst_helper ================
[05:31:56] ================== drm_exec (7 subtests) ===================
[05:31:56] [PASSED] sanitycheck
[05:31:56] [PASSED] test_lock
[05:31:56] [PASSED] test_lock_unlock
[05:31:56] [PASSED] test_duplicates
[05:31:56] [PASSED] test_prepare
[05:31:56] [PASSED] test_prepare_array
[05:31:56] [PASSED] test_multiple_loops
[05:31:56] ==================== [PASSED] drm_exec =====================
[05:31:56] =========== drm_format_helper_test (17 subtests) ===========
[05:31:56] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:31:56] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:31:56] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:31:56] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:31:56] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:31:56] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:31:56] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:31:56] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:31:56] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:31:56] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:31:56] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:31:56] ============== drm_test_fb_xrgb8888_to_mono ===============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:31:56] ==================== drm_test_fb_swab =====================
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ================ [PASSED] drm_test_fb_swab =================
[05:31:56] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:31:56] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[05:31:56] [PASSED] single_pixel_source_buffer
[05:31:56] [PASSED] single_pixel_clip_rectangle
[05:31:56] [PASSED] well_known_colors
[05:31:56] [PASSED] destination_pitch
[05:31:56] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:31:56] ================= drm_test_fb_clip_offset =================
[05:31:56] [PASSED] pass through
[05:31:56] [PASSED] horizontal offset
[05:31:56] [PASSED] vertical offset
[05:31:56] [PASSED] horizontal and vertical offset
[05:31:56] [PASSED] horizontal offset (custom pitch)
[05:31:56] [PASSED] vertical offset (custom pitch)
[05:31:56] [PASSED] horizontal and vertical offset (custom pitch)
[05:31:56] ============= [PASSED] drm_test_fb_clip_offset =============
[05:31:56] =================== drm_test_fb_memcpy ====================
[05:31:56] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:31:56] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:31:56] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:31:56] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:31:56] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:31:56] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:31:56] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:31:56] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:31:56] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:31:56] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:31:56] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:31:56] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:31:56] =============== [PASSED] drm_test_fb_memcpy ================
[05:31:56] ============= [PASSED] drm_format_helper_test ==============
[05:31:56] ================= drm_format (18 subtests) =================
[05:31:56] [PASSED] drm_test_format_block_width_invalid
[05:31:56] [PASSED] drm_test_format_block_width_one_plane
[05:31:56] [PASSED] drm_test_format_block_width_two_plane
[05:31:56] [PASSED] drm_test_format_block_width_three_plane
[05:31:56] [PASSED] drm_test_format_block_width_tiled
[05:31:56] [PASSED] drm_test_format_block_height_invalid
[05:31:56] [PASSED] drm_test_format_block_height_one_plane
[05:31:56] [PASSED] drm_test_format_block_height_two_plane
[05:31:56] [PASSED] drm_test_format_block_height_three_plane
[05:31:56] [PASSED] drm_test_format_block_height_tiled
[05:31:56] [PASSED] drm_test_format_min_pitch_invalid
[05:31:56] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:31:56] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:31:56] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:31:56] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:31:56] [PASSED] drm_test_format_min_pitch_two_plane
[05:31:56] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:31:56] [PASSED] drm_test_format_min_pitch_tiled
[05:31:56] =================== [PASSED] drm_format ====================
[05:31:56] ============== drm_framebuffer (10 subtests) ===============
[05:31:56] ========== drm_test_framebuffer_check_src_coords ==========
[05:31:56] [PASSED] Success: source fits into fb
[05:31:56] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:31:56] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:31:56] [PASSED] Fail: overflowing fb with source width
[05:31:56] [PASSED] Fail: overflowing fb with source height
[05:31:56] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:31:56] [PASSED] drm_test_framebuffer_cleanup
[05:31:56] =============== drm_test_framebuffer_create ===============
[05:31:56] [PASSED] ABGR8888 normal sizes
[05:31:56] [PASSED] ABGR8888 max sizes
[05:31:56] [PASSED] ABGR8888 pitch greater than min required
[05:31:56] [PASSED] ABGR8888 pitch less than min required
[05:31:56] [PASSED] ABGR8888 Invalid width
[05:31:56] [PASSED] ABGR8888 Invalid buffer handle
[05:31:56] [PASSED] No pixel format
[05:31:56] [PASSED] ABGR8888 Width 0
[05:31:56] [PASSED] ABGR8888 Height 0
[05:31:56] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:31:56] [PASSED] ABGR8888 Large buffer offset
[05:31:56] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:31:56] [PASSED] ABGR8888 Invalid flag
[05:31:56] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:31:56] [PASSED] ABGR8888 Valid buffer modifier
[05:31:56] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:31:56] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] NV12 Normal sizes
[05:31:56] [PASSED] NV12 Max sizes
[05:31:56] [PASSED] NV12 Invalid pitch
[05:31:56] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:31:56] [PASSED] NV12 different modifier per-plane
[05:31:56] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:31:56] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] NV12 Modifier for inexistent plane
[05:31:56] [PASSED] NV12 Handle for inexistent plane
[05:31:56] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:31:56] [PASSED] YVU420 Normal sizes
[05:31:56] [PASSED] YVU420 Max sizes
[05:31:56] [PASSED] YVU420 Invalid pitch
[05:31:56] [PASSED] YVU420 Different pitches
[05:31:56] [PASSED] YVU420 Different buffer offsets/pitches
[05:31:56] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:31:56] [PASSED] YVU420 Valid modifier
[05:31:56] [PASSED] YVU420 Different modifiers per plane
[05:31:56] [PASSED] YVU420 Modifier for inexistent plane
[05:31:56] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:31:56] [PASSED] X0L2 Normal sizes
[05:31:56] [PASSED] X0L2 Max sizes
[05:31:56] [PASSED] X0L2 Invalid pitch
[05:31:56] [PASSED] X0L2 Pitch greater than minimum required
[05:31:56] [PASSED] X0L2 Handle for inexistent plane
[05:31:56] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:31:56] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:31:56] [PASSED] X0L2 Valid modifier
[05:31:56] [PASSED] X0L2 Modifier for inexistent plane
[05:31:56] =========== [PASSED] drm_test_framebuffer_create ===========
[05:31:56] [PASSED] drm_test_framebuffer_free
[05:31:56] [PASSED] drm_test_framebuffer_init
[05:31:56] [PASSED] drm_test_framebuffer_init_bad_format
[05:31:56] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:31:56] [PASSED] drm_test_framebuffer_lookup
[05:31:56] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:31:56] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:31:56] ================= [PASSED] drm_framebuffer =================
[05:31:56] ================ drm_gem_shmem (8 subtests) ================
[05:31:56] [PASSED] drm_gem_shmem_test_obj_create
[05:31:56] [PASSED] drm_gem_shmem_test_obj_create_private
[05:31:56] [PASSED] drm_gem_shmem_test_pin_pages
[05:31:56] [PASSED] drm_gem_shmem_test_vmap
[05:31:56] [PASSED] drm_gem_shmem_test_get_sg_table
[05:31:56] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:31:56] [PASSED] drm_gem_shmem_test_madvise
[05:31:56] [PASSED] drm_gem_shmem_test_purge
[05:31:56] ================== [PASSED] drm_gem_shmem ==================
[05:31:56] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:31:56] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[05:31:56] [PASSED] Automatic
[05:31:56] [PASSED] Full
[05:31:56] [PASSED] Limited 16:235
[05:31:56] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:31:56] [PASSED] drm_test_check_disable_connector
[05:31:56] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:31:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:31:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:31:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:31:56] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:31:56] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:31:56] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:31:56] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:31:56] [PASSED] drm_test_check_output_bpc_dvi
[05:31:56] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:31:56] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:31:56] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:31:56] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:31:56] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:31:56] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:31:56] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:31:56] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:31:56] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:31:56] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:31:56] [PASSED] drm_test_check_broadcast_rgb_value
[05:31:56] [PASSED] drm_test_check_bpc_8_value
[05:31:56] [PASSED] drm_test_check_bpc_10_value
[05:31:56] [PASSED] drm_test_check_bpc_12_value
[05:31:56] [PASSED] drm_test_check_format_value
[05:31:56] [PASSED] drm_test_check_tmds_char_value
[05:31:56] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:31:56] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[05:31:56] [PASSED] drm_test_check_mode_valid
[05:31:56] [PASSED] drm_test_check_mode_valid_reject
[05:31:56] [PASSED] drm_test_check_mode_valid_reject_rate
[05:31:56] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:31:56] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:31:56] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[05:31:56] [PASSED] drm_test_check_infoframes
[05:31:56] [PASSED] drm_test_check_reject_avi_infoframe
[05:31:56] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[05:31:56] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[05:31:56] [PASSED] drm_test_check_reject_audio_infoframe
[05:31:56] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[05:31:56] ================= drm_managed (2 subtests) =================
[05:31:56] [PASSED] drm_test_managed_release_action
[05:31:56] [PASSED] drm_test_managed_run_action
[05:31:56] =================== [PASSED] drm_managed ===================
[05:31:56] =================== drm_mm (6 subtests) ====================
[05:31:56] [PASSED] drm_test_mm_init
[05:31:56] [PASSED] drm_test_mm_debug
[05:31:56] [PASSED] drm_test_mm_align32
[05:31:56] [PASSED] drm_test_mm_align64
[05:31:56] [PASSED] drm_test_mm_lowest
[05:31:56] [PASSED] drm_test_mm_highest
[05:31:56] ===================== [PASSED] drm_mm ======================
[05:31:56] ============= drm_modes_analog_tv (5 subtests) =============
[05:31:56] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:31:56] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:31:56] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:31:56] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:31:56] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:31:56] =============== [PASSED] drm_modes_analog_tv ===============
[05:31:56] ============== drm_plane_helper (2 subtests) ===============
[05:31:56] =============== drm_test_check_plane_state ================
[05:31:56] [PASSED] clipping_simple
[05:31:56] [PASSED] clipping_rotate_reflect
[05:31:56] [PASSED] positioning_simple
[05:31:56] [PASSED] upscaling
[05:31:56] [PASSED] downscaling
[05:31:56] [PASSED] rounding1
[05:31:56] [PASSED] rounding2
[05:31:56] [PASSED] rounding3
[05:31:56] [PASSED] rounding4
[05:31:56] =========== [PASSED] drm_test_check_plane_state ============
[05:31:56] =========== drm_test_check_invalid_plane_state ============
[05:31:56] [PASSED] positioning_invalid
[05:31:56] [PASSED] upscaling_invalid
[05:31:56] [PASSED] downscaling_invalid
[05:31:56] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:31:56] ================ [PASSED] drm_plane_helper =================
[05:31:56] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:31:56] ====== drm_test_connector_helper_tv_get_modes_check =======
[05:31:56] [PASSED] None
[05:31:56] [PASSED] PAL
[05:31:56] [PASSED] NTSC
[05:31:56] [PASSED] Both, NTSC Default
[05:31:56] [PASSED] Both, PAL Default
[05:31:56] [PASSED] Both, NTSC Default, with PAL on command-line
[05:31:56] [PASSED] Both, PAL Default, with NTSC on command-line
[05:31:56] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:31:56] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:31:56] ================== drm_rect (9 subtests) ===================
[05:31:56] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:31:56] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:31:56] [PASSED] drm_test_rect_clip_scaled_clipped
[05:31:56] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:31:56] ================= drm_test_rect_intersect =================
[05:31:56] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:31:56] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:31:56] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:31:56] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:31:56] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:31:56] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:31:56] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:31:56] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:31:56] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:31:56] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:31:56] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:31:56] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:31:56] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:31:56] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:31:56] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:31:56] ============= [PASSED] drm_test_rect_intersect =============
[05:31:56] ================ drm_test_rect_calc_hscale ================
[05:31:56] [PASSED] normal use
[05:31:56] [PASSED] out of max range
[05:31:56] [PASSED] out of min range
[05:31:56] [PASSED] zero dst
[05:31:56] [PASSED] negative src
[05:31:56] [PASSED] negative dst
[05:31:56] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:31:56] ================ drm_test_rect_calc_vscale ================
[05:31:56] [PASSED] normal use
[05:31:56] [PASSED] out of max range
[05:31:56] [PASSED] out of min range
[05:31:56] [PASSED] zero dst
[05:31:56] [PASSED] negative src
[05:31:56] [PASSED] negative dst
[05:31:56] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:31:56] ================== drm_test_rect_rotate ===================
[05:31:56] [PASSED] reflect-x
[05:31:56] [PASSED] reflect-y
[05:31:56] [PASSED] rotate-0
[05:31:56] [PASSED] rotate-90
[05:31:56] [PASSED] rotate-180
[05:31:56] [PASSED] rotate-270
[05:31:56] ============== [PASSED] drm_test_rect_rotate ===============
[05:31:56] ================ drm_test_rect_rotate_inv =================
[05:31:56] [PASSED] reflect-x
[05:31:56] [PASSED] reflect-y
[05:31:56] [PASSED] rotate-0
[05:31:56] [PASSED] rotate-90
[05:31:56] [PASSED] rotate-180
[05:31:56] [PASSED] rotate-270
[05:31:56] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:31:56] ==================== [PASSED] drm_rect =====================
[05:31:56] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:31:56] ============ drm_test_sysfb_build_fourcc_list =============
[05:31:56] [PASSED] no native formats
[05:31:56] [PASSED] XRGB8888 as native format
[05:31:56] [PASSED] remove duplicates
[05:31:56] [PASSED] convert alpha formats
[05:31:56] [PASSED] random formats
[05:31:56] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:31:56] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:31:56] ================== drm_fixp (2 subtests) ===================
[05:31:56] [PASSED] drm_test_int2fixp
[05:31:56] [PASSED] drm_test_sm2fixp
[05:31:56] ==================== [PASSED] drm_fixp =====================
[05:31:56] ============================================================
[05:31:56] Testing complete. Ran 621 tests: passed: 621
[05:31:56] Elapsed time: 26.369s total, 1.745s configuring, 24.493s building, 0.130s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:31:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:31:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:32:07] Starting KUnit Kernel (1/1)...
[05:32:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:32:08] ================= ttm_device (5 subtests) ==================
[05:32:08] [PASSED] ttm_device_init_basic
[05:32:08] [PASSED] ttm_device_init_multiple
[05:32:08] [PASSED] ttm_device_fini_basic
[05:32:08] [PASSED] ttm_device_init_no_vma_man
[05:32:08] ================== ttm_device_init_pools ==================
[05:32:08] [PASSED] No DMA allocations, no DMA32 required
[05:32:08] [PASSED] DMA allocations, DMA32 required
[05:32:08] [PASSED] No DMA allocations, DMA32 required
[05:32:08] [PASSED] DMA allocations, no DMA32 required
[05:32:08] ============== [PASSED] ttm_device_init_pools ==============
[05:32:08] =================== [PASSED] ttm_device ====================
[05:32:08] ================== ttm_pool (8 subtests) ===================
[05:32:08] ================== ttm_pool_alloc_basic ===================
[05:32:08] [PASSED] One page
[05:32:08] [PASSED] More than one page
[05:32:08] [PASSED] Above the allocation limit
[05:32:08] [PASSED] One page, with coherent DMA mappings enabled
[05:32:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:32:08] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:32:08] ============== ttm_pool_alloc_basic_dma_addr ==============
[05:32:08] [PASSED] One page
[05:32:08] [PASSED] More than one page
[05:32:08] [PASSED] Above the allocation limit
[05:32:08] [PASSED] One page, with coherent DMA mappings enabled
[05:32:08] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:32:08] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:32:08] [PASSED] ttm_pool_alloc_order_caching_match
[05:32:08] [PASSED] ttm_pool_alloc_caching_mismatch
[05:32:08] [PASSED] ttm_pool_alloc_order_mismatch
[05:32:08] [PASSED] ttm_pool_free_dma_alloc
[05:32:08] [PASSED] ttm_pool_free_no_dma_alloc
[05:32:08] [PASSED] ttm_pool_fini_basic
[05:32:08] ==================== [PASSED] ttm_pool =====================
[05:32:08] ================ ttm_resource (8 subtests) =================
[05:32:08] ================= ttm_resource_init_basic =================
[05:32:08] [PASSED] Init resource in TTM_PL_SYSTEM
[05:32:08] [PASSED] Init resource in TTM_PL_VRAM
[05:32:08] [PASSED] Init resource in a private placement
[05:32:08] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:32:08] ============= [PASSED] ttm_resource_init_basic =============
[05:32:08] [PASSED] ttm_resource_init_pinned
[05:32:08] [PASSED] ttm_resource_fini_basic
[05:32:08] [PASSED] ttm_resource_manager_init_basic
[05:32:08] [PASSED] ttm_resource_manager_usage_basic
[05:32:08] [PASSED] ttm_resource_manager_set_used_basic
[05:32:08] [PASSED] ttm_sys_man_alloc_basic
[05:32:08] [PASSED] ttm_sys_man_free_basic
[05:32:08] ================== [PASSED] ttm_resource ===================
[05:32:08] =================== ttm_tt (15 subtests) ===================
[05:32:08] ==================== ttm_tt_init_basic ====================
[05:32:08] [PASSED] Page-aligned size
[05:32:08] [PASSED] Extra pages requested
[05:32:08] ================ [PASSED] ttm_tt_init_basic ================
[05:32:08] [PASSED] ttm_tt_init_misaligned
[05:32:08] [PASSED] ttm_tt_fini_basic
[05:32:08] [PASSED] ttm_tt_fini_sg
[05:32:08] [PASSED] ttm_tt_fini_shmem
[05:32:08] [PASSED] ttm_tt_create_basic
[05:32:08] [PASSED] ttm_tt_create_invalid_bo_type
[05:32:08] [PASSED] ttm_tt_create_ttm_exists
[05:32:08] [PASSED] ttm_tt_create_failed
[05:32:08] [PASSED] ttm_tt_destroy_basic
[05:32:08] [PASSED] ttm_tt_populate_null_ttm
[05:32:08] [PASSED] ttm_tt_populate_populated_ttm
[05:32:08] [PASSED] ttm_tt_unpopulate_basic
[05:32:08] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:32:08] [PASSED] ttm_tt_swapin_basic
[05:32:08] ===================== [PASSED] ttm_tt ======================
[05:32:08] =================== ttm_bo (14 subtests) ===================
[05:32:08] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[05:32:08] [PASSED] Cannot be interrupted and sleeps
[05:32:08] [PASSED] Cannot be interrupted, locks straight away
[05:32:08] [PASSED] Can be interrupted, sleeps
[05:32:08] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:32:08] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:32:08] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:32:08] [PASSED] ttm_bo_reserve_double_resv
[05:32:08] [PASSED] ttm_bo_reserve_interrupted
[05:32:08] [PASSED] ttm_bo_reserve_deadlock
[05:32:08] [PASSED] ttm_bo_unreserve_basic
[05:32:08] [PASSED] ttm_bo_unreserve_pinned
[05:32:08] [PASSED] ttm_bo_unreserve_bulk
[05:32:08] [PASSED] ttm_bo_fini_basic
[05:32:08] [PASSED] ttm_bo_fini_shared_resv
[05:32:08] [PASSED] ttm_bo_pin_basic
[05:32:08] [PASSED] ttm_bo_pin_unpin_resource
[05:32:08] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:32:08] ===================== [PASSED] ttm_bo ======================
[05:32:08] ============== ttm_bo_validate (22 subtests) ===============
[05:32:08] ============== ttm_bo_init_reserved_sys_man ===============
[05:32:08] [PASSED] Buffer object for userspace
[05:32:08] [PASSED] Kernel buffer object
[05:32:08] [PASSED] Shared buffer object
[05:32:08] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:32:08] ============== ttm_bo_init_reserved_mock_man ==============
[05:32:08] [PASSED] Buffer object for userspace
[05:32:08] [PASSED] Kernel buffer object
[05:32:08] [PASSED] Shared buffer object
[05:32:08] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:32:08] [PASSED] ttm_bo_init_reserved_resv
[05:32:08] ================== ttm_bo_validate_basic ==================
[05:32:08] [PASSED] Buffer object for userspace
[05:32:08] [PASSED] Kernel buffer object
[05:32:08] [PASSED] Shared buffer object
[05:32:08] ============== [PASSED] ttm_bo_validate_basic ==============
[05:32:08] [PASSED] ttm_bo_validate_invalid_placement
[05:32:08] ============= ttm_bo_validate_same_placement ==============
[05:32:08] [PASSED] System manager
[05:32:08] [PASSED] VRAM manager
[05:32:08] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:32:08] [PASSED] ttm_bo_validate_failed_alloc
[05:32:08] [PASSED] ttm_bo_validate_pinned
[05:32:08] [PASSED] ttm_bo_validate_busy_placement
[05:32:08] ================ ttm_bo_validate_multihop =================
[05:32:08] [PASSED] Buffer object for userspace
[05:32:08] [PASSED] Kernel buffer object
[05:32:08] [PASSED] Shared buffer object
[05:32:08] ============ [PASSED] ttm_bo_validate_multihop =============
[05:32:08] ========== ttm_bo_validate_no_placement_signaled ==========
[05:32:08] [PASSED] Buffer object in system domain, no page vector
[05:32:08] [PASSED] Buffer object in system domain with an existing page vector
[05:32:08] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:32:08] ======== ttm_bo_validate_no_placement_not_signaled ========
[05:32:08] [PASSED] Buffer object for userspace
[05:32:08] [PASSED] Kernel buffer object
[05:32:08] [PASSED] Shared buffer object
[05:32:08] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:32:08] [PASSED] ttm_bo_validate_move_fence_signaled
[05:32:08] ========= ttm_bo_validate_move_fence_not_signaled =========
[05:32:08] [PASSED] Waits for GPU
[05:32:08] [PASSED] Tries to lock straight away
[05:32:08] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:32:08] [PASSED] ttm_bo_validate_swapout
[05:32:08] [PASSED] ttm_bo_validate_happy_evict
[05:32:08] [PASSED] ttm_bo_validate_all_pinned_evict
[05:32:08] [PASSED] ttm_bo_validate_allowed_only_evict
[05:32:08] [PASSED] ttm_bo_validate_deleted_evict
[05:32:08] [PASSED] ttm_bo_validate_busy_domain_evict
[05:32:08] [PASSED] ttm_bo_validate_evict_gutting
[05:32:08] [PASSED] ttm_bo_validate_recrusive_evict
[05:32:08] ================= [PASSED] ttm_bo_validate =================
[05:32:08] ============================================================
[05:32:08] Testing complete. Ran 102 tests: passed: 102
[05:32:08] Elapsed time: 11.634s total, 1.742s configuring, 9.677s building, 0.173s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 37+ messages in thread
* ✓ Xe.CI.BAT: success for Add new debug infrastructure for configfs
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (11 preceding siblings ...)
2026-05-04 5:32 ` ✓ CI.KUnit: success " Patchwork
@ 2026-05-04 6:44 ` Patchwork
2026-05-04 8:42 ` ✗ Xe.CI.FULL: failure " Patchwork
13 siblings, 0 replies; 37+ messages in thread
From: Patchwork @ 2026-05-04 6:44 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 955 bytes --]
== Series Details ==
Series: Add new debug infrastructure for configfs
URL : https://patchwork.freedesktop.org/series/165879/
State : success
== Summary ==
CI Bug Log - changes from xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c_BAT -> xe-pw-165879v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c -> xe-pw-165879v1
IGT_8881: aa5853ef5b379b1e4558218c21ef4caeae112184 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c: 9756f0821b775d39e62f2524aa3f7421f7a9e76c
xe-pw-165879v1: 165879v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/index.html
[-- Attachment #2: Type: text/html, Size: 1503 bytes --]
^ permalink raw reply [flat|nested] 37+ messages in thread
* ✗ Xe.CI.FULL: failure for Add new debug infrastructure for configfs
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
` (12 preceding siblings ...)
2026-05-04 6:44 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-05-04 8:42 ` Patchwork
13 siblings, 0 replies; 37+ messages in thread
From: Patchwork @ 2026-05-04 8:42 UTC (permalink / raw)
To: Summers, Stuart; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 38836 bytes --]
== Series Details ==
Series: Add new debug infrastructure for configfs
URL : https://patchwork.freedesktop.org/series/165879/
State : failure
== Summary ==
CI Bug Log - changes from xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c_FULL -> xe-pw-165879v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-165879v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-165879v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-165879v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_configfs@ctx-restore-post-bb:
- shard-lnl: [PASS][1] -> [FAIL][2] +2 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-lnl-3/igt@xe_configfs@ctx-restore-post-bb.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-1/igt@xe_configfs@ctx-restore-post-bb.html
* igt@xe_configfs@engines-allowed:
- shard-bmg: [PASS][3] -> [FAIL][4] +2 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-7/igt@xe_configfs@engines-allowed.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-6/igt@xe_configfs@engines-allowed.html
- shard-lnl: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_configfs@engines-allowed.html
* igt@xe_configfs@gt-types-allowed:
- shard-bmg: NOTRUN -> [FAIL][6] +1 other test fail
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_configfs@gt-types-allowed.html
* igt@xe_exec_reset@multi-queue-gt-reset:
- shard-bmg: NOTRUN -> [SKIP][7] +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_exec_reset@multi-queue-gt-reset.html
#### Warnings ####
* igt@xe_module_load@load:
- shard-bmg: ([PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [ABORT][29]) -> ([ABORT][30], [PASS][31], [SKIP][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [ABORT][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52]) ([Intel XE#2457] / [Intel XE#7405])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-7/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-2/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-4/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-10/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-10/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-10/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-2/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-8/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-8/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-4/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-9/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-9/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-6/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-5/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-5/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-7/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-7/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-6/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-6/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-1/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-1/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-3/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-3/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-2/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-6/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-6/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-10/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-10/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-3/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-1/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-1/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-4/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-4/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-4/igt@xe_module_load@load.html
Known issues
------------
Here are the changes found in xe-pw-165879v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2327]) +3 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#1407])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#7059] / [Intel XE#7085]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#1124]) +9 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#1124])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#7679]) +2 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p.html
* igt@kms_bw@linear-tiling-4-displays-target-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#367])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_bw@linear-tiling-4-displays-target-1920x1080p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#3432]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2887]) +14 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2724] / [Intel XE#7449])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2325] / [Intel XE#7358])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2252]) +7 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_content_protection@content-type-change:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#7642]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2390] / [Intel XE#6974])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@uevent:
- shard-bmg: NOTRUN -> [FAIL][67] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2320]) +4 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_cursor_crc@cursor-sliding-256x85.html
* igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size:
- shard-bmg: [PASS][70] -> [DMESG-WARN][71] ([Intel XE#5354])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-9/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-10/igt@kms_cursor_legacy@cursora-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#309] / [Intel XE#7343])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][73] ([Intel XE#4354] / [Intel XE#7386])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-bmg: NOTRUN -> [SKIP][74] ([Intel XE#2244])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#4422] / [Intel XE#7442])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-lnl: NOTRUN -> [SKIP][76] ([Intel XE#4422] / [Intel XE#7442])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: NOTRUN -> [SKIP][77] ([Intel XE#2373] / [Intel XE#7448])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#2375])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][79] -> [FAIL][80] ([Intel XE#301]) +1 other test fail
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2311]) +26 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#7061] / [Intel XE#7356]) +6 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#5812] / [Intel XE#656]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#4141]) +12 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][86] ([Intel XE#6312] / [Intel XE#651])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2313]) +30 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#1503])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#4329] / [Intel XE#6912] / [Intel XE#7375])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#7283]) +2 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#5021] / [Intel XE#7377])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_pm_backlight@fade:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#7376] / [Intel XE#870]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_pm_backlight@fade.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#1489]) +4 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-bmg: NOTRUN -> [SKIP][95] ([Intel XE#2387] / [Intel XE#7429]) +1 other test skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-pr-sprite-plane-move:
- shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#1406])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_psr@fbc-pr-sprite-plane-move.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][97] ([Intel XE#2234] / [Intel XE#2850]) +12 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#7795])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#3904] / [Intel XE#7342]) +2 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#2330] / [Intel XE#5813])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#2413])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_sharpness_filter@filter-strength:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#6503])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_sharpness_filter@filter-strength.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#2426] / [Intel XE#5848])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@flipline:
- shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#1499]) +1 other test skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_vrr@flipline.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-bmg: NOTRUN -> [SKIP][105] ([Intel XE#6599])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_eudebug@vm-bind-clear:
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#7636]) +12 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_eudebug@vm-bind-clear.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
- shard-lnl: NOTRUN -> [SKIP][107] ([Intel XE#7636])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: NOTRUN -> [INCOMPLETE][108] ([Intel XE#6321])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_evict@evict-small-multi-queue-cm:
- shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#7140]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@xe_evict@evict-small-multi-queue-cm.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#2322] / [Intel XE#7372]) +9 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#7136])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html
* igt@xe_exec_fault_mode@twice-multi-queue-imm:
- shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#7136]) +10 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_exec_fault_mode@twice-multi-queue-imm.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][113] ([Intel XE#6874]) +1 other test skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-2/igt@xe_exec_multi_queue@many-execs-preempt-mode-close-fd-smem.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem:
- shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#6874]) +29 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-dyn-priority-smem.html
* igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr:
- shard-bmg: NOTRUN -> [SKIP][115] ([Intel XE#7138]) +8 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-mixed-fd-userptr.html
* igt@xe_exec_threads@threads-multi-queue-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#7138])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_exec_threads@threads-multi-queue-userptr-invalidate-race.html
* igt@xe_live_ktest@xe_eudebug:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#2833])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch:
- shard-bmg: NOTRUN -> [SKIP][118] ([Intel XE#6964]) +1 other test skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@xe_multigpu_svm@mgpu-coherency-fail-prefetch.html
* igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
- shard-lnl: NOTRUN -> [SKIP][119] ([Intel XE#6964])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html
* igt@xe_page_reclaim@binds-null-vma:
- shard-bmg: NOTRUN -> [SKIP][120] ([Intel XE#7793]) +2 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_page_reclaim@binds-null-vma.html
* igt@xe_page_reclaim@random:
- shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#7793])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_page_reclaim@random.html
* igt@xe_pat@pat-sw-hw-compare:
- shard-bmg: NOTRUN -> [FAIL][122] ([Intel XE#7695])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_pat@pat-sw-hw-compare.html
* igt@xe_pat@xa-app-transient-media-on:
- shard-bmg: NOTRUN -> [SKIP][123] ([Intel XE#7590])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_pat@xa-app-transient-media-on.html
* igt@xe_pm@d3hot-i2c:
- shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#5742] / [Intel XE#7328] / [Intel XE#7400])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-5/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s3-multiple-execs:
- shard-lnl: NOTRUN -> [SKIP][125] ([Intel XE#584] / [Intel XE#7369])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_prefetch_fault@prefetch-fault:
- shard-bmg: NOTRUN -> [SKIP][127] ([Intel XE#7599])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@xe_prefetch_fault@prefetch-fault.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_query@multigpu-query-hwconfig:
- shard-bmg: NOTRUN -> [SKIP][129] ([Intel XE#944]) +1 other test skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-7/igt@xe_query@multigpu-query-hwconfig.html
#### Possible fixes ####
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][130] ([Intel XE#6321]) -> [PASS][131]
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-10/igt@xe_evict@evict-mixed-many-threads-small.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
#### Warnings ####
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-lnl: [ABORT][132] -> [SKIP][133] ([Intel XE#2763] / [Intel XE#6886]) +1 other test skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-lnl-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-lnl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][134] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][135] ([Intel XE#2426] / [Intel XE#5848])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6912]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6912
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7328
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7375
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
[Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
[Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7795]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7795
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c -> xe-pw-165879v1
IGT_8881: aa5853ef5b379b1e4558218c21ef4caeae112184 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4969-9756f0821b775d39e62f2524aa3f7421f7a9e76c: 9756f0821b775d39e62f2524aa3f7421f7a9e76c
xe-pw-165879v1: 165879v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165879v1/index.html
[-- Attachment #2: Type: text/html, Size: 42372 bytes --]
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 3/9] drm/xe: Split out configfs data structures
2026-05-04 4:43 ` [PATCH 3/9] drm/xe: Split out configfs data structures Stuart Summers
2026-05-04 4:52 ` Summers, Stuart
@ 2026-05-04 8:47 ` Jani Nikula
2026-05-04 14:24 ` Summers, Stuart
1 sibling, 1 reply; 37+ messages in thread
From: Jani Nikula @ 2026-05-04 8:47 UTC (permalink / raw)
To: Stuart Summers
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
On Mon, 04 May 2026, Stuart Summers <stuart.summers@intel.com> wrote:
> Split the configfs data structures into their own _types.h file.
Why? The commit message must always answer the question, "why".
The obvious downside here is that you expose the types that were
previously hidden in xe_configfs.c to anyone who includes
xe_configfs_types.h. And that header depends on a ton of other headers,
making the header interdepencies worse overall.
Maybe you need that header later for something, but please spell that
out here.
BR,
Jani.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++-------------------
> drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++
> 2 files changed, 80 insertions(+), 64 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 1e134057fae8..12b7fe65446d 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -4,7 +4,6 @@
> */
>
> #include <linux/bitops.h>
> -#include <linux/ctype.h>
> #include <linux/configfs.h>
> #include <linux/cleanup.h>
> #include <linux/find.h>
> @@ -15,12 +14,10 @@
>
> #include "instructions/xe_mi_commands.h"
> #include "xe_configfs.h"
> +#include "xe_configfs_types.h"
> #include "xe_defaults.h"
> #include "xe_gt_types.h"
> -#include "xe_hw_engine_types.h"
> #include "xe_module.h"
> -#include "xe_pci_types.h"
> -#include "xe_sriov_types.h"
>
> /**
> * DOC: Xe Configfs
> @@ -245,36 +242,6 @@
> * # rmdir /sys/kernel/config/xe/0000:03:00.0/
> */
>
> -/* Similar to struct xe_bb, but not tied to HW (yet) */
> -struct wa_bb {
> - u32 *cs;
> - u32 len; /* in dwords */
> -};
> -
> -struct xe_config_group_device {
> - struct config_group group;
> - struct config_group sriov;
> -
> - struct xe_config_device {
> - struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> - struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> - bool enable_psmi;
> - bool enable_survivability_mode;
> - u64 engines_allowed;
> - u64 gt_types_allowed;
> - struct {
> - bool admin_only_pf;
> - unsigned int max_vfs;
> - } sriov;
> - } config;
> -
> - /* protects attributes */
> - struct mutex lock;
> - /* matching descriptor */
> - const struct xe_device_desc *desc;
> - /* tentative SR-IOV mode */
> - enum xe_sriov_mode mode;
> -};
>
> static const struct xe_config_device device_defaults = {
> .enable_psmi = false,
> @@ -322,16 +289,6 @@ static const struct {
> { .name = "media", .type = XE_GT_TYPE_MEDIA },
> };
>
> -static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
> -{
> - return container_of(to_config_group(item), struct xe_config_group_device, group);
> -}
> -
> -static struct xe_config_device *to_xe_config_device(struct config_item *item)
> -{
> - return &to_xe_config_group_device(item)->config;
> -}
> -
> static bool is_bound(struct xe_config_group_device *dev)
> {
> unsigned int domain, bus, slot, function;
> @@ -359,7 +316,7 @@ static bool is_bound(struct xe_config_group_device *dev)
>
> static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
>
> return sprintf(page, "%d\n", dev->enable_survivability_mode);
> }
> @@ -367,7 +324,7 @@ static ssize_t enable_survivability_mode_show(struct config_item *item, char *pa
> static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
> size_t len)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
> bool enable_survivability_mode;
> int ret;
>
> @@ -386,7 +343,7 @@ static ssize_t enable_survivability_mode_store(struct config_item *item, const c
>
> static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
> char *p = page;
>
> for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
> @@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct config_item *item, char *page)
> static ssize_t gt_types_allowed_store(struct config_item *item, const char *page,
> size_t len)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
> char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
> char *p = buf;
> u64 typemask = 0;
> @@ -437,7 +394,7 @@ static ssize_t gt_types_allowed_store(struct config_item *item, const char *page
>
> static ssize_t engines_allowed_show(struct config_item *item, char *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
> char *p = page;
>
> for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> @@ -529,7 +486,7 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask,
> static ssize_t engines_allowed_store(struct config_item *item, const char *page,
> size_t len)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
> ssize_t patternlen, p;
> u64 mask, val = 0;
>
> @@ -552,14 +509,14 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
>
> static ssize_t enable_psmi_show(struct config_item *item, char *page)
> {
> - struct xe_config_device *dev = to_xe_config_device(item);
> + struct xe_config_device *dev = xe_configfs_to_device(item);
>
> return sprintf(page, "%d\n", dev->enable_psmi);
> }
>
> static ssize_t enable_psmi_store(struct config_item *item, const char *page, size_t len)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
> bool val;
> int ret;
>
> @@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct xe_config_group_device *dev,
>
> static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *page)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
>
> return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K);
> }
>
> static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
>
> return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
> }
> @@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
> static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
> const char *data, size_t sz)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
>
> return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz);
> }
> @@ -806,7 +763,7 @@ static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
> static ssize_t ctx_restore_post_bb_store(struct config_item *item,
> const char *data, size_t sz)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
>
> return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
> }
> @@ -830,7 +787,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
>
> static void xe_config_device_release(struct config_item *item)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
>
> mutex_destroy(&dev->lock);
>
> @@ -846,7 +803,7 @@ static struct configfs_item_operations xe_config_device_ops = {
> static bool xe_config_device_is_visible(struct config_item *item,
> struct configfs_attribute *attr, int n)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item);
>
> if (attr == &attr_enable_survivability_mode) {
> if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
> @@ -869,7 +826,7 @@ static const struct config_item_type xe_config_device_type = {
>
> static ssize_t sriov_max_vfs_show(struct config_item *item, char *page)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
>
> guard(mutex)(&dev->lock);
>
> @@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct config_item *item, char *page)
>
> static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, size_t len)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
> unsigned int max_vfs;
> int ret;
>
> @@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct config_item *item, const char *page, s
>
> static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *page)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
>
> guard(mutex)(&dev->lock);
>
> @@ -912,7 +869,7 @@ static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *page)
>
> static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *page, size_t len)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
> bool admin_only_pf;
> int ret;
>
> @@ -941,7 +898,7 @@ static struct configfs_attribute *xe_config_sriov_attrs[] = {
> static bool xe_config_sriov_is_visible(struct config_item *item,
> struct configfs_attribute *attr, int n)
> {
> - struct xe_config_group_device *dev = to_xe_config_group_device(item->ci_parent);
> + struct xe_config_group_device *dev = xe_configfs_to_group_device(item->ci_parent);
>
> if (attr == &sriov_attr_max_vfs && dev->mode != XE_SRIOV_MODE_PF)
> return false;
> @@ -1084,7 +1041,7 @@ static struct xe_config_group_device *find_xe_config_group_device(struct pci_dev
> if (!item)
> return NULL;
>
> - return to_xe_config_group_device(item);
> + return xe_configfs_to_group_device(item);
> }
>
> static void dump_custom_dev_config(struct pci_dev *pdev,
> diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
> new file mode 100644
> index 000000000000..935097aafa96
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> @@ -0,0 +1,59 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +#ifndef _XE_CONFIGFS_TYPES_H_
> +#define _XE_CONFIGFS_TYPES_H_
> +
> +#include <linux/configfs.h>
> +#include <linux/mutex.h>
> +#include <linux/types.h>
> +
> +#include "xe_hw_engine_types.h"
> +#include "xe_pci_types.h"
> +#include "xe_sriov_types.h"
> +
> +struct config_item;
> +
> +/* Similar to struct xe_bb, but not tied to HW (yet) */
> +struct wa_bb {
> + u32 *cs;
> + u32 len; /* in dwords */
> +};
> +
> +struct xe_config_group_device {
> + struct config_group group;
> + struct config_group sriov;
> +
> + struct xe_config_device {
> + struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> + struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> + bool enable_psmi;
> + bool enable_survivability_mode;
> + u64 engines_allowed;
> + u64 gt_types_allowed;
> + struct {
> + bool admin_only_pf;
> + unsigned int max_vfs;
> + } sriov;
> + } config;
> +
> + /* protects attributes */
> + struct mutex lock;
> + /* matching descriptor */
> + const struct xe_device_desc *desc;
> + /* tentative SR-IOV mode */
> + enum xe_sriov_mode mode;
> +};
> +
> +static inline struct xe_config_group_device *xe_configfs_to_group_device(struct config_item *item)
> +{
> + return container_of(to_config_group(item), struct xe_config_group_device, group);
> +}
> +
> +static inline struct xe_config_device *xe_configfs_to_device(struct config_item *item)
> +{
> + return &xe_configfs_to_group_device(item)->config;
> +}
> +
> +#endif /* _XE_CONFIGFS_TYPES_H_ */
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 4:43 ` [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode Stuart Summers
@ 2026-05-04 13:29 ` Gustavo Sousa
2026-05-04 14:32 ` Summers, Stuart
` (2 more replies)
0 siblings, 3 replies; 37+ messages in thread
From: Gustavo Sousa @ 2026-05-04 13:29 UTC (permalink / raw)
To: Stuart Summers
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Stuart Summers <stuart.summers@intel.com> writes:
> Rename the survivability_mode field in struct xe_config_device to
> enable_survivability_mode to be consistent with the enable_psmi naming
> convention used for similar boolean config flags.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-----------
> drivers/gpu/drm/xe/xe_configfs.h | 4 +--
> drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
> 3 files changed, 23 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 32102600a148..69abc69ec0f3 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -58,7 +58,7 @@
> * │ └── ...
> * :
> * └── 0000:03:00.0
> - * ├── survivability_mode
> + * ├── enable_survivability_mode
> * ├── gt_types_allowed
> * ├── engines_allowed
> * └── enable_psmi
> @@ -79,7 +79,7 @@
> * Enable survivability mode on supported cards. This setting only takes
> * effect when probing the device. Example to enable it::
> *
> - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
> + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
I think we have not documented our configfs structure in the kernel ABI
documentation. Are we supposed to do that? Is that not yet done
because we do not consider our configfs stable enough to be classified
as proper ABI?
In this example, we would be potentially changing what some would call
ABI, hence my questions above.
--
Gustavo Sousa
> *
> * This attribute can only be set before binding to the device.
> *
> @@ -260,7 +260,7 @@ struct xe_config_group_device {
> u64 engines_allowed;
> struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> - bool survivability_mode;
> + bool enable_survivability_mode;
> bool enable_psmi;
> struct {
> unsigned int max_vfs;
> @@ -279,7 +279,7 @@ struct xe_config_group_device {
> static const struct xe_config_device device_defaults = {
> .gt_types_allowed = U64_MAX,
> .engines_allowed = U64_MAX,
> - .survivability_mode = false,
> + .enable_survivability_mode = false,
> .enable_psmi = false,
> .sriov = {
> .max_vfs = XE_DEFAULT_MAX_VFS,
> @@ -357,20 +357,21 @@ static bool is_bound(struct xe_config_group_device *dev)
> return ret;
> }
>
> -static ssize_t survivability_mode_show(struct config_item *item, char *page)
> +static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
> {
> struct xe_config_device *dev = to_xe_config_device(item);
>
> - return sprintf(page, "%d\n", dev->survivability_mode);
> + return sprintf(page, "%d\n", dev->enable_survivability_mode);
> }
>
> -static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
> +static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
> + size_t len)
> {
> struct xe_config_group_device *dev = to_xe_config_group_device(item);
> - bool survivability_mode;
> + bool enable_survivability_mode;
> int ret;
>
> - ret = kstrtobool(page, &survivability_mode);
> + ret = kstrtobool(page, &enable_survivability_mode);
> if (ret)
> return ret;
>
> @@ -378,7 +379,7 @@ static ssize_t survivability_mode_store(struct config_item *item, const char *pa
> if (is_bound(dev))
> return -EBUSY;
>
> - dev->config.survivability_mode = survivability_mode;
> + dev->config.enable_survivability_mode = enable_survivability_mode;
>
> return len;
> }
> @@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> CONFIGFS_ATTR(, enable_psmi);
> CONFIGFS_ATTR(, engines_allowed);
> CONFIGFS_ATTR(, gt_types_allowed);
> -CONFIGFS_ATTR(, survivability_mode);
> +CONFIGFS_ATTR(, enable_survivability_mode);
>
> static struct configfs_attribute *xe_config_device_attrs[] = {
> &attr_ctx_restore_mid_bb,
> @@ -823,7 +824,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
> &attr_enable_psmi,
> &attr_engines_allowed,
> &attr_gt_types_allowed,
> - &attr_survivability_mode,
> + &attr_enable_survivability_mode,
> NULL,
> };
>
> @@ -847,7 +848,7 @@ static bool xe_config_device_is_visible(struct config_item *item,
> {
> struct xe_config_group_device *dev = to_xe_config_group_device(item);
>
> - if (attr == &attr_survivability_mode) {
> + if (attr == &attr_enable_survivability_mode) {
> if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
> return false;
> }
> @@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
> PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> PRI_CUSTOM_ATTR("%llx", engines_allowed);
> PRI_CUSTOM_ATTR("%d", enable_psmi);
> - PRI_CUSTOM_ATTR("%d", survivability_mode);
> + PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
>
> #undef PRI_CUSTOM_ATTR
> @@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct pci_dev *pdev)
> }
>
> /**
> - * xe_configfs_get_survivability_mode - get configfs survivability mode attribute
> + * xe_configfs_get_enable_survivability_mode - get configfs survivability mode attribute
> * @pdev: pci device
> *
> - * Return: survivability_mode attribute in configfs
> + * Return: enable_survivability_mode attribute in configfs
> */
> -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
> +bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
> {
> struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
> bool mode;
>
> if (!dev)
> - return device_defaults.survivability_mode;
> + return device_defaults.enable_survivability_mode;
>
> - mode = dev->config.survivability_mode;
> + mode = dev->config.enable_survivability_mode;
> config_group_put(&dev->group);
>
> return mode;
> diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
> index 07d62bf0c152..517de4946d35 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.h
> +++ b/drivers/gpu/drm/xe/xe_configfs.h
> @@ -18,7 +18,7 @@ struct pci_dev;
> int xe_configfs_init(void);
> void xe_configfs_exit(void);
> void xe_configfs_check_device(struct pci_dev *pdev);
> -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> +bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev);
> bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> @@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
> static inline int xe_configfs_init(void) { return 0; }
> static inline void xe_configfs_exit(void) { }
> static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
> -static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
> +static inline bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) { return false; }
> static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
> static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
> static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
> diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
> index db64cac39c94..7c85bdb267af 100644
> --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> @@ -377,7 +377,7 @@ bool xe_survivability_mode_is_requested(struct xe_device *xe)
> if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform < XE_BATTLEMAGE)
> return false;
>
> - survivability_mode = xe_configfs_get_survivability_mode(pdev);
> + survivability_mode = xe_configfs_get_enable_survivability_mode(pdev);
> /* Enable survivability mode if set via configfs */
> if (survivability_mode)
> return true;
> --
> 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically
2026-05-04 4:43 ` [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically Stuart Summers
@ 2026-05-04 13:58 ` Gustavo Sousa
2026-05-04 14:38 ` Summers, Stuart
2026-05-04 15:47 ` Lin, Shuicheng
1 sibling, 1 reply; 37+ messages in thread
From: Gustavo Sousa @ 2026-05-04 13:58 UTC (permalink / raw)
To: Stuart Summers
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Stuart Summers <stuart.summers@intel.com> writes:
> Sort the fields in struct xe_config_device and the corresponding
> device_defaults initializer in alphabetical order. Non-SRIOV fields
> come first (alphabetically), followed by the SRIOV sub-struct with
> its own fields in alphabetical order. Also sort the PRI_CUSTOM_ATTR
> calls in dump_custom_dev_config() to match and the documentation for
> each of the fields.
I think the sorting alphabetically seems fine, but I'll defer it to
others to weigh in here on this decision though.
I guess we will not have many instances of that struct, so I guess
potential padding resulting from the sorting requirement should be
fine.
We probably want to add a note somewhere in the code asking to keep that
stuff ordered alphabetically.
By the way, for other people looking at this, I find it easier to review
this with: git show --color-moved --histogram.
Code-wise, looks good to me, so if this is the direction we take,
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 192 +++++++++++++++----------------
> 1 file changed, 96 insertions(+), 96 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 69abc69ec0f3..1e134057fae8 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -73,53 +73,79 @@
> * Configure Attributes
> * ====================
> *
> - * Survivability mode:
> - * -------------------
> + * Context restore BB
> + * ------------------
> *
> - * Enable survivability mode on supported cards. This setting only takes
> - * effect when probing the device. Example to enable it::
> + * Allow to execute a batch buffer during any context switches. When the
> + * GPU is restoring the context, it executes additional commands. It's useful
> + * for testing additional workarounds and validating certain HW behaviors: it's
> + * not intended for normal execution and will taint the kernel with TAINT_TEST
> + * when used.
> *
> - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> + * The syntax allows to pass straight instructions to be executed by the engine
> + * in a batch buffer or set specific registers.
> *
> - * This attribute can only be set before binding to the device.
> + * #. Generic instruction::
> *
> - * Allowed GT types:
> - * -----------------
> + * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> *
> - * Allow only specific types of GTs to be detected and initialized by the
> - * driver. Any combination of GT types can be enabled/disabled, although
> - * some settings will cause the device to fail to probe.
> + * #. Simple register setting::
> *
> - * Writes support both comma- and newline-separated input format. Reads
> - * will always return one GT type per line. "primary" and "media" are the
> - * GT type names supported by this interface.
> + * <engine-class> reg <address> <value>
> *
> - * This attribute can only be set before binding to the device.
> + * Commands are saved per engine class: all instances of that class will execute
> + * those commands during context switch. The instruction, dword arguments,
> + * addresses and values are in hex format like in the examples below.
> *
> - * Examples:
> + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
> + * normal context restore::
> *
> - * Allow both primary and media GTs to be initialized and used. This matches
> - * the driver's default behavior::
> + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> + * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> *
> - * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
> + * beginning of the context restore::
> *
> - * Allow only the primary GT of each tile to be initialized and used,
> - * effectively disabling the media GT if it exists on the platform::
> + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> + * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> +
> + * #. Load certain values in a couple of registers (it can be used as a simpler
> + * alternative to the `cmd`) action::
> *
> - * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
> + * rcs reg 4F100 DEADBEEF
> + * rcs reg 4F104 FFFFFFFF
> + * EOF
> *
> - * Allow only the media GT of each tile to be initialized and used,
> - * effectively disabling the primary GT. **This configuration will cause
> - * device probe failure on all current platforms, but may be allowed on
> - * igpu platforms in the future**::
> + * .. note::
> *
> - * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * When using multiple lines, make sure to use a command that is
> + * implemented with a single write syscall, like HEREDOC.
> *
> - * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
> - * **This configuration will cause device probe failure on all current
> - * platforms, but may be allowed on igpu platforms in the future**::
> + * Currently this is implemented only for post and mid context restore and
> + * these attributes can only be set before binding to the device.
> *
> - * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * PSMI
> + * ----
> + *
> + * Enable extra debugging capabilities to trace engine execution. Only useful
> + * during early platform enabling and requires additional hardware connected.
> + * Once it's enabled, additionals WAs are added and runtime configuration is
> + * done via debugfs. Example to enable it::
> + *
> + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> + *
> + * This attribute can only be set before binding to the device.
> + *
> + * Survivability mode:
> + * -------------------
> + *
> + * Enable survivability mode on supported cards. This setting only takes
> + * effect when probing the device. Example to enable it::
> + *
> + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> + *
> + * This attribute can only be set before binding to the device.
> *
> * Allowed engines:
> * ----------------
> @@ -147,69 +173,43 @@
> *
> * This attribute can only be set before binding to the device.
> *
> - * PSMI
> - * ----
> + * Allowed GT types:
> + * -----------------
> *
> - * Enable extra debugging capabilities to trace engine execution. Only useful
> - * during early platform enabling and requires additional hardware connected.
> - * Once it's enabled, additionals WAs are added and runtime configuration is
> - * done via debugfs. Example to enable it::
> + * Allow only specific types of GTs to be detected and initialized by the
> + * driver. Any combination of GT types can be enabled/disabled, although
> + * some settings will cause the device to fail to probe.
> *
> - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> + * Writes support both comma- and newline-separated input format. Reads
> + * will always return one GT type per line. "primary" and "media" are the
> + * GT type names supported by this interface.
> *
> * This attribute can only be set before binding to the device.
> *
> - * Context restore BB
> - * ------------------
> - *
> - * Allow to execute a batch buffer during any context switches. When the
> - * GPU is restoring the context, it executes additional commands. It's useful
> - * for testing additional workarounds and validating certain HW behaviors: it's
> - * not intended for normal execution and will taint the kernel with TAINT_TEST
> - * when used.
> - *
> - * The syntax allows to pass straight instructions to be executed by the engine
> - * in a batch buffer or set specific registers.
> - *
> - * #. Generic instruction::
> - *
> - * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> - *
> - * #. Simple register setting::
> - *
> - * <engine-class> reg <address> <value>
> - *
> - * Commands are saved per engine class: all instances of that class will execute
> - * those commands during context switch. The instruction, dword arguments,
> - * addresses and values are in hex format like in the examples below.
> + * Examples:
> *
> - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
> - * normal context restore::
> + * Allow both primary and media GTs to be initialized and used. This matches
> + * the driver's default behavior::
> *
> - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> - * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> + * # echo 'primary,media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
> - * beginning of the context restore::
> + * Allow only the primary GT of each tile to be initialized and used,
> + * effectively disabling the media GT if it exists on the platform::
> *
> - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> - * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> -
> - * #. Load certain values in a couple of registers (it can be used as a simpler
> - * alternative to the `cmd`) action::
> + * # echo 'primary' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> - * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
> - * rcs reg 4F100 DEADBEEF
> - * rcs reg 4F104 FFFFFFFF
> - * EOF
> + * Allow only the media GT of each tile to be initialized and used,
> + * effectively disabling the primary GT. **This configuration will cause
> + * device probe failure on all current platforms, but may be allowed on
> + * igpu platforms in the future**::
> *
> - * .. note::
> + * # echo 'media' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> - * When using multiple lines, make sure to use a command that is
> - * implemented with a single write syscall, like HEREDOC.
> + * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
> + * **This configuration will cause device probe failure on all current
> + * platforms, but may be allowed on igpu platforms in the future**::
> *
> - * Currently this is implemented only for post and mid context restore and
> - * these attributes can only be set before binding to the device.
> + * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> * Max SR-IOV Virtual Functions
> * ----------------------------
> @@ -256,15 +256,15 @@ struct xe_config_group_device {
> struct config_group sriov;
>
> struct xe_config_device {
> - u64 gt_types_allowed;
> - u64 engines_allowed;
> - struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> - bool enable_survivability_mode;
> + struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> bool enable_psmi;
> + bool enable_survivability_mode;
> + u64 engines_allowed;
> + u64 gt_types_allowed;
> struct {
> - unsigned int max_vfs;
> bool admin_only_pf;
> + unsigned int max_vfs;
> } sriov;
> } config;
>
> @@ -277,13 +277,13 @@ struct xe_config_group_device {
> };
>
> static const struct xe_config_device device_defaults = {
> - .gt_types_allowed = U64_MAX,
> - .engines_allowed = U64_MAX,
> - .enable_survivability_mode = false,
> .enable_psmi = false,
> + .enable_survivability_mode = false,
> + .engines_allowed = U64_MAX,
> + .gt_types_allowed = U64_MAX,
> .sriov = {
> - .max_vfs = XE_DEFAULT_MAX_VFS,
> .admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
> + .max_vfs = XE_DEFAULT_MAX_VFS,
> },
> };
>
> @@ -814,17 +814,17 @@ static ssize_t ctx_restore_post_bb_store(struct config_item *item,
> CONFIGFS_ATTR(, ctx_restore_mid_bb);
> CONFIGFS_ATTR(, ctx_restore_post_bb);
> CONFIGFS_ATTR(, enable_psmi);
> +CONFIGFS_ATTR(, enable_survivability_mode);
> CONFIGFS_ATTR(, engines_allowed);
> CONFIGFS_ATTR(, gt_types_allowed);
> -CONFIGFS_ATTR(, enable_survivability_mode);
>
> static struct configfs_attribute *xe_config_device_attrs[] = {
> &attr_ctx_restore_mid_bb,
> &attr_ctx_restore_post_bb,
> &attr_enable_psmi,
> + &attr_enable_survivability_mode,
> &attr_engines_allowed,
> &attr_gt_types_allowed,
> - &attr_enable_survivability_mode,
> NULL,
> };
>
> @@ -929,12 +929,12 @@ static ssize_t sriov_admin_only_pf_store(struct config_item *item, const char *p
> return len;
> }
>
> -CONFIGFS_ATTR(sriov_, max_vfs);
> CONFIGFS_ATTR(sriov_, admin_only_pf);
> +CONFIGFS_ATTR(sriov_, max_vfs);
>
> static struct configfs_attribute *xe_config_sriov_attrs[] = {
> - &sriov_attr_max_vfs,
> &sriov_attr_admin_only_pf,
> + &sriov_attr_max_vfs,
> NULL,
> };
>
> @@ -1096,10 +1096,10 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
> dev->config.attr_); \
> } while (0)
>
> - PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> - PRI_CUSTOM_ATTR("%llx", engines_allowed);
> PRI_CUSTOM_ATTR("%d", enable_psmi);
> PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> + PRI_CUSTOM_ATTR("%llx", engines_allowed);
> + PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
>
> #undef PRI_CUSTOM_ATTR
> --
> 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 3/9] drm/xe: Split out configfs data structures
2026-05-04 8:47 ` Jani Nikula
@ 2026-05-04 14:24 ` Summers, Stuart
2026-05-04 21:48 ` Matthew Brost
0 siblings, 1 reply; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 14:24 UTC (permalink / raw)
To: jani.nikula@linux.intel.com
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 11:47 +0300, Jani Nikula wrote:
> On Mon, 04 May 2026, Stuart Summers <stuart.summers@intel.com> wrote:
> > Split the configfs data structures into their own _types.h file.
>
> Why? The commit message must always answer the question, "why".
>
> The obvious downside here is that you expose the types that were
> previously hidden in xe_configfs.c to anyone who includes
> xe_configfs_types.h. And that header depends on a ton of other
> headers,
> making the header interdepencies worse overall.
>
> Maybe you need that header later for something, but please spell that
> out here.
Yeah this is exactly true.. I'll do a better job with the commit
messages here going forward. Really appreciate the feedback Jani!
-Stuart
>
>
> BR,
> Jani.
>
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++---------------
> > ----
> > drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++
> > 2 files changed, 80 insertions(+), 64 deletions(-)
> > create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > b/drivers/gpu/drm/xe/xe_configfs.c
> > index 1e134057fae8..12b7fe65446d 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -4,7 +4,6 @@
> > */
> >
> > #include <linux/bitops.h>
> > -#include <linux/ctype.h>
> > #include <linux/configfs.h>
> > #include <linux/cleanup.h>
> > #include <linux/find.h>
> > @@ -15,12 +14,10 @@
> >
> > #include "instructions/xe_mi_commands.h"
> > #include "xe_configfs.h"
> > +#include "xe_configfs_types.h"
> > #include "xe_defaults.h"
> > #include "xe_gt_types.h"
> > -#include "xe_hw_engine_types.h"
> > #include "xe_module.h"
> > -#include "xe_pci_types.h"
> > -#include "xe_sriov_types.h"
> >
> > /**
> > * DOC: Xe Configfs
> > @@ -245,36 +242,6 @@
> > * # rmdir /sys/kernel/config/xe/0000:03:00.0/
> > */
> >
> > -/* Similar to struct xe_bb, but not tied to HW (yet) */
> > -struct wa_bb {
> > - u32 *cs;
> > - u32 len; /* in dwords */
> > -};
> > -
> > -struct xe_config_group_device {
> > - struct config_group group;
> > - struct config_group sriov;
> > -
> > - struct xe_config_device {
> > - struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > - struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > - bool enable_psmi;
> > - bool enable_survivability_mode;
> > - u64 engines_allowed;
> > - u64 gt_types_allowed;
> > - struct {
> > - bool admin_only_pf;
> > - unsigned int max_vfs;
> > - } sriov;
> > - } config;
> > -
> > - /* protects attributes */
> > - struct mutex lock;
> > - /* matching descriptor */
> > - const struct xe_device_desc *desc;
> > - /* tentative SR-IOV mode */
> > - enum xe_sriov_mode mode;
> > -};
> >
> > static const struct xe_config_device device_defaults = {
> > .enable_psmi = false,
> > @@ -322,16 +289,6 @@ static const struct {
> > { .name = "media", .type = XE_GT_TYPE_MEDIA },
> > };
> >
> > -static struct xe_config_group_device
> > *to_xe_config_group_device(struct config_item *item)
> > -{
> > - return container_of(to_config_group(item), struct
> > xe_config_group_device, group);
> > -}
> > -
> > -static struct xe_config_device *to_xe_config_device(struct
> > config_item *item)
> > -{
> > - return &to_xe_config_group_device(item)->config;
> > -}
> > -
> > static bool is_bound(struct xe_config_group_device *dev)
> > {
> > unsigned int domain, bus, slot, function;
> > @@ -359,7 +316,7 @@ static bool is_bound(struct
> > xe_config_group_device *dev)
> >
> > static ssize_t enable_survivability_mode_show(struct config_item
> > *item, char *page)
> > {
> > - struct xe_config_device *dev = to_xe_config_device(item);
> > + struct xe_config_device *dev = xe_configfs_to_device(item);
> >
> > return sprintf(page, "%d\n", dev-
> > >enable_survivability_mode);
> > }
> > @@ -367,7 +324,7 @@ static ssize_t
> > enable_survivability_mode_show(struct config_item *item, char *pa
> > static ssize_t enable_survivability_mode_store(struct config_item
> > *item, const char *page,
> > size_t len)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> > bool enable_survivability_mode;
> > int ret;
> >
> > @@ -386,7 +343,7 @@ static ssize_t
> > enable_survivability_mode_store(struct config_item *item, const c
> >
> > static ssize_t gt_types_allowed_show(struct config_item *item,
> > char *page)
> > {
> > - struct xe_config_device *dev = to_xe_config_device(item);
> > + struct xe_config_device *dev = xe_configfs_to_device(item);
> > char *p = page;
> >
> > for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
> > @@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct
> > config_item *item, char *page)
> > static ssize_t gt_types_allowed_store(struct config_item *item,
> > const char *page,
> > size_t len)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> > char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
> > char *p = buf;
> > u64 typemask = 0;
> > @@ -437,7 +394,7 @@ static ssize_t gt_types_allowed_store(struct
> > config_item *item, const char *page
> >
> > static ssize_t engines_allowed_show(struct config_item *item, char
> > *page)
> > {
> > - struct xe_config_device *dev = to_xe_config_device(item);
> > + struct xe_config_device *dev = xe_configfs_to_device(item);
> > char *p = page;
> >
> > for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> > @@ -529,7 +486,7 @@ static int parse_engine(const char *s, const
> > char *end_chars, u64 *mask,
> > static ssize_t engines_allowed_store(struct config_item *item,
> > const char *page,
> > size_t len)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> > ssize_t patternlen, p;
> > u64 mask, val = 0;
> >
> > @@ -552,14 +509,14 @@ static ssize_t engines_allowed_store(struct
> > config_item *item, const char *page,
> >
> > static ssize_t enable_psmi_show(struct config_item *item, char
> > *page)
> > {
> > - struct xe_config_device *dev = to_xe_config_device(item);
> > + struct xe_config_device *dev = xe_configfs_to_device(item);
> >
> > return sprintf(page, "%d\n", dev->enable_psmi);
> > }
> >
> > static ssize_t enable_psmi_store(struct config_item *item, const
> > char *page, size_t len)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> > bool val;
> > int ret;
> >
> > @@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct
> > xe_config_group_device *dev,
> >
> > static ssize_t ctx_restore_mid_bb_show(struct config_item *item,
> > char *page)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> >
> > return wa_bb_show(dev, dev->config.ctx_restore_mid_bb,
> > page, SZ_4K);
> > }
> >
> > static ssize_t ctx_restore_post_bb_show(struct config_item *item,
> > char *page)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> >
> > return wa_bb_show(dev, dev->config.ctx_restore_post_bb,
> > page, SZ_4K);
> > }
> > @@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb
> > wa_bb[static XE_ENGINE_CLASS_MAX],
> > static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
> > const char *data, size_t
> > sz)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> >
> > return wa_bb_store(dev->config.ctx_restore_mid_bb, dev,
> > data, sz);
> > }
> > @@ -806,7 +763,7 @@ static ssize_t ctx_restore_mid_bb_store(struct
> > config_item *item,
> > static ssize_t ctx_restore_post_bb_store(struct config_item *item,
> > const char *data, size_t
> > sz)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> >
> > return wa_bb_store(dev->config.ctx_restore_post_bb, dev,
> > data, sz);
> > }
> > @@ -830,7 +787,7 @@ static struct configfs_attribute
> > *xe_config_device_attrs[] = {
> >
> > static void xe_config_device_release(struct config_item *item)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> >
> > mutex_destroy(&dev->lock);
> >
> > @@ -846,7 +803,7 @@ static struct configfs_item_operations
> > xe_config_device_ops = {
> > static bool xe_config_device_is_visible(struct config_item *item,
> > struct configfs_attribute
> > *attr, int n)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item);
> >
> > if (attr == &attr_enable_survivability_mode) {
> > if (!dev->desc->is_dgfx || dev->desc->platform <
> > XE_BATTLEMAGE)
> > @@ -869,7 +826,7 @@ static const struct config_item_type
> > xe_config_device_type = {
> >
> > static ssize_t sriov_max_vfs_show(struct config_item *item, char
> > *page)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item->ci_parent);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item->ci_parent);
> >
> > guard(mutex)(&dev->lock);
> >
> > @@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct
> > config_item *item, char *page)
> >
> > static ssize_t sriov_max_vfs_store(struct config_item *item, const
> > char *page, size_t len)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item->ci_parent);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item->ci_parent);
> > unsigned int max_vfs;
> > int ret;
> >
> > @@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct
> > config_item *item, const char *page, s
> >
> > static ssize_t sriov_admin_only_pf_show(struct config_item *item,
> > char *page)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item->ci_parent);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item->ci_parent);
> >
> > guard(mutex)(&dev->lock);
> >
> > @@ -912,7 +869,7 @@ static ssize_t sriov_admin_only_pf_show(struct
> > config_item *item, char *page)
> >
> > static ssize_t sriov_admin_only_pf_store(struct config_item *item,
> > const char *page, size_t len)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item->ci_parent);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item->ci_parent);
> > bool admin_only_pf;
> > int ret;
> >
> > @@ -941,7 +898,7 @@ static struct configfs_attribute
> > *xe_config_sriov_attrs[] = {
> > static bool xe_config_sriov_is_visible(struct config_item *item,
> > struct configfs_attribute
> > *attr, int n)
> > {
> > - struct xe_config_group_device *dev =
> > to_xe_config_group_device(item->ci_parent);
> > + struct xe_config_group_device *dev =
> > xe_configfs_to_group_device(item->ci_parent);
> >
> > if (attr == &sriov_attr_max_vfs && dev->mode !=
> > XE_SRIOV_MODE_PF)
> > return false;
> > @@ -1084,7 +1041,7 @@ static struct xe_config_group_device
> > *find_xe_config_group_device(struct pci_dev
> > if (!item)
> > return NULL;
> >
> > - return to_xe_config_group_device(item);
> > + return xe_configfs_to_group_device(item);
> > }
> >
> > static void dump_custom_dev_config(struct pci_dev *pdev,
> > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> > b/drivers/gpu/drm/xe/xe_configfs_types.h
> > new file mode 100644
> > index 000000000000..935097aafa96
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> > @@ -0,0 +1,59 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2026 Intel Corporation
> > + */
> > +#ifndef _XE_CONFIGFS_TYPES_H_
> > +#define _XE_CONFIGFS_TYPES_H_
> > +
> > +#include <linux/configfs.h>
> > +#include <linux/mutex.h>
> > +#include <linux/types.h>
> > +
> > +#include "xe_hw_engine_types.h"
> > +#include "xe_pci_types.h"
> > +#include "xe_sriov_types.h"
> > +
> > +struct config_item;
> > +
> > +/* Similar to struct xe_bb, but not tied to HW (yet) */
> > +struct wa_bb {
> > + u32 *cs;
> > + u32 len; /* in dwords */
> > +};
> > +
> > +struct xe_config_group_device {
> > + struct config_group group;
> > + struct config_group sriov;
> > +
> > + struct xe_config_device {
> > + struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > + struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > + bool enable_psmi;
> > + bool enable_survivability_mode;
> > + u64 engines_allowed;
> > + u64 gt_types_allowed;
> > + struct {
> > + bool admin_only_pf;
> > + unsigned int max_vfs;
> > + } sriov;
> > + } config;
> > +
> > + /* protects attributes */
> > + struct mutex lock;
> > + /* matching descriptor */
> > + const struct xe_device_desc *desc;
> > + /* tentative SR-IOV mode */
> > + enum xe_sriov_mode mode;
> > +};
> > +
> > +static inline struct xe_config_group_device
> > *xe_configfs_to_group_device(struct config_item *item)
> > +{
> > + return container_of(to_config_group(item), struct
> > xe_config_group_device, group);
> > +}
> > +
> > +static inline struct xe_config_device
> > *xe_configfs_to_device(struct config_item *item)
> > +{
> > + return &xe_configfs_to_group_device(item)->config;
> > +}
> > +
> > +#endif /* _XE_CONFIGFS_TYPES_H_ */
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 13:29 ` Gustavo Sousa
@ 2026-05-04 14:32 ` Summers, Stuart
2026-05-04 14:38 ` Summers, Stuart
2026-05-04 14:40 ` Summers, Stuart
2026-05-04 18:31 ` Rodrigo Vivi
2 siblings, 1 reply; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 14:32 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 10:29 -0300, Gustavo Sousa wrote:
> Stuart Summers <stuart.summers@intel.com> writes:
>
> > Rename the survivability_mode field in struct xe_config_device to
> > enable_survivability_mode to be consistent with the enable_psmi
> > naming
> > convention used for similar boolean config flags.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-------
> > ----
> > drivers/gpu/drm/xe/xe_configfs.h | 4 +--
> > drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
> > 3 files changed, 23 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > b/drivers/gpu/drm/xe/xe_configfs.c
> > index 32102600a148..69abc69ec0f3 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -58,7 +58,7 @@
> > * │ └── ...
> > * :
> > * └── 0000:03:00.0
> > - * ├── survivability_mode
> > + * ├── enable_survivability_mode
> > * ├── gt_types_allowed
> > * ├── engines_allowed
> > * └── enable_psmi
> > @@ -79,7 +79,7 @@
> > * Enable survivability mode on supported cards. This setting only
> > takes
> > * effect when probing the device. Example to enable it::
> > *
> > - * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
> > + * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
>
> I think we have not documented our configfs structure in the kernel
> ABI
> documentation. Are we supposed to do that? Is that not yet done
> because we do not consider our configfs stable enough to be
> classified
> as proper ABI?
>
> In this example, we would be potentially changing what some would
> call
> ABI, hence my questions above.
Yeah this is something I wanted to discuss here too. I kind of just
blindly alphabetized things here, but we might want to sort by data
type or something else. also, we only have a few parameters here, but
I'd like to set this up to support a much larger set of parameters on
the debug side - we need much finer grained support for things like
power-on for instance. And I'd like a way that easily scales here.
Also I agree on the documentation.. I'll make sure to add that in the
next patch once we conclude on the approach here.
Thanks,
Stuart
>
> --
> Gustavo Sousa
>
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > @@ -260,7 +260,7 @@ struct xe_config_group_device {
> > u64 engines_allowed;
> > struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > - bool survivability_mode;
> > + bool enable_survivability_mode;
> > bool enable_psmi;
> > struct {
> > unsigned int max_vfs;
> > @@ -279,7 +279,7 @@ struct xe_config_group_device {
> > static const struct xe_config_device device_defaults = {
> > .gt_types_allowed = U64_MAX,
> > .engines_allowed = U64_MAX,
> > - .survivability_mode = false,
> > + .enable_survivability_mode = false,
> > .enable_psmi = false,
> > .sriov = {
> > .max_vfs = XE_DEFAULT_MAX_VFS,
> > @@ -357,20 +357,21 @@ static bool is_bound(struct
> > xe_config_group_device *dev)
> > return ret;
> > }
> >
> > -static ssize_t survivability_mode_show(struct config_item *item,
> > char *page)
> > +static ssize_t enable_survivability_mode_show(struct config_item
> > *item, char *page)
> > {
> > struct xe_config_device *dev = to_xe_config_device(item);
> >
> > - return sprintf(page, "%d\n", dev->survivability_mode);
> > + return sprintf(page, "%d\n", dev-
> > >enable_survivability_mode);
> > }
> >
> > -static ssize_t survivability_mode_store(struct config_item *item,
> > const char *page, size_t len)
> > +static ssize_t enable_survivability_mode_store(struct config_item
> > *item, const char *page,
> > + size_t len)
> > {
> > struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > - bool survivability_mode;
> > + bool enable_survivability_mode;
> > int ret;
> >
> > - ret = kstrtobool(page, &survivability_mode);
> > + ret = kstrtobool(page, &enable_survivability_mode);
> > if (ret)
> > return ret;
> >
> > @@ -378,7 +379,7 @@ static ssize_t survivability_mode_store(struct
> > config_item *item, const char *pa
> > if (is_bound(dev))
> > return -EBUSY;
> >
> > - dev->config.survivability_mode = survivability_mode;
> > + dev->config.enable_survivability_mode =
> > enable_survivability_mode;
> >
> > return len;
> > }
> > @@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> > CONFIGFS_ATTR(, enable_psmi);
> > CONFIGFS_ATTR(, engines_allowed);
> > CONFIGFS_ATTR(, gt_types_allowed);
> > -CONFIGFS_ATTR(, survivability_mode);
> > +CONFIGFS_ATTR(, enable_survivability_mode);
> >
> > static struct configfs_attribute *xe_config_device_attrs[] = {
> > &attr_ctx_restore_mid_bb,
> > @@ -823,7 +824,7 @@ static struct configfs_attribute
> > *xe_config_device_attrs[] = {
> > &attr_enable_psmi,
> > &attr_engines_allowed,
> > &attr_gt_types_allowed,
> > - &attr_survivability_mode,
> > + &attr_enable_survivability_mode,
> > NULL,
> > };
> >
> > @@ -847,7 +848,7 @@ static bool xe_config_device_is_visible(struct
> > config_item *item,
> > {
> > struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> >
> > - if (attr == &attr_survivability_mode) {
> > + if (attr == &attr_enable_survivability_mode) {
> > if (!dev->desc->is_dgfx || dev->desc->platform <
> > XE_BATTLEMAGE)
> > return false;
> > }
> > @@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct
> > pci_dev *pdev,
> > PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > - PRI_CUSTOM_ATTR("%d", survivability_mode);
> > + PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> >
> > #undef PRI_CUSTOM_ATTR
> > @@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct
> > pci_dev *pdev)
> > }
> >
> > /**
> > - * xe_configfs_get_survivability_mode - get configfs survivability
> > mode attribute
> > + * xe_configfs_get_enable_survivability_mode - get configfs
> > survivability mode attribute
> > * @pdev: pci device
> > *
> > - * Return: survivability_mode attribute in configfs
> > + * Return: enable_survivability_mode attribute in configfs
> > */
> > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
> > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > *pdev)
> > {
> > struct xe_config_group_device *dev =
> > find_xe_config_group_device(pdev);
> > bool mode;
> >
> > if (!dev)
> > - return device_defaults.survivability_mode;
> > + return device_defaults.enable_survivability_mode;
> >
> > - mode = dev->config.survivability_mode;
> > + mode = dev->config.enable_survivability_mode;
> > config_group_put(&dev->group);
> >
> > return mode;
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.h
> > b/drivers/gpu/drm/xe/xe_configfs.h
> > index 07d62bf0c152..517de4946d35 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.h
> > +++ b/drivers/gpu/drm/xe/xe_configfs.h
> > @@ -18,7 +18,7 @@ struct pci_dev;
> > int xe_configfs_init(void);
> > void xe_configfs_exit(void);
> > void xe_configfs_check_device(struct pci_dev *pdev);
> > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > *pdev);
> > bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> > bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> > @@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev
> > *pdev);
> > static inline int xe_configfs_init(void) { return 0; }
> > static inline void xe_configfs_exit(void) { }
> > static inline void xe_configfs_check_device(struct pci_dev *pdev)
> > { }
> > -static inline bool xe_configfs_get_survivability_mode(struct
> > pci_dev *pdev) { return false; }
> > +static inline bool
> > xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) {
> > return false; }
> > static inline bool xe_configfs_primary_gt_allowed(struct pci_dev
> > *pdev) { return true; }
> > static inline bool xe_configfs_media_gt_allowed(struct pci_dev
> > *pdev) { return true; }
> > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev
> > *pdev) { return U64_MAX; }
> > diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > index db64cac39c94..7c85bdb267af 100644
> > --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > @@ -377,7 +377,7 @@ bool xe_survivability_mode_is_requested(struct
> > xe_device *xe)
> > if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform <
> > XE_BATTLEMAGE)
> > return false;
> >
> > - survivability_mode =
> > xe_configfs_get_survivability_mode(pdev);
> > + survivability_mode =
> > xe_configfs_get_enable_survivability_mode(pdev);
> > /* Enable survivability mode if set via configfs */
> > if (survivability_mode)
> > return true;
> > --
> > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 14:32 ` Summers, Stuart
@ 2026-05-04 14:38 ` Summers, Stuart
0 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 14:38 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 14:32 +0000, Summers, Stuart wrote:
> On Mon, 2026-05-04 at 10:29 -0300, Gustavo Sousa wrote:
> > Stuart Summers <stuart.summers@intel.com> writes:
> >
> > > Rename the survivability_mode field in struct xe_config_device to
> > > enable_survivability_mode to be consistent with the enable_psmi
> > > naming
> > > convention used for similar boolean config flags.
> > >
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > Assisted-by: Copilot:claude-opus-4.7
> > > ---
> > > drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-----
> > > --
> > > ----
> > > drivers/gpu/drm/xe/xe_configfs.h | 4 +--
> > > drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
> > > 3 files changed, 23 insertions(+), 22 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > > b/drivers/gpu/drm/xe/xe_configfs.c
> > > index 32102600a148..69abc69ec0f3 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > @@ -58,7 +58,7 @@
> > > * │ └── ...
> > > * :
> > > * └── 0000:03:00.0
> > > - * ├── survivability_mode
> > > + * ├── enable_survivability_mode
> > > * ├── gt_types_allowed
> > > * ├── engines_allowed
> > > * └── enable_psmi
> > > @@ -79,7 +79,7 @@
> > > * Enable survivability mode on supported cards. This setting
> > > only
> > > takes
> > > * effect when probing the device. Example to enable it::
> > > *
> > > - * # echo 1 >
> > > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
> > > + * # echo 1 >
> > > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> >
> > I think we have not documented our configfs structure in the kernel
> > ABI
> > documentation. Are we supposed to do that? Is that not yet done
> > because we do not consider our configfs stable enough to be
> > classified
> > as proper ABI?
> >
> > In this example, we would be potentially changing what some would
> > call
> > ABI, hence my questions above.
>
> Yeah this is something I wanted to discuss here too. I kind of just
> blindly alphabetized things here, but we might want to sort by data
> type or something else. also, we only have a few parameters here, but
> I'd like to set this up to support a much larger set of parameters on
> the debug side - we need much finer grained support for things like
> power-on for instance. And I'd like a way that easily scales here.
>
> Also I agree on the documentation.. I'll make sure to add that in the
> next patch once we conclude on the approach here.
And I'm realizing I responded to the wrong patch here, sorry! :(
-Stuart
>
> Thanks,
> Stuart
>
> >
> > --
> > Gustavo Sousa
> >
> > > *
> > > * This attribute can only be set before binding to the device.
> > > *
> > > @@ -260,7 +260,7 @@ struct xe_config_group_device {
> > > u64 engines_allowed;
> > > struct wa_bb
> > > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > > struct wa_bb
> > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > - bool survivability_mode;
> > > + bool enable_survivability_mode;
> > > bool enable_psmi;
> > > struct {
> > > unsigned int max_vfs;
> > > @@ -279,7 +279,7 @@ struct xe_config_group_device {
> > > static const struct xe_config_device device_defaults = {
> > > .gt_types_allowed = U64_MAX,
> > > .engines_allowed = U64_MAX,
> > > - .survivability_mode = false,
> > > + .enable_survivability_mode = false,
> > > .enable_psmi = false,
> > > .sriov = {
> > > .max_vfs = XE_DEFAULT_MAX_VFS,
> > > @@ -357,20 +357,21 @@ static bool is_bound(struct
> > > xe_config_group_device *dev)
> > > return ret;
> > > }
> > >
> > > -static ssize_t survivability_mode_show(struct config_item *item,
> > > char *page)
> > > +static ssize_t enable_survivability_mode_show(struct config_item
> > > *item, char *page)
> > > {
> > > struct xe_config_device *dev = to_xe_config_device(item);
> > >
> > > - return sprintf(page, "%d\n", dev->survivability_mode);
> > > + return sprintf(page, "%d\n", dev-
> > > > enable_survivability_mode);
> > > }
> > >
> > > -static ssize_t survivability_mode_store(struct config_item
> > > *item,
> > > const char *page, size_t len)
> > > +static ssize_t enable_survivability_mode_store(struct
> > > config_item
> > > *item, const char *page,
> > > + size_t len)
> > > {
> > > struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > - bool survivability_mode;
> > > + bool enable_survivability_mode;
> > > int ret;
> > >
> > > - ret = kstrtobool(page, &survivability_mode);
> > > + ret = kstrtobool(page, &enable_survivability_mode);
> > > if (ret)
> > > return ret;
> > >
> > > @@ -378,7 +379,7 @@ static ssize_t
> > > survivability_mode_store(struct
> > > config_item *item, const char *pa
> > > if (is_bound(dev))
> > > return -EBUSY;
> > >
> > > - dev->config.survivability_mode = survivability_mode;
> > > + dev->config.enable_survivability_mode =
> > > enable_survivability_mode;
> > >
> > > return len;
> > > }
> > > @@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> > > CONFIGFS_ATTR(, enable_psmi);
> > > CONFIGFS_ATTR(, engines_allowed);
> > > CONFIGFS_ATTR(, gt_types_allowed);
> > > -CONFIGFS_ATTR(, survivability_mode);
> > > +CONFIGFS_ATTR(, enable_survivability_mode);
> > >
> > > static struct configfs_attribute *xe_config_device_attrs[] = {
> > > &attr_ctx_restore_mid_bb,
> > > @@ -823,7 +824,7 @@ static struct configfs_attribute
> > > *xe_config_device_attrs[] = {
> > > &attr_enable_psmi,
> > > &attr_engines_allowed,
> > > &attr_gt_types_allowed,
> > > - &attr_survivability_mode,
> > > + &attr_enable_survivability_mode,
> > > NULL,
> > > };
> > >
> > > @@ -847,7 +848,7 @@ static bool
> > > xe_config_device_is_visible(struct
> > > config_item *item,
> > > {
> > > struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > >
> > > - if (attr == &attr_survivability_mode) {
> > > + if (attr == &attr_enable_survivability_mode) {
> > > if (!dev->desc->is_dgfx || dev->desc->platform <
> > > XE_BATTLEMAGE)
> > > return false;
> > > }
> > > @@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct
> > > pci_dev *pdev,
> > > PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > > PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > > - PRI_CUSTOM_ATTR("%d", survivability_mode);
> > > + PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> > >
> > > #undef PRI_CUSTOM_ATTR
> > > @@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct
> > > pci_dev *pdev)
> > > }
> > >
> > > /**
> > > - * xe_configfs_get_survivability_mode - get configfs
> > > survivability
> > > mode attribute
> > > + * xe_configfs_get_enable_survivability_mode - get configfs
> > > survivability mode attribute
> > > * @pdev: pci device
> > > *
> > > - * Return: survivability_mode attribute in configfs
> > > + * Return: enable_survivability_mode attribute in configfs
> > > */
> > > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
> > > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > > *pdev)
> > > {
> > > struct xe_config_group_device *dev =
> > > find_xe_config_group_device(pdev);
> > > bool mode;
> > >
> > > if (!dev)
> > > - return device_defaults.survivability_mode;
> > > + return device_defaults.enable_survivability_mode;
> > >
> > > - mode = dev->config.survivability_mode;
> > > + mode = dev->config.enable_survivability_mode;
> > > config_group_put(&dev->group);
> > >
> > > return mode;
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.h
> > > b/drivers/gpu/drm/xe/xe_configfs.h
> > > index 07d62bf0c152..517de4946d35 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.h
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.h
> > > @@ -18,7 +18,7 @@ struct pci_dev;
> > > int xe_configfs_init(void);
> > > void xe_configfs_exit(void);
> > > void xe_configfs_check_device(struct pci_dev *pdev);
> > > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> > > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > > *pdev);
> > > bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> > > bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> > > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> > > @@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev
> > > *pdev);
> > > static inline int xe_configfs_init(void) { return 0; }
> > > static inline void xe_configfs_exit(void) { }
> > > static inline void xe_configfs_check_device(struct pci_dev
> > > *pdev)
> > > { }
> > > -static inline bool xe_configfs_get_survivability_mode(struct
> > > pci_dev *pdev) { return false; }
> > > +static inline bool
> > > xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) {
> > > return false; }
> > > static inline bool xe_configfs_primary_gt_allowed(struct pci_dev
> > > *pdev) { return true; }
> > > static inline bool xe_configfs_media_gt_allowed(struct pci_dev
> > > *pdev) { return true; }
> > > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev
> > > *pdev) { return U64_MAX; }
> > > diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > index db64cac39c94..7c85bdb267af 100644
> > > --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > @@ -377,7 +377,7 @@ bool
> > > xe_survivability_mode_is_requested(struct
> > > xe_device *xe)
> > > if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform
> > > <
> > > XE_BATTLEMAGE)
> > > return false;
> > >
> > > - survivability_mode =
> > > xe_configfs_get_survivability_mode(pdev);
> > > + survivability_mode =
> > > xe_configfs_get_enable_survivability_mode(pdev);
> > > /* Enable survivability mode if set via configfs */
> > > if (survivability_mode)
> > > return true;
> > > --
> > > 2.43.0
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically
2026-05-04 13:58 ` Gustavo Sousa
@ 2026-05-04 14:38 ` Summers, Stuart
0 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 14:38 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 10:58 -0300, Gustavo Sousa wrote:
> Stuart Summers <stuart.summers@intel.com> writes:
>
> > Sort the fields in struct xe_config_device and the corresponding
> > device_defaults initializer in alphabetical order. Non-SRIOV fields
> > come first (alphabetically), followed by the SRIOV sub-struct with
> > its own fields in alphabetical order. Also sort the PRI_CUSTOM_ATTR
> > calls in dump_custom_dev_config() to match and the documentation
> > for
> > each of the fields.
>
> I think the sorting alphabetically seems fine, but I'll defer it to
> others to weigh in here on this decision though.
>
> I guess we will not have many instances of that struct, so I guess
> potential padding resulting from the sorting requirement should be
> fine.
>
> We probably want to add a note somewhere in the code asking to keep
> that
> stuff ordered alphabetically.
>
> By the way, for other people looking at this, I find it easier to
> review
> this with: git show --color-moved --histogram.
>
> Code-wise, looks good to me, so if this is the direction we take,
>
> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
I had accidentally responded to the wrong patch with this... Also
thanks for the review!
Yeah this is something I wanted to discuss here too. I kind of just
blindly alphabetized things here, but we might want to sort by data
type or something else. also, we only have a few parameters here, but
I'd like to set this up to support a much larger set of parameters on
the debug side - we need much finer grained support for things like
power-on for instance. And I'd like a way that easily scales here.
Also I agree on the documentation.. I'll make sure to add that in the
next patch once we conclude on the approach here.
Thanks,
Stuart
>
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/xe_configfs.c | 192 +++++++++++++++------------
> > ----
> > 1 file changed, 96 insertions(+), 96 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > b/drivers/gpu/drm/xe/xe_configfs.c
> > index 69abc69ec0f3..1e134057fae8 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -73,53 +73,79 @@
> > * Configure Attributes
> > * ====================
> > *
> > - * Survivability mode:
> > - * -------------------
> > + * Context restore BB
> > + * ------------------
> > *
> > - * Enable survivability mode on supported cards. This setting only
> > takes
> > - * effect when probing the device. Example to enable it::
> > + * Allow to execute a batch buffer during any context switches.
> > When the
> > + * GPU is restoring the context, it executes additional commands.
> > It's useful
> > + * for testing additional workarounds and validating certain HW
> > behaviors: it's
> > + * not intended for normal execution and will taint the kernel
> > with TAINT_TEST
> > + * when used.
> > *
> > - * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> > + * The syntax allows to pass straight instructions to be executed
> > by the engine
> > + * in a batch buffer or set specific registers.
> > *
> > - * This attribute can only be set before binding to the device.
> > + * #. Generic instruction::
> > *
> > - * Allowed GT types:
> > - * -----------------
> > + * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> > *
> > - * Allow only specific types of GTs to be detected and initialized
> > by the
> > - * driver. Any combination of GT types can be enabled/disabled,
> > although
> > - * some settings will cause the device to fail to probe.
> > + * #. Simple register setting::
> > *
> > - * Writes support both comma- and newline-separated input format.
> > Reads
> > - * will always return one GT type per line. "primary" and "media"
> > are the
> > - * GT type names supported by this interface.
> > + * <engine-class> reg <address> <value>
> > *
> > - * This attribute can only be set before binding to the device.
> > + * Commands are saved per engine class: all instances of that
> > class will execute
> > + * those commands during context switch. The instruction, dword
> > arguments,
> > + * addresses and values are in hex format like in the examples
> > below.
> > *
> > - * Examples:
> > + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > after the
> > + * normal context restore::
> > *
> > - * Allow both primary and media GTs to be initialized and used.
> > This matches
> > - * the driver's default behavior::
> > + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > + * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> > *
> > - * # echo 'primary,media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > at the
> > + * beginning of the context restore::
> > *
> > - * Allow only the primary GT of each tile to be initialized and
> > used,
> > - * effectively disabling the media GT if it exists on the
> > platform::
> > + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > + * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> > +
> > + * #. Load certain values in a couple of registers (it can be used
> > as a simpler
> > + * alternative to the `cmd`) action::
> > *
> > - * # echo 'primary' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * # cat >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
> > + * rcs reg 4F100 DEADBEEF
> > + * rcs reg 4F104 FFFFFFFF
> > + * EOF
> > *
> > - * Allow only the media GT of each tile to be initialized and
> > used,
> > - * effectively disabling the primary GT. **This configuration
> > will cause
> > - * device probe failure on all current platforms, but may be
> > allowed on
> > - * igpu platforms in the future**::
> > + * .. note::
> > *
> > - * # echo 'media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * When using multiple lines, make sure to use a command
> > that is
> > + * implemented with a single write syscall, like HEREDOC.
> > *
> > - * Disable all GTs. Only other GPU IP (such as display) is
> > potentially usable.
> > - * **This configuration will cause device probe failure on all
> > current
> > - * platforms, but may be allowed on igpu platforms in the
> > future**::
> > + * Currently this is implemented only for post and mid context
> > restore and
> > + * these attributes can only be set before binding to the device.
> > *
> > - * # echo '' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * PSMI
> > + * ----
> > + *
> > + * Enable extra debugging capabilities to trace engine execution.
> > Only useful
> > + * during early platform enabling and requires additional hardware
> > connected.
> > + * Once it's enabled, additionals WAs are added and runtime
> > configuration is
> > + * done via debugfs. Example to enable it::
> > + *
> > + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> > + *
> > + * This attribute can only be set before binding to the device.
> > + *
> > + * Survivability mode:
> > + * -------------------
> > + *
> > + * Enable survivability mode on supported cards. This setting only
> > takes
> > + * effect when probing the device. Example to enable it::
> > + *
> > + * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> > + *
> > + * This attribute can only be set before binding to the device.
> > *
> > * Allowed engines:
> > * ----------------
> > @@ -147,69 +173,43 @@
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > - * PSMI
> > - * ----
> > + * Allowed GT types:
> > + * -----------------
> > *
> > - * Enable extra debugging capabilities to trace engine execution.
> > Only useful
> > - * during early platform enabling and requires additional hardware
> > connected.
> > - * Once it's enabled, additionals WAs are added and runtime
> > configuration is
> > - * done via debugfs. Example to enable it::
> > + * Allow only specific types of GTs to be detected and initialized
> > by the
> > + * driver. Any combination of GT types can be enabled/disabled,
> > although
> > + * some settings will cause the device to fail to probe.
> > *
> > - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> > + * Writes support both comma- and newline-separated input format.
> > Reads
> > + * will always return one GT type per line. "primary" and "media"
> > are the
> > + * GT type names supported by this interface.
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > - * Context restore BB
> > - * ------------------
> > - *
> > - * Allow to execute a batch buffer during any context switches.
> > When the
> > - * GPU is restoring the context, it executes additional commands.
> > It's useful
> > - * for testing additional workarounds and validating certain HW
> > behaviors: it's
> > - * not intended for normal execution and will taint the kernel
> > with TAINT_TEST
> > - * when used.
> > - *
> > - * The syntax allows to pass straight instructions to be executed
> > by the engine
> > - * in a batch buffer or set specific registers.
> > - *
> > - * #. Generic instruction::
> > - *
> > - * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> > - *
> > - * #. Simple register setting::
> > - *
> > - * <engine-class> reg <address> <value>
> > - *
> > - * Commands are saved per engine class: all instances of that
> > class will execute
> > - * those commands during context switch. The instruction, dword
> > arguments,
> > - * addresses and values are in hex format like in the examples
> > below.
> > + * Examples:
> > *
> > - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > after the
> > - * normal context restore::
> > + * Allow both primary and media GTs to be initialized and used.
> > This matches
> > + * the driver's default behavior::
> > *
> > - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > - * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> > + * # echo 'primary,media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > at the
> > - * beginning of the context restore::
> > + * Allow only the primary GT of each tile to be initialized and
> > used,
> > + * effectively disabling the media GT if it exists on the
> > platform::
> > *
> > - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > - * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> > -
> > - * #. Load certain values in a couple of registers (it can be used
> > as a simpler
> > - * alternative to the `cmd`) action::
> > + * # echo 'primary' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > - * # cat >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
> > - * rcs reg 4F100 DEADBEEF
> > - * rcs reg 4F104 FFFFFFFF
> > - * EOF
> > + * Allow only the media GT of each tile to be initialized and
> > used,
> > + * effectively disabling the primary GT. **This configuration
> > will cause
> > + * device probe failure on all current platforms, but may be
> > allowed on
> > + * igpu platforms in the future**::
> > *
> > - * .. note::
> > + * # echo 'media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > - * When using multiple lines, make sure to use a command
> > that is
> > - * implemented with a single write syscall, like HEREDOC.
> > + * Disable all GTs. Only other GPU IP (such as display) is
> > potentially usable.
> > + * **This configuration will cause device probe failure on all
> > current
> > + * platforms, but may be allowed on igpu platforms in the
> > future**::
> > *
> > - * Currently this is implemented only for post and mid context
> > restore and
> > - * these attributes can only be set before binding to the device.
> > + * # echo '' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > * Max SR-IOV Virtual Functions
> > * ----------------------------
> > @@ -256,15 +256,15 @@ struct xe_config_group_device {
> > struct config_group sriov;
> >
> > struct xe_config_device {
> > - u64 gt_types_allowed;
> > - u64 engines_allowed;
> > - struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > - bool enable_survivability_mode;
> > + struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > bool enable_psmi;
> > + bool enable_survivability_mode;
> > + u64 engines_allowed;
> > + u64 gt_types_allowed;
> > struct {
> > - unsigned int max_vfs;
> > bool admin_only_pf;
> > + unsigned int max_vfs;
> > } sriov;
> > } config;
> >
> > @@ -277,13 +277,13 @@ struct xe_config_group_device {
> > };
> >
> > static const struct xe_config_device device_defaults = {
> > - .gt_types_allowed = U64_MAX,
> > - .engines_allowed = U64_MAX,
> > - .enable_survivability_mode = false,
> > .enable_psmi = false,
> > + .enable_survivability_mode = false,
> > + .engines_allowed = U64_MAX,
> > + .gt_types_allowed = U64_MAX,
> > .sriov = {
> > - .max_vfs = XE_DEFAULT_MAX_VFS,
> > .admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
> > + .max_vfs = XE_DEFAULT_MAX_VFS,
> > },
> > };
> >
> > @@ -814,17 +814,17 @@ static ssize_t
> > ctx_restore_post_bb_store(struct config_item *item,
> > CONFIGFS_ATTR(, ctx_restore_mid_bb);
> > CONFIGFS_ATTR(, ctx_restore_post_bb);
> > CONFIGFS_ATTR(, enable_psmi);
> > +CONFIGFS_ATTR(, enable_survivability_mode);
> > CONFIGFS_ATTR(, engines_allowed);
> > CONFIGFS_ATTR(, gt_types_allowed);
> > -CONFIGFS_ATTR(, enable_survivability_mode);
> >
> > static struct configfs_attribute *xe_config_device_attrs[] = {
> > &attr_ctx_restore_mid_bb,
> > &attr_ctx_restore_post_bb,
> > &attr_enable_psmi,
> > + &attr_enable_survivability_mode,
> > &attr_engines_allowed,
> > &attr_gt_types_allowed,
> > - &attr_enable_survivability_mode,
> > NULL,
> > };
> >
> > @@ -929,12 +929,12 @@ static ssize_t
> > sriov_admin_only_pf_store(struct config_item *item, const char *p
> > return len;
> > }
> >
> > -CONFIGFS_ATTR(sriov_, max_vfs);
> > CONFIGFS_ATTR(sriov_, admin_only_pf);
> > +CONFIGFS_ATTR(sriov_, max_vfs);
> >
> > static struct configfs_attribute *xe_config_sriov_attrs[] = {
> > - &sriov_attr_max_vfs,
> > &sriov_attr_admin_only_pf,
> > + &sriov_attr_max_vfs,
> > NULL,
> > };
> >
> > @@ -1096,10 +1096,10 @@ static void dump_custom_dev_config(struct
> > pci_dev *pdev,
> > dev->config.attr_); \
> > } while (0)
> >
> > - PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > - PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > + PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > + PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> >
> > #undef PRI_CUSTOM_ATTR
> > --
> > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 13:29 ` Gustavo Sousa
2026-05-04 14:32 ` Summers, Stuart
@ 2026-05-04 14:40 ` Summers, Stuart
2026-05-04 18:31 ` Rodrigo Vivi
2 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 14:40 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 10:29 -0300, Gustavo Sousa wrote:
> Stuart Summers <stuart.summers@intel.com> writes:
>
> > Rename the survivability_mode field in struct xe_config_device to
> > enable_survivability_mode to be consistent with the enable_psmi
> > naming
> > convention used for similar boolean config flags.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-------
> > ----
> > drivers/gpu/drm/xe/xe_configfs.h | 4 +--
> > drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
> > 3 files changed, 23 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > b/drivers/gpu/drm/xe/xe_configfs.c
> > index 32102600a148..69abc69ec0f3 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -58,7 +58,7 @@
> > * │ └── ...
> > * :
> > * └── 0000:03:00.0
> > - * ├── survivability_mode
> > + * ├── enable_survivability_mode
> > * ├── gt_types_allowed
> > * ├── engines_allowed
> > * └── enable_psmi
> > @@ -79,7 +79,7 @@
> > * Enable survivability mode on supported cards. This setting only
> > takes
> > * effect when probing the device. Example to enable it::
> > *
> > - * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
> > + * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
>
> I think we have not documented our configfs structure in the kernel
> ABI
> documentation. Are we supposed to do that? Is that not yet done
> because we do not consider our configfs stable enough to be
> classified
> as proper ABI?
>
> In this example, we would be potentially changing what some would
> call
> ABI, hence my questions above.
So yeah the purpose of this series really is to set us up for ABI. But
I want to get concensus that doing this makes sense and won't break any
existing use cases - these parameters are already here of course. The
guc_log_level module parameter (later in the series) is another one I
want to eventually drop and replace with configfs, but that has
probably the most active users today.
Thanks,
Stuart
>
> --
> Gustavo Sousa
>
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > @@ -260,7 +260,7 @@ struct xe_config_group_device {
> > u64 engines_allowed;
> > struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > - bool survivability_mode;
> > + bool enable_survivability_mode;
> > bool enable_psmi;
> > struct {
> > unsigned int max_vfs;
> > @@ -279,7 +279,7 @@ struct xe_config_group_device {
> > static const struct xe_config_device device_defaults = {
> > .gt_types_allowed = U64_MAX,
> > .engines_allowed = U64_MAX,
> > - .survivability_mode = false,
> > + .enable_survivability_mode = false,
> > .enable_psmi = false,
> > .sriov = {
> > .max_vfs = XE_DEFAULT_MAX_VFS,
> > @@ -357,20 +357,21 @@ static bool is_bound(struct
> > xe_config_group_device *dev)
> > return ret;
> > }
> >
> > -static ssize_t survivability_mode_show(struct config_item *item,
> > char *page)
> > +static ssize_t enable_survivability_mode_show(struct config_item
> > *item, char *page)
> > {
> > struct xe_config_device *dev = to_xe_config_device(item);
> >
> > - return sprintf(page, "%d\n", dev->survivability_mode);
> > + return sprintf(page, "%d\n", dev-
> > >enable_survivability_mode);
> > }
> >
> > -static ssize_t survivability_mode_store(struct config_item *item,
> > const char *page, size_t len)
> > +static ssize_t enable_survivability_mode_store(struct config_item
> > *item, const char *page,
> > + size_t len)
> > {
> > struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> > - bool survivability_mode;
> > + bool enable_survivability_mode;
> > int ret;
> >
> > - ret = kstrtobool(page, &survivability_mode);
> > + ret = kstrtobool(page, &enable_survivability_mode);
> > if (ret)
> > return ret;
> >
> > @@ -378,7 +379,7 @@ static ssize_t survivability_mode_store(struct
> > config_item *item, const char *pa
> > if (is_bound(dev))
> > return -EBUSY;
> >
> > - dev->config.survivability_mode = survivability_mode;
> > + dev->config.enable_survivability_mode =
> > enable_survivability_mode;
> >
> > return len;
> > }
> > @@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> > CONFIGFS_ATTR(, enable_psmi);
> > CONFIGFS_ATTR(, engines_allowed);
> > CONFIGFS_ATTR(, gt_types_allowed);
> > -CONFIGFS_ATTR(, survivability_mode);
> > +CONFIGFS_ATTR(, enable_survivability_mode);
> >
> > static struct configfs_attribute *xe_config_device_attrs[] = {
> > &attr_ctx_restore_mid_bb,
> > @@ -823,7 +824,7 @@ static struct configfs_attribute
> > *xe_config_device_attrs[] = {
> > &attr_enable_psmi,
> > &attr_engines_allowed,
> > &attr_gt_types_allowed,
> > - &attr_survivability_mode,
> > + &attr_enable_survivability_mode,
> > NULL,
> > };
> >
> > @@ -847,7 +848,7 @@ static bool xe_config_device_is_visible(struct
> > config_item *item,
> > {
> > struct xe_config_group_device *dev =
> > to_xe_config_group_device(item);
> >
> > - if (attr == &attr_survivability_mode) {
> > + if (attr == &attr_enable_survivability_mode) {
> > if (!dev->desc->is_dgfx || dev->desc->platform <
> > XE_BATTLEMAGE)
> > return false;
> > }
> > @@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct
> > pci_dev *pdev,
> > PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > - PRI_CUSTOM_ATTR("%d", survivability_mode);
> > + PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> >
> > #undef PRI_CUSTOM_ATTR
> > @@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct
> > pci_dev *pdev)
> > }
> >
> > /**
> > - * xe_configfs_get_survivability_mode - get configfs survivability
> > mode attribute
> > + * xe_configfs_get_enable_survivability_mode - get configfs
> > survivability mode attribute
> > * @pdev: pci device
> > *
> > - * Return: survivability_mode attribute in configfs
> > + * Return: enable_survivability_mode attribute in configfs
> > */
> > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
> > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > *pdev)
> > {
> > struct xe_config_group_device *dev =
> > find_xe_config_group_device(pdev);
> > bool mode;
> >
> > if (!dev)
> > - return device_defaults.survivability_mode;
> > + return device_defaults.enable_survivability_mode;
> >
> > - mode = dev->config.survivability_mode;
> > + mode = dev->config.enable_survivability_mode;
> > config_group_put(&dev->group);
> >
> > return mode;
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.h
> > b/drivers/gpu/drm/xe/xe_configfs.h
> > index 07d62bf0c152..517de4946d35 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.h
> > +++ b/drivers/gpu/drm/xe/xe_configfs.h
> > @@ -18,7 +18,7 @@ struct pci_dev;
> > int xe_configfs_init(void);
> > void xe_configfs_exit(void);
> > void xe_configfs_check_device(struct pci_dev *pdev);
> > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > *pdev);
> > bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> > bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> > @@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev
> > *pdev);
> > static inline int xe_configfs_init(void) { return 0; }
> > static inline void xe_configfs_exit(void) { }
> > static inline void xe_configfs_check_device(struct pci_dev *pdev)
> > { }
> > -static inline bool xe_configfs_get_survivability_mode(struct
> > pci_dev *pdev) { return false; }
> > +static inline bool
> > xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) {
> > return false; }
> > static inline bool xe_configfs_primary_gt_allowed(struct pci_dev
> > *pdev) { return true; }
> > static inline bool xe_configfs_media_gt_allowed(struct pci_dev
> > *pdev) { return true; }
> > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev
> > *pdev) { return U64_MAX; }
> > diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > index db64cac39c94..7c85bdb267af 100644
> > --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > @@ -377,7 +377,7 @@ bool xe_survivability_mode_is_requested(struct
> > xe_device *xe)
> > if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform <
> > XE_BATTLEMAGE)
> > return false;
> >
> > - survivability_mode =
> > xe_configfs_get_survivability_mode(pdev);
> > + survivability_mode =
> > xe_configfs_get_enable_survivability_mode(pdev);
> > /* Enable survivability mode if set via configfs */
> > if (survivability_mode)
> > return true;
> > --
> > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 4:43 ` [PATCH 4/9] drm/xe: Add a new debug focused configfs group Stuart Summers
@ 2026-05-04 15:42 ` Gustavo Sousa
2026-05-04 15:50 ` Summers, Stuart
0 siblings, 1 reply; 37+ messages in thread
From: Gustavo Sousa @ 2026-05-04 15:42 UTC (permalink / raw)
To: Stuart Summers
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin, Stuart Summers
Stuart Summers <stuart.summers@intel.com> writes:
> Add the skeleton code for a new debug specific configfs group.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/Makefile | 2 ++
> drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
> drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
> drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
> drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
> 5 files changed, 35 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
> create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 09661f079d03..b58667b0b18e 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
>
> xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
> xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
> +xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) := xe_configfs_debug.o
> +xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
What are the downsides of keeping this available for non-debug builds?
I imagine that the debug configfs could be useful for someone not
involved in kernel development working together with the developers to
debug issues without needing to rebuild their kernel.
>
> # graphics virtualization (SR-IOV) support
> xe-y += \
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 12b7fe65446d..85df8ce5cf2a 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -1006,6 +1006,10 @@ static struct config_group *xe_config_make_device_group(struct config_group *gro
> config_group_init_type_name(&dev->sriov, "sriov", &xe_config_sriov_type);
> configfs_add_default_group(&dev->sriov, &dev->group);
> }
> +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> + config_group_init_type_name(&dev->debug, "debug", &xe_configfs_debug_type);
> + configfs_add_default_group(&dev->debug, &dev->group);
> +#endif
I guess there isn't much we can do about it today, but, based on what I
read in configfs documentation a while ago, I suspect it wasn't really
designed with arbitrary hierarchies of config items in mind. It would
be nice if there was an API for that though.
Basically, a config group is expected to be a directory to contain a set
of config items of the same type, which is not the case on our current
usage (i.e. the "sriov" and now the "debug" group).
I guess we are able to get our desired behavior (basically just a
subdirectory behaving as a config item) by not implementing the
"make_item" hook. Not sure if that's an expected use of the API or if
that's more of a hack on our side and could come back to bite us in the
future.
--
Gustavo Sousa
>
> mutex_init(&dev->lock);
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
> new file mode 100644
> index 000000000000..45617282cec5
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include <linux/configfs.h>
> +#include <linux/module.h>
> +
> +#include "xe_configfs_debug.h"
> +#include "xe_configfs_types.h"
> +
> +const struct config_item_type xe_configfs_debug_type = {
> + .ct_owner = THIS_MODULE,
> +};
> diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
> new file mode 100644
> index 000000000000..01170dc2f97e
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
> @@ -0,0 +1,8 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +#ifndef _XE_CONFIGFS_DEBUG_H_
> +#define _XE_CONFIGFS_DEBUG_H_
> +
> +#endif /* _XE_CONFIGFS_DEBUG_H_ */
> diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
> index 935097aafa96..c9d94a3c26a7 100644
> --- a/drivers/gpu/drm/xe/xe_configfs_types.h
> +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> @@ -24,6 +24,9 @@ struct wa_bb {
> struct xe_config_group_device {
> struct config_group group;
> struct config_group sriov;
> +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> + struct config_group debug;
> +#endif
>
> struct xe_config_device {
> struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> @@ -56,4 +59,8 @@ static inline struct xe_config_device *xe_configfs_to_device(struct config_item
> return &xe_configfs_to_group_device(item)->config;
> }
>
> +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> +extern const struct config_item_type xe_configfs_debug_type;
> +#endif
> +
> #endif /* _XE_CONFIGFS_TYPES_H_ */
> --
> 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* RE: [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically
2026-05-04 4:43 ` [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically Stuart Summers
2026-05-04 13:58 ` Gustavo Sousa
@ 2026-05-04 15:47 ` Lin, Shuicheng
2026-05-04 15:54 ` Summers, Stuart
1 sibling, 1 reply; 37+ messages in thread
From: Lin, Shuicheng @ 2026-05-04 15:47 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Vivi, Rodrigo, Brost, Matthew,
Nerlige Ramappa, Umesh, Wajdeczko, Michal, Roper, Matthew D,
Ceraolo Spurio, Daniele
On Sun, May 3, 2026 9:44 PM Stuart Summers wrote:
> Sort the fields in struct xe_config_device and the corresponding
> device_defaults initializer in alphabetical order. Non-SRIOV fields come first
> (alphabetically), followed by the SRIOV sub-struct with its own fields in
> alphabetical order. Also sort the PRI_CUSTOM_ATTR calls in
> dump_custom_dev_config() to match and the documentation for each of the
> fields.
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 192 +++++++++++++++----------------
> 1 file changed, 96 insertions(+), 96 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> b/drivers/gpu/drm/xe/xe_configfs.c
> index 69abc69ec0f3..1e134057fae8 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -73,53 +73,79 @@
> * Configure Attributes
> * ====================
> *
> - * Survivability mode:
> - * -------------------
> + * Context restore BB
> + * ------------------
> *
> - * Enable survivability mode on supported cards. This setting only takes
> - * effect when probing the device. Example to enable it::
> + * Allow to execute a batch buffer during any context switches. When
> + the
> + * GPU is restoring the context, it executes additional commands. It's
> + useful
> + * for testing additional workarounds and validating certain HW
> + behaviors: it's
> + * not intended for normal execution and will taint the kernel with
> + TAINT_TEST
> + * when used.
> *
> - * # echo 1 >
> /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> + * The syntax allows to pass straight instructions to be executed by
> + the engine
> + * in a batch buffer or set specific registers.
> *
> - * This attribute can only be set before binding to the device.
> + * #. Generic instruction::
> *
> - * Allowed GT types:
> - * -----------------
> + * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> *
> - * Allow only specific types of GTs to be detected and initialized by the
> - * driver. Any combination of GT types can be enabled/disabled, although
> - * some settings will cause the device to fail to probe.
> + * #. Simple register setting::
> *
> - * Writes support both comma- and newline-separated input format. Reads
> - * will always return one GT type per line. "primary" and "media" are the
> - * GT type names supported by this interface.
> + * <engine-class> reg <address> <value>
> *
> - * This attribute can only be set before binding to the device.
> + * Commands are saved per engine class: all instances of that class
> + will execute
> + * those commands during context switch. The instruction, dword
> + arguments,
> + * addresses and values are in hex format like in the examples below.
> *
> - * Examples:
> + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
> + * normal context restore::
> *
> - * Allow both primary and media GTs to be initialized and used. This matches
> - * the driver's default behavior::
> + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> + * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> *
> - * # echo 'primary,media' >
> /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
> + * beginning of the context restore::
> *
> - * Allow only the primary GT of each tile to be initialized and used,
> - * effectively disabling the media GT if it exists on the platform::
> + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> + * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> +
> + * #. Load certain values in a couple of registers (it can be used as a simpler
> + * alternative to the `cmd`) action::
> *
> - * # echo 'primary' >
> /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> <<EOF
> + * rcs reg 4F100 DEADBEEF
> + * rcs reg 4F104 FFFFFFFF
> + * EOF
> *
> - * Allow only the media GT of each tile to be initialized and used,
> - * effectively disabling the primary GT. **This configuration will cause
> - * device probe failure on all current platforms, but may be allowed on
> - * igpu platforms in the future**::
> + * .. note::
> *
> - * # echo 'media' >
> /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * When using multiple lines, make sure to use a command that is
> + * implemented with a single write syscall, like HEREDOC.
> *
> - * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
> - * **This configuration will cause device probe failure on all current
> - * platforms, but may be allowed on igpu platforms in the future**::
> + * Currently this is implemented only for post and mid context restore
> + and
> + * these attributes can only be set before binding to the device.
> *
> - * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> + * PSMI
> + * ----
> + *
> + * Enable extra debugging capabilities to trace engine execution. Only
> + useful
> + * during early platform enabling and requires additional hardware
> connected.
> + * Once it's enabled, additionals WAs are added and runtime
> + configuration is
> + * done via debugfs. Example to enable it::
> + *
> + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> + *
> + * This attribute can only be set before binding to the device.
> + *
> + * Survivability mode:
> + * -------------------
> + *
> + * Enable survivability mode on supported cards. This setting only
> + takes
> + * effect when probing the device. Example to enable it::
> + *
> + * # echo 1 >
> /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> + *
> + * This attribute can only be set before binding to the device.
> *
> * Allowed engines:
> * ----------------
> @@ -147,69 +173,43 @@
> *
> * This attribute can only be set before binding to the device.
> *
> - * PSMI
> - * ----
> + * Allowed GT types:
> + * -----------------
> *
> - * Enable extra debugging capabilities to trace engine execution. Only useful
> - * during early platform enabling and requires additional hardware connected.
> - * Once it's enabled, additionals WAs are added and runtime configuration is
> - * done via debugfs. Example to enable it::
> + * Allow only specific types of GTs to be detected and initialized by
> + the
> + * driver. Any combination of GT types can be enabled/disabled,
> + although
> + * some settings will cause the device to fail to probe.
> *
> - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> + * Writes support both comma- and newline-separated input format. Reads
> + * will always return one GT type per line. "primary" and "media" are
> + the
> + * GT type names supported by this interface.
> *
> * This attribute can only be set before binding to the device.
> *
> - * Context restore BB
> - * ------------------
> - *
> - * Allow to execute a batch buffer during any context switches. When the
> - * GPU is restoring the context, it executes additional commands. It's useful
> - * for testing additional workarounds and validating certain HW behaviors: it's
> - * not intended for normal execution and will taint the kernel with TAINT_TEST
> - * when used.
> - *
> - * The syntax allows to pass straight instructions to be executed by the engine
> - * in a batch buffer or set specific registers.
> - *
> - * #. Generic instruction::
> - *
> - * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> - *
> - * #. Simple register setting::
> - *
> - * <engine-class> reg <address> <value>
> - *
> - * Commands are saved per engine class: all instances of that class will execute
> - * those commands during context switch. The instruction, dword
> arguments,
> - * addresses and values are in hex format like in the examples below.
> + * Examples:
> *
> - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 after the
> - * normal context restore::
> + * Allow both primary and media GTs to be initialized and used. This
> + matches
> + * the driver's default behavior::
> *
> - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> - * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> + * # echo 'primary,media' >
> /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10 at the
> - * beginning of the context restore::
> + * Allow only the primary GT of each tile to be initialized and used,
> + * effectively disabling the media GT if it exists on the platform::
> *
> - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> - * > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> -
> - * #. Load certain values in a couple of registers (it can be used as a simpler
> - * alternative to the `cmd`) action::
> + * # echo 'primary' >
> /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> - * # cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> <<EOF
> - * rcs reg 4F100 DEADBEEF
> - * rcs reg 4F104 FFFFFFFF
> - * EOF
> + * Allow only the media GT of each tile to be initialized and used,
> + * effectively disabling the primary GT. **This configuration will
> + cause
> + * device probe failure on all current platforms, but may be allowed on
> + * igpu platforms in the future**::
> *
> - * .. note::
> + * # echo 'media' >
> /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> - * When using multiple lines, make sure to use a command that is
> - * implemented with a single write syscall, like HEREDOC.
> + * Disable all GTs. Only other GPU IP (such as display) is potentially usable.
> + * **This configuration will cause device probe failure on all current
> + * platforms, but may be allowed on igpu platforms in the future**::
> *
> - * Currently this is implemented only for post and mid context restore and
> - * these attributes can only be set before binding to the device.
> + * # echo '' > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> *
> * Max SR-IOV Virtual Functions
> * ----------------------------
> @@ -256,15 +256,15 @@ struct xe_config_group_device {
> struct config_group sriov;
>
> struct xe_config_device {
> - u64 gt_types_allowed;
> - u64 engines_allowed;
> - struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> - bool enable_survivability_mode;
> + struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> bool enable_psmi;
> + bool enable_survivability_mode;
> + u64 engines_allowed;
> + u64 gt_types_allowed;
> struct {
> - unsigned int max_vfs;
> bool admin_only_pf;
> + unsigned int max_vfs;
> } sriov;
> } config;
Here is the comment from [1], which seems reasonable to me.
"
Does sorting struct members alphabetically here introduce unnecessary memory
padding?
Placing the bool fields enable_psmi and enable_survivability_mode immediately
before the u64 fields engines_allowed and gt_types_allowed introduces 6 bytes
of padding. In the sriov sub-struct, placing the bool admin_only_pf before the
unsigned int max_vfs introduces 3 bytes of padding.
Could these fields be ordered by size to minimize padding instead of being
sorted alphabetically?
"
If we decide to sort them, we could add comments like below for the flags in struct intel_device_info.
" * Keep all flags below alphabetically sorted"
[1]: https://sashiko.dev/#/patchset/20260504044348.209625-1-stuart.summers%40intel.com
Shuicheng
>
> @@ -277,13 +277,13 @@ struct xe_config_group_device { };
>
> static const struct xe_config_device device_defaults = {
> - .gt_types_allowed = U64_MAX,
> - .engines_allowed = U64_MAX,
> - .enable_survivability_mode = false,
> .enable_psmi = false,
> + .enable_survivability_mode = false,
> + .engines_allowed = U64_MAX,
> + .gt_types_allowed = U64_MAX,
> .sriov = {
> - .max_vfs = XE_DEFAULT_MAX_VFS,
> .admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
> + .max_vfs = XE_DEFAULT_MAX_VFS,
> },
> };
>
> @@ -814,17 +814,17 @@ static ssize_t ctx_restore_post_bb_store(struct
> config_item *item, CONFIGFS_ATTR(, ctx_restore_mid_bb);
> CONFIGFS_ATTR(, ctx_restore_post_bb); CONFIGFS_ATTR(, enable_psmi);
> +CONFIGFS_ATTR(, enable_survivability_mode);
> CONFIGFS_ATTR(, engines_allowed);
> CONFIGFS_ATTR(, gt_types_allowed);
> -CONFIGFS_ATTR(, enable_survivability_mode);
>
> static struct configfs_attribute *xe_config_device_attrs[] = {
> &attr_ctx_restore_mid_bb,
> &attr_ctx_restore_post_bb,
> &attr_enable_psmi,
> + &attr_enable_survivability_mode,
> &attr_engines_allowed,
> &attr_gt_types_allowed,
> - &attr_enable_survivability_mode,
> NULL,
> };
>
> @@ -929,12 +929,12 @@ static ssize_t sriov_admin_only_pf_store(struct
> config_item *item, const char *p
> return len;
> }
>
> -CONFIGFS_ATTR(sriov_, max_vfs);
> CONFIGFS_ATTR(sriov_, admin_only_pf);
> +CONFIGFS_ATTR(sriov_, max_vfs);
>
> static struct configfs_attribute *xe_config_sriov_attrs[] = {
> - &sriov_attr_max_vfs,
> &sriov_attr_admin_only_pf,
> + &sriov_attr_max_vfs,
> NULL,
> };
>
> @@ -1096,10 +1096,10 @@ static void dump_custom_dev_config(struct
> pci_dev *pdev,
> dev->config.attr_); \
> } while (0)
>
> - PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> - PRI_CUSTOM_ATTR("%llx", engines_allowed);
> PRI_CUSTOM_ATTR("%d", enable_psmi);
> PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> + PRI_CUSTOM_ATTR("%llx", engines_allowed);
> + PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
>
> #undef PRI_CUSTOM_ATTR
> --
> 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 15:42 ` Gustavo Sousa
@ 2026-05-04 15:50 ` Summers, Stuart
2026-05-04 17:28 ` Gustavo Sousa
2026-05-05 21:45 ` Summers, Stuart
0 siblings, 2 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 15:50 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 12:42 -0300, Gustavo Sousa wrote:
> Stuart Summers <stuart.summers@intel.com> writes:
>
> > Add the skeleton code for a new debug specific configfs group.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/Makefile | 2 ++
> > drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
> > drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
> > drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
> > drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
> > 5 files changed, 35 insertions(+)
> > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
> > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
> >
> > diff --git a/drivers/gpu/drm/xe/Makefile
> > b/drivers/gpu/drm/xe/Makefile
> > index 09661f079d03..b58667b0b18e 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
> >
> > xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
> > xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
> > +xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) :=
> > xe_configfs_debug.o
> > +xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
>
> What are the downsides of keeping this available for non-debug
> builds?
>
> I imagine that the debug configfs could be useful for someone not
> involved in kernel development working together with the developers
> to
> debug issues without needing to rebuild their kernel.
So the focal parameter we had in i915 was enable_rc6. Something like
this is what we explicitly don't want to expose to a general user as it
can have unforeseen consequences (like having very high power usage).
But, having the ability to disable rc6 for debug purposes as a
developer is extremely useful at narrowing down certain types of bugs
at the hardware/software interface.
That's just one example, but there are a bunch of things that could fit
this category and I expect we'll have even more use cases over time.
Right now we have to hold these types of changes in a side branch not
exposed externally and I really want to converge our processes so we
can more easily make these kinds of changes and let us debug directly
out of drm-tip.
>
> >
> > # graphics virtualization (SR-IOV) support
> > xe-y += \
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > b/drivers/gpu/drm/xe/xe_configfs.c
> > index 12b7fe65446d..85df8ce5cf2a 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -1006,6 +1006,10 @@ static struct config_group
> > *xe_config_make_device_group(struct config_group *gro
> > config_group_init_type_name(&dev->sriov, "sriov",
> > &xe_config_sriov_type);
> > configfs_add_default_group(&dev->sriov, &dev-
> > >group);
> > }
> > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > + config_group_init_type_name(&dev->debug, "debug",
> > &xe_configfs_debug_type);
> > + configfs_add_default_group(&dev->debug, &dev->group);
> > +#endif
>
> I guess there isn't much we can do about it today, but, based on what
> I
> read in configfs documentation a while ago, I suspect it wasn't
> really
> designed with arbitrary hierarchies of config items in mind. It
> would
> be nice if there was an API for that though.
>
> Basically, a config group is expected to be a directory to contain a
> set
> of config items of the same type, which is not the case on our
> current
> usage (i.e. the "sriov" and now the "debug" group).
>
> I guess we are able to get our desired behavior (basically just a
> subdirectory behaving as a config item) by not implementing the
> "make_item" hook. Not sure if that's an expected use of the API or
> if
> that's more of a hack on our side and could come back to bite us in
> the
> future.
Hm.. ok that's good feedback. I do like bucketing these in groups and
subdirectories. It also makes it easy to show or not show based on the
Kconfig. But let me go through and make sure there isn't something more
suited here. Happy to hear any other feedback as well here.
Thanks,
Stuart
>
> --
> Gustavo Sousa
>
> >
> > mutex_init(&dev->lock);
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c
> > b/drivers/gpu/drm/xe/xe_configfs_debug.c
> > new file mode 100644
> > index 000000000000..45617282cec5
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
> > @@ -0,0 +1,14 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2026 Intel Corporation
> > + */
> > +
> > +#include <linux/configfs.h>
> > +#include <linux/module.h>
> > +
> > +#include "xe_configfs_debug.h"
> > +#include "xe_configfs_types.h"
> > +
> > +const struct config_item_type xe_configfs_debug_type = {
> > + .ct_owner = THIS_MODULE,
> > +};
> > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h
> > b/drivers/gpu/drm/xe/xe_configfs_debug.h
> > new file mode 100644
> > index 000000000000..01170dc2f97e
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
> > @@ -0,0 +1,8 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2026 Intel Corporation
> > + */
> > +#ifndef _XE_CONFIGFS_DEBUG_H_
> > +#define _XE_CONFIGFS_DEBUG_H_
> > +
> > +#endif /* _XE_CONFIGFS_DEBUG_H_ */
> > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> > b/drivers/gpu/drm/xe/xe_configfs_types.h
> > index 935097aafa96..c9d94a3c26a7 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs_types.h
> > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> > @@ -24,6 +24,9 @@ struct wa_bb {
> > struct xe_config_group_device {
> > struct config_group group;
> > struct config_group sriov;
> > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > + struct config_group debug;
> > +#endif
> >
> > struct xe_config_device {
> > struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > @@ -56,4 +59,8 @@ static inline struct xe_config_device
> > *xe_configfs_to_device(struct config_item
> > return &xe_configfs_to_group_device(item)->config;
> > }
> >
> > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > +extern const struct config_item_type xe_configfs_debug_type;
> > +#endif
> > +
> > #endif /* _XE_CONFIGFS_TYPES_H_ */
> > --
> > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically
2026-05-04 15:47 ` Lin, Shuicheng
@ 2026-05-04 15:54 ` Summers, Stuart
0 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 15:54 UTC (permalink / raw)
To: Lin, Shuicheng
Cc: intel-xe@lists.freedesktop.org, Vivi, Rodrigo, Brost, Matthew,
Nerlige Ramappa, Umesh, Roper, Matthew D, Wajdeczko, Michal,
Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 15:47 +0000, Lin, Shuicheng wrote:
> On Sun, May 3, 2026 9:44 PM Stuart Summers wrote:
> > Sort the fields in struct xe_config_device and the corresponding
> > device_defaults initializer in alphabetical order. Non-SRIOV fields
> > come first
> > (alphabetically), followed by the SRIOV sub-struct with its own
> > fields in
> > alphabetical order. Also sort the PRI_CUSTOM_ATTR calls in
> > dump_custom_dev_config() to match and the documentation for each of
> > the
> > fields.
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/xe_configfs.c | 192 +++++++++++++++------------
> > ----
> > 1 file changed, 96 insertions(+), 96 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > b/drivers/gpu/drm/xe/xe_configfs.c
> > index 69abc69ec0f3..1e134057fae8 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -73,53 +73,79 @@
> > * Configure Attributes
> > * ====================
> > *
> > - * Survivability mode:
> > - * -------------------
> > + * Context restore BB
> > + * ------------------
> > *
> > - * Enable survivability mode on supported cards. This setting only
> > takes
> > - * effect when probing the device. Example to enable it::
> > + * Allow to execute a batch buffer during any context switches.
> > When
> > + the
> > + * GPU is restoring the context, it executes additional commands.
> > It's
> > + useful
> > + * for testing additional workarounds and validating certain HW
> > + behaviors: it's
> > + * not intended for normal execution and will taint the kernel
> > with
> > + TAINT_TEST
> > + * when used.
> > *
> > - * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> > + * The syntax allows to pass straight instructions to be executed
> > by
> > + the engine
> > + * in a batch buffer or set specific registers.
> > *
> > - * This attribute can only be set before binding to the device.
> > + * #. Generic instruction::
> > *
> > - * Allowed GT types:
> > - * -----------------
> > + * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> > *
> > - * Allow only specific types of GTs to be detected and initialized
> > by the
> > - * driver. Any combination of GT types can be enabled/disabled,
> > although
> > - * some settings will cause the device to fail to probe.
> > + * #. Simple register setting::
> > *
> > - * Writes support both comma- and newline-separated input format.
> > Reads
> > - * will always return one GT type per line. "primary" and "media"
> > are the
> > - * GT type names supported by this interface.
> > + * <engine-class> reg <address> <value>
> > *
> > - * This attribute can only be set before binding to the device.
> > + * Commands are saved per engine class: all instances of that
> > class
> > + will execute
> > + * those commands during context switch. The instruction, dword
> > + arguments,
> > + * addresses and values are in hex format like in the examples
> > below.
> > *
> > - * Examples:
> > + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > after the
> > + * normal context restore::
> > *
> > - * Allow both primary and media GTs to be initialized and used.
> > This matches
> > - * the driver's default behavior::
> > + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > + * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> > *
> > - * # echo 'primary,media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > at the
> > + * beginning of the context restore::
> > *
> > - * Allow only the primary GT of each tile to be initialized and
> > used,
> > - * effectively disabling the media GT if it exists on the
> > platform::
> > + * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > + * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> > +
> > + * #. Load certain values in a couple of registers (it can be used
> > as a simpler
> > + * alternative to the `cmd`) action::
> > *
> > - * # echo 'primary' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * # cat >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> > <<EOF
> > + * rcs reg 4F100 DEADBEEF
> > + * rcs reg 4F104 FFFFFFFF
> > + * EOF
> > *
> > - * Allow only the media GT of each tile to be initialized and
> > used,
> > - * effectively disabling the primary GT. **This configuration
> > will cause
> > - * device probe failure on all current platforms, but may be
> > allowed on
> > - * igpu platforms in the future**::
> > + * .. note::
> > *
> > - * # echo 'media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * When using multiple lines, make sure to use a command
> > that is
> > + * implemented with a single write syscall, like HEREDOC.
> > *
> > - * Disable all GTs. Only other GPU IP (such as display) is
> > potentially usable.
> > - * **This configuration will cause device probe failure on all
> > current
> > - * platforms, but may be allowed on igpu platforms in the
> > future**::
> > + * Currently this is implemented only for post and mid context
> > restore
> > + and
> > + * these attributes can only be set before binding to the device.
> > *
> > - * # echo '' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > + * PSMI
> > + * ----
> > + *
> > + * Enable extra debugging capabilities to trace engine execution.
> > Only
> > + useful
> > + * during early platform enabling and requires additional hardware
> > connected.
> > + * Once it's enabled, additionals WAs are added and runtime
> > + configuration is
> > + * done via debugfs. Example to enable it::
> > + *
> > + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> > + *
> > + * This attribute can only be set before binding to the device.
> > + *
> > + * Survivability mode:
> > + * -------------------
> > + *
> > + * Enable survivability mode on supported cards. This setting only
> > + takes
> > + * effect when probing the device. Example to enable it::
> > + *
> > + * # echo 1 >
> > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> > + *
> > + * This attribute can only be set before binding to the device.
> > *
> > * Allowed engines:
> > * ----------------
> > @@ -147,69 +173,43 @@
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > - * PSMI
> > - * ----
> > + * Allowed GT types:
> > + * -----------------
> > *
> > - * Enable extra debugging capabilities to trace engine execution.
> > Only useful
> > - * during early platform enabling and requires additional hardware
> > connected.
> > - * Once it's enabled, additionals WAs are added and runtime
> > configuration is
> > - * done via debugfs. Example to enable it::
> > + * Allow only specific types of GTs to be detected and initialized
> > by
> > + the
> > + * driver. Any combination of GT types can be enabled/disabled,
> > + although
> > + * some settings will cause the device to fail to probe.
> > *
> > - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_psmi
> > + * Writes support both comma- and newline-separated input format.
> > Reads
> > + * will always return one GT type per line. "primary" and "media"
> > are
> > + the
> > + * GT type names supported by this interface.
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > - * Context restore BB
> > - * ------------------
> > - *
> > - * Allow to execute a batch buffer during any context switches.
> > When the
> > - * GPU is restoring the context, it executes additional commands.
> > It's useful
> > - * for testing additional workarounds and validating certain HW
> > behaviors: it's
> > - * not intended for normal execution and will taint the kernel
> > with TAINT_TEST
> > - * when used.
> > - *
> > - * The syntax allows to pass straight instructions to be executed
> > by the engine
> > - * in a batch buffer or set specific registers.
> > - *
> > - * #. Generic instruction::
> > - *
> > - * <engine-class> cmd <instr> [[dword0] [dword1] [...]]
> > - *
> > - * #. Simple register setting::
> > - *
> > - * <engine-class> reg <address> <value>
> > - *
> > - * Commands are saved per engine class: all instances of that
> > class will execute
> > - * those commands during context switch. The instruction, dword
> > arguments,
> > - * addresses and values are in hex format like in the examples
> > below.
> > + * Examples:
> > *
> > - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > after the
> > - * normal context restore::
> > + * Allow both primary and media GTs to be initialized and used.
> > This
> > + matches
> > + * the driver's default behavior::
> > *
> > - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > - * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> > + * # echo 'primary,media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > - * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10
> > at the
> > - * beginning of the context restore::
> > + * Allow only the primary GT of each tile to be initialized and
> > used,
> > + * effectively disabling the media GT if it exists on the
> > platform::
> > *
> > - * # echo 'rcs cmd 11000001 4F100 DEADBEEF' \
> > - * >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_mid_bb
> > -
> > - * #. Load certain values in a couple of registers (it can be used
> > as a simpler
> > - * alternative to the `cmd`) action::
> > + * # echo 'primary' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > - * # cat >
> > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
> > <<EOF
> > - * rcs reg 4F100 DEADBEEF
> > - * rcs reg 4F104 FFFFFFFF
> > - * EOF
> > + * Allow only the media GT of each tile to be initialized and
> > used,
> > + * effectively disabling the primary GT. **This configuration
> > will
> > + cause
> > + * device probe failure on all current platforms, but may be
> > allowed on
> > + * igpu platforms in the future**::
> > *
> > - * .. note::
> > + * # echo 'media' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > - * When using multiple lines, make sure to use a command
> > that is
> > - * implemented with a single write syscall, like HEREDOC.
> > + * Disable all GTs. Only other GPU IP (such as display) is
> > potentially usable.
> > + * **This configuration will cause device probe failure on all
> > current
> > + * platforms, but may be allowed on igpu platforms in the
> > future**::
> > *
> > - * Currently this is implemented only for post and mid context
> > restore and
> > - * these attributes can only be set before binding to the device.
> > + * # echo '' >
> > /sys/kernel/config/xe/0000:03:00.0/gt_types_allowed
> > *
> > * Max SR-IOV Virtual Functions
> > * ----------------------------
> > @@ -256,15 +256,15 @@ struct xe_config_group_device {
> > struct config_group sriov;
> >
> > struct xe_config_device {
> > - u64 gt_types_allowed;
> > - u64 engines_allowed;
> > - struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > struct wa_bb
> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > - bool enable_survivability_mode;
> > + struct wa_bb
> > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > bool enable_psmi;
> > + bool enable_survivability_mode;
> > + u64 engines_allowed;
> > + u64 gt_types_allowed;
> > struct {
> > - unsigned int max_vfs;
> > bool admin_only_pf;
> > + unsigned int max_vfs;
> > } sriov;
> > } config;
>
> Here is the comment from [1], which seems reasonable to me.
> "
> Does sorting struct members alphabetically here introduce unnecessary
> memory
> padding?
> Placing the bool fields enable_psmi and enable_survivability_mode
> immediately
> before the u64 fields engines_allowed and gt_types_allowed introduces
> 6 bytes
> of padding. In the sriov sub-struct, placing the bool admin_only_pf
> before the
> unsigned int max_vfs introduces 3 bytes of padding.
> Could these fields be ordered by size to minimize padding instead of
> being
> sorted alphabetically?
> "
>
> If we decide to sort them, we could add comments like below for the
> flags in struct intel_device_info.
> " * Keep all flags below alphabetically sorted"
Oh thanks for pointing the sashiko review out - I wasn't getting emails
about this so I hadn't looked there yet. I'll go through all that
feedback and update where it makes sense.
I agree with what you said above too.
Thanks,
Stuart
>
> [1]:
> https://sashiko.dev/#/patchset/20260504044348.209625-1-stuart.summers%40intel.com
>
> Shuicheng
>
> >
> > @@ -277,13 +277,13 @@ struct xe_config_group_device { };
> >
> > static const struct xe_config_device device_defaults = {
> > - .gt_types_allowed = U64_MAX,
> > - .engines_allowed = U64_MAX,
> > - .enable_survivability_mode = false,
> > .enable_psmi = false,
> > + .enable_survivability_mode = false,
> > + .engines_allowed = U64_MAX,
> > + .gt_types_allowed = U64_MAX,
> > .sriov = {
> > - .max_vfs = XE_DEFAULT_MAX_VFS,
> > .admin_only_pf = XE_DEFAULT_ADMIN_ONLY_PF,
> > + .max_vfs = XE_DEFAULT_MAX_VFS,
> > },
> > };
> >
> > @@ -814,17 +814,17 @@ static ssize_t
> > ctx_restore_post_bb_store(struct
> > config_item *item, CONFIGFS_ATTR(, ctx_restore_mid_bb);
> > CONFIGFS_ATTR(, ctx_restore_post_bb); CONFIGFS_ATTR(,
> > enable_psmi);
> > +CONFIGFS_ATTR(, enable_survivability_mode);
> > CONFIGFS_ATTR(, engines_allowed);
> > CONFIGFS_ATTR(, gt_types_allowed);
> > -CONFIGFS_ATTR(, enable_survivability_mode);
> >
> > static struct configfs_attribute *xe_config_device_attrs[] = {
> > &attr_ctx_restore_mid_bb,
> > &attr_ctx_restore_post_bb,
> > &attr_enable_psmi,
> > + &attr_enable_survivability_mode,
> > &attr_engines_allowed,
> > &attr_gt_types_allowed,
> > - &attr_enable_survivability_mode,
> > NULL,
> > };
> >
> > @@ -929,12 +929,12 @@ static ssize_t
> > sriov_admin_only_pf_store(struct
> > config_item *item, const char *p
> > return len;
> > }
> >
> > -CONFIGFS_ATTR(sriov_, max_vfs);
> > CONFIGFS_ATTR(sriov_, admin_only_pf);
> > +CONFIGFS_ATTR(sriov_, max_vfs);
> >
> > static struct configfs_attribute *xe_config_sriov_attrs[] = {
> > - &sriov_attr_max_vfs,
> > &sriov_attr_admin_only_pf,
> > + &sriov_attr_max_vfs,
> > NULL,
> > };
> >
> > @@ -1096,10 +1096,10 @@ static void dump_custom_dev_config(struct
> > pci_dev *pdev,
> > dev->config.attr_); \
> > } while (0)
> >
> > - PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > - PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > + PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > + PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> >
> > #undef PRI_CUSTOM_ATTR
> > --
> > 2.43.0
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 15:50 ` Summers, Stuart
@ 2026-05-04 17:28 ` Gustavo Sousa
2026-05-04 17:44 ` Summers, Stuart
2026-05-05 21:45 ` Summers, Stuart
1 sibling, 1 reply; 37+ messages in thread
From: Gustavo Sousa @ 2026-05-04 17:28 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
"Summers, Stuart" <stuart.summers@intel.com> writes:
> On Mon, 2026-05-04 at 12:42 -0300, Gustavo Sousa wrote:
>> Stuart Summers <stuart.summers@intel.com> writes:
>>
>> > Add the skeleton code for a new debug specific configfs group.
>> >
>> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>> > Assisted-by: Copilot:claude-opus-4.7
>> > ---
>> > drivers/gpu/drm/xe/Makefile | 2 ++
>> > drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
>> > drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
>> > drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
>> > drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
>> > 5 files changed, 35 insertions(+)
>> > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
>> > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
>> >
>> > diff --git a/drivers/gpu/drm/xe/Makefile
>> > b/drivers/gpu/drm/xe/Makefile
>> > index 09661f079d03..b58667b0b18e 100644
>> > --- a/drivers/gpu/drm/xe/Makefile
>> > +++ b/drivers/gpu/drm/xe/Makefile
>> > @@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
>> >
>> > xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
>> > xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
>> > +xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) :=
>> > xe_configfs_debug.o
>> > +xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
>>
>> What are the downsides of keeping this available for non-debug
>> builds?
>>
>> I imagine that the debug configfs could be useful for someone not
>> involved in kernel development working together with the developers
>> to
>> debug issues without needing to rebuild their kernel.
>
> So the focal parameter we had in i915 was enable_rc6. Something like
> this is what we explicitly don't want to expose to a general user as it
> can have unforeseen consequences (like having very high power usage).
> But, having the ability to disable rc6 for debug purposes as a
> developer is extremely useful at narrowing down certain types of bugs
> at the hardware/software interface.
We could probably keep the debug stuff available but cause a taint if
they ever get used?
The scenario I had in mind is someone who is not familiar with building
their own kernel working together with the development community on a
hard-to-reproduce issue and some of the debug configfs attributes being
useful to gather more relevant data.
--
Gustavo Sousa
>
> That's just one example, but there are a bunch of things that could fit
> this category and I expect we'll have even more use cases over time.
>
> Right now we have to hold these types of changes in a side branch not
> exposed externally and I really want to converge our processes so we
> can more easily make these kinds of changes and let us debug directly
> out of drm-tip.
>
>>
>> >
>> > # graphics virtualization (SR-IOV) support
>> > xe-y += \
>> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
>> > b/drivers/gpu/drm/xe/xe_configfs.c
>> > index 12b7fe65446d..85df8ce5cf2a 100644
>> > --- a/drivers/gpu/drm/xe/xe_configfs.c
>> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> > @@ -1006,6 +1006,10 @@ static struct config_group
>> > *xe_config_make_device_group(struct config_group *gro
>> > config_group_init_type_name(&dev->sriov, "sriov",
>> > &xe_config_sriov_type);
>> > configfs_add_default_group(&dev->sriov, &dev-
>> > >group);
>> > }
>> > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>> > + config_group_init_type_name(&dev->debug, "debug",
>> > &xe_configfs_debug_type);
>> > + configfs_add_default_group(&dev->debug, &dev->group);
>> > +#endif
>>
>> I guess there isn't much we can do about it today, but, based on what
>> I
>> read in configfs documentation a while ago, I suspect it wasn't
>> really
>> designed with arbitrary hierarchies of config items in mind. It
>> would
>> be nice if there was an API for that though.
>>
>> Basically, a config group is expected to be a directory to contain a
>> set
>> of config items of the same type, which is not the case on our
>> current
>> usage (i.e. the "sriov" and now the "debug" group).
>>
>> I guess we are able to get our desired behavior (basically just a
>> subdirectory behaving as a config item) by not implementing the
>> "make_item" hook. Not sure if that's an expected use of the API or
>> if
>> that's more of a hack on our side and could come back to bite us in
>> the
>> future.
>
> Hm.. ok that's good feedback. I do like bucketing these in groups and
> subdirectories. It also makes it easy to show or not show based on the
> Kconfig. But let me go through and make sure there isn't something more
> suited here. Happy to hear any other feedback as well here.
>
> Thanks,
> Stuart
>
>>
>> --
>> Gustavo Sousa
>>
>> >
>> > mutex_init(&dev->lock);
>> >
>> > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c
>> > b/drivers/gpu/drm/xe/xe_configfs_debug.c
>> > new file mode 100644
>> > index 000000000000..45617282cec5
>> > --- /dev/null
>> > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
>> > @@ -0,0 +1,14 @@
>> > +// SPDX-License-Identifier: MIT
>> > +/*
>> > + * Copyright © 2026 Intel Corporation
>> > + */
>> > +
>> > +#include <linux/configfs.h>
>> > +#include <linux/module.h>
>> > +
>> > +#include "xe_configfs_debug.h"
>> > +#include "xe_configfs_types.h"
>> > +
>> > +const struct config_item_type xe_configfs_debug_type = {
>> > + .ct_owner = THIS_MODULE,
>> > +};
>> > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h
>> > b/drivers/gpu/drm/xe/xe_configfs_debug.h
>> > new file mode 100644
>> > index 000000000000..01170dc2f97e
>> > --- /dev/null
>> > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
>> > @@ -0,0 +1,8 @@
>> > +/* SPDX-License-Identifier: MIT */
>> > +/*
>> > + * Copyright © 2026 Intel Corporation
>> > + */
>> > +#ifndef _XE_CONFIGFS_DEBUG_H_
>> > +#define _XE_CONFIGFS_DEBUG_H_
>> > +
>> > +#endif /* _XE_CONFIGFS_DEBUG_H_ */
>> > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
>> > b/drivers/gpu/drm/xe/xe_configfs_types.h
>> > index 935097aafa96..c9d94a3c26a7 100644
>> > --- a/drivers/gpu/drm/xe/xe_configfs_types.h
>> > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
>> > @@ -24,6 +24,9 @@ struct wa_bb {
>> > struct xe_config_group_device {
>> > struct config_group group;
>> > struct config_group sriov;
>> > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>> > + struct config_group debug;
>> > +#endif
>> >
>> > struct xe_config_device {
>> > struct wa_bb
>> > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
>> > @@ -56,4 +59,8 @@ static inline struct xe_config_device
>> > *xe_configfs_to_device(struct config_item
>> > return &xe_configfs_to_group_device(item)->config;
>> > }
>> >
>> > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>> > +extern const struct config_item_type xe_configfs_debug_type;
>> > +#endif
>> > +
>> > #endif /* _XE_CONFIGFS_TYPES_H_ */
>> > --
>> > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 17:28 ` Gustavo Sousa
@ 2026-05-04 17:44 ` Summers, Stuart
2026-05-04 19:04 ` Gustavo Sousa
0 siblings, 1 reply; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 17:44 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 14:28 -0300, Gustavo Sousa wrote:
> "Summers, Stuart" <stuart.summers@intel.com> writes:
>
> > On Mon, 2026-05-04 at 12:42 -0300, Gustavo Sousa wrote:
> > > Stuart Summers <stuart.summers@intel.com> writes:
> > >
> > > > Add the skeleton code for a new debug specific configfs group.
> > > >
> > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > > Assisted-by: Copilot:claude-opus-4.7
> > > > ---
> > > > drivers/gpu/drm/xe/Makefile | 2 ++
> > > > drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
> > > > drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
> > > > drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
> > > > drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
> > > > 5 files changed, 35 insertions(+)
> > > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
> > > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/Makefile
> > > > b/drivers/gpu/drm/xe/Makefile
> > > > index 09661f079d03..b58667b0b18e 100644
> > > > --- a/drivers/gpu/drm/xe/Makefile
> > > > +++ b/drivers/gpu/drm/xe/Makefile
> > > > @@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
> > > >
> > > > xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
> > > > xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
> > > > +xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) :=
> > > > xe_configfs_debug.o
> > > > +xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
> > >
> > > What are the downsides of keeping this available for non-debug
> > > builds?
> > >
> > > I imagine that the debug configfs could be useful for someone not
> > > involved in kernel development working together with the
> > > developers
> > > to
> > > debug issues without needing to rebuild their kernel.
> >
> > So the focal parameter we had in i915 was enable_rc6. Something
> > like
> > this is what we explicitly don't want to expose to a general user
> > as it
> > can have unforeseen consequences (like having very high power
> > usage).
> > But, having the ability to disable rc6 for debug purposes as a
> > developer is extremely useful at narrowing down certain types of
> > bugs
> > at the hardware/software interface.
>
> We could probably keep the debug stuff available but cause a taint if
> they ever get used?
So the tainting is really just for our CI I think. This won't
necessarily impact end users - at least on the client side - who might
just ignore it (or not even notice it).
>
> The scenario I had in mind is someone who is not familiar with
> building
> their own kernel working together with the development community on a
> hard-to-reproduce issue and some of the debug configfs attributes
> being
> useful to gather more relevant data.
Yeah but IMO we really should be able to instruct such a user how to do
that - the steps there aren't too difficult if they're already
installing kernels etc.
A lot of our debug hooks are already held under various Kconfig options
anyway like DRM_XE_DEBUG, DRM_XE_DEBUG_GUC, DRM_XE_DEBUG_VM, etc. And a
lot of the information under those Kconfigs are also critical for
different debugs.
I'd really prefer to keep these under DRM_XE_DEBUG (or some other
Kconfig) if possible so we can maximize the ease of adding new
parameters as specific debugs come up.
Thanks,
Stuart
>
> --
> Gustavo Sousa
>
> >
> > That's just one example, but there are a bunch of things that could
> > fit
> > this category and I expect we'll have even more use cases over
> > time.
> >
> > Right now we have to hold these types of changes in a side branch
> > not
> > exposed externally and I really want to converge our processes so
> > we
> > can more easily make these kinds of changes and let us debug
> > directly
> > out of drm-tip.
> >
> > >
> > > >
> > > > # graphics virtualization (SR-IOV) support
> > > > xe-y += \
> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > > > b/drivers/gpu/drm/xe/xe_configfs.c
> > > > index 12b7fe65446d..85df8ce5cf2a 100644
> > > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > > @@ -1006,6 +1006,10 @@ static struct config_group
> > > > *xe_config_make_device_group(struct config_group *gro
> > > > config_group_init_type_name(&dev->sriov,
> > > > "sriov",
> > > > &xe_config_sriov_type);
> > > > configfs_add_default_group(&dev->sriov, &dev-
> > > > > group);
> > > > }
> > > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > > > + config_group_init_type_name(&dev->debug, "debug",
> > > > &xe_configfs_debug_type);
> > > > + configfs_add_default_group(&dev->debug, &dev->group);
> > > > +#endif
> > >
> > > I guess there isn't much we can do about it today, but, based on
> > > what
> > > I
> > > read in configfs documentation a while ago, I suspect it wasn't
> > > really
> > > designed with arbitrary hierarchies of config items in mind. It
> > > would
> > > be nice if there was an API for that though.
> > >
> > > Basically, a config group is expected to be a directory to
> > > contain a
> > > set
> > > of config items of the same type, which is not the case on our
> > > current
> > > usage (i.e. the "sriov" and now the "debug" group).
> > >
> > > I guess we are able to get our desired behavior (basically just a
> > > subdirectory behaving as a config item) by not implementing the
> > > "make_item" hook. Not sure if that's an expected use of the API
> > > or
> > > if
> > > that's more of a hack on our side and could come back to bite us
> > > in
> > > the
> > > future.
> >
> > Hm.. ok that's good feedback. I do like bucketing these in groups
> > and
> > subdirectories. It also makes it easy to show or not show based on
> > the
> > Kconfig. But let me go through and make sure there isn't something
> > more
> > suited here. Happy to hear any other feedback as well here.
> >
> > Thanks,
> > Stuart
> >
> > >
> > > --
> > > Gustavo Sousa
> > >
> > > >
> > > > mutex_init(&dev->lock);
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c
> > > > b/drivers/gpu/drm/xe/xe_configfs_debug.c
> > > > new file mode 100644
> > > > index 000000000000..45617282cec5
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
> > > > @@ -0,0 +1,14 @@
> > > > +// SPDX-License-Identifier: MIT
> > > > +/*
> > > > + * Copyright © 2026 Intel Corporation
> > > > + */
> > > > +
> > > > +#include <linux/configfs.h>
> > > > +#include <linux/module.h>
> > > > +
> > > > +#include "xe_configfs_debug.h"
> > > > +#include "xe_configfs_types.h"
> > > > +
> > > > +const struct config_item_type xe_configfs_debug_type = {
> > > > + .ct_owner = THIS_MODULE,
> > > > +};
> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h
> > > > b/drivers/gpu/drm/xe/xe_configfs_debug.h
> > > > new file mode 100644
> > > > index 000000000000..01170dc2f97e
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
> > > > @@ -0,0 +1,8 @@
> > > > +/* SPDX-License-Identifier: MIT */
> > > > +/*
> > > > + * Copyright © 2026 Intel Corporation
> > > > + */
> > > > +#ifndef _XE_CONFIGFS_DEBUG_H_
> > > > +#define _XE_CONFIGFS_DEBUG_H_
> > > > +
> > > > +#endif /* _XE_CONFIGFS_DEBUG_H_ */
> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > index 935097aafa96..c9d94a3c26a7 100644
> > > > --- a/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > @@ -24,6 +24,9 @@ struct wa_bb {
> > > > struct xe_config_group_device {
> > > > struct config_group group;
> > > > struct config_group sriov;
> > > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > > > + struct config_group debug;
> > > > +#endif
> > > >
> > > > struct xe_config_device {
> > > > struct wa_bb
> > > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > > @@ -56,4 +59,8 @@ static inline struct xe_config_device
> > > > *xe_configfs_to_device(struct config_item
> > > > return &xe_configfs_to_group_device(item)->config;
> > > > }
> > > >
> > > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > > > +extern const struct config_item_type xe_configfs_debug_type;
> > > > +#endif
> > > > +
> > > > #endif /* _XE_CONFIGFS_TYPES_H_ */
> > > > --
> > > > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 13:29 ` Gustavo Sousa
2026-05-04 14:32 ` Summers, Stuart
2026-05-04 14:40 ` Summers, Stuart
@ 2026-05-04 18:31 ` Rodrigo Vivi
2026-05-04 18:38 ` Summers, Stuart
2 siblings, 1 reply; 37+ messages in thread
From: Rodrigo Vivi @ 2026-05-04 18:31 UTC (permalink / raw)
To: Gustavo Sousa, Riana Tauro
Cc: Stuart Summers, intel-xe, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, daniele.ceraolospurio,
shuicheng.lin
On Mon, May 04, 2026 at 10:29:26AM -0300, Gustavo Sousa wrote:
> Stuart Summers <stuart.summers@intel.com> writes:
>
> > Rename the survivability_mode field in struct xe_config_device to
> > enable_survivability_mode to be consistent with the enable_psmi naming
> > convention used for similar boolean config flags.
I don't believe we need this level of consistency.
I'd like to keep the survivability_mode as is because perhaps we could
perhaps even expand to multiple different modes later instead of only
enable disable flag?!
Cc: Riana Tauro <riana.tauro@intel.com>
> >
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > Assisted-by: Copilot:claude-opus-4.7
> > ---
> > drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-----------
> > drivers/gpu/drm/xe/xe_configfs.h | 4 +--
> > drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
> > 3 files changed, 23 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> > index 32102600a148..69abc69ec0f3 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > @@ -58,7 +58,7 @@
> > * │ └── ...
> > * :
> > * └── 0000:03:00.0
> > - * ├── survivability_mode
> > + * ├── enable_survivability_mode
> > * ├── gt_types_allowed
> > * ├── engines_allowed
> > * └── enable_psmi
> > @@ -79,7 +79,7 @@
> > * Enable survivability mode on supported cards. This setting only takes
> > * effect when probing the device. Example to enable it::
> > *
> > - * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
> > + * # echo 1 > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
>
> I think we have not documented our configfs structure in the kernel ABI
> documentation. Are we supposed to do that? Is that not yet done
> because we do not consider our configfs stable enough to be classified
> as proper ABI?
>
> In this example, we would be potentially changing what some would call
> ABI, hence my questions above.
>
> --
> Gustavo Sousa
>
> > *
> > * This attribute can only be set before binding to the device.
> > *
> > @@ -260,7 +260,7 @@ struct xe_config_group_device {
> > u64 engines_allowed;
> > struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > - bool survivability_mode;
> > + bool enable_survivability_mode;
> > bool enable_psmi;
> > struct {
> > unsigned int max_vfs;
> > @@ -279,7 +279,7 @@ struct xe_config_group_device {
> > static const struct xe_config_device device_defaults = {
> > .gt_types_allowed = U64_MAX,
> > .engines_allowed = U64_MAX,
> > - .survivability_mode = false,
> > + .enable_survivability_mode = false,
> > .enable_psmi = false,
> > .sriov = {
> > .max_vfs = XE_DEFAULT_MAX_VFS,
> > @@ -357,20 +357,21 @@ static bool is_bound(struct xe_config_group_device *dev)
> > return ret;
> > }
> >
> > -static ssize_t survivability_mode_show(struct config_item *item, char *page)
> > +static ssize_t enable_survivability_mode_show(struct config_item *item, char *page)
> > {
> > struct xe_config_device *dev = to_xe_config_device(item);
> >
> > - return sprintf(page, "%d\n", dev->survivability_mode);
> > + return sprintf(page, "%d\n", dev->enable_survivability_mode);
> > }
> >
> > -static ssize_t survivability_mode_store(struct config_item *item, const char *page, size_t len)
> > +static ssize_t enable_survivability_mode_store(struct config_item *item, const char *page,
> > + size_t len)
> > {
> > struct xe_config_group_device *dev = to_xe_config_group_device(item);
> > - bool survivability_mode;
> > + bool enable_survivability_mode;
> > int ret;
> >
> > - ret = kstrtobool(page, &survivability_mode);
> > + ret = kstrtobool(page, &enable_survivability_mode);
> > if (ret)
> > return ret;
> >
> > @@ -378,7 +379,7 @@ static ssize_t survivability_mode_store(struct config_item *item, const char *pa
> > if (is_bound(dev))
> > return -EBUSY;
> >
> > - dev->config.survivability_mode = survivability_mode;
> > + dev->config.enable_survivability_mode = enable_survivability_mode;
> >
> > return len;
> > }
> > @@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> > CONFIGFS_ATTR(, enable_psmi);
> > CONFIGFS_ATTR(, engines_allowed);
> > CONFIGFS_ATTR(, gt_types_allowed);
> > -CONFIGFS_ATTR(, survivability_mode);
> > +CONFIGFS_ATTR(, enable_survivability_mode);
> >
> > static struct configfs_attribute *xe_config_device_attrs[] = {
> > &attr_ctx_restore_mid_bb,
> > @@ -823,7 +824,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
> > &attr_enable_psmi,
> > &attr_engines_allowed,
> > &attr_gt_types_allowed,
> > - &attr_survivability_mode,
> > + &attr_enable_survivability_mode,
> > NULL,
> > };
> >
> > @@ -847,7 +848,7 @@ static bool xe_config_device_is_visible(struct config_item *item,
> > {
> > struct xe_config_group_device *dev = to_xe_config_group_device(item);
> >
> > - if (attr == &attr_survivability_mode) {
> > + if (attr == &attr_enable_survivability_mode) {
> > if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE)
> > return false;
> > }
> > @@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
> > PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > - PRI_CUSTOM_ATTR("%d", survivability_mode);
> > + PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> >
> > #undef PRI_CUSTOM_ATTR
> > @@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct pci_dev *pdev)
> > }
> >
> > /**
> > - * xe_configfs_get_survivability_mode - get configfs survivability mode attribute
> > + * xe_configfs_get_enable_survivability_mode - get configfs survivability mode attribute
> > * @pdev: pci device
> > *
> > - * Return: survivability_mode attribute in configfs
> > + * Return: enable_survivability_mode attribute in configfs
> > */
> > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
> > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev)
> > {
> > struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
> > bool mode;
> >
> > if (!dev)
> > - return device_defaults.survivability_mode;
> > + return device_defaults.enable_survivability_mode;
> >
> > - mode = dev->config.survivability_mode;
> > + mode = dev->config.enable_survivability_mode;
> > config_group_put(&dev->group);
> >
> > return mode;
> > diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
> > index 07d62bf0c152..517de4946d35 100644
> > --- a/drivers/gpu/drm/xe/xe_configfs.h
> > +++ b/drivers/gpu/drm/xe/xe_configfs.h
> > @@ -18,7 +18,7 @@ struct pci_dev;
> > int xe_configfs_init(void);
> > void xe_configfs_exit(void);
> > void xe_configfs_check_device(struct pci_dev *pdev);
> > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev);
> > bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> > bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> > @@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev *pdev);
> > static inline int xe_configfs_init(void) { return 0; }
> > static inline void xe_configfs_exit(void) { }
> > static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
> > -static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
> > +static inline bool xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) { return false; }
> > static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return true; }
> > static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
> > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
> > diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > index db64cac39c94..7c85bdb267af 100644
> > --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > @@ -377,7 +377,7 @@ bool xe_survivability_mode_is_requested(struct xe_device *xe)
> > if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform < XE_BATTLEMAGE)
> > return false;
> >
> > - survivability_mode = xe_configfs_get_survivability_mode(pdev);
> > + survivability_mode = xe_configfs_get_enable_survivability_mode(pdev);
> > /* Enable survivability mode if set via configfs */
> > if (survivability_mode)
> > return true;
> > --
> > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode
2026-05-04 18:31 ` Rodrigo Vivi
@ 2026-05-04 18:38 ` Summers, Stuart
0 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 18:38 UTC (permalink / raw)
To: Vivi, Rodrigo, Sousa, Gustavo, Tauro, Riana
Cc: intel-xe@lists.freedesktop.org, Brost, Matthew,
Nerlige Ramappa, Umesh, Lin, Shuicheng, Roper, Matthew D,
Wajdeczko, Michal, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 14:31 -0400, Rodrigo Vivi wrote:
> On Mon, May 04, 2026 at 10:29:26AM -0300, Gustavo Sousa wrote:
> > Stuart Summers <stuart.summers@intel.com> writes:
> >
> > > Rename the survivability_mode field in struct xe_config_device to
> > > enable_survivability_mode to be consistent with the enable_psmi
> > > naming
> > > convention used for similar boolean config flags.
>
> I don't believe we need this level of consistency.
>
> I'd like to keep the survivability_mode as is because perhaps we
> could
> perhaps even expand to multiple different modes later instead of only
> enable disable flag?!
>
> Cc: Riana Tauro <riana.tauro@intel.com>
Yeah no problem. I probably should have made these patches all RFC..
I'll drop this one for now. I agree with your comments here.
Thanks,
Stuart
>
> > >
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > Assisted-by: Copilot:claude-opus-4.7
> > > ---
> > > drivers/gpu/drm/xe/xe_configfs.c | 39 +++++++++++-----
> > > ------
> > > drivers/gpu/drm/xe/xe_configfs.h | 4 +--
> > > drivers/gpu/drm/xe/xe_survivability_mode.c | 2 +-
> > > 3 files changed, 23 insertions(+), 22 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > > b/drivers/gpu/drm/xe/xe_configfs.c
> > > index 32102600a148..69abc69ec0f3 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > @@ -58,7 +58,7 @@
> > > * │ └── ...
> > > * :
> > > * └── 0000:03:00.0
> > > - * ├── survivability_mode
> > > + * ├── enable_survivability_mode
> > > * ├── gt_types_allowed
> > > * ├── engines_allowed
> > > * └── enable_psmi
> > > @@ -79,7 +79,7 @@
> > > * Enable survivability mode on supported cards. This setting
> > > only takes
> > > * effect when probing the device. Example to enable it::
> > > *
> > > - * # echo 1 >
> > > /sys/kernel/config/xe/0000:03:00.0/survivability_mode
> > > + * # echo 1 >
> > > /sys/kernel/config/xe/0000:03:00.0/enable_survivability_mode
> >
> > I think we have not documented our configfs structure in the kernel
> > ABI
> > documentation. Are we supposed to do that? Is that not yet done
> > because we do not consider our configfs stable enough to be
> > classified
> > as proper ABI?
> >
> > In this example, we would be potentially changing what some would
> > call
> > ABI, hence my questions above.
> >
> > --
> > Gustavo Sousa
> >
> > > *
> > > * This attribute can only be set before binding to the device.
> > > *
> > > @@ -260,7 +260,7 @@ struct xe_config_group_device {
> > > u64 engines_allowed;
> > > struct wa_bb
> > > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > > struct wa_bb
> > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > - bool survivability_mode;
> > > + bool enable_survivability_mode;
> > > bool enable_psmi;
> > > struct {
> > > unsigned int max_vfs;
> > > @@ -279,7 +279,7 @@ struct xe_config_group_device {
> > > static const struct xe_config_device device_defaults = {
> > > .gt_types_allowed = U64_MAX,
> > > .engines_allowed = U64_MAX,
> > > - .survivability_mode = false,
> > > + .enable_survivability_mode = false,
> > > .enable_psmi = false,
> > > .sriov = {
> > > .max_vfs = XE_DEFAULT_MAX_VFS,
> > > @@ -357,20 +357,21 @@ static bool is_bound(struct
> > > xe_config_group_device *dev)
> > > return ret;
> > > }
> > >
> > > -static ssize_t survivability_mode_show(struct config_item *item,
> > > char *page)
> > > +static ssize_t enable_survivability_mode_show(struct config_item
> > > *item, char *page)
> > > {
> > > struct xe_config_device *dev = to_xe_config_device(item);
> > >
> > > - return sprintf(page, "%d\n", dev->survivability_mode);
> > > + return sprintf(page, "%d\n", dev-
> > > >enable_survivability_mode);
> > > }
> > >
> > > -static ssize_t survivability_mode_store(struct config_item
> > > *item, const char *page, size_t len)
> > > +static ssize_t enable_survivability_mode_store(struct
> > > config_item *item, const char *page,
> > > + size_t len)
> > > {
> > > struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > - bool survivability_mode;
> > > + bool enable_survivability_mode;
> > > int ret;
> > >
> > > - ret = kstrtobool(page, &survivability_mode);
> > > + ret = kstrtobool(page, &enable_survivability_mode);
> > > if (ret)
> > > return ret;
> > >
> > > @@ -378,7 +379,7 @@ static ssize_t
> > > survivability_mode_store(struct config_item *item, const char *pa
> > > if (is_bound(dev))
> > > return -EBUSY;
> > >
> > > - dev->config.survivability_mode = survivability_mode;
> > > + dev->config.enable_survivability_mode =
> > > enable_survivability_mode;
> > >
> > > return len;
> > > }
> > > @@ -815,7 +816,7 @@ CONFIGFS_ATTR(, ctx_restore_post_bb);
> > > CONFIGFS_ATTR(, enable_psmi);
> > > CONFIGFS_ATTR(, engines_allowed);
> > > CONFIGFS_ATTR(, gt_types_allowed);
> > > -CONFIGFS_ATTR(, survivability_mode);
> > > +CONFIGFS_ATTR(, enable_survivability_mode);
> > >
> > > static struct configfs_attribute *xe_config_device_attrs[] = {
> > > &attr_ctx_restore_mid_bb,
> > > @@ -823,7 +824,7 @@ static struct configfs_attribute
> > > *xe_config_device_attrs[] = {
> > > &attr_enable_psmi,
> > > &attr_engines_allowed,
> > > &attr_gt_types_allowed,
> > > - &attr_survivability_mode,
> > > + &attr_enable_survivability_mode,
> > > NULL,
> > > };
> > >
> > > @@ -847,7 +848,7 @@ static bool
> > > xe_config_device_is_visible(struct config_item *item,
> > > {
> > > struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > >
> > > - if (attr == &attr_survivability_mode) {
> > > + if (attr == &attr_enable_survivability_mode) {
> > > if (!dev->desc->is_dgfx || dev->desc->platform <
> > > XE_BATTLEMAGE)
> > > return false;
> > > }
> > > @@ -1098,7 +1099,7 @@ static void dump_custom_dev_config(struct
> > > pci_dev *pdev,
> > > PRI_CUSTOM_ATTR("%llx", gt_types_allowed);
> > > PRI_CUSTOM_ATTR("%llx", engines_allowed);
> > > PRI_CUSTOM_ATTR("%d", enable_psmi);
> > > - PRI_CUSTOM_ATTR("%d", survivability_mode);
> > > + PRI_CUSTOM_ATTR("%d", enable_survivability_mode);
> > > PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
> > >
> > > #undef PRI_CUSTOM_ATTR
> > > @@ -1128,20 +1129,20 @@ void xe_configfs_check_device(struct
> > > pci_dev *pdev)
> > > }
> > >
> > > /**
> > > - * xe_configfs_get_survivability_mode - get configfs
> > > survivability mode attribute
> > > + * xe_configfs_get_enable_survivability_mode - get configfs
> > > survivability mode attribute
> > > * @pdev: pci device
> > > *
> > > - * Return: survivability_mode attribute in configfs
> > > + * Return: enable_survivability_mode attribute in configfs
> > > */
> > > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev)
> > > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > > *pdev)
> > > {
> > > struct xe_config_group_device *dev =
> > > find_xe_config_group_device(pdev);
> > > bool mode;
> > >
> > > if (!dev)
> > > - return device_defaults.survivability_mode;
> > > + return device_defaults.enable_survivability_mode;
> > >
> > > - mode = dev->config.survivability_mode;
> > > + mode = dev->config.enable_survivability_mode;
> > > config_group_put(&dev->group);
> > >
> > > return mode;
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.h
> > > b/drivers/gpu/drm/xe/xe_configfs.h
> > > index 07d62bf0c152..517de4946d35 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.h
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.h
> > > @@ -18,7 +18,7 @@ struct pci_dev;
> > > int xe_configfs_init(void);
> > > void xe_configfs_exit(void);
> > > void xe_configfs_check_device(struct pci_dev *pdev);
> > > -bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> > > +bool xe_configfs_get_enable_survivability_mode(struct pci_dev
> > > *pdev);
> > > bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> > > bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> > > u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> > > @@ -37,7 +37,7 @@ bool xe_configfs_admin_only_pf(struct pci_dev
> > > *pdev);
> > > static inline int xe_configfs_init(void) { return 0; }
> > > static inline void xe_configfs_exit(void) { }
> > > static inline void xe_configfs_check_device(struct pci_dev
> > > *pdev) { }
> > > -static inline bool xe_configfs_get_survivability_mode(struct
> > > pci_dev *pdev) { return false; }
> > > +static inline bool
> > > xe_configfs_get_enable_survivability_mode(struct pci_dev *pdev) {
> > > return false; }
> > > static inline bool xe_configfs_primary_gt_allowed(struct pci_dev
> > > *pdev) { return true; }
> > > static inline bool xe_configfs_media_gt_allowed(struct pci_dev
> > > *pdev) { return true; }
> > > static inline u64 xe_configfs_get_engines_allowed(struct pci_dev
> > > *pdev) { return U64_MAX; }
> > > diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > index db64cac39c94..7c85bdb267af 100644
> > > --- a/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > +++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
> > > @@ -377,7 +377,7 @@ bool
> > > xe_survivability_mode_is_requested(struct xe_device *xe)
> > > if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe->info.platform
> > > < XE_BATTLEMAGE)
> > > return false;
> > >
> > > - survivability_mode =
> > > xe_configfs_get_survivability_mode(pdev);
> > > + survivability_mode =
> > > xe_configfs_get_enable_survivability_mode(pdev);
> > > /* Enable survivability mode if set via configfs */
> > > if (survivability_mode)
> > > return true;
> > > --
> > > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 17:44 ` Summers, Stuart
@ 2026-05-04 19:04 ` Gustavo Sousa
0 siblings, 0 replies; 37+ messages in thread
From: Gustavo Sousa @ 2026-05-04 19:04 UTC (permalink / raw)
To: Summers, Stuart
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
"Summers, Stuart" <stuart.summers@intel.com> writes:
> On Mon, 2026-05-04 at 14:28 -0300, Gustavo Sousa wrote:
>> "Summers, Stuart" <stuart.summers@intel.com> writes:
>>
>> > On Mon, 2026-05-04 at 12:42 -0300, Gustavo Sousa wrote:
>> > > Stuart Summers <stuart.summers@intel.com> writes:
>> > >
>> > > > Add the skeleton code for a new debug specific configfs group.
>> > > >
>> > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
>> > > > Assisted-by: Copilot:claude-opus-4.7
>> > > > ---
>> > > > drivers/gpu/drm/xe/Makefile | 2 ++
>> > > > drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
>> > > > drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
>> > > > drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
>> > > > drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
>> > > > 5 files changed, 35 insertions(+)
>> > > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
>> > > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
>> > > >
>> > > > diff --git a/drivers/gpu/drm/xe/Makefile
>> > > > b/drivers/gpu/drm/xe/Makefile
>> > > > index 09661f079d03..b58667b0b18e 100644
>> > > > --- a/drivers/gpu/drm/xe/Makefile
>> > > > +++ b/drivers/gpu/drm/xe/Makefile
>> > > > @@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
>> > > >
>> > > > xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
>> > > > xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
>> > > > +xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) :=
>> > > > xe_configfs_debug.o
>> > > > +xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
>> > >
>> > > What are the downsides of keeping this available for non-debug
>> > > builds?
>> > >
>> > > I imagine that the debug configfs could be useful for someone not
>> > > involved in kernel development working together with the
>> > > developers
>> > > to
>> > > debug issues without needing to rebuild their kernel.
>> >
>> > So the focal parameter we had in i915 was enable_rc6. Something
>> > like
>> > this is what we explicitly don't want to expose to a general user
>> > as it
>> > can have unforeseen consequences (like having very high power
>> > usage).
>> > But, having the ability to disable rc6 for debug purposes as a
>> > developer is extremely useful at narrowing down certain types of
>> > bugs
>> > at the hardware/software interface.
>>
>> We could probably keep the debug stuff available but cause a taint if
>> they ever get used?
>
> So the tainting is really just for our CI I think. This won't
> necessarily impact end users - at least on the client side - who might
> just ignore it (or not even notice it).
I *think* tainting is not only for CI (someone could correct me here).
I see that our driver adds a taint when the user is applying some
parameters (module parameters or configfs) that alters the "officially
supported" behavior of the driver.
Some examples I could find are usages of module_param_named_unsafe() in
the module param front, and setup_configfs_post_ctx_restore_bb(),
setup_configfs_mid_ctx_restore_bb() in configfs.
>
>>
>> The scenario I had in mind is someone who is not familiar with
>> building
>> their own kernel working together with the development community on a
>> hard-to-reproduce issue and some of the debug configfs attributes
>> being
>> useful to gather more relevant data.
>
> Yeah but IMO we really should be able to instruct such a user how to do
> that - the steps there aren't too difficult if they're already
> installing kernels etc.
>
> A lot of our debug hooks are already held under various Kconfig options
> anyway like DRM_XE_DEBUG, DRM_XE_DEBUG_GUC, DRM_XE_DEBUG_VM, etc. And a
> lot of the information under those Kconfigs are also critical for
> different debugs.
Are those due to performance or resource usage implications if they are
kept enabled? If so, is this the same case here?
>
> I'd really prefer to keep these under DRM_XE_DEBUG (or some other
> Kconfig) if possible so we can maximize the ease of adding new
> parameters as specific debugs come up.
But why would keeping them under a build flag make it easier to add new
parameters as opposed to always keeping the knobs available for use?
--
Gustavo Sousa
>
> Thanks,
> Stuart
>
>>
>> --
>> Gustavo Sousa
>>
>> >
>> > That's just one example, but there are a bunch of things that could
>> > fit
>> > this category and I expect we'll have even more use cases over
>> > time.
>> >
>> > Right now we have to hold these types of changes in a side branch
>> > not
>> > exposed externally and I really want to converge our processes so
>> > we
>> > can more easily make these kinds of changes and let us debug
>> > directly
>> > out of drm-tip.
>> >
>> > >
>> > > >
>> > > > # graphics virtualization (SR-IOV) support
>> > > > xe-y += \
>> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
>> > > > b/drivers/gpu/drm/xe/xe_configfs.c
>> > > > index 12b7fe65446d..85df8ce5cf2a 100644
>> > > > --- a/drivers/gpu/drm/xe/xe_configfs.c
>> > > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> > > > @@ -1006,6 +1006,10 @@ static struct config_group
>> > > > *xe_config_make_device_group(struct config_group *gro
>> > > > config_group_init_type_name(&dev->sriov,
>> > > > "sriov",
>> > > > &xe_config_sriov_type);
>> > > > configfs_add_default_group(&dev->sriov, &dev-
>> > > > > group);
>> > > > }
>> > > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>> > > > + config_group_init_type_name(&dev->debug, "debug",
>> > > > &xe_configfs_debug_type);
>> > > > + configfs_add_default_group(&dev->debug, &dev->group);
>> > > > +#endif
>> > >
>> > > I guess there isn't much we can do about it today, but, based on
>> > > what
>> > > I
>> > > read in configfs documentation a while ago, I suspect it wasn't
>> > > really
>> > > designed with arbitrary hierarchies of config items in mind. It
>> > > would
>> > > be nice if there was an API for that though.
>> > >
>> > > Basically, a config group is expected to be a directory to
>> > > contain a
>> > > set
>> > > of config items of the same type, which is not the case on our
>> > > current
>> > > usage (i.e. the "sriov" and now the "debug" group).
>> > >
>> > > I guess we are able to get our desired behavior (basically just a
>> > > subdirectory behaving as a config item) by not implementing the
>> > > "make_item" hook. Not sure if that's an expected use of the API
>> > > or
>> > > if
>> > > that's more of a hack on our side and could come back to bite us
>> > > in
>> > > the
>> > > future.
>> >
>> > Hm.. ok that's good feedback. I do like bucketing these in groups
>> > and
>> > subdirectories. It also makes it easy to show or not show based on
>> > the
>> > Kconfig. But let me go through and make sure there isn't something
>> > more
>> > suited here. Happy to hear any other feedback as well here.
>> >
>> > Thanks,
>> > Stuart
>> >
>> > >
>> > > --
>> > > Gustavo Sousa
>> > >
>> > > >
>> > > > mutex_init(&dev->lock);
>> > > >
>> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c
>> > > > b/drivers/gpu/drm/xe/xe_configfs_debug.c
>> > > > new file mode 100644
>> > > > index 000000000000..45617282cec5
>> > > > --- /dev/null
>> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
>> > > > @@ -0,0 +1,14 @@
>> > > > +// SPDX-License-Identifier: MIT
>> > > > +/*
>> > > > + * Copyright © 2026 Intel Corporation
>> > > > + */
>> > > > +
>> > > > +#include <linux/configfs.h>
>> > > > +#include <linux/module.h>
>> > > > +
>> > > > +#include "xe_configfs_debug.h"
>> > > > +#include "xe_configfs_types.h"
>> > > > +
>> > > > +const struct config_item_type xe_configfs_debug_type = {
>> > > > + .ct_owner = THIS_MODULE,
>> > > > +};
>> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h
>> > > > b/drivers/gpu/drm/xe/xe_configfs_debug.h
>> > > > new file mode 100644
>> > > > index 000000000000..01170dc2f97e
>> > > > --- /dev/null
>> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
>> > > > @@ -0,0 +1,8 @@
>> > > > +/* SPDX-License-Identifier: MIT */
>> > > > +/*
>> > > > + * Copyright © 2026 Intel Corporation
>> > > > + */
>> > > > +#ifndef _XE_CONFIGFS_DEBUG_H_
>> > > > +#define _XE_CONFIGFS_DEBUG_H_
>> > > > +
>> > > > +#endif /* _XE_CONFIGFS_DEBUG_H_ */
>> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
>> > > > b/drivers/gpu/drm/xe/xe_configfs_types.h
>> > > > index 935097aafa96..c9d94a3c26a7 100644
>> > > > --- a/drivers/gpu/drm/xe/xe_configfs_types.h
>> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
>> > > > @@ -24,6 +24,9 @@ struct wa_bb {
>> > > > struct xe_config_group_device {
>> > > > struct config_group group;
>> > > > struct config_group sriov;
>> > > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>> > > > + struct config_group debug;
>> > > > +#endif
>> > > >
>> > > > struct xe_config_device {
>> > > > struct wa_bb
>> > > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
>> > > > @@ -56,4 +59,8 @@ static inline struct xe_config_device
>> > > > *xe_configfs_to_device(struct config_item
>> > > > return &xe_configfs_to_group_device(item)->config;
>> > > > }
>> > > >
>> > > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
>> > > > +extern const struct config_item_type xe_configfs_debug_type;
>> > > > +#endif
>> > > > +
>> > > > #endif /* _XE_CONFIGFS_TYPES_H_ */
>> > > > --
>> > > > 2.43.0
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 3/9] drm/xe: Split out configfs data structures
2026-05-04 14:24 ` Summers, Stuart
@ 2026-05-04 21:48 ` Matthew Brost
2026-05-04 21:51 ` Summers, Stuart
0 siblings, 1 reply; 37+ messages in thread
From: Matthew Brost @ 2026-05-04 21:48 UTC (permalink / raw)
To: Summers, Stuart
Cc: jani.nikula@linux.intel.com, intel-xe@lists.freedesktop.org,
Lin, Shuicheng, Vivi, Rodrigo, Roper, Matthew D,
Wajdeczko, Michal, Nerlige Ramappa, Umesh,
Ceraolo Spurio, Daniele
On Mon, May 04, 2026 at 08:24:14AM -0600, Summers, Stuart wrote:
> On Mon, 2026-05-04 at 11:47 +0300, Jani Nikula wrote:
> > On Mon, 04 May 2026, Stuart Summers <stuart.summers@intel.com> wrote:
> > > Split the configfs data structures into their own _types.h file.
> >
> > Why? The commit message must always answer the question, "why".
> >
This is a good point. In general, we should be moving public structs
that have no business being in public headers (we do quite a bit of this
in Xe) into private structs in C files. This patch does the opposite, so
unless there is a very good reason to make this public (e.g, a struct
is intended to embedded), my initial reaction is not to do this.
Private structures enforce good layering and component isolation, and
prevent vectors for abuse (i.e., another layer messing with a struct
owned by a different layer).
Matt
> > The obvious downside here is that you expose the types that were
> > previously hidden in xe_configfs.c to anyone who includes
> > xe_configfs_types.h. And that header depends on a ton of other
> > headers,
> > making the header interdepencies worse overall.
> >
> > Maybe you need that header later for something, but please spell that
> > out here.
>
> Yeah this is exactly true.. I'll do a better job with the commit
> messages here going forward. Really appreciate the feedback Jani!
>
> -Stuart
>
> >
> >
> > BR,
> > Jani.
> >
> > >
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > Assisted-by: Copilot:claude-opus-4.7
> > > ---
> > > drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++---------------
> > > ----
> > > drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++
> > > 2 files changed, 80 insertions(+), 64 deletions(-)
> > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > > b/drivers/gpu/drm/xe/xe_configfs.c
> > > index 1e134057fae8..12b7fe65446d 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > @@ -4,7 +4,6 @@
> > > */
> > >
> > > #include <linux/bitops.h>
> > > -#include <linux/ctype.h>
> > > #include <linux/configfs.h>
> > > #include <linux/cleanup.h>
> > > #include <linux/find.h>
> > > @@ -15,12 +14,10 @@
> > >
> > > #include "instructions/xe_mi_commands.h"
> > > #include "xe_configfs.h"
> > > +#include "xe_configfs_types.h"
> > > #include "xe_defaults.h"
> > > #include "xe_gt_types.h"
> > > -#include "xe_hw_engine_types.h"
> > > #include "xe_module.h"
> > > -#include "xe_pci_types.h"
> > > -#include "xe_sriov_types.h"
> > >
> > > /**
> > > * DOC: Xe Configfs
> > > @@ -245,36 +242,6 @@
> > > * # rmdir /sys/kernel/config/xe/0000:03:00.0/
> > > */
> > >
> > > -/* Similar to struct xe_bb, but not tied to HW (yet) */
> > > -struct wa_bb {
> > > - u32 *cs;
> > > - u32 len; /* in dwords */
> > > -};
> > > -
> > > -struct xe_config_group_device {
> > > - struct config_group group;
> > > - struct config_group sriov;
> > > -
> > > - struct xe_config_device {
> > > - struct wa_bb
> > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > - struct wa_bb
> > > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > > - bool enable_psmi;
> > > - bool enable_survivability_mode;
> > > - u64 engines_allowed;
> > > - u64 gt_types_allowed;
> > > - struct {
> > > - bool admin_only_pf;
> > > - unsigned int max_vfs;
> > > - } sriov;
> > > - } config;
> > > -
> > > - /* protects attributes */
> > > - struct mutex lock;
> > > - /* matching descriptor */
> > > - const struct xe_device_desc *desc;
> > > - /* tentative SR-IOV mode */
> > > - enum xe_sriov_mode mode;
> > > -};
> > >
> > > static const struct xe_config_device device_defaults = {
> > > .enable_psmi = false,
> > > @@ -322,16 +289,6 @@ static const struct {
> > > { .name = "media", .type = XE_GT_TYPE_MEDIA },
> > > };
> > >
> > > -static struct xe_config_group_device
> > > *to_xe_config_group_device(struct config_item *item)
> > > -{
> > > - return container_of(to_config_group(item), struct
> > > xe_config_group_device, group);
> > > -}
> > > -
> > > -static struct xe_config_device *to_xe_config_device(struct
> > > config_item *item)
> > > -{
> > > - return &to_xe_config_group_device(item)->config;
> > > -}
> > > -
> > > static bool is_bound(struct xe_config_group_device *dev)
> > > {
> > > unsigned int domain, bus, slot, function;
> > > @@ -359,7 +316,7 @@ static bool is_bound(struct
> > > xe_config_group_device *dev)
> > >
> > > static ssize_t enable_survivability_mode_show(struct config_item
> > > *item, char *page)
> > > {
> > > - struct xe_config_device *dev = to_xe_config_device(item);
> > > + struct xe_config_device *dev = xe_configfs_to_device(item);
> > >
> > > return sprintf(page, "%d\n", dev-
> > > >enable_survivability_mode);
> > > }
> > > @@ -367,7 +324,7 @@ static ssize_t
> > > enable_survivability_mode_show(struct config_item *item, char *pa
> > > static ssize_t enable_survivability_mode_store(struct config_item
> > > *item, const char *page,
> > > size_t len)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > > bool enable_survivability_mode;
> > > int ret;
> > >
> > > @@ -386,7 +343,7 @@ static ssize_t
> > > enable_survivability_mode_store(struct config_item *item, const c
> > >
> > > static ssize_t gt_types_allowed_show(struct config_item *item,
> > > char *page)
> > > {
> > > - struct xe_config_device *dev = to_xe_config_device(item);
> > > + struct xe_config_device *dev = xe_configfs_to_device(item);
> > > char *p = page;
> > >
> > > for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
> > > @@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct
> > > config_item *item, char *page)
> > > static ssize_t gt_types_allowed_store(struct config_item *item,
> > > const char *page,
> > > size_t len)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > > char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
> > > char *p = buf;
> > > u64 typemask = 0;
> > > @@ -437,7 +394,7 @@ static ssize_t gt_types_allowed_store(struct
> > > config_item *item, const char *page
> > >
> > > static ssize_t engines_allowed_show(struct config_item *item, char
> > > *page)
> > > {
> > > - struct xe_config_device *dev = to_xe_config_device(item);
> > > + struct xe_config_device *dev = xe_configfs_to_device(item);
> > > char *p = page;
> > >
> > > for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> > > @@ -529,7 +486,7 @@ static int parse_engine(const char *s, const
> > > char *end_chars, u64 *mask,
> > > static ssize_t engines_allowed_store(struct config_item *item,
> > > const char *page,
> > > size_t len)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > > ssize_t patternlen, p;
> > > u64 mask, val = 0;
> > >
> > > @@ -552,14 +509,14 @@ static ssize_t engines_allowed_store(struct
> > > config_item *item, const char *page,
> > >
> > > static ssize_t enable_psmi_show(struct config_item *item, char
> > > *page)
> > > {
> > > - struct xe_config_device *dev = to_xe_config_device(item);
> > > + struct xe_config_device *dev = xe_configfs_to_device(item);
> > >
> > > return sprintf(page, "%d\n", dev->enable_psmi);
> > > }
> > >
> > > static ssize_t enable_psmi_store(struct config_item *item, const
> > > char *page, size_t len)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > > bool val;
> > > int ret;
> > >
> > > @@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct
> > > xe_config_group_device *dev,
> > >
> > > static ssize_t ctx_restore_mid_bb_show(struct config_item *item,
> > > char *page)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > >
> > > return wa_bb_show(dev, dev->config.ctx_restore_mid_bb,
> > > page, SZ_4K);
> > > }
> > >
> > > static ssize_t ctx_restore_post_bb_show(struct config_item *item,
> > > char *page)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > >
> > > return wa_bb_show(dev, dev->config.ctx_restore_post_bb,
> > > page, SZ_4K);
> > > }
> > > @@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb
> > > wa_bb[static XE_ENGINE_CLASS_MAX],
> > > static ssize_t ctx_restore_mid_bb_store(struct config_item *item,
> > > const char *data, size_t
> > > sz)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > >
> > > return wa_bb_store(dev->config.ctx_restore_mid_bb, dev,
> > > data, sz);
> > > }
> > > @@ -806,7 +763,7 @@ static ssize_t ctx_restore_mid_bb_store(struct
> > > config_item *item,
> > > static ssize_t ctx_restore_post_bb_store(struct config_item *item,
> > > const char *data, size_t
> > > sz)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > >
> > > return wa_bb_store(dev->config.ctx_restore_post_bb, dev,
> > > data, sz);
> > > }
> > > @@ -830,7 +787,7 @@ static struct configfs_attribute
> > > *xe_config_device_attrs[] = {
> > >
> > > static void xe_config_device_release(struct config_item *item)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > >
> > > mutex_destroy(&dev->lock);
> > >
> > > @@ -846,7 +803,7 @@ static struct configfs_item_operations
> > > xe_config_device_ops = {
> > > static bool xe_config_device_is_visible(struct config_item *item,
> > > struct configfs_attribute
> > > *attr, int n)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item);
> > >
> > > if (attr == &attr_enable_survivability_mode) {
> > > if (!dev->desc->is_dgfx || dev->desc->platform <
> > > XE_BATTLEMAGE)
> > > @@ -869,7 +826,7 @@ static const struct config_item_type
> > > xe_config_device_type = {
> > >
> > > static ssize_t sriov_max_vfs_show(struct config_item *item, char
> > > *page)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item->ci_parent);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item->ci_parent);
> > >
> > > guard(mutex)(&dev->lock);
> > >
> > > @@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct
> > > config_item *item, char *page)
> > >
> > > static ssize_t sriov_max_vfs_store(struct config_item *item, const
> > > char *page, size_t len)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item->ci_parent);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item->ci_parent);
> > > unsigned int max_vfs;
> > > int ret;
> > >
> > > @@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct
> > > config_item *item, const char *page, s
> > >
> > > static ssize_t sriov_admin_only_pf_show(struct config_item *item,
> > > char *page)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item->ci_parent);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item->ci_parent);
> > >
> > > guard(mutex)(&dev->lock);
> > >
> > > @@ -912,7 +869,7 @@ static ssize_t sriov_admin_only_pf_show(struct
> > > config_item *item, char *page)
> > >
> > > static ssize_t sriov_admin_only_pf_store(struct config_item *item,
> > > const char *page, size_t len)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item->ci_parent);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item->ci_parent);
> > > bool admin_only_pf;
> > > int ret;
> > >
> > > @@ -941,7 +898,7 @@ static struct configfs_attribute
> > > *xe_config_sriov_attrs[] = {
> > > static bool xe_config_sriov_is_visible(struct config_item *item,
> > > struct configfs_attribute
> > > *attr, int n)
> > > {
> > > - struct xe_config_group_device *dev =
> > > to_xe_config_group_device(item->ci_parent);
> > > + struct xe_config_group_device *dev =
> > > xe_configfs_to_group_device(item->ci_parent);
> > >
> > > if (attr == &sriov_attr_max_vfs && dev->mode !=
> > > XE_SRIOV_MODE_PF)
> > > return false;
> > > @@ -1084,7 +1041,7 @@ static struct xe_config_group_device
> > > *find_xe_config_group_device(struct pci_dev
> > > if (!item)
> > > return NULL;
> > >
> > > - return to_xe_config_group_device(item);
> > > + return xe_configfs_to_group_device(item);
> > > }
> > >
> > > static void dump_custom_dev_config(struct pci_dev *pdev,
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> > > b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > new file mode 100644
> > > index 000000000000..935097aafa96
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > @@ -0,0 +1,59 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2026 Intel Corporation
> > > + */
> > > +#ifndef _XE_CONFIGFS_TYPES_H_
> > > +#define _XE_CONFIGFS_TYPES_H_
> > > +
> > > +#include <linux/configfs.h>
> > > +#include <linux/mutex.h>
> > > +#include <linux/types.h>
> > > +
> > > +#include "xe_hw_engine_types.h"
> > > +#include "xe_pci_types.h"
> > > +#include "xe_sriov_types.h"
> > > +
> > > +struct config_item;
> > > +
> > > +/* Similar to struct xe_bb, but not tied to HW (yet) */
> > > +struct wa_bb {
> > > + u32 *cs;
> > > + u32 len; /* in dwords */
> > > +};
> > > +
> > > +struct xe_config_group_device {
> > > + struct config_group group;
> > > + struct config_group sriov;
> > > +
> > > + struct xe_config_device {
> > > + struct wa_bb
> > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > + struct wa_bb
> > > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > > + bool enable_psmi;
> > > + bool enable_survivability_mode;
> > > + u64 engines_allowed;
> > > + u64 gt_types_allowed;
> > > + struct {
> > > + bool admin_only_pf;
> > > + unsigned int max_vfs;
> > > + } sriov;
> > > + } config;
> > > +
> > > + /* protects attributes */
> > > + struct mutex lock;
> > > + /* matching descriptor */
> > > + const struct xe_device_desc *desc;
> > > + /* tentative SR-IOV mode */
> > > + enum xe_sriov_mode mode;
> > > +};
> > > +
> > > +static inline struct xe_config_group_device
> > > *xe_configfs_to_group_device(struct config_item *item)
> > > +{
> > > + return container_of(to_config_group(item), struct
> > > xe_config_group_device, group);
> > > +}
> > > +
> > > +static inline struct xe_config_device
> > > *xe_configfs_to_device(struct config_item *item)
> > > +{
> > > + return &xe_configfs_to_group_device(item)->config;
> > > +}
> > > +
> > > +#endif /* _XE_CONFIGFS_TYPES_H_ */
> >
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 3/9] drm/xe: Split out configfs data structures
2026-05-04 21:48 ` Matthew Brost
@ 2026-05-04 21:51 ` Summers, Stuart
0 siblings, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-04 21:51 UTC (permalink / raw)
To: Brost, Matthew
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Wajdeczko, Michal, Nerlige Ramappa, Umesh,
jani.nikula@linux.intel.com, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 14:48 -0700, Matthew Brost wrote:
> On Mon, May 04, 2026 at 08:24:14AM -0600, Summers, Stuart wrote:
> > On Mon, 2026-05-04 at 11:47 +0300, Jani Nikula wrote:
> > > On Mon, 04 May 2026, Stuart Summers <stuart.summers@intel.com>
> > > wrote:
> > > > Split the configfs data structures into their own _types.h
> > > > file.
> > >
> > > Why? The commit message must always answer the question, "why".
> > >
>
> This is a good point. In general, we should be moving public structs
> that have no business being in public headers (we do quite a bit of
> this
> in Xe) into private structs in C files. This patch does the opposite,
> so
> unless there is a very good reason to make this public (e.g, a struct
> is intended to embedded), my initial reaction is not to do this.
>
> Private structures enforce good layering and component isolation, and
> prevent vectors for abuse (i.e., another layer messing with a struct
> owned by a different layer).
Yeah makes sense. In the series overall I'm creating new
xe_configfs_debug.c and xe_configfs_debug_params.c files that each need
to access these structs, hence the move to a common header. I could
wait to do that move until the patch that actually uses it - just
thought the review would be a little easier this way.
Either way I agree the commit message should have been explicit - I'll
fix that in the next rev.
Thanks,
Stuart
>
> Matt
>
> > > The obvious downside here is that you expose the types that were
> > > previously hidden in xe_configfs.c to anyone who includes
> > > xe_configfs_types.h. And that header depends on a ton of other
> > > headers,
> > > making the header interdepencies worse overall.
> > >
> > > Maybe you need that header later for something, but please spell
> > > that
> > > out here.
> >
> > Yeah this is exactly true.. I'll do a better job with the commit
> > messages here going forward. Really appreciate the feedback Jani!
> >
> > -Stuart
> >
> > >
> > >
> > > BR,
> > > Jani.
> > >
> > > >
> > > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > > Assisted-by: Copilot:claude-opus-4.7
> > > > ---
> > > > drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++-----------
> > > > ----
> > > > ----
> > > > drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++
> > > > 2 files changed, 80 insertions(+), 64 deletions(-)
> > > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > > > b/drivers/gpu/drm/xe/xe_configfs.c
> > > > index 1e134057fae8..12b7fe65446d 100644
> > > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > > @@ -4,7 +4,6 @@
> > > > */
> > > >
> > > > #include <linux/bitops.h>
> > > > -#include <linux/ctype.h>
> > > > #include <linux/configfs.h>
> > > > #include <linux/cleanup.h>
> > > > #include <linux/find.h>
> > > > @@ -15,12 +14,10 @@
> > > >
> > > > #include "instructions/xe_mi_commands.h"
> > > > #include "xe_configfs.h"
> > > > +#include "xe_configfs_types.h"
> > > > #include "xe_defaults.h"
> > > > #include "xe_gt_types.h"
> > > > -#include "xe_hw_engine_types.h"
> > > > #include "xe_module.h"
> > > > -#include "xe_pci_types.h"
> > > > -#include "xe_sriov_types.h"
> > > >
> > > > /**
> > > > * DOC: Xe Configfs
> > > > @@ -245,36 +242,6 @@
> > > > * # rmdir /sys/kernel/config/xe/0000:03:00.0/
> > > > */
> > > >
> > > > -/* Similar to struct xe_bb, but not tied to HW (yet) */
> > > > -struct wa_bb {
> > > > - u32 *cs;
> > > > - u32 len; /* in dwords */
> > > > -};
> > > > -
> > > > -struct xe_config_group_device {
> > > > - struct config_group group;
> > > > - struct config_group sriov;
> > > > -
> > > > - struct xe_config_device {
> > > > - struct wa_bb
> > > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > > - struct wa_bb
> > > > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > > > - bool enable_psmi;
> > > > - bool enable_survivability_mode;
> > > > - u64 engines_allowed;
> > > > - u64 gt_types_allowed;
> > > > - struct {
> > > > - bool admin_only_pf;
> > > > - unsigned int max_vfs;
> > > > - } sriov;
> > > > - } config;
> > > > -
> > > > - /* protects attributes */
> > > > - struct mutex lock;
> > > > - /* matching descriptor */
> > > > - const struct xe_device_desc *desc;
> > > > - /* tentative SR-IOV mode */
> > > > - enum xe_sriov_mode mode;
> > > > -};
> > > >
> > > > static const struct xe_config_device device_defaults = {
> > > > .enable_psmi = false,
> > > > @@ -322,16 +289,6 @@ static const struct {
> > > > { .name = "media", .type = XE_GT_TYPE_MEDIA },
> > > > };
> > > >
> > > > -static struct xe_config_group_device
> > > > *to_xe_config_group_device(struct config_item *item)
> > > > -{
> > > > - return container_of(to_config_group(item), struct
> > > > xe_config_group_device, group);
> > > > -}
> > > > -
> > > > -static struct xe_config_device *to_xe_config_device(struct
> > > > config_item *item)
> > > > -{
> > > > - return &to_xe_config_group_device(item)->config;
> > > > -}
> > > > -
> > > > static bool is_bound(struct xe_config_group_device *dev)
> > > > {
> > > > unsigned int domain, bus, slot, function;
> > > > @@ -359,7 +316,7 @@ static bool is_bound(struct
> > > > xe_config_group_device *dev)
> > > >
> > > > static ssize_t enable_survivability_mode_show(struct
> > > > config_item
> > > > *item, char *page)
> > > > {
> > > > - struct xe_config_device *dev =
> > > > to_xe_config_device(item);
> > > > + struct xe_config_device *dev =
> > > > xe_configfs_to_device(item);
> > > >
> > > > return sprintf(page, "%d\n", dev-
> > > > > enable_survivability_mode);
> > > > }
> > > > @@ -367,7 +324,7 @@ static ssize_t
> > > > enable_survivability_mode_show(struct config_item *item, char
> > > > *pa
> > > > static ssize_t enable_survivability_mode_store(struct
> > > > config_item
> > > > *item, const char *page,
> > > > size_t len)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > > bool enable_survivability_mode;
> > > > int ret;
> > > >
> > > > @@ -386,7 +343,7 @@ static ssize_t
> > > > enable_survivability_mode_store(struct config_item *item, const
> > > > c
> > > >
> > > > static ssize_t gt_types_allowed_show(struct config_item *item,
> > > > char *page)
> > > > {
> > > > - struct xe_config_device *dev =
> > > > to_xe_config_device(item);
> > > > + struct xe_config_device *dev =
> > > > xe_configfs_to_device(item);
> > > > char *p = page;
> > > >
> > > > for (size_t i = 0; i < ARRAY_SIZE(gt_types); i++)
> > > > @@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct
> > > > config_item *item, char *page)
> > > > static ssize_t gt_types_allowed_store(struct config_item
> > > > *item,
> > > > const char *page,
> > > > size_t len)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > > char *buf __free(kfree) = kstrdup(page, GFP_KERNEL);
> > > > char *p = buf;
> > > > u64 typemask = 0;
> > > > @@ -437,7 +394,7 @@ static ssize_t
> > > > gt_types_allowed_store(struct
> > > > config_item *item, const char *page
> > > >
> > > > static ssize_t engines_allowed_show(struct config_item *item,
> > > > char
> > > > *page)
> > > > {
> > > > - struct xe_config_device *dev =
> > > > to_xe_config_device(item);
> > > > + struct xe_config_device *dev =
> > > > xe_configfs_to_device(item);
> > > > char *p = page;
> > > >
> > > > for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> > > > @@ -529,7 +486,7 @@ static int parse_engine(const char *s,
> > > > const
> > > > char *end_chars, u64 *mask,
> > > > static ssize_t engines_allowed_store(struct config_item *item,
> > > > const char *page,
> > > > size_t len)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > > ssize_t patternlen, p;
> > > > u64 mask, val = 0;
> > > >
> > > > @@ -552,14 +509,14 @@ static ssize_t
> > > > engines_allowed_store(struct
> > > > config_item *item, const char *page,
> > > >
> > > > static ssize_t enable_psmi_show(struct config_item *item, char
> > > > *page)
> > > > {
> > > > - struct xe_config_device *dev =
> > > > to_xe_config_device(item);
> > > > + struct xe_config_device *dev =
> > > > xe_configfs_to_device(item);
> > > >
> > > > return sprintf(page, "%d\n", dev->enable_psmi);
> > > > }
> > > >
> > > > static ssize_t enable_psmi_store(struct config_item *item,
> > > > const
> > > > char *page, size_t len)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > > bool val;
> > > > int ret;
> > > >
> > > > @@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct
> > > > xe_config_group_device *dev,
> > > >
> > > > static ssize_t ctx_restore_mid_bb_show(struct config_item
> > > > *item,
> > > > char *page)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > >
> > > > return wa_bb_show(dev, dev->config.ctx_restore_mid_bb,
> > > > page, SZ_4K);
> > > > }
> > > >
> > > > static ssize_t ctx_restore_post_bb_show(struct config_item
> > > > *item,
> > > > char *page)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > >
> > > > return wa_bb_show(dev, dev->config.ctx_restore_post_bb,
> > > > page, SZ_4K);
> > > > }
> > > > @@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb
> > > > wa_bb[static XE_ENGINE_CLASS_MAX],
> > > > static ssize_t ctx_restore_mid_bb_store(struct config_item
> > > > *item,
> > > > const char *data,
> > > > size_t
> > > > sz)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > >
> > > > return wa_bb_store(dev->config.ctx_restore_mid_bb, dev,
> > > > data, sz);
> > > > }
> > > > @@ -806,7 +763,7 @@ static ssize_t
> > > > ctx_restore_mid_bb_store(struct
> > > > config_item *item,
> > > > static ssize_t ctx_restore_post_bb_store(struct config_item
> > > > *item,
> > > > const char *data,
> > > > size_t
> > > > sz)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > >
> > > > return wa_bb_store(dev->config.ctx_restore_post_bb,
> > > > dev,
> > > > data, sz);
> > > > }
> > > > @@ -830,7 +787,7 @@ static struct configfs_attribute
> > > > *xe_config_device_attrs[] = {
> > > >
> > > > static void xe_config_device_release(struct config_item *item)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > >
> > > > mutex_destroy(&dev->lock);
> > > >
> > > > @@ -846,7 +803,7 @@ static struct configfs_item_operations
> > > > xe_config_device_ops = {
> > > > static bool xe_config_device_is_visible(struct config_item
> > > > *item,
> > > > struct
> > > > configfs_attribute
> > > > *attr, int n)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item);
> > > >
> > > > if (attr == &attr_enable_survivability_mode) {
> > > > if (!dev->desc->is_dgfx || dev->desc->platform
> > > > <
> > > > XE_BATTLEMAGE)
> > > > @@ -869,7 +826,7 @@ static const struct config_item_type
> > > > xe_config_device_type = {
> > > >
> > > > static ssize_t sriov_max_vfs_show(struct config_item *item,
> > > > char
> > > > *page)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item->ci_parent);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item->ci_parent);
> > > >
> > > > guard(mutex)(&dev->lock);
> > > >
> > > > @@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct
> > > > config_item *item, char *page)
> > > >
> > > > static ssize_t sriov_max_vfs_store(struct config_item *item,
> > > > const
> > > > char *page, size_t len)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item->ci_parent);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item->ci_parent);
> > > > unsigned int max_vfs;
> > > > int ret;
> > > >
> > > > @@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct
> > > > config_item *item, const char *page, s
> > > >
> > > > static ssize_t sriov_admin_only_pf_show(struct config_item
> > > > *item,
> > > > char *page)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item->ci_parent);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item->ci_parent);
> > > >
> > > > guard(mutex)(&dev->lock);
> > > >
> > > > @@ -912,7 +869,7 @@ static ssize_t
> > > > sriov_admin_only_pf_show(struct
> > > > config_item *item, char *page)
> > > >
> > > > static ssize_t sriov_admin_only_pf_store(struct config_item
> > > > *item,
> > > > const char *page, size_t len)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item->ci_parent);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item->ci_parent);
> > > > bool admin_only_pf;
> > > > int ret;
> > > >
> > > > @@ -941,7 +898,7 @@ static struct configfs_attribute
> > > > *xe_config_sriov_attrs[] = {
> > > > static bool xe_config_sriov_is_visible(struct config_item
> > > > *item,
> > > > struct
> > > > configfs_attribute
> > > > *attr, int n)
> > > > {
> > > > - struct xe_config_group_device *dev =
> > > > to_xe_config_group_device(item->ci_parent);
> > > > + struct xe_config_group_device *dev =
> > > > xe_configfs_to_group_device(item->ci_parent);
> > > >
> > > > if (attr == &sriov_attr_max_vfs && dev->mode !=
> > > > XE_SRIOV_MODE_PF)
> > > > return false;
> > > > @@ -1084,7 +1041,7 @@ static struct xe_config_group_device
> > > > *find_xe_config_group_device(struct pci_dev
> > > > if (!item)
> > > > return NULL;
> > > >
> > > > - return to_xe_config_group_device(item);
> > > > + return xe_configfs_to_group_device(item);
> > > > }
> > > >
> > > > static void dump_custom_dev_config(struct pci_dev *pdev,
> > > > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > new file mode 100644
> > > > index 000000000000..935097aafa96
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > > @@ -0,0 +1,59 @@
> > > > +/* SPDX-License-Identifier: MIT */
> > > > +/*
> > > > + * Copyright © 2026 Intel Corporation
> > > > + */
> > > > +#ifndef _XE_CONFIGFS_TYPES_H_
> > > > +#define _XE_CONFIGFS_TYPES_H_
> > > > +
> > > > +#include <linux/configfs.h>
> > > > +#include <linux/mutex.h>
> > > > +#include <linux/types.h>
> > > > +
> > > > +#include "xe_hw_engine_types.h"
> > > > +#include "xe_pci_types.h"
> > > > +#include "xe_sriov_types.h"
> > > > +
> > > > +struct config_item;
> > > > +
> > > > +/* Similar to struct xe_bb, but not tied to HW (yet) */
> > > > +struct wa_bb {
> > > > + u32 *cs;
> > > > + u32 len; /* in dwords */
> > > > +};
> > > > +
> > > > +struct xe_config_group_device {
> > > > + struct config_group group;
> > > > + struct config_group sriov;
> > > > +
> > > > + struct xe_config_device {
> > > > + struct wa_bb
> > > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > > + struct wa_bb
> > > > ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
> > > > + bool enable_psmi;
> > > > + bool enable_survivability_mode;
> > > > + u64 engines_allowed;
> > > > + u64 gt_types_allowed;
> > > > + struct {
> > > > + bool admin_only_pf;
> > > > + unsigned int max_vfs;
> > > > + } sriov;
> > > > + } config;
> > > > +
> > > > + /* protects attributes */
> > > > + struct mutex lock;
> > > > + /* matching descriptor */
> > > > + const struct xe_device_desc *desc;
> > > > + /* tentative SR-IOV mode */
> > > > + enum xe_sriov_mode mode;
> > > > +};
> > > > +
> > > > +static inline struct xe_config_group_device
> > > > *xe_configfs_to_group_device(struct config_item *item)
> > > > +{
> > > > + return container_of(to_config_group(item), struct
> > > > xe_config_group_device, group);
> > > > +}
> > > > +
> > > > +static inline struct xe_config_device
> > > > *xe_configfs_to_device(struct config_item *item)
> > > > +{
> > > > + return &xe_configfs_to_group_device(item)->config;
> > > > +}
> > > > +
> > > > +#endif /* _XE_CONFIGFS_TYPES_H_ */
> > >
> >
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 4/9] drm/xe: Add a new debug focused configfs group
2026-05-04 15:50 ` Summers, Stuart
2026-05-04 17:28 ` Gustavo Sousa
@ 2026-05-05 21:45 ` Summers, Stuart
1 sibling, 0 replies; 37+ messages in thread
From: Summers, Stuart @ 2026-05-05 21:45 UTC (permalink / raw)
To: Sousa, Gustavo
Cc: intel-xe@lists.freedesktop.org, Lin, Shuicheng, Vivi, Rodrigo,
Roper, Matthew D, Brost, Matthew, Wajdeczko, Michal,
Nerlige Ramappa, Umesh, Ceraolo Spurio, Daniele
On Mon, 2026-05-04 at 15:50 +0000, Summers, Stuart wrote:
> On Mon, 2026-05-04 at 12:42 -0300, Gustavo Sousa wrote:
> > Stuart Summers <stuart.summers@intel.com> writes:
> >
> > > Add the skeleton code for a new debug specific configfs group.
> > >
> > > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > > Assisted-by: Copilot:claude-opus-4.7
> > > ---
> > > drivers/gpu/drm/xe/Makefile | 2 ++
> > > drivers/gpu/drm/xe/xe_configfs.c | 4 ++++
> > > drivers/gpu/drm/xe/xe_configfs_debug.c | 14 ++++++++++++++
> > > drivers/gpu/drm/xe/xe_configfs_debug.h | 8 ++++++++
> > > drivers/gpu/drm/xe/xe_configfs_types.h | 7 +++++++
> > > 5 files changed, 35 insertions(+)
> > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.c
> > > create mode 100644 drivers/gpu/drm/xe/xe_configfs_debug.h
> > >
> > > diff --git a/drivers/gpu/drm/xe/Makefile
> > > b/drivers/gpu/drm/xe/Makefile
> > > index 09661f079d03..b58667b0b18e 100644
> > > --- a/drivers/gpu/drm/xe/Makefile
> > > +++ b/drivers/gpu/drm/xe/Makefile
> > > @@ -161,6 +161,8 @@ xe-$(CONFIG_HWMON) += xe_hwmon.o
> > >
> > > xe-$(CONFIG_PERF_EVENTS) += xe_pmu.o
> > > xe-$(CONFIG_CONFIGFS_FS) += xe_configfs.o
> > > +xe_debug_configfs_obj-$(CONFIG_DRM_XE_DEBUG) :=
> > > xe_configfs_debug.o
> > > +xe-$(CONFIG_CONFIGFS_FS) += $(xe_debug_configfs_obj-y)
> >
> > What are the downsides of keeping this available for non-debug
> > builds?
> >
> > I imagine that the debug configfs could be useful for someone not
> > involved in kernel development working together with the developers
> > to
> > debug issues without needing to rebuild their kernel.
>
> So the focal parameter we had in i915 was enable_rc6. Something like
> this is what we explicitly don't want to expose to a general user as
> it
> can have unforeseen consequences (like having very high power usage).
> But, having the ability to disable rc6 for debug purposes as a
> developer is extremely useful at narrowing down certain types of bugs
> at the hardware/software interface.
>
> That's just one example, but there are a bunch of things that could
> fit
> this category and I expect we'll have even more use cases over time.
>
> Right now we have to hold these types of changes in a side branch not
> exposed externally and I really want to converge our processes so we
> can more easily make these kinds of changes and let us debug directly
> out of drm-tip.
>
> >
> > >
> > > # graphics virtualization (SR-IOV) support
> > > xe-y += \
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c
> > > b/drivers/gpu/drm/xe/xe_configfs.c
> > > index 12b7fe65446d..85df8ce5cf2a 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > @@ -1006,6 +1006,10 @@ static struct config_group
> > > *xe_config_make_device_group(struct config_group *gro
> > > config_group_init_type_name(&dev->sriov, "sriov",
> > > &xe_config_sriov_type);
> > > configfs_add_default_group(&dev->sriov, &dev-
> > > > group);
> > > }
> > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > > + config_group_init_type_name(&dev->debug, "debug",
> > > &xe_configfs_debug_type);
> > > + configfs_add_default_group(&dev->debug, &dev->group);
> > > +#endif
> >
> > I guess there isn't much we can do about it today, but, based on
> > what
> > I
> > read in configfs documentation a while ago, I suspect it wasn't
> > really
> > designed with arbitrary hierarchies of config items in mind. It
> > would
> > be nice if there was an API for that though.
> >
> > Basically, a config group is expected to be a directory to contain
> > a
> > set
> > of config items of the same type, which is not the case on our
> > current
> > usage (i.e. the "sriov" and now the "debug" group).
> >
> > I guess we are able to get our desired behavior (basically just a
> > subdirectory behaving as a config item) by not implementing the
> > "make_item" hook. Not sure if that's an expected use of the API or
> > if
> > that's more of a hack on our side and could come back to bite us in
> > the
> > future.
>
> Hm.. ok that's good feedback. I do like bucketing these in groups and
> subdirectories. It also makes it easy to show or not show based on
> the
> Kconfig. But let me go through and make sure there isn't something
> more
> suited here. Happy to hear any other feedback as well here.
Hey so I don't think it's necessarily a bad idea to use make_item here
for the leaf nodes. But make_group does cover. I see other drivers
going both directions here. That said, we aren't doing anything new in
this patch series with respect to configfs item creation. I'd prefer to
keep things consistent in this series if possible. We can look at
dividing out into config_item and config_group entries separately.
Thanks,
Stuart
>
> Thanks,
> Stuart
>
> >
> > --
> > Gustavo Sousa
> >
> > >
> > > mutex_init(&dev->lock);
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c
> > > b/drivers/gpu/drm/xe/xe_configfs_debug.c
> > > new file mode 100644
> > > index 000000000000..45617282cec5
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
> > > @@ -0,0 +1,14 @@
> > > +// SPDX-License-Identifier: MIT
> > > +/*
> > > + * Copyright © 2026 Intel Corporation
> > > + */
> > > +
> > > +#include <linux/configfs.h>
> > > +#include <linux/module.h>
> > > +
> > > +#include "xe_configfs_debug.h"
> > > +#include "xe_configfs_types.h"
> > > +
> > > +const struct config_item_type xe_configfs_debug_type = {
> > > + .ct_owner = THIS_MODULE,
> > > +};
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h
> > > b/drivers/gpu/drm/xe/xe_configfs_debug.h
> > > new file mode 100644
> > > index 000000000000..01170dc2f97e
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
> > > @@ -0,0 +1,8 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2026 Intel Corporation
> > > + */
> > > +#ifndef _XE_CONFIGFS_DEBUG_H_
> > > +#define _XE_CONFIGFS_DEBUG_H_
> > > +
> > > +#endif /* _XE_CONFIGFS_DEBUG_H_ */
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h
> > > b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > index 935097aafa96..c9d94a3c26a7 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs_types.h
> > > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> > > @@ -24,6 +24,9 @@ struct wa_bb {
> > > struct xe_config_group_device {
> > > struct config_group group;
> > > struct config_group sriov;
> > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > > + struct config_group debug;
> > > +#endif
> > >
> > > struct xe_config_device {
> > > struct wa_bb
> > > ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX];
> > > @@ -56,4 +59,8 @@ static inline struct xe_config_device
> > > *xe_configfs_to_device(struct config_item
> > > return &xe_configfs_to_group_device(item)->config;
> > > }
> > >
> > > +#if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> > > +extern const struct config_item_type xe_configfs_debug_type;
> > > +#endif
> > > +
> > > #endif /* _XE_CONFIGFS_TYPES_H_ */
> > > --
> > > 2.43.0
>
^ permalink raw reply [flat|nested] 37+ messages in thread
* Re: [PATCH 6/9] drm/xe/guc: Add configfs support for guc_log_level
2026-05-04 4:43 ` [PATCH 6/9] drm/xe/guc: Add configfs support for guc_log_level Stuart Summers
@ 2026-05-05 23:54 ` Daniele Ceraolo Spurio
0 siblings, 0 replies; 37+ messages in thread
From: Daniele Ceraolo Spurio @ 2026-05-05 23:54 UTC (permalink / raw)
To: Stuart Summers
Cc: intel-xe, rodrigo.vivi, matthew.brost, umesh.nerlige.ramappa,
Michal.Wajdeczko, matthew.d.roper, shuicheng.lin
On 5/3/2026 9:43 PM, Stuart Summers wrote:
> Allow the GuC log level to be selected per-device via configfs in
> addition to the existing 'guc_log_level' module parameter. The configfs
> attribute lives under the new 'debug' configfs subdirectory:
>
> /sys/kernel/config/xe/<bdf>/debug/guc_log_level
>
> When the configfs attribute is set to a valid level (0-5), it overrides
> the module parameter for that device. The default value is -1
> (XE_GUC_LOG_LEVEL_UNSET), which means 'unset' and falls back to the
> 'guc_log_level' module parameter, ensuring existing users that rely
> solely on the module parameter are unaffected by this change.
>
> The module parameter implementation itself is untouched.
>
> Note that the expectation is a user will only set the log level when
> CONFIG_DRM_XE_DEBUG is set. Otherwise the expectation is a user will
> always just use the default (1).
Why is this the expectation? if a customer is seeing a bug that we're
not able to reproduce, it might be useful to ask them to repro with a
higher GuC verbosity level without having to rebuild the kernel in debug
mode.
Daniele
>
> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> Assisted-by: Copilot:claude-opus-4.7
> ---
> drivers/gpu/drm/xe/xe_configfs.c | 2 +
> drivers/gpu/drm/xe/xe_configfs_debug.c | 84 +++++++++++++++++++++++++-
> drivers/gpu/drm/xe/xe_configfs_debug.h | 7 +++
> drivers/gpu/drm/xe/xe_configfs_types.h | 1 +
> drivers/gpu/drm/xe/xe_defaults.h | 3 +
> drivers/gpu/drm/xe/xe_guc_log.c | 3 +-
> 6 files changed, 98 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 89e163ce56aa..babe33e84af2 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -106,6 +106,7 @@ const struct xe_config_device xe_configfs_device_defaults = {
> .enable_survivability_mode = false,
> .engines_allowed = U64_MAX,
> .gt_types_allowed = U64_MAX,
> + .guc_log_level = XE_GUC_LOG_LEVEL_UNSET,
> },
> #endif
> .sriov = {
> @@ -429,6 +430,7 @@ static void dump_custom_dev_config(struct pci_dev *pdev,
> PRI_CUSTOM_ATTR("%d", debug.enable_survivability_mode);
> PRI_CUSTOM_ATTR("%llx", debug.engines_allowed);
> PRI_CUSTOM_ATTR("%llx", debug.gt_types_allowed);
> + PRI_CUSTOM_ATTR("%d", debug.guc_log_level);
> #endif
> PRI_CUSTOM_ATTR("%u", sriov.admin_only_pf);
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.c b/drivers/gpu/drm/xe/xe_configfs_debug.c
> index adf193d48a63..b5c06d1ec7c9 100644
> --- a/drivers/gpu/drm/xe/xe_configfs_debug.c
> +++ b/drivers/gpu/drm/xe/xe_configfs_debug.c
> @@ -15,6 +15,7 @@
> #include "xe_configfs_debug.h"
> #include "xe_configfs_types.h"
> #include "xe_gt_types.h"
> +#include "xe_guc_log.h"
> #include "xe_hw_engine_types.h"
> #include "xe_pci_types.h"
>
> @@ -43,7 +44,8 @@
> * ├── enable_psmi
> * ├── enable_survivability_mode
> * ├── engines_allowed
> - * └── gt_types_allowed
> + * ├── gt_types_allowed
> + * └── guc_log_level
> *
> * Configure Attributes
> * ====================
> @@ -186,6 +188,27 @@
> *
> * # echo '' > /sys/kernel/config/xe/0000:03:00.0/debug/gt_types_allowed
> *
> + * GuC log level:
> + * --------------
> + *
> + * Set the GuC firmware logging verbosity for this device. Accepted values
> + * match the ``guc_log_level`` module parameter:
> + *
> + * - 0: disable
> + * - 1: normal (non-verbose)
> + * - 2..%GUC_LOG_LEVEL_MAX: verbose levels
> + *
> + * Example::
> + *
> + * # echo 3 > /sys/kernel/config/xe/0000:03:00.0/debug/guc_log_level
> + *
> + * The default value is %XE_GUC_LOG_LEVEL_UNSET (-1), which means the value
> + * of the ``guc_log_level`` module parameter is used. Any value greater
> + * than -1 written to this attribute overrides the module parameter for
> + * this device.
> + *
> + * This attribute can only be set before binding to the device.
> + *
> */
>
> struct engine_info {
> @@ -325,6 +348,34 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
> return ret;
> }
>
> +/**
> + * xe_configfs_get_guc_log_level - get configfs guc_log_level setting
> + * @pdev: pci device
> + *
> + * Returns the guc_log_level value configured via configfs. If the configfs
> + * value is negative (the default is %XE_GUC_LOG_LEVEL_UNSET, -1), the value
> + * of the ``guc_log_level`` module parameter is returned instead, allowing
> + * the configfs entry to override the module parameter without affecting
> + * users that rely solely on the module parameter.
> + *
> + * Return: GuC log level to use for this device.
> + */
> +int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
> +{
> + struct xe_config_group_device *dev = xe_configfs_find_device(pdev);
> + int level = xe_modparam.guc_log_level;
> +
> + if (!dev)
> + goto out;
> +
> + if (dev->config.debug.guc_log_level >= 0)
> + level = dev->config.debug.guc_log_level;
> +
> + config_group_put(&dev->group);
> +out:
> + return level;
> +}
> +
> /**
> * xe_configfs_get_ctx_restore_mid_bb - get configfs ctx_restore_mid_bb setting
> * @pdev: pci device
> @@ -596,6 +647,35 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
> return len;
> }
>
> +static ssize_t guc_log_level_show(struct config_item *item, char *page)
> +{
> + struct xe_config_device *dev = debug_to_device(item);
> +
> + return sprintf(page, "%d\n", dev->debug.guc_log_level);
> +}
> +
> +static ssize_t guc_log_level_store(struct config_item *item, const char *page, size_t len)
> +{
> + struct xe_config_group_device *dev = debug_to_group_device(item);
> + int val;
> + int ret;
> +
> + ret = kstrtoint(page, 0, &val);
> + if (ret)
> + return ret;
> +
> + if (val > GUC_LOG_LEVEL_MAX)
> + return -EINVAL;
> +
> + guard(mutex)(&dev->lock);
> + if (xe_configfs_is_bound(dev))
> + return -EBUSY;
> +
> + dev->config.debug.guc_log_level = val;
> +
> + return len;
> +}
> +
> static bool wa_bb_read_advance(bool dereference, char **p,
> const char *append, size_t len,
> size_t *max_size)
> @@ -837,6 +917,7 @@ CONFIGFS_ATTR(, enable_psmi);
> CONFIGFS_ATTR(, enable_survivability_mode);
> CONFIGFS_ATTR(, engines_allowed);
> CONFIGFS_ATTR(, gt_types_allowed);
> +CONFIGFS_ATTR(, guc_log_level);
>
> static bool xe_configfs_debug_is_visible(struct config_item *item,
> struct configfs_attribute *attr,
> @@ -863,6 +944,7 @@ static struct configfs_attribute *xe_configfs_debug_attrs[] = {
> &attr_enable_survivability_mode,
> &attr_engines_allowed,
> &attr_gt_types_allowed,
> + &attr_guc_log_level,
> NULL,
> };
>
> diff --git a/drivers/gpu/drm/xe/xe_configfs_debug.h b/drivers/gpu/drm/xe/xe_configfs_debug.h
> index bfbfbda1073f..b29c739435c5 100644
> --- a/drivers/gpu/drm/xe/xe_configfs_debug.h
> +++ b/drivers/gpu/drm/xe/xe_configfs_debug.h
> @@ -7,7 +7,9 @@
>
> #include <linux/types.h>
>
> +#include "xe_defaults.h"
> #include "xe_hw_engine_types.h"
> +#include "xe_module.h"
>
> struct pci_dev;
>
> @@ -17,6 +19,7 @@ bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev);
> bool xe_configfs_media_gt_allowed(struct pci_dev *pdev);
> u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
> +int xe_configfs_get_guc_log_level(struct pci_dev *pdev);
> u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
> enum xe_engine_class class,
> const u32 **cs);
> @@ -33,6 +36,10 @@ static inline bool xe_configfs_primary_gt_allowed(struct pci_dev *pdev) { return
> static inline bool xe_configfs_media_gt_allowed(struct pci_dev *pdev) { return true; }
> static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
> static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
> +static inline int xe_configfs_get_guc_log_level(struct pci_dev *pdev)
> +{
> + return xe_modparam.guc_log_level;
> +}
> static inline u32 xe_configfs_get_ctx_restore_mid_bb(struct pci_dev *pdev,
> enum xe_engine_class class,
> const u32 **cs) { return 0; }
> diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/xe_configfs_types.h
> index 02d5709bcfd3..ba920c37c44d 100644
> --- a/drivers/gpu/drm/xe/xe_configfs_types.h
> +++ b/drivers/gpu/drm/xe/xe_configfs_types.h
> @@ -37,6 +37,7 @@ struct xe_config_group_device {
> bool enable_survivability_mode;
> u64 engines_allowed;
> u64 gt_types_allowed;
> + int guc_log_level;
> } debug;
> struct {
> bool admin_only_pf;
> diff --git a/drivers/gpu/drm/xe/xe_defaults.h b/drivers/gpu/drm/xe/xe_defaults.h
> index c8ae1d5f3d60..df88078e84b8 100644
> --- a/drivers/gpu/drm/xe/xe_defaults.h
> +++ b/drivers/gpu/drm/xe/xe_defaults.h
> @@ -13,6 +13,9 @@
> #define XE_DEFAULT_GUC_LOG_LEVEL 1
> #endif
>
> +/* Sentinel value for guc_log_level configfs: not set, fall back to module param */
> +#define XE_GUC_LOG_LEVEL_UNSET -1
> +
> #define XE_DEFAULT_PROBE_DISPLAY IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
> #define XE_DEFAULT_VRAM_BAR_SIZE 0
> #define XE_DEFAULT_FORCE_PROBE CONFIG_DRM_XE_FORCE_PROBE
> diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
> index 538d4df0f7aa..531b9759d520 100644
> --- a/drivers/gpu/drm/xe/xe_guc_log.c
> +++ b/drivers/gpu/drm/xe/xe_guc_log.c
> @@ -13,6 +13,7 @@
> #include "abi/guc_lfd_abi.h"
> #include "regs/xe_guc_regs.h"
> #include "xe_bo.h"
> +#include "xe_configfs_debug.h"
> #include "xe_devcoredump.h"
> #include "xe_force_wake.h"
> #include "xe_gt_printk.h"
> @@ -637,7 +638,7 @@ int xe_guc_log_init(struct xe_guc_log *log)
>
> xe_map_memset(xe, &bo->vmap, 0, 0, xe_bo_size(bo));
> log->bo = bo;
> - log->level = xe_modparam.guc_log_level;
> + log->level = xe_configfs_get_guc_log_level(to_pci_dev(xe->drm.dev));
>
> return 0;
> }
^ permalink raw reply [flat|nested] 37+ messages in thread
end of thread, other threads:[~2026-05-05 23:54 UTC | newest]
Thread overview: 37+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-04 4:43 [PATCH 0/9] Add new debug infrastructure for configfs Stuart Summers
2026-05-04 4:43 ` [PATCH 1/9] drm/xe: Rename survivability_mode to enable_survivability_mode Stuart Summers
2026-05-04 13:29 ` Gustavo Sousa
2026-05-04 14:32 ` Summers, Stuart
2026-05-04 14:38 ` Summers, Stuart
2026-05-04 14:40 ` Summers, Stuart
2026-05-04 18:31 ` Rodrigo Vivi
2026-05-04 18:38 ` Summers, Stuart
2026-05-04 4:43 ` [PATCH 2/9] drm/xe: Sort xe_config_device fields and defaults alphabetically Stuart Summers
2026-05-04 13:58 ` Gustavo Sousa
2026-05-04 14:38 ` Summers, Stuart
2026-05-04 15:47 ` Lin, Shuicheng
2026-05-04 15:54 ` Summers, Stuart
2026-05-04 4:43 ` [PATCH 3/9] drm/xe: Split out configfs data structures Stuart Summers
2026-05-04 4:52 ` Summers, Stuart
2026-05-04 8:47 ` Jani Nikula
2026-05-04 14:24 ` Summers, Stuart
2026-05-04 21:48 ` Matthew Brost
2026-05-04 21:51 ` Summers, Stuart
2026-05-04 4:43 ` [PATCH 4/9] drm/xe: Add a new debug focused configfs group Stuart Summers
2026-05-04 15:42 ` Gustavo Sousa
2026-05-04 15:50 ` Summers, Stuart
2026-05-04 17:28 ` Gustavo Sousa
2026-05-04 17:44 ` Summers, Stuart
2026-05-04 19:04 ` Gustavo Sousa
2026-05-05 21:45 ` Summers, Stuart
2026-05-04 4:43 ` [PATCH 5/9] drm/xe: Move debug configfs entries to xe_configfs_debug.c Stuart Summers
2026-05-04 4:43 ` [PATCH 6/9] drm/xe/guc: Add configfs support for guc_log_level Stuart Summers
2026-05-05 23:54 ` Daniele Ceraolo Spurio
2026-05-04 4:43 ` [PATCH 7/9] drm/xe/guc: Add support for NPK as a GuC log target Stuart Summers
2026-05-04 4:43 ` [PATCH 8/9] drm/xe: Add infrastructure for debug configfs parameters Stuart Summers
2026-05-04 4:43 ` [PATCH 9/9] drm/xe: Migrate existing debug configfs entries to params infrastructure Stuart Summers
2026-05-04 4:54 ` [PATCH 0/9] Add new debug infrastructure for configfs Summers, Stuart
2026-05-04 5:30 ` ✗ CI.checkpatch: warning for " Patchwork
2026-05-04 5:32 ` ✓ CI.KUnit: success " Patchwork
2026-05-04 6:44 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-04 8:42 ` ✗ Xe.CI.FULL: failure " Patchwork
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