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From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: ankit.k.nautiyal@intel.com, arun.r.murthy@intel.com,
	Suraj Kandpal <suraj.kandpal@intel.com>
Subject: [PATCH v3 01/10] drm/i915/display: Add helper to compute link M/N ratio for reuse
Date: Wed, 16 Sep 2026 14:39:37 +0530	[thread overview]
Message-ID: <20260916090946.677564-2-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20260916090946.677564-1-suraj.kandpal@intel.com>

From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Introduce intel_display_compute_link_m_n() to compute the link M/N ratio
from the pixel clock and the link symbol clock. This logic was
previously embedded within intel_link_compute_m_n().

The new helper allows reuse of link M/N computation in other contexts
without requiring the full data M/N calculation.

No functional changes intended.

v2:
- Rename function (Jani)
- The link symbol clock is passed in rather than derived here, so that the
DP specific conversion from the link rate stays with the caller. (Jani)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9151ea6c15ab..f04a6f97e05a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2641,13 +2641,20 @@ static void compute_m_n(u32 *ret_m, u32 *ret_n,
 	intel_reduce_m_n_ratio(ret_m, ret_n);
 }
 
+static void intel_display_compute_link_m_n(u32 *link_m, u32 *link_n,
+					   int pixel_clock, int link_symbol_clock)
+{
+	compute_m_n(link_m, link_n,
+		    pixel_clock, link_symbol_clock,
+		    0x80000);
+}
+
 void
 intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
 		       int pixel_clock, int link_clock,
 		       int bw_overhead,
 		       struct intel_link_m_n *m_n)
 {
-	u32 link_symbol_clock = intel_dp_link_symbol_clock(link_clock);
 	u32 data_m = intel_dp_effective_data_rate(pixel_clock, bits_per_pixel_x16,
 						  bw_overhead);
 	u32 data_n = drm_dp_max_dprx_data_rate(link_clock, nlanes);
@@ -2664,9 +2671,9 @@ intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
 		    data_m, data_n,
 		    0x8000000);
 
-	compute_m_n(&m_n->link_m, &m_n->link_n,
-		    pixel_clock, link_symbol_clock,
-		    0x80000);
+	intel_display_compute_link_m_n(&m_n->link_m, &m_n->link_n,
+				       pixel_clock,
+				       intel_dp_link_symbol_clock(link_clock));
 }
 
 void intel_panel_sanitize_ssc(struct intel_display *display)
-- 
2.34.1


  reply	other threads:[~2026-09-16  9:09 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-16  9:09 [PATCH v3 00/10] Implement Wa_14021768792 to bypass m_n ratio limit Suraj Kandpal
2026-09-16  9:09 ` Suraj Kandpal [this message]
2026-09-16  9:09 ` [PATCH v3 02/10] drm/i915/dp: Limit M/N ratio for DP SST Suraj Kandpal
2026-09-16  9:25   ` sashiko-bot
2026-09-16  9:33     ` Kandpal, Suraj
2026-09-16  9:09 ` [PATCH v3 03/10] drm/i915/dp_mst: Limit M/N ratio for MST Suraj Kandpal
2026-09-16  9:09 ` [PATCH v3 04/10] drm/i915/dp: Add M/N ratio check with warning for DP link config Suraj Kandpal
2026-09-16  9:23   ` sashiko-bot
2026-09-16  9:09 ` [PATCH v3 05/10] drm/i915/display: Add bits for link_n_extended for DISPLAY >= 14 Suraj Kandpal
2026-09-16  9:09 ` [PATCH v3 06/10] drm/i915/display_wa: Add support for Wa_14021768792 Suraj Kandpal
2026-09-16  9:09 ` [PATCH v3 07/10] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Suraj Kandpal
2026-09-16  9:23   ` sashiko-bot
2026-09-16  9:09 ` [PATCH v3 08/10] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n " Suraj Kandpal
2026-09-16  9:27   ` sashiko-bot
2026-09-16  9:09 ` [PATCH v3 09/10] drm/i915/dp: Extend intel_dp_can_support_m_n() for BMG M/N bypass Suraj Kandpal
2026-09-16  9:09 ` [PATCH v3 10/10] drm/i915/dp: Bump the max Link M/N ratio to 22 for DISPLAY_VER >= 35 Suraj Kandpal
2026-09-16  9:18 ` ✓ CI.KUnit: success for Implement Wa_14021768792 to bypass m_n ratio limit (rev8) Patchwork
2026-09-16  9:55 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-16 11:30 ` ✗ Xe.CI.FULL: failure " Patchwork

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