From: sashiko-bot@kernel.org
To: "Suraj Kandpal" <suraj.kandpal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v3 08/10] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n ratio > 10
Date: Wed, 16 Sep 2026 09:27:37 +0000 [thread overview]
Message-ID: <20260916092738.7E0D61F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260916090946.677564-9-suraj.kandpal@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/i915/dp: state leak of bypass_m_n_ratio_limit disables DRRS
--
commit 0e4fb34450fd70c4ab5e5e995c5d7cab890c8cac
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n ratio > 10
Handle the bypass logic for the M/N ratio limit for DP. Calculate the
M/N ratio, check if it can bypass the limit, and set the appropriate
flags for the workaround to restrict DRRS and seamless M/N fastsets.
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 8de51582d18c8..3911942de8e53 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
[ ... ]
> @@ -3405,10 +3409,21 @@ void intel_dp_check_m_n_ratio(struct intel_crtc_state *crtc_state,
>
> m_n_ratio = DIV_ROUND_UP(m_n->link_m, m_n->link_n);
>
> - if (m_n_ratio > max_m_n_ratio)
> - drm_WARN(display->drm, 1,
> - "Link M/N ratio (%d) exceeds max allowed (%d)\n",
> - m_n_ratio, max_m_n_ratio);
> + if (m_n_ratio <= max_m_n_ratio)
> + return;
[Severity: Medium]
If a previous iteration or modeset evaluated an M/N ratio > 10 and set the
bypass_m_n_ratio_limit flag to true, does returning early here leave the flag
incorrectly set?
For example, when this function is called during the MST BPP fallback loop:
drivers/gpu/drm/i915/display/intel_dp_mst.c:intel_dp_mtp_tu_compute_config() {
...
intel_dp_mst_compute_m_n(crtc_state,
local_bw_overhead,
link_bpp_x16,
&crtc_state->dp_m_n);
intel_dp_check_m_n_ratio(crtc_state, &crtc_state->dp_m_n);
...
}
The crtc_state->dp_m_n struct is reused across fallback iterations. If a
rejected high-ratio configuration sets bypass_m_n_ratio_limit to true, it
appears a subsequent accepted lower-ratio configuration will return early
without clearing it. This would permanently disable DRRS for the CRTC.
Should we set m_n->bypass_m_n_ratio_limit = false before returning?
> +
> + if (intel_dp_is_uhbr(crtc_state) &&
> + intel_display_can_bypass_m_n_limit(display, m_n_ratio, crtc->pipe)) {
> + m_n->bypass_m_n_ratio_limit = true;
> + drm_dbg_kms(display->drm,
> + "Bypassing Link_m/Link_n ratio limit (ratio %d)\n",
> + m_n_ratio);
> + return;
> + }
> +
> + drm_WARN(display->drm, 1,
> + "Link M/N ratio (%d) exceeds max allowed (%d)\n",
> + m_n_ratio, max_m_n_ratio);
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260916090946.677564-1-suraj.kandpal@intel.com?part=8
next prev parent reply other threads:[~2026-09-16 9:27 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-16 9:09 [PATCH v3 00/10] Implement Wa_14021768792 to bypass m_n ratio limit Suraj Kandpal
2026-09-16 9:09 ` [PATCH v3 01/10] drm/i915/display: Add helper to compute link M/N ratio for reuse Suraj Kandpal
2026-09-16 9:09 ` [PATCH v3 02/10] drm/i915/dp: Limit M/N ratio for DP SST Suraj Kandpal
2026-09-16 9:25 ` sashiko-bot
2026-09-16 9:33 ` Kandpal, Suraj
2026-09-16 9:09 ` [PATCH v3 03/10] drm/i915/dp_mst: Limit M/N ratio for MST Suraj Kandpal
2026-09-16 9:09 ` [PATCH v3 04/10] drm/i915/dp: Add M/N ratio check with warning for DP link config Suraj Kandpal
2026-09-16 9:23 ` sashiko-bot
2026-09-16 9:09 ` [PATCH v3 05/10] drm/i915/display: Add bits for link_n_extended for DISPLAY >= 14 Suraj Kandpal
2026-09-16 9:09 ` [PATCH v3 06/10] drm/i915/display_wa: Add support for Wa_14021768792 Suraj Kandpal
2026-09-16 9:09 ` [PATCH v3 07/10] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Suraj Kandpal
2026-09-16 9:23 ` sashiko-bot
2026-09-16 9:09 ` [PATCH v3 08/10] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n " Suraj Kandpal
2026-09-16 9:27 ` sashiko-bot [this message]
2026-09-16 9:09 ` [PATCH v3 09/10] drm/i915/dp: Extend intel_dp_can_support_m_n() for BMG M/N bypass Suraj Kandpal
2026-09-16 9:09 ` [PATCH v3 10/10] drm/i915/dp: Bump the max Link M/N ratio to 22 for DISPLAY_VER >= 35 Suraj Kandpal
2026-09-16 9:18 ` ✓ CI.KUnit: success for Implement Wa_14021768792 to bypass m_n ratio limit (rev8) Patchwork
2026-09-16 9:55 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-16 11:30 ` ✗ Xe.CI.FULL: failure " Patchwork
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