Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v10 17/20] drm/xe/vsec: Support late bind fw information
Date: Fri, 18 Sep 2026 13:41:12 +0000	[thread overview]
Message-ID: <20260918134112.BAEFC1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260918131751.2408883-39-michael.j.ruhl@intel.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] core: async devm registration during unbind causes resource leak and UAF
- [Low] style: mixing goto-based cleanup labels with scoped_guard in same function
--

commit 07a655e6731c9aa568ad5d0e90b50bcc5c2bdb0a
Author: Michael J. Ruhl <michael.j.ruhl@intel.com>

    drm/xe/vsec: Support late bind fw information
    
    CRI FW is loaded on power on.  Because of this, access to the FW cannot
    be done until it is running.
    
    Update the XE PMT probe and access to check for late bind devices,
    verify, and wait for the appropriate FW state before probe or access.

> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 0f6e3be520c09..5384fef5e5ac5 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -343,6 +395,11 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  		goto dev_exit;
>  	}
>  
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
> +
>  	scoped_guard(mutex, &xe->pmt.lock) {
>  		/* set SoC re-mapper index register based on GUID memory region */
>  		xe->soc_remapper.set_telem_region(xe, mem_region);
> @@ -350,6 +407,7 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  		memcpy_fromio(data, telem_addr, count);
>  	}
>  
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:

[Severity: Low]
Does this code mix goto-based cleanup labels with scoped_guard in the same
function?

The cleanup subsystem guidelines explicitly state that functions should not
mix goto-based cleanup labels with scope-based cleanup declarations like
scoped_guard.

> @@ -397,6 +455,10 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
>  	disc_addr += inst + offset;
>  
>  	xe_pm_runtime_get(xe);
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
>  
>  	scoped_guard(mutex, &xe->pmt.lock) {
>  		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> @@ -404,6 +466,7 @@ static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
>  		*reg = readl(disc_addr);
>  	}
>  
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:

[Severity: Low]
Is it intentional to mix goto labels and scoped_guard here as well?

Using goto-based cleanup labels together with scoped_guard in the same
function is discouraged by the cleanup subsystem guidelines.

> @@ -434,6 +497,10 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
>  	disc_addr += inst + offset;
>  
>  	xe_pm_runtime_get(xe);
> +	if (!wait_for_fw(xe)) {
> +		ret = -ENODATA;
> +		goto runtime_exit;
> +	}
>  
>  	scoped_guard(mutex, &xe->pmt.lock) {
>  		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> @@ -441,6 +508,7 @@ static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
>  		writel(reg, disc_addr);
>  	}
>  
> +runtime_exit:
>  	xe_pm_runtime_put(xe);
>  
>  dev_exit:

[Severity: Low]
Does this function also mix goto-based cleanup labels with scoped_guard?

The same cleanup subsystem guidelines apply here, which advise against mixing
goto-based cleanup labels and scope-based cleanups in a single function.

> @@ -477,12 +545,46 @@ static enum xe_vsec get_platform_info(struct xe_device *xe)
>  	return vsec_platforms[xe->info.platform];
>  }
>  
> +static void cri_late_bind_probe(struct xe_device *xe)
> +{
> +	struct intel_vsec_platform_info *info;
> +	struct device *dev = xe->drm.dev;
> +	enum xe_vsec platform;
> +
> +	platform = get_platform_info(xe);
> +	if (platform != XE_VSEC_CRI)
> +		return;
> +
> +	info = &xe_vsec_info[platform];
> +	if (!info->headers)
> +		return;
> +
> +	guard(mutex)(&xe->pmt.lock);
> +
> +	info->priv_data = &xe_cri_pmt_cb;
> +	xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +	intel_vsec_register(dev, info);
> +}

[ ... ]

> @@ -504,12 +606,26 @@ void xe_vsec_init(struct xe_device *xe)
>  
>  	case XE_VSEC_CRI:
>  		xe->pmt.base_offset = CRI_PMT_OFFSET;
> +
> +		xe->pmt.retry_count = 0;
> +		INIT_DELAYED_WORK(&xe->pmt.work, cri_late_bind_probe_work);
> +
> +		xe_pm_runtime_get_noresume(xe);
> +		if (!xe_sysctrl_is_oobmsm_fw_ready(xe)) {
> +			schedule_delayed_work(&xe->pmt.work,
> +					      msecs_to_jiffies(VSEC_LATE_BIND_DELAY_MSEC));
> +			return devm_add_action_or_reset(xe->drm.dev,
> +							vsec_disable_late_bind_work,
> +							xe);
> +		}
> +

[Severity: High]
Does this setup cause an async devm registration during unbind, leading to a
resource leak and Use-After-Free?

During driver unbind, devres_release_all() splices the dev->devres_head list
to a local todo list. It then executes vsec_disable_late_bind_work(), which
waits for the cri_late_bind_probe_work() thread to complete.

Concurrently, that worker thread calls cri_late_bind_probe(), which calls
intel_vsec_register(), adding a new devm action to the now-empty
dev->devres_head list.

Once the worker completes, vsec_disable_late_bind_work() unblocks and
devres_release_all() finishes its local list. The newly added devm action on
dev->devres_head is never checked or executed, leaving the auxiliary device
leaked and its sysfs nodes pointing to a freed parent.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260918131751.2408883-22-michael.j.ruhl@intel.com?part=17

  reply	other threads:[~2026-09-18 13:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-18 13:17 [PATCH v10 00/20] Crescent Island PMT support Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 01/20] platform/x86/intel/pmt: complete pcidev to device update Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 02/20] platform/x86/intel/pmt: refactor rmw with a return value Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 03/20] platform/x86/intel/pmt: refactor rc " Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 04/20] platform/x86/intel/pmt: Add register access callbacks Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 05/20] platform/x86/intel/pmt: Do not remap when using callbacks Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 06/20] drm/xe/vsec: Do not register BMG PMT for VF Michael J. Ruhl
2026-09-18 16:07   ` Rodrigo Vivi
2026-09-18 13:17 ` [PATCH v10 07/20] drm/xe/vsec: Correct locking order Michael J. Ruhl
2026-09-18 16:08   ` Rodrigo Vivi
2026-09-18 13:17 ` [PATCH v10 08/20] drm/xe/vsec: Use correct pm state get Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 09/20] drm/xe/vsec: Add DOC text for VSEC Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 10/20] drm/xe/vsec: Support possible hotplug exit Michael J. Ruhl
2026-09-18 13:29   ` sashiko-bot
2026-09-18 13:18 ` [PATCH v10 11/20] drm/xe/vsec: Refactor BattleMage PMT defines Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 12/20] drm/xe/vsec: Update VSEC probe order Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 13/20] drm/xe/vsec: Add base_offset to allow for more flexibilty Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 14/20] drm/xe/vsec: Support Crescent Island PMT Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 15/20] drm/xe/vsec: Crescent Island PMT decode Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 16/20] drm/xe/vsec: Crescent Island PMT callbacks Michael J. Ruhl
2026-09-18 16:09   ` Rodrigo Vivi
2026-09-18 13:18 ` [PATCH v10 17/20] drm/xe/vsec: Support late bind fw information Michael J. Ruhl
2026-09-18 13:41   ` sashiko-bot [this message]
2026-09-18 13:18 ` [PATCH v10 18/20] drm/xe/vsec: Add PMT GUID internal access Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 19/20] drm/xe/vsec: Update PMT " Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 20/20] drm/xe/vsec: Refactor platform check Michael J. Ruhl
2026-09-18 13:58 ` ✗ CI.checkpatch: warning for Crescent Island PMT support (rev12) Patchwork
2026-09-18 14:00 ` ✓ CI.KUnit: success " Patchwork
2026-09-18 15:36 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-18 23:14 ` ✗ Xe.CI.FULL: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260918134112.BAEFC1F000FF@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=michael.j.ruhl@intel.com \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox