Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Cc: <platform-driver-x86@vger.kernel.org>,
	<intel-xe@lists.freedesktop.org>, <hansg@kernel.org>,
	<ilpo.jarvinen@linux.intel.com>, <matthew.brost@intel.com>,
	<thomas.hellstrom@linux.intel.com>, <airlied@gmail.com>,
	<simona@ffwll.ch>, <david.e.box@linux.intel.com>,
	<anoop.c.vijay@intel.com>, <badal.nilawar@intel.com>,
	<matthew.d.roper@intel.com>, <james.ausmus@intel.com>,
	<karthik.poosa@intel.com>
Subject: Re: [PATCH v10 16/20] drm/xe/vsec: Crescent Island PMT callbacks
Date: Fri, 18 Sep 2026 12:09:31 -0400	[thread overview]
Message-ID: <aq1iO9oz3McyXI7q@intel.com> (raw)
In-Reply-To: <20260918131751.2408883-38-michael.j.ruhl@intel.com>

On Fri, Sep 18, 2026 at 06:18:07AM -0700, Michael J. Ruhl wrote:
> CRI PMT support requires callbacks to access the discovery status and
> control areas. Access is a common MMIO area that requires an index to
> be set before access is allowed.
> 
> Introduce the necessary callbacks to get the status and control
> information for CRI PMT usage.
> 
> Add the glue logic to register the CRI PMT functionality.
> 
> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_vsec.c | 115 +++++++++++++++++++++++++++++++++--
>  1 file changed, 111 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_vsec.c b/drivers/gpu/drm/xe/xe_vsec.c
> index 63ce9622d6b3..0f6e3be520c0 100644
> --- a/drivers/gpu/drm/xe/xe_vsec.c
> +++ b/drivers/gpu/drm/xe/xe_vsec.c
> @@ -358,20 +358,120 @@ int xe_pmt_telem_read(struct device *dev, u32 guid, u64 *data, loff_t user_offse
>  	return ret == 0 ? count : ret;
>  }
>  
> -static struct pmt_callbacks xe_pmt_cb = {
> +/**
> + * xe_pmt_read_reg() - read a crashlog register
> + * @dev: the xe device that registered the callback
> + * @guid: PMT guid of the crashlog instance
> + * @reg: data read from the PMT data structure
> + * @offset: which data to read from the PMT data structure
> + *
> + * Read the requested PMT register based on the pcie device and guid.  The
> + * supported struct is the Crashlog Type1 Version2.
> + *
> + * Currently this is for CRI only.
> + *
> + * Return:
> + * * -ENODEV device is not available (hotplug)
> + * * -EINVAL invalid guid
> + * * 0       success
> + */
> +static int xe_pmt_read_reg(struct device *dev, u32 guid, u32 *reg, u32 offset)
> +{
> +	struct xe_device *xe = kdev_to_xe_device(dev);
> +	void __iomem *disc_addr = xe->mmio.regs + xe->pmt.base_offset;
> +	int ret = 0;
> +	u32 inst;
> +	int idx;
> +
> +	if (!drm_dev_enter(&xe->drm, &idx))
> +		return -ENODEV;
> +
> +	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
> +	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG) {
> +		ret = -EINVAL;
> +		goto dev_exit;
> +	}
> +
> +	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ?
> +		CRI_CRASHLOG_PUNIT_DISC_OFFSET : CRI_CRASHLOG_OOBMSM_DISC_OFFSET;
> +	disc_addr += inst + offset;
> +
> +	xe_pm_runtime_get(xe);
> +
> +	scoped_guard(mutex, &xe->pmt.lock) {
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +		*reg = readl(disc_addr);
> +	}
> +
> +	xe_pm_runtime_put(xe);
> +
> +dev_exit:
> +	drm_dev_exit(idx);
> +
> +	return ret;
> +}
> +
> +static int xe_pmt_write_reg(struct device *dev, u32 guid, u32 reg, u32 offset)
> +{
> +	struct xe_device *xe = kdev_to_xe_device(dev);
> +	void __iomem *disc_addr = xe->mmio.regs + xe->pmt.base_offset;
> +	int ret = 0;
> +	u32 inst;
> +	int idx;
> +
> +	if (!drm_dev_enter(&xe->drm, &idx))
> +		return -ENODEV;
> +
> +	if (FIELD_GET(GUID_DEVICE_ID, guid) != CRI_DEVICE_ID ||
> +	    FIELD_GET(GUID_CAP_TYPE, guid) != CRASHLOG) {
> +		ret = -EINVAL;
> +		goto dev_exit;
> +	}
> +
> +	inst = FIELD_GET(GUID_RECORD_ID, guid) == PUNIT ?
> +		CRI_CRASHLOG_PUNIT_DISC_OFFSET : CRI_CRASHLOG_OOBMSM_DISC_OFFSET;
> +	disc_addr += inst + offset;
> +
> +	xe_pm_runtime_get(xe);
> +
> +	scoped_guard(mutex, &xe->pmt.lock) {
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +
> +		writel(reg, disc_addr);
> +	}
> +
> +	xe_pm_runtime_put(xe);
> +
> +dev_exit:
> +	drm_dev_exit(idx);
> +
> +	return ret;
> +}
> +
> +static struct pmt_callbacks xe_bmg_pmt_cb = {
> +	.read_telem = xe_pmt_telem_read,
> +};
> +
> +static struct pmt_callbacks xe_cri_pmt_cb = {
>  	.read_telem = xe_pmt_telem_read,
> +	.read_reg = xe_pmt_read_reg,
> +	.write_reg = xe_pmt_write_reg,
>  };
>  
>  static const int vsec_platforms[] = {
>  	[XE_BATTLEMAGE] = XE_VSEC_BMG,
> +	[XE_CRESCENTISLAND] = XE_VSEC_CRI,
>  };
>  
>  static enum xe_vsec get_platform_info(struct xe_device *xe)
>  {
> -	if (xe->info.platform > XE_BATTLEMAGE)
> +	if (xe->info.platform > XE_CRESCENTISLAND)
>  		return XE_VSEC_UNKNOWN;
>  
> -	if (IS_SRIOV_VF(xe) && (xe->info.platform == XE_BATTLEMAGE))
> +	if (IS_SRIOV_VF(xe) &&
> +	    (xe->info.platform == XE_BATTLEMAGE ||
> +	     xe->info.platform == XE_CRESCENTISLAND))
>  		return XE_VSEC_UNKNOWN;
>  
>  	return vsec_platforms[xe->info.platform];
> @@ -399,8 +499,15 @@ void xe_vsec_init(struct xe_device *xe)
>  	switch (platform) {
>  	case XE_VSEC_BMG:
>  		xe->pmt.base_offset = BMG_TELEMETRY_OFFSET;
> -		info->priv_data = &xe_pmt_cb;
> +		info->priv_data = &xe_bmg_pmt_cb;
>  		break;
> +
> +	case XE_VSEC_CRI:
> +		xe->pmt.base_offset = CRI_PMT_OFFSET;
> +		info->priv_data = &xe_cri_pmt_cb;
> +		xe->soc_remapper.set_telem_region(xe, CRI_IDX_TELEM_DISCOVERY);
> +		break;
> +
>  	default:
>  		break;
>  	}
> -- 
> 2.43.0
> 

  reply	other threads:[~2026-09-18 16:10 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-18 13:17 [PATCH v10 00/20] Crescent Island PMT support Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 01/20] platform/x86/intel/pmt: complete pcidev to device update Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 02/20] platform/x86/intel/pmt: refactor rmw with a return value Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 03/20] platform/x86/intel/pmt: refactor rc " Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 04/20] platform/x86/intel/pmt: Add register access callbacks Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 05/20] platform/x86/intel/pmt: Do not remap when using callbacks Michael J. Ruhl
2026-09-18 13:17 ` [PATCH v10 06/20] drm/xe/vsec: Do not register BMG PMT for VF Michael J. Ruhl
2026-09-18 16:07   ` Rodrigo Vivi
2026-09-18 13:17 ` [PATCH v10 07/20] drm/xe/vsec: Correct locking order Michael J. Ruhl
2026-09-18 16:08   ` Rodrigo Vivi
2026-09-18 13:17 ` [PATCH v10 08/20] drm/xe/vsec: Use correct pm state get Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 09/20] drm/xe/vsec: Add DOC text for VSEC Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 10/20] drm/xe/vsec: Support possible hotplug exit Michael J. Ruhl
2026-09-18 13:29   ` sashiko-bot
2026-09-18 13:18 ` [PATCH v10 11/20] drm/xe/vsec: Refactor BattleMage PMT defines Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 12/20] drm/xe/vsec: Update VSEC probe order Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 13/20] drm/xe/vsec: Add base_offset to allow for more flexibilty Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 14/20] drm/xe/vsec: Support Crescent Island PMT Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 15/20] drm/xe/vsec: Crescent Island PMT decode Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 16/20] drm/xe/vsec: Crescent Island PMT callbacks Michael J. Ruhl
2026-09-18 16:09   ` Rodrigo Vivi [this message]
2026-09-18 13:18 ` [PATCH v10 17/20] drm/xe/vsec: Support late bind fw information Michael J. Ruhl
2026-09-18 13:41   ` sashiko-bot
2026-09-18 13:18 ` [PATCH v10 18/20] drm/xe/vsec: Add PMT GUID internal access Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 19/20] drm/xe/vsec: Update PMT " Michael J. Ruhl
2026-09-18 13:18 ` [PATCH v10 20/20] drm/xe/vsec: Refactor platform check Michael J. Ruhl
2026-09-18 13:58 ` ✗ CI.checkpatch: warning for Crescent Island PMT support (rev12) Patchwork
2026-09-18 14:00 ` ✓ CI.KUnit: success " Patchwork
2026-09-18 15:36 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-18 23:14 ` ✗ Xe.CI.FULL: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aq1iO9oz3McyXI7q@intel.com \
    --to=rodrigo.vivi@intel.com \
    --cc=airlied@gmail.com \
    --cc=anoop.c.vijay@intel.com \
    --cc=badal.nilawar@intel.com \
    --cc=david.e.box@linux.intel.com \
    --cc=hansg@kernel.org \
    --cc=ilpo.jarvinen@linux.intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=james.ausmus@intel.com \
    --cc=karthik.poosa@intel.com \
    --cc=matthew.brost@intel.com \
    --cc=matthew.d.roper@intel.com \
    --cc=michael.j.ruhl@intel.com \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=simona@ffwll.ch \
    --cc=thomas.hellstrom@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox