[PATCH 1/2] drm/i915/cmtg: Select the right CMTG vblank for DC3co

[Suraj Kandpal <suraj.kandpal@intel.com>]

The DC3co enable state change is double buffered on a CMTG delayed
vblank, and CHICKEN_DCPR_1 bit 5 picks which CMTG that is. We never
programmed it, so CMTG B setups ended up using CMTG A's vblank and only
worked by virtue of the reset value.

Bspec: 75253
Fixes: c588a324183b ("drm/i915/cmtg: Add trigger to enable/disable cmtg")
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c         | 2 ++
 drivers/gpu/drm/i915/display/intel_display_regs.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 3c0f5b2fb2e7..7db642b2c3f7 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -368,6 +368,8 @@ static void intel_cmtg_enable_ddi(const struct intel_crtc_state *crtc_state)
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 interrupt_mask = 0;
 
+	intel_de_rmw(display, GEN8_CHICKEN_DCPR_1, DC3CO_CMTG_VBLANK_SELECT,
+		     cpu_transcoder == TRANSCODER_B ? DC3CO_CMTG_VBLANK_SELECT : 0);
 	intel_de_rmw(display, TRANS_DDI_FUNC_CTL2(display, cpu_transcoder), 0, CMTG_SECONDARY_MODE);
 	intel_de_rmw(display, CMTG_SCANLINE_GB1(cpu_transcoder), 0, CMTG_HW_GB_ENABLE);
 	crtc->cmtg.enabled = true;
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 8251ec15190b..6ac615087e0f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -413,6 +413,7 @@
 #define   _LATENCY_REPORTING_REMOVED_PIPE_C	REG_BIT(25)
 #define   _LATENCY_REPORTING_REMOVED_PIPE_B	REG_BIT(24)
 #define   _LATENCY_REPORTING_REMOVED_PIPE_A	REG_BIT(23)
+#define   DC3CO_CMTG_VBLANK_SELECT		REG_BIT(5)
 #define   LATENCY_REPORTING_REMOVED(pipe)	_PICK((pipe), \
 						      _LATENCY_REPORTING_REMOVED_PIPE_A, \
 						      _LATENCY_REPORTING_REMOVED_PIPE_B, \
-- 
2.34.1