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* [Intel-xe] [PATCH v3 0/2] drm/xe/pmu: Enable PMU interface
@ 2023-08-08 11:54 Aravind Iddamsetty
  2023-08-08 11:54 ` [Intel-xe] [PATCH v3 1/2] drm/xe: Get GT clock to nanosecs Aravind Iddamsetty
                   ` (8 more replies)
  0 siblings, 9 replies; 28+ messages in thread
From: Aravind Iddamsetty @ 2023-08-08 11:54 UTC (permalink / raw)
  To: intel-xe

There are a set of engine group busyness counters provided by HW which are
perfect fit to be exposed via PMU perf events.

BSPEC: 46559, 46560, 46722, 46729, 52071, 71028

events can be listed using:
perf list
  xe_0000_03_00.0/any-engine-group-busy-gt0/         [Kernel PMU event]
  xe_0000_03_00.0/copy-group-busy-gt0/               [Kernel PMU event]
  xe_0000_03_00.0/interrupts/                        [Kernel PMU event]
  xe_0000_03_00.0/media-group-busy-gt0/              [Kernel PMU event]
  xe_0000_03_00.0/render-group-busy-gt0/             [Kernel PMU event]

and can be read using:

perf stat -e "xe_0000_8c_00.0/render-group-busy-gt0/" -I 1000
           time             counts unit events
     1.001139062                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     2.003294678                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     3.005199582                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     4.007076497                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     5.008553068                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     6.010531563              43520 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     7.012468029              44800 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     8.013463515                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
     9.015300183                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
    10.017233010                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/
    10.971934120                  0 ns  xe_0000_8c_00.0/render-group-busy-gt0/

The pmu base implementation is taken from i915.

v3:
1. drop init_samples, as storing counters before going to suspend should
be sufficient.
2. ported the "drm/i915/pmu: Make PMU sample array two-dimensional" and
dropped helpers to store and read samples.
3. use xe_device_mem_access_get_if_ongoing to check if device is active
before reading the OA registers.
4. dropped format attr as no longer needed
5. introduce xe_pmu_suspend to call engine_group_busyness_store
6. few other nits.

v2:
Store last known value when device is awake return that while the GT is
suspended and then update the driver copy when read during awake.

Aravind Iddamsetty (2):
  drm/xe: Get GT clock to nanosecs
  drm/xe/pmu: Enable PMU interface

 drivers/gpu/drm/xe/Makefile          |   2 +
 drivers/gpu/drm/xe/regs/xe_gt_regs.h |   5 +
 drivers/gpu/drm/xe/xe_device.c       |   2 +
 drivers/gpu/drm/xe/xe_device_types.h |   4 +
 drivers/gpu/drm/xe/xe_gt.c           |   2 +
 drivers/gpu/drm/xe/xe_gt_clock.c     |   5 +
 drivers/gpu/drm/xe/xe_gt_clock.h     |   4 +-
 drivers/gpu/drm/xe/xe_irq.c          |  18 +
 drivers/gpu/drm/xe/xe_module.c       |   5 +
 drivers/gpu/drm/xe/xe_pmu.c          | 673 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_pmu.h          |  25 +
 drivers/gpu/drm/xe/xe_pmu_types.h    |  76 +++
 include/uapi/drm/xe_drm.h            |  16 +
 13 files changed, 836 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pmu.c
 create mode 100644 drivers/gpu/drm/xe/xe_pmu.h
 create mode 100644 drivers/gpu/drm/xe/xe_pmu_types.h

-- 
2.25.1


^ permalink raw reply	[flat|nested] 28+ messages in thread

end of thread, other threads:[~2023-08-14  4:19 UTC | newest]

Thread overview: 28+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-08-08 11:54 [Intel-xe] [PATCH v3 0/2] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-08-08 11:54 ` [Intel-xe] [PATCH v3 1/2] drm/xe: Get GT clock to nanosecs Aravind Iddamsetty
2023-08-09  5:08   ` Dixit, Ashutosh
2023-08-09 11:07     ` Iddamsetty, Aravind
2023-08-08 11:54 ` [Intel-xe] [PATCH v3 2/2] drm/xe/pmu: Enable PMU interface Aravind Iddamsetty
2023-08-09  7:28   ` Dixit, Ashutosh
2023-08-09  7:46     ` Iddamsetty, Aravind
2023-08-09 11:39       ` Iddamsetty, Aravind
2023-08-10  2:17         ` Dixit, Ashutosh
2023-08-10  2:06       ` Dixit, Ashutosh
2023-08-09  9:55     ` Iddamsetty, Aravind
2023-08-09 11:57       ` Iddamsetty, Aravind
2023-08-09 13:11         ` Iddamsetty, Aravind
2023-08-10  2:40           ` Dixit, Ashutosh
2023-08-10  8:10             ` Iddamsetty, Aravind
2023-08-10 21:55               ` Rodrigo Vivi
2023-08-11  3:38                 ` Dixit, Ashutosh
2023-08-11  6:17                   ` Iddamsetty, Aravind
2023-08-11 19:17                     ` Dixit, Ashutosh
2023-08-14  2:02                       ` Dixit, Ashutosh
2023-08-14  4:19                         ` Iddamsetty, Aravind
2023-08-08 12:08 ` [Intel-xe] ✓ CI.Patch_applied: success for drm/xe/pmu: Enable PMU interface (rev3) Patchwork
2023-08-08 12:09 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-08-08 12:10 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-08-08 12:14 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-08-08 12:14 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-08-08 12:14 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-08-08 12:51 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork

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