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From: "Tauro, Riana" <riana.tauro@intel.com>
To: "Mallesh, Koujalagi" <mallesh.koujalagi@intel.com>,
	Badal Nilawar <badal.nilawar@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <rodrigo.vivi@intel.com>,
	<daniele.ceraolospurio@intel.com>, <raag.jadav@intel.com>,
	<aravind.iddamsetty@intel.com>, <himal.prasad.ghimiray@intel.com>,
	<arvind.yadav@intel.com>, <syed.abdul.muqthyar.ahmed@intel.com>,
	<nitin.r.gote@intel.com>, <pravalika.gurram@intel.com>
Subject: Re: [PATCH v4 10/12] drm/xe/xe_ras: Report core compute errors using SIGID
Date: Wed, 14 Oct 2026 15:00:32 +0530	[thread overview]
Message-ID: <8a45e18c-4763-47cb-80af-bc62f23dfc11@intel.com> (raw)
In-Reply-To: <4db5864f-c058-4609-a563-efcea4b5b4a5@intel.com>


On 14-10-2026 14:58, Mallesh, Koujalagi wrote:
>
> On 09-10-2026 04:16 pm, Badal Nilawar wrote:
>> Use xe_log_* helpers to report core compute errors.
>>
>> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> LGTM,
> Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com> 


The previous revision review comments need to be addressed. We are not 
seeing SIGID logs for all errors.
Please do not merge this without that fix.

Thanks
Riana

>> Cc: Riana Tauro <riana.tauro@intel.com>
>> ---
>> v2:
>>    - Pass RAS firmware reported severity to xe_log
>> ---
>>   drivers/gpu/drm/xe/xe_ras.c | 12 +++++++++---
>>   1 file changed, 9 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 8ed4a6992ef1..6647300c7f17 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
>> @@ -332,21 +332,27 @@ static void ras_send_error_event(struct 
>> xe_device *xe, u8 severity, u8 component
>>       xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
>>   }
>>   -static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)
>> +static u8 handle_core_compute_errors(struct xe_device *xe, struct 
>> xe_ras_error_array *arr)
>>   {
>>       struct xe_ras_compute_error *error_info = (void *)arr->details;
>> +    u8 cper_sev = ras_sev_to_cper_sev(arr->counter.common.severity);
>>       u8 uncorr_type;
>>         uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, 
>> error_info->log_header);
>>         /* Request a reset if error is global */
>> -    if (uncorr_type == GLOBAL_UNCORR_ERROR)
>> +    if (uncorr_type == GLOBAL_UNCORR_ERROR) {
>> +        xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, 
>> sizeof(arr->counter),
>> +                "Global uncorrectable error detected\n");
>>           return XE_RAS_RECOVERY_ACTION_RESET;
>> +    }
>>         /*
>>        * No action needed for other errors.
>>        * Local errors are recovered using an engine reset by GuC.
>>        */
>> +    xe_log_comp(xe, cper_sev, CORE_COMPUTE, &arr->counter, 
>> sizeof(arr->counter),
>> +            "Other compute errors\n");
>>       return XE_RAS_RECOVERY_ACTION_RECOVERED;
>>   }
>>   @@ -592,7 +598,7 @@ enum xe_ras_recovery_action 
>> xe_ras_process_errors(struct xe_device *xe)
>>                 switch (component) {
>>               case XE_RAS_COMP_CORE_COMPUTE:
>> -                action = handle_core_compute_errors(arr);
>> +                action = handle_core_compute_errors(xe, arr);
>>                   break;
>>               case XE_RAS_COMP_SOC_INTERNAL:
>>                   action = handle_soc_internal_errors(xe, arr);

  reply	other threads:[~2026-10-14  9:31 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 10:46 [PATCH v4 00/12] Add CPER logging support for CRI Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-09 10:43   ` sashiko-bot
2026-10-09 12:17     ` Nilawar, Badal
2026-10-12  6:18   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-09 10:46   ` sashiko-bot
2026-10-09 12:27     ` Nilawar, Badal
2026-10-12  9:07   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 03/12] drm/xe/cper: Initialize Intel-specific error section header Badal Nilawar
2026-10-14  7:27   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-14 10:30   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-10-09 10:40   ` sashiko-bot
2026-10-09 12:45     ` Nilawar, Badal
2026-10-14 15:19   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-10-09 10:41   ` sashiko-bot
2026-10-09 13:07     ` Nilawar, Badal
2026-10-09 10:46 ` [PATCH v4 07/12] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-09 10:38   ` sashiko-bot
2026-10-09 10:46 ` [PATCH v4 09/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-14  9:05   ` Mallesh, Koujalagi
2026-10-09 10:46 ` [PATCH v4 10/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-14  9:28   ` Mallesh, Koujalagi
2026-10-14  9:30     ` Tauro, Riana [this message]
2026-10-09 10:46 ` [PATCH v4 11/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-14  9:31   ` Mallesh, Koujalagi
2026-10-09 10:46 ` [PATCH v4 12/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-09 10:50   ` sashiko-bot
2026-10-09 10:54 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev4) Patchwork
2026-10-09 10:56 ` ✓ CI.KUnit: success " Patchwork
2026-10-09 12:03 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-10-09 15:13 ` ✓ Xe.CI.FULL: success " Patchwork
2026-10-12  6:14 ` [PATCH v4 00/12] Add CPER logging support for CRI Raag Jadav

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