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From: "Mallesh, Koujalagi" <mallesh.koujalagi@intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <rodrigo.vivi@intel.com>,
	<daniele.ceraolospurio@intel.com>, <raag.jadav@intel.com>,
	<riana.tauro@intel.com>, <aravind.iddamsetty@intel.com>,
	<himal.prasad.ghimiray@intel.com>, <arvind.yadav@intel.com>,
	<syed.abdul.muqthyar.ahmed@intel.com>, <nitin.r.gote@intel.com>,
	<pravalika.gurram@intel.com>
Subject: Re: [PATCH v4 11/12] drm/xe/xe_ras: Report soc internal errors using SIGID
Date: Wed, 14 Oct 2026 15:01:59 +0530	[thread overview]
Message-ID: <9b7c4e09-b258-4495-b088-8bc837bb1054@intel.com> (raw)
In-Reply-To: <20261009104602.1075405-25-badal.nilawar@intel.com>


On 09-10-2026 04:16 pm, Badal Nilawar wrote:
> Use xe_log_* helpers to report soc internal errors.
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_ras.c | 12 +++++-------
>   1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 6647300c7f17..af2970941b59 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -366,7 +366,6 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
>   {
>   	struct xe_ras_soc_error *info = (void *)arr->details;
>   	struct xe_ras_soc_error_source *source = &info->source;
> -	struct xe_ras_error_class *counter = &arr->counter;
>   
>   	if (source->csc) {
>   		struct xe_ras_csc_error *csc_error = (void *)info->details;
> @@ -380,9 +379,8 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
>   		 * is required.
>   		 */
>   		if (csc_error->hec_fw_error) {
> -			xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
> -			       sev_to_str(counter->common.severity),
> -			       csc_error->hec_fw_error);
> +			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
> +					  "CSC error detected: 0x%x\n", csc_error->hec_fw_error);
>   			xe_survivability_mode_runtime_enable(xe);
>   			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
>   		}
> @@ -390,9 +388,9 @@ static u8 handle_soc_internal_errors(struct xe_device *xe, struct xe_ras_error_a
>   		struct xe_ras_ieh_error *ieh_error = (void *)info->details;
>   
>   		if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
> -			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
> -			       sev_to_str(counter->common.severity),
> -			       ieh_error->global_error_status);
> +			xe_log_comp_fatal(xe, SOC_INTERNAL, &arr->counter, sizeof(arr->counter),
> +					  "PUNIT error detected: 0x%x\n",
> +					  ieh_error->global_error_status);
>   			punit_error_handler(xe);
>   			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
>   		}

  reply	other threads:[~2026-10-14  9:32 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 10:46 [PATCH v4 00/12] Add CPER logging support for CRI Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-09 10:43   ` sashiko-bot
2026-10-09 12:17     ` Nilawar, Badal
2026-10-12  6:18   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-09 10:46   ` sashiko-bot
2026-10-09 12:27     ` Nilawar, Badal
2026-10-12  9:07   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 03/12] drm/xe/cper: Initialize Intel-specific error section header Badal Nilawar
2026-10-14  7:27   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-14 10:30   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-10-09 10:40   ` sashiko-bot
2026-10-09 12:45     ` Nilawar, Badal
2026-10-14 15:19   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-10-09 10:41   ` sashiko-bot
2026-10-09 13:07     ` Nilawar, Badal
2026-10-09 10:46 ` [PATCH v4 07/12] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-09 10:38   ` sashiko-bot
2026-10-09 10:46 ` [PATCH v4 09/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-14  9:05   ` Mallesh, Koujalagi
2026-10-09 10:46 ` [PATCH v4 10/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-14  9:28   ` Mallesh, Koujalagi
2026-10-14  9:30     ` Tauro, Riana
2026-10-09 10:46 ` [PATCH v4 11/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-14  9:31   ` Mallesh, Koujalagi [this message]
2026-10-09 10:46 ` [PATCH v4 12/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-09 10:50   ` sashiko-bot
2026-10-09 10:54 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev4) Patchwork
2026-10-09 10:56 ` ✓ CI.KUnit: success " Patchwork
2026-10-09 12:03 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-10-09 15:13 ` ✓ Xe.CI.FULL: success " Patchwork
2026-10-12  6:14 ` [PATCH v4 00/12] Add CPER logging support for CRI Raag Jadav

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