From: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>,
<intel-xe@lists.freedesktop.org>
Cc: Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [Intel-xe] [PATCH 13/15] drm/xe/lnl: Add LNL platform definition
Date: Thu, 17 Aug 2023 14:07:24 +0530 [thread overview]
Message-ID: <ZN3cRLCn7dHQsXln@bvivekan-mobl> (raw)
In-Reply-To: <20230811160618.477297-14-lucas.demarchi@intel.com>
On 11.08.2023 09:06, Lucas De Marchi wrote:
> From: Matt Roper <matthew.d.roper@intel.com>
>
> LNL is an integrated GPU based on the Xe2 architecture.
>
> Bspec: 70821
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_pci.c | 7 +++++++
> drivers/gpu/drm/xe/xe_platform_types.h | 1 +
> include/drm/xe_pciids.h | 5 +++++
> 3 files changed, 13 insertions(+)
Reviewed-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Regards,
Bala
>
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 70d5f25c0d208..5e3ffe76cc460 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -342,6 +342,12 @@ static const struct xe_device_desc mtl_desc = {
> .has_display = true,
> };
>
> +static const struct xe_device_desc lnl_desc = {
> + PLATFORM(XE_LUNARLAKE),
> + .has_4tile = true,
> + .require_force_probe = true,
> +};
> +
> #undef PLATFORM
> __diag_pop();
>
> @@ -382,6 +388,7 @@ static const struct pci_device_id pciidlist[] = {
> XE_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc),
> XE_PVC_IDS(INTEL_VGA_DEVICE, &pvc_desc),
> XE_MTL_IDS(INTEL_VGA_DEVICE, &mtl_desc),
> + XE_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc),
> { }
> };
> MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/drivers/gpu/drm/xe/xe_platform_types.h b/drivers/gpu/drm/xe/xe_platform_types.h
> index abbb8a1f29a8e..e378a64a0f863 100644
> --- a/drivers/gpu/drm/xe/xe_platform_types.h
> +++ b/drivers/gpu/drm/xe/xe_platform_types.h
> @@ -21,6 +21,7 @@ enum xe_platform {
> XE_DG2,
> XE_PVC,
> XE_METEORLAKE,
> + XE_LUNARLAKE,
> };
>
> enum xe_subplatform {
> diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
> index 43afd973e153b..29f07a00ac0fd 100644
> --- a/include/drm/xe_pciids.h
> +++ b/include/drm/xe_pciids.h
> @@ -207,4 +207,9 @@
> XE_MTL_S_IDS(MACRO__, ## __VA_ARGS__), \
> XE_ARL_IDS(MACRO__, ## __VA_ARGS__)
>
> +#define XE_LNL_IDS(MACRO__, ...) \
> + MACRO__(0x6420, ## __VA_ARGS__), \
> + MACRO__(0x64A0, ## __VA_ARGS__), \
> + MACRO__(0x64B0, ## __VA_ARGS__)
> +
> #endif
> --
> 2.40.1
>
next prev parent reply other threads:[~2023-08-17 8:37 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 16:06 [Intel-xe] [PATCH 00/15] Add Lunar Lake support Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 01/15] drm/xe/xe2: Update render/compute context image sizes Lucas De Marchi
2023-08-16 20:47 ` Matt Atwood
2023-08-11 16:06 ` [Intel-xe] [PATCH 02/15] drm/xe/xe2: Add GT topology readout Lucas De Marchi
2023-08-16 21:25 ` Matt Atwood
2023-08-17 13:51 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 03/15] drm/xe/xe2: Add MCR register steering for primary GT Lucas De Marchi
2023-08-16 22:27 ` Matt Atwood
2023-08-17 14:47 ` Lucas De Marchi
2023-08-18 6:11 ` Balasubramani Vivekanandan
2023-08-18 16:30 ` Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 04/15] drm/xe/xe2: Add MCR register steering for media GT Lucas De Marchi
2023-08-17 18:05 ` Matt Atwood
2023-08-11 16:06 ` [Intel-xe] [PATCH 05/15] drm/xe/xe2: Update context image layouts Lucas De Marchi
2023-08-17 20:00 ` Matt Atwood
2023-08-11 16:06 ` [Intel-xe] [PATCH 06/15] drm/xe/xe2: Handle fused-off CCS engines Lucas De Marchi
2023-08-17 22:37 ` Matt Atwood
2023-08-21 14:42 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 07/15] drm/xe/xe2: AuxCCS is no longer used Lucas De Marchi
2023-08-18 7:16 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 08/15] drm/xe/xe2: Define Xe2_LPG IP features Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 09/15] drm/xe/xe2: Define Xe2_LPM " Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 10/15] drm/xe/xe2: Track VA bits independently of max page table level Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 11/15] drm/xe/xe2: Add MOCS table Lucas De Marchi
2023-08-11 16:21 ` Matt Roper
2023-08-11 21:44 ` Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 12/15] drm/xe/xe2: Program GuC's MOCS on Xe2 and beyond Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 13/15] drm/xe/lnl: Add LNL platform definition Lucas De Marchi
2023-08-11 16:23 ` Matt Roper
2023-08-11 16:42 ` Lucas De Marchi
2023-08-17 15:15 ` Lucas De Marchi
2023-08-17 8:37 ` Balasubramani Vivekanandan [this message]
2023-08-11 16:06 ` [Intel-xe] [PATCH 14/15] drm/xe/lnl: Add GuC firmware definition Lucas De Marchi
2023-08-11 17:15 ` Matthew Brost
2023-08-17 15:07 ` Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 15/15] drm/xe/lnl: Hook up MOCS table Lucas De Marchi
2023-08-11 16:22 ` Matt Roper
2023-08-11 17:08 ` [Intel-xe] ✓ CI.Patch_applied: success for Add Lunar Lake support Patchwork
2023-08-11 17:08 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-08-11 17:10 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-08-11 17:14 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-08-11 17:14 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-08-11 17:14 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-08-11 17:37 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
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