From: Matthew Brost <matthew.brost@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>, intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [PATCH 14/15] drm/xe/lnl: Add GuC firmware definition
Date: Fri, 11 Aug 2023 17:15:53 +0000 [thread overview]
Message-ID: <ZNZsyVXLMl7QvrIc@DUT025-TGLU.fm.intel.com> (raw)
In-Reply-To: <20230811160618.477297-15-lucas.demarchi@intel.com>
On Fri, Aug 11, 2023 at 09:06:17AM -0700, Lucas De Marchi wrote:
> From: Matt Roper <matthew.d.roper@intel.com>
>
> Define the GuC firmware to load on the platform.
>
> Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_uc_fw.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
> index 2e70dd4880f60..dd6a68ed13894 100644
> --- a/drivers/gpu/drm/xe/xe_uc_fw.c
> +++ b/drivers/gpu/drm/xe/xe_uc_fw.c
> @@ -100,6 +100,7 @@ struct fw_blobs_by_type {
> };
>
> #define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver, major_ver) \
> + fw_def(LUNARLAKE, mmp_ver(xe, guc, lnl, 70, 6, 8)) \
> fw_def(METEORLAKE, mmp_ver(i915, guc, mtl, 70, 6, 4)) \
> fw_def(PVC, mmp_ver(xe, guc, pvc, 70, 6, 4)) \
> fw_def(DG2, major_ver(i915, guc, dg2, 70, 5)) \
> --
> 2.40.1
>
next prev parent reply other threads:[~2023-08-11 17:17 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-11 16:06 [Intel-xe] [PATCH 00/15] Add Lunar Lake support Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 01/15] drm/xe/xe2: Update render/compute context image sizes Lucas De Marchi
2023-08-16 20:47 ` Matt Atwood
2023-08-11 16:06 ` [Intel-xe] [PATCH 02/15] drm/xe/xe2: Add GT topology readout Lucas De Marchi
2023-08-16 21:25 ` Matt Atwood
2023-08-17 13:51 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 03/15] drm/xe/xe2: Add MCR register steering for primary GT Lucas De Marchi
2023-08-16 22:27 ` Matt Atwood
2023-08-17 14:47 ` Lucas De Marchi
2023-08-18 6:11 ` Balasubramani Vivekanandan
2023-08-18 16:30 ` Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 04/15] drm/xe/xe2: Add MCR register steering for media GT Lucas De Marchi
2023-08-17 18:05 ` Matt Atwood
2023-08-11 16:06 ` [Intel-xe] [PATCH 05/15] drm/xe/xe2: Update context image layouts Lucas De Marchi
2023-08-17 20:00 ` Matt Atwood
2023-08-11 16:06 ` [Intel-xe] [PATCH 06/15] drm/xe/xe2: Handle fused-off CCS engines Lucas De Marchi
2023-08-17 22:37 ` Matt Atwood
2023-08-21 14:42 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 07/15] drm/xe/xe2: AuxCCS is no longer used Lucas De Marchi
2023-08-18 7:16 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 08/15] drm/xe/xe2: Define Xe2_LPG IP features Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 09/15] drm/xe/xe2: Define Xe2_LPM " Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 10/15] drm/xe/xe2: Track VA bits independently of max page table level Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 11/15] drm/xe/xe2: Add MOCS table Lucas De Marchi
2023-08-11 16:21 ` Matt Roper
2023-08-11 21:44 ` Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 12/15] drm/xe/xe2: Program GuC's MOCS on Xe2 and beyond Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 13/15] drm/xe/lnl: Add LNL platform definition Lucas De Marchi
2023-08-11 16:23 ` Matt Roper
2023-08-11 16:42 ` Lucas De Marchi
2023-08-17 15:15 ` Lucas De Marchi
2023-08-17 8:37 ` Balasubramani Vivekanandan
2023-08-11 16:06 ` [Intel-xe] [PATCH 14/15] drm/xe/lnl: Add GuC firmware definition Lucas De Marchi
2023-08-11 17:15 ` Matthew Brost [this message]
2023-08-17 15:07 ` Lucas De Marchi
2023-08-11 16:06 ` [Intel-xe] [PATCH 15/15] drm/xe/lnl: Hook up MOCS table Lucas De Marchi
2023-08-11 16:22 ` Matt Roper
2023-08-11 17:08 ` [Intel-xe] ✓ CI.Patch_applied: success for Add Lunar Lake support Patchwork
2023-08-11 17:08 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-08-11 17:10 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-08-11 17:14 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-08-11 17:14 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-08-11 17:14 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
2023-08-11 17:37 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZNZsyVXLMl7QvrIc@DUT025-TGLU.fm.intel.com \
--to=matthew.brost@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
--cc=matthew.d.roper@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox