* [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private.
@ 2025-10-15 7:47 Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 01/12] drm/xe: Start using ggtt->start in preparation of balloon removal Maarten Lankhorst
` (15 more replies)
0 siblings, 16 replies; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
The previous approach iterated over the entire GGTT, but it's easier to hide
even the xe_ggtt_node struct and only provide a xe_ggtt_node_addr() function.
While cleaning up, also remove xe_ggtt_node_alloc()/fini(), this can be
handled in xe_ggtt_insert() instead as all the other users are already
internal.
This makes the final cleanup the removal of xe_ggtt_node_allocated(),
as it can be changed to a simple null check instead.
Rebase as previous version failed to apply.
Maarten Lankhorst (12):
drm/xe: Start using ggtt->start in preparation of balloon removal
drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT
drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node
drm/xe/display: Avoid dereferencing xe_ggtt_node
drm/xe: Do not dereference ggtt_node in xe_bo.c
drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
drm/xe: Privatize xe_ggtt_node
drm/xe: Make xe_ggtt_node offset relative to starting offset
drm/xe: Rewrite GGTT VF initialisation
drm/xe: Move struct xe_ggtt to xe_ggtt.c
drm/xe: Make xe_ggtt_node_insert return a node
drm/xe: Remove xe_ggtt_node_allocated
.../gpu/drm/xe/compat-i915-headers/i915_vma.h | 4 +-
drivers/gpu/drm/xe/display/xe_fb_pin.c | 114 ++---
drivers/gpu/drm/xe/display/xe_stolen.c | 2 +-
drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 8 +-
drivers/gpu/drm/xe/xe_bo.c | 6 +-
drivers/gpu/drm/xe/xe_bo.h | 8 +-
drivers/gpu/drm/xe/xe_device_types.h | 2 -
drivers/gpu/drm/xe/xe_ggtt.c | 476 +++++++++---------
drivers/gpu/drm/xe/xe_ggtt.h | 27 +-
drivers/gpu/drm/xe/xe_ggtt_types.h | 78 +--
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 53 +-
.../gpu/drm/xe/xe_gt_sriov_pf_config_types.h | 8 +-
drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 5 +-
drivers/gpu/drm/xe/xe_pci.c | 7 +
drivers/gpu/drm/xe/xe_tile_sriov_vf.c | 197 +-------
drivers/gpu/drm/xe/xe_tile_sriov_vf.h | 4 +-
drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h | 4 +
17 files changed, 391 insertions(+), 612 deletions(-)
--
2.51.0
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v7 01/12] drm/xe: Start using ggtt->start in preparation of balloon removal
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 02/12] drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT Maarten Lankhorst
` (14 subsequent siblings)
15 siblings, 0 replies; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst, Stuart Summers
Instead of having ggtt->size point to the end of ggtt, have ggtt->size
be the actual size of the GGTT, and introduce ggtt->start to point to
the beginning of GGTT.
This will allow a massive cleanup of GGTT in case of SRIOV-VF.
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_ggtt.c | 82 ++++++++++++++--------
drivers/gpu/drm/xe/xe_ggtt.h | 2 +
drivers/gpu/drm/xe/xe_ggtt_types.h | 4 +-
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 4 +-
4 files changed, 59 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 40680f0c49a17..59334aa06a020 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -137,10 +137,32 @@ static void ggtt_update_access_counter(struct xe_ggtt *ggtt)
}
}
+/**
+ * xe_ggtt_start - Get starting offset of GGTT.
+ * @ggtt: &xe_ggtt
+ *
+ * Returns: Starting offset for this &xe_ggtt.
+ */
+u64 xe_ggtt_start(struct xe_ggtt *ggtt)
+{
+ return ggtt->start;
+}
+
+/**
+ * xe_ggtt_size - Get size of GGTT.
+ * @ggtt: &xe_ggtt
+ *
+ * Returns: Total usable size of this &xe_ggtt.
+ */
+u64 xe_ggtt_size(struct xe_ggtt *ggtt)
+{
+ return ggtt->size;
+}
+
static void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte)
{
xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK));
- xe_tile_assert(ggtt->tile, addr < ggtt->size);
+ xe_tile_assert(ggtt->tile, addr < ggtt->start + ggtt->size);
writeq(pte, &ggtt->gsm[addr >> XE_PTE_SHIFT]);
}
@@ -245,16 +267,16 @@ static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops = {
.ggtt_set_pte = xe_ggtt_set_pte_and_flush,
};
-static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u32 reserved)
+static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
{
- drm_mm_init(&ggtt->mm, reserved,
- ggtt->size - reserved);
+ ggtt->start = start;
+ ggtt->size = size;
+ drm_mm_init(&ggtt->mm, start, size);
}
-int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size)
+int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
{
- ggtt->size = size;
- __xe_ggtt_init_early(ggtt, reserved);
+ __xe_ggtt_init_early(ggtt, start, size);
return 0;
}
EXPORT_SYMBOL_IF_KUNIT(xe_ggtt_init_kunit);
@@ -282,26 +304,32 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
struct xe_device *xe = tile_to_xe(ggtt->tile);
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
unsigned int gsm_size;
+ u64 ggtt_start, wopcm = xe_wopcm_size(xe), ggtt_size;
int err;
- if (IS_SRIOV_VF(xe) || GRAPHICS_VERx100(xe) >= 1250)
- gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
- else
- gsm_size = probe_gsm_size(pdev);
-
- if (gsm_size == 0) {
- xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
- return -ENOMEM;
+ if (!IS_SRIOV_VF(xe)) {
+ if (GRAPHICS_VERx100(xe) >= 1250)
+ gsm_size = SZ_8M; /* GGTT is expected to be 4GiB */
+ else
+ gsm_size = probe_gsm_size(pdev);
+ if (gsm_size == 0) {
+ xe_tile_err(ggtt->tile, "Hardware reported no preallocated GSM\n");
+ return -ENOMEM;
+ }
+ ggtt_start = wopcm;
+ ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
+ } else {
+ /* GGTT is expected to be 4GiB */
+ ggtt_start = wopcm;
+ ggtt_size = SZ_4G - ggtt_start;
}
ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
- ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE;
-
if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
ggtt->flags |= XE_GGTT_FLAGS_64K;
- if (ggtt->size > GUC_GGTT_TOP)
- ggtt->size = GUC_GGTT_TOP;
+ if (ggtt_size + ggtt_start > GUC_GGTT_TOP)
+ ggtt_size = GUC_GGTT_TOP - ggtt_start;
if (GRAPHICS_VERx100(xe) >= 1270)
ggtt->pt_ops =
@@ -312,7 +340,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
ggtt->pt_ops = &xelp_pt_ops;
ggtt->wq = alloc_workqueue("xe-ggtt-wq", 0, WQ_MEM_RECLAIM);
- __xe_ggtt_init_early(ggtt, xe_wopcm_size(xe));
+ __xe_ggtt_init_early(ggtt, ggtt_start, ggtt_size);
err = drmm_add_action_or_reset(&xe->drm, ggtt_fini_early, ggtt);
if (err)
@@ -550,11 +578,9 @@ void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
{
struct xe_tile *tile = ggtt->tile;
- struct xe_device *xe = tile_to_xe(tile);
- u64 __maybe_unused wopcm = xe_wopcm_size(xe);
- xe_tile_assert(tile, start >= wopcm);
- xe_tile_assert(tile, start + size < ggtt->size - wopcm);
+ xe_tile_assert(tile, start >= ggtt->start);
+ xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
}
/**
@@ -863,14 +889,12 @@ u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare)
{
const struct drm_mm *mm = &ggtt->mm;
const struct drm_mm_node *entry;
- u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile));
u64 hole_start, hole_end, hole_size;
u64 max_hole = 0;
mutex_lock(&ggtt->lock);
-
drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
- hole_start = max(hole_start, hole_min_start);
+ hole_start = max(hole_start, ggtt->start);
hole_start = ALIGN(hole_start, alignment);
hole_end = ALIGN_DOWN(hole_end, alignment);
if (hole_start >= hole_end)
@@ -963,15 +987,13 @@ u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer
{
const struct drm_mm *mm = &ggtt->mm;
const struct drm_mm_node *entry;
- u64 hole_min_start = xe_wopcm_size(tile_to_xe(ggtt->tile));
u64 hole_start, hole_end, hole_size;
u64 total = 0;
char buf[10];
mutex_lock(&ggtt->lock);
-
drm_mm_for_each_hole(entry, mm, hole_start, hole_end) {
- hole_start = max(hole_start, hole_min_start);
+ hole_start = max(hole_start, ggtt->start);
hole_start = ALIGN(hole_start, alignment);
hole_end = ALIGN_DOWN(hole_end, alignment);
if (hole_start >= hole_end)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 75fc7a1efea76..6482bddb2ef36 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -23,6 +23,8 @@ int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
u64 start, u64 size);
void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
+u64 xe_ggtt_start(struct xe_ggtt *ggtt);
+u64 xe_ggtt_size(struct xe_ggtt *ggtt);
int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index c5e999d58ff2a..a27919302d6b2 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -22,7 +22,9 @@ struct xe_gt;
struct xe_ggtt {
/** @tile: Back pointer to tile where this GGTT belongs */
struct xe_tile *tile;
- /** @size: Total size of this GGTT */
+ /** @start: Start offset of GGTT */
+ u64 start;
+ /** @size: Total usable size of this GGTT */
u64 size;
#define XE_GGTT_FLAGS_64K BIT(0)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index b2e5c52978e6a..2289756761636 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -343,8 +343,8 @@ static int pf_push_full_vf_config(struct xe_gt *gt, unsigned int vfid)
xe_gt_assert(gt, num_dwords <= max_cfg_dwords);
if (vfid == PFID) {
- u64 ggtt_start = xe_wopcm_size(gt_to_xe(gt));
- u64 ggtt_size = gt_to_tile(gt)->mem.ggtt->size - ggtt_start;
+ u64 ggtt_start = xe_ggtt_start(gt_to_tile(gt)->mem.ggtt);
+ u64 ggtt_size = xe_ggtt_size(gt_to_tile(gt)->mem.ggtt);
/* plain PF config data will never include a real GGTT region */
xe_gt_assert(gt, !encode_config_ggtt(cfg + num_dwords, config, true));
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 02/12] drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 01/12] drm/xe: Start using ggtt->start in preparation of balloon removal Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node Maarten Lankhorst
` (13 subsequent siblings)
15 siblings, 0 replies; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe
Cc: Maarten Lankhorst, Maarten Lankhorst, Matthew Brost,
Juha-Pekka Heikkila
The rotation details belong in xe_fb_pin.c, while the operations involving
GGTT belong to xe_ggtt.c. As directly locking xe_ggtt etc results in
exposing all of xe_ggtt details anyway, create a special function that
allocates a ggtt_node, and allow display to populate it using a callback
as a compromise.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 111 ++++++++++++-------------
drivers/gpu/drm/xe/xe_ggtt.c | 90 ++++++++++++++------
drivers/gpu/drm/xe/xe_ggtt.h | 9 +-
drivers/gpu/drm/xe/xe_ggtt_types.h | 8 +-
4 files changed, 130 insertions(+), 88 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 1fd4a815e784b..d2e4903de0977 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -171,12 +171,13 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
}
static void
-write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo_ofs,
+write_ggtt_rotated(struct xe_ggtt *ggtt, u32 *ggtt_ofs,
+ u64 pte_flags,
+ xe_ggtt_set_pte_fn write_pte,
+ struct xe_bo *bo, u32 bo_ofs,
u32 width, u32 height, u32 src_stride, u32 dst_stride)
{
- struct xe_device *xe = xe_bo_device(bo);
u32 column, row;
- u64 pte = ggtt->pt_ops->pte_encode_flags(bo, xe->pat.idx[XE_CACHE_NONE]);
for (column = 0; column < width; column++) {
u32 src_idx = src_stride * (height - 1) + column + bo_ofs;
@@ -184,7 +185,7 @@ write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo
for (row = 0; row < height; row++) {
u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
- ggtt->pt_ops->ggtt_set_pte(ggtt, *ggtt_ofs, pte | addr);
+ write_pte(ggtt, *ggtt_ofs, pte_flags | addr);
*ggtt_ofs += XE_PAGE_SIZE;
src_idx -= src_stride;
}
@@ -194,6 +195,28 @@ write_ggtt_rotated(struct xe_bo *bo, struct xe_ggtt *ggtt, u32 *ggtt_ofs, u32 bo
}
}
+struct fb_rotate_args {
+ const struct i915_gtt_view *view;
+ struct xe_bo *bo;
+};
+
+static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
+ u64 pte_flags, xe_ggtt_set_pte_fn write_pte, void *data)
+{
+ struct fb_rotate_args *args = data;
+ struct xe_bo *bo = args->bo;
+ const struct intel_rotation_info *rot_info = &args->view->rotated;
+ u32 ggtt_ofs = node->base.start;
+
+ for (u32 i = 0; i < ARRAY_SIZE(rot_info->plane); i++)
+ write_ggtt_rotated(ggtt, &ggtt_ofs, pte_flags, write_pte,
+ bo, rot_info->plane[i].offset,
+ rot_info->plane[i].width,
+ rot_info->plane[i].height,
+ rot_info->plane[i].src_stride,
+ rot_info->plane[i].dst_stride);
+}
+
static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
const struct i915_gtt_view *view,
struct i915_vma *vma,
@@ -204,70 +227,40 @@ static int __xe_pin_fb_vma_ggtt(const struct intel_framebuffer *fb,
struct xe_device *xe = to_xe_device(fb->base.dev);
struct xe_tile *tile0 = xe_device_get_root_tile(xe);
struct xe_ggtt *ggtt = tile0->mem.ggtt;
+ u64 pte, size;
u32 align;
- int ret;
-
- /* TODO: Consider sharing framebuffer mapping?
- * embed i915_vma inside intel_framebuffer
- */
- xe_pm_runtime_get_noresume(xe);
- ret = mutex_lock_interruptible(&ggtt->lock);
- if (ret)
- goto out;
+ int ret = 0;
align = XE_PAGE_SIZE;
- if (xe_bo_is_vram(bo) && ggtt->flags & XE_GGTT_FLAGS_64K)
- align = max_t(u32, align, SZ_64K);
+ if (xe_bo_is_vram(bo) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
+ align = max(align, SZ_64K);
+ /* Fast case, preallocated GGTT view? */
if (bo->ggtt_node[tile0->id] && view->type == I915_GTT_VIEW_NORMAL) {
vma->node = bo->ggtt_node[tile0->id];
- } else if (view->type == I915_GTT_VIEW_NORMAL) {
- vma->node = xe_ggtt_node_init(ggtt);
- if (IS_ERR(vma->node)) {
- ret = PTR_ERR(vma->node);
- goto out_unlock;
- }
-
- ret = xe_ggtt_node_insert_locked(vma->node, xe_bo_size(bo), align, 0);
- if (ret) {
- xe_ggtt_node_fini(vma->node);
- goto out_unlock;
- }
-
- xe_ggtt_map_bo(ggtt, vma->node, bo, xe->pat.idx[XE_CACHE_NONE]);
- } else {
- u32 i, ggtt_ofs;
- const struct intel_rotation_info *rot_info = &view->rotated;
-
- /* display seems to use tiles instead of bytes here, so convert it back.. */
- u32 size = intel_rotation_info_size(rot_info) * XE_PAGE_SIZE;
-
- vma->node = xe_ggtt_node_init(ggtt);
- if (IS_ERR(vma->node)) {
- ret = PTR_ERR(vma->node);
- goto out_unlock;
- }
-
- ret = xe_ggtt_node_insert_locked(vma->node, size, align, 0);
- if (ret) {
- xe_ggtt_node_fini(vma->node);
- goto out_unlock;
- }
+ return 0;
+ }
- ggtt_ofs = vma->node->base.start;
+ /* TODO: Consider sharing framebuffer mapping?
+ * embed i915_vma inside intel_framebuffer
+ */
+ xe_pm_runtime_get_noresume(xe);
- for (i = 0; i < ARRAY_SIZE(rot_info->plane); i++)
- write_ggtt_rotated(bo, ggtt, &ggtt_ofs,
- rot_info->plane[i].offset,
- rot_info->plane[i].width,
- rot_info->plane[i].height,
- rot_info->plane[i].src_stride,
- rot_info->plane[i].dst_stride);
- }
+ if (view->type == I915_GTT_VIEW_NORMAL)
+ size = xe_bo_size(bo);
+ else
+ /* display uses tiles instead of bytes here, so convert it back.. */
+ size = intel_rotation_info_size(&view->rotated) * XE_PAGE_SIZE;
+
+ pte = xe_ggtt_encode_pte_flags(ggtt, bo, xe->pat.idx[XE_CACHE_NONE]);
+ vma->node = xe_ggtt_node_insert_transform(ggtt, bo, pte,
+ ALIGN(size, align), align,
+ view->type == I915_GTT_VIEW_NORMAL ?
+ NULL : write_ggtt_rotated_node,
+ &(struct fb_rotate_args){view, bo});
+ if (IS_ERR(vma->node))
+ ret = PTR_ERR(vma->node);
-out_unlock:
- mutex_unlock(&ggtt->lock);
-out:
xe_pm_runtime_put(xe);
return ret;
}
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 59334aa06a020..42e3caa3a6d9c 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -623,19 +623,7 @@ void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)
}
}
-/**
- * xe_ggtt_node_insert_locked - Locked version to insert a &xe_ggtt_node into the GGTT
- * @node: the &xe_ggtt_node to be inserted
- * @size: size of the node
- * @align: alignment constrain of the node
- * @mm_flags: flags to control the node behavior
- *
- * It cannot be called without first having called xe_ggtt_init() once.
- * To be used in cases where ggtt->lock is already taken.
- *
- * Return: 0 on success or a negative error code on failure.
- */
-int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
+static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
u32 size, u32 align, u32 mm_flags)
{
return drm_mm_insert_node_generic(&node->ggtt->mm, &node->base, size, align, 0,
@@ -674,9 +662,11 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
* This function will allocate the struct %xe_ggtt_node and return its pointer.
* This struct will then be freed after the node removal upon xe_ggtt_node_remove()
* or xe_ggtt_node_remove_balloon_locked().
- * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
- * in GGTT. Only the xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
- * xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved in GGTT.
+ *
+ * Having %xe_ggtt_node struct allocated doesn't mean that the node is already
+ * allocated in GGTT. Only xe_ggtt_node_insert(), allocation through
+ * xe_ggtt_node_insert_transform(), or xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved
+ * in GGTT.
*
* Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
**/
@@ -725,13 +715,12 @@ bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node)
* @ggtt: the &xe_ggtt where node will be mapped
* @node: the &xe_ggtt_node where this BO is mapped
* @bo: the &xe_bo to be mapped
- * @pat_index: Which pat_index to use.
+ * @pte: The pte flags to append.
*/
-void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
- struct xe_bo *bo, u16 pat_index)
+static void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
+ struct xe_bo *bo, u64 pte)
{
-
- u64 start, pte, end;
+ u64 start, end;
struct xe_res_cursor cur;
if (XE_WARN_ON(!node))
@@ -740,7 +729,6 @@ void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
start = node->base.start;
end = start + xe_bo_size(bo);
- pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index);
if (!xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo)) {
xe_assert(xe_bo_device(bo), bo->ttm.ttm);
@@ -770,10 +758,63 @@ void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo)
{
u16 cache_mode = bo->flags & XE_BO_FLAG_NEEDS_UC ? XE_CACHE_NONE : XE_CACHE_WB;
u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[cache_mode];
+ u64 pte;
mutex_lock(&ggtt->lock);
- xe_ggtt_map_bo(ggtt, bo->ggtt_node[ggtt->tile->id], bo, pat_index);
+ pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index);
+ xe_ggtt_map_bo(ggtt, bo->ggtt_node[ggtt->tile->id], bo, pte);
+ mutex_unlock(&ggtt->lock);
+}
+
+/**
+ * xe_ggtt_node_insert_transform - Insert a newly allocated &xe_ggtt_node into the GGTT
+ * @ggtt: the &xe_ggtt where the node will inserted/reserved.
+ * @bo: The bo to be transformed
+ * @pte_flags: The extra GGTT flags to add to mapping.
+ * @size: size of the node
+ * @align: required alignment for node
+ * @transform: transformation function that will populate the GGTT node, or NULL for linear mapping.
+ * @arg: Extra argument to pass to the transformation function.
+ *
+ * This function allows inserting a GGTT node with a custom transformation function.
+ * This is useful for display to allow inserting rotated framebuffers to GGTT.
+ *
+ * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
+ */
+struct xe_ggtt_node *xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
+ struct xe_bo *bo, u64 pte_flags,
+ u64 size, u32 align,
+ xe_ggtt_transform_cb transform, void *arg)
+{
+ struct xe_ggtt_node *node;
+ int ret;
+
+ node = xe_ggtt_node_init(ggtt);
+ if (IS_ERR(node))
+ return ERR_CAST(node);
+
+ if (mutex_lock_interruptible(&ggtt->lock) < 0) {
+ ret = -ERESTARTSYS;
+ goto err;
+ }
+
+ ret = xe_ggtt_node_insert_locked(node, size, align, 0);
+ if (ret)
+ goto err_unlock;
+
+ if (transform)
+ transform(ggtt, node, pte_flags, ggtt->pt_ops->ggtt_set_pte, arg);
+ else
+ xe_ggtt_map_bo(ggtt, node, bo, pte_flags);
+
mutex_unlock(&ggtt->lock);
+ return node;
+
+err_unlock:
+ mutex_unlock(&ggtt->lock);
+err:
+ xe_ggtt_node_fini(node);
+ return ERR_PTR(ret);
}
static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
@@ -814,8 +855,9 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
} else {
u16 cache_mode = bo->flags & XE_BO_FLAG_NEEDS_UC ? XE_CACHE_NONE : XE_CACHE_WB;
u16 pat_index = tile_to_xe(ggtt->tile)->pat.idx[cache_mode];
+ u64 pte = ggtt->pt_ops->pte_encode_flags(bo, pat_index);
- xe_ggtt_map_bo(ggtt, bo->ggtt_node[tile_id], bo, pat_index);
+ xe_ggtt_map_bo(ggtt, bo->ggtt_node[tile_id], bo, pte);
}
mutex_unlock(&ggtt->lock);
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 6482bddb2ef36..d54a2ae2b4aa8 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -27,12 +27,13 @@ u64 xe_ggtt_start(struct xe_ggtt *ggtt);
u64 xe_ggtt_size(struct xe_ggtt *ggtt);
int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
-int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
- u32 size, u32 align, u32 mm_flags);
+struct xe_ggtt_node *
+xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
+ struct xe_bo *bo, u64 pte,
+ u64 size, u32 align,
+ xe_ggtt_transform_cb transform, void *arg);
void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate);
bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node);
-void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
- struct xe_bo *bo, u16 pat_index);
void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo);
int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *exec);
int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index a27919302d6b2..f4aa5671cb3e3 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -71,6 +71,11 @@ struct xe_ggtt_node {
bool invalidate_on_remove;
};
+typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
+typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
+ struct xe_ggtt_node *node,
+ u64 pte_flags,
+ xe_ggtt_set_pte_fn set_pte, void *arg);
/**
* struct xe_ggtt_pt_ops - GGTT Page table operations
* Which can vary from platform to platform.
@@ -78,8 +83,9 @@ struct xe_ggtt_node {
struct xe_ggtt_pt_ops {
/** @pte_encode_flags: Encode PTE flags for a given BO */
u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
+
/** @ggtt_set_pte: Directly write into GGTT's PTE */
- void (*ggtt_set_pte)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
+ xe_ggtt_set_pte_fn ggtt_set_pte;
};
#endif
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 01/12] drm/xe: Start using ggtt->start in preparation of balloon removal Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 02/12] drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 21:49 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 04/12] drm/xe/display: Avoid " Maarten Lankhorst
` (12 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
This function makes it possible to add an offset that is applied to
all xe_ggtt_node's, and hides the internals from all its users.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_bo.h | 8 +++++---
drivers/gpu/drm/xe/xe_ggtt.c | 11 +++++++++++
drivers/gpu/drm/xe/xe_ggtt.h | 2 ++
3 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 353d607d301da..dd67a6f40a16d 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -9,6 +9,7 @@
#include <drm/ttm/ttm_tt.h>
#include "xe_bo_types.h"
+#include "xe_ggtt.h"
#include "xe_macros.h"
#include "xe_validation.h"
#include "xe_vm_types.h"
@@ -251,13 +252,14 @@ static inline u32
__xe_bo_ggtt_addr(struct xe_bo *bo, u8 tile_id)
{
struct xe_ggtt_node *ggtt_node = bo->ggtt_node[tile_id];
+ u64 offset;
if (XE_WARN_ON(!ggtt_node))
return 0;
- XE_WARN_ON(ggtt_node->base.size > xe_bo_size(bo));
- XE_WARN_ON(ggtt_node->base.start + ggtt_node->base.size > (1ull << 32));
- return ggtt_node->base.start;
+ offset = xe_ggtt_node_addr(ggtt_node);
+ XE_WARN_ON(offset + xe_bo_size(bo) > (1ull << 32));
+ return offset;
}
static inline u32
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 42e3caa3a6d9c..05515037e2d6a 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -1079,3 +1079,14 @@ u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset)
{
return ioread64(ggtt->gsm + (offset / XE_PAGE_SIZE));
}
+
+/**
+ * xe_ggtt_node_addr - Get @node offset in GGTT.
+ * @node: &xe_ggtt_node
+ *
+ * Get the GGTT offset for allocated node.
+ */
+u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node)
+{
+ return node->base.start;
+}
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index d54a2ae2b4aa8..4a8ef1b824156 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -58,4 +58,6 @@ void xe_ggtt_might_lock(struct xe_ggtt *ggtt);
u64 xe_ggtt_encode_pte_flags(struct xe_ggtt *ggtt, struct xe_bo *bo, u16 pat_index);
u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset);
+u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node);
+
#endif
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 04/12] drm/xe/display: Avoid dereferencing xe_ggtt_node
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (2 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 21:53 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c Maarten Lankhorst
` (11 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
Start using xe_ggtt_node_addr, and avoid comparing the base offset
as vma->node is dynamically allocated.
Also sneak in a xe_bo_size() for stolen, too small to put as separate commit.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
| 4 ++--
drivers/gpu/drm/xe/display/xe_fb_pin.c | 4 ++--
drivers/gpu/drm/xe/display/xe_stolen.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
--git a/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
index 4465c40f81341..1c599963169a0 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
@@ -8,7 +8,7 @@
#include <uapi/drm/i915_drm.h>
-#include "xe_ggtt_types.h"
+#include "xe_ggtt.h"
#include <linux/refcount.h>
@@ -32,7 +32,7 @@ struct i915_vma {
static inline u32 i915_ggtt_offset(const struct i915_vma *vma)
{
- return vma->node->base.start;
+ return xe_ggtt_node_addr(vma->node);
}
#endif
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index d2e4903de0977..784d2db5fd0db 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -206,7 +206,7 @@ static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *n
struct fb_rotate_args *args = data;
struct xe_bo *bo = args->bo;
const struct intel_rotation_info *rot_info = &args->view->rotated;
- u32 ggtt_ofs = node->base.start;
+ u32 ggtt_ofs = xe_ggtt_node_addr(node);
for (u32 i = 0; i < ARRAY_SIZE(rot_info->plane); i++)
write_ggtt_rotated(ggtt, &ggtt_ofs, pte_flags, write_pte,
@@ -351,7 +351,7 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
if (vma->dpt)
xe_bo_unpin_map_no_vm(vma->dpt);
else if (!xe_ggtt_node_allocated(vma->bo->ggtt_node[tile_id]) ||
- vma->bo->ggtt_node[tile_id]->base.start != vma->node->base.start)
+ vma->bo->ggtt_node[tile_id] != vma->node)
xe_ggtt_node_remove(vma->node, false);
ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
diff --git a/drivers/gpu/drm/xe/display/xe_stolen.c b/drivers/gpu/drm/xe/display/xe_stolen.c
index 9f04ba36e930b..ef5ef5aa8d847 100644
--- a/drivers/gpu/drm/xe/display/xe_stolen.c
+++ b/drivers/gpu/drm/xe/display/xe_stolen.c
@@ -100,7 +100,7 @@ u64 i915_gem_stolen_node_address(struct intel_stolen_node *node)
u64 i915_gem_stolen_node_size(const struct intel_stolen_node *node)
{
- return node->bo->ttm.base.size;
+ return xe_bo_size(node->bo);
}
struct intel_stolen_node *i915_gem_stolen_node_alloc(struct drm_device *drm)
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (3 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 04/12] drm/xe/display: Avoid " Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 21:58 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling Maarten Lankhorst
` (10 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
A careful inspection of __xe_ggtt_insert_bo_at() shows that
the ggtt_node can always be seen as inserted from xe_bo.c
due to the way error handling is performed.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_bo.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 7b65020818738..c895214a7a570 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1700,7 +1700,7 @@ static void xe_ttm_bo_destroy(struct ttm_buffer_object *ttm_bo)
xe_assert(xe, list_empty(&ttm_bo->base.gpuva.list));
for_each_tile(tile, xe, id)
- if (bo->ggtt_node[id] && bo->ggtt_node[id]->base.size)
+ if (bo->ggtt_node[id])
xe_ggtt_remove_bo(tile->mem.ggtt, bo);
#ifdef CONFIG_PROC_FS
@@ -3581,8 +3581,8 @@ void xe_bo_put(struct xe_bo *bo)
might_lock(&bo->client->bos_lock);
#endif
for_each_tile(tile, xe_bo_device(bo), id)
- if (bo->ggtt_node[id] && bo->ggtt_node[id]->ggtt)
- xe_ggtt_might_lock(bo->ggtt_node[id]->ggtt);
+ if (bo->ggtt_node[id])
+ xe_ggtt_might_lock(tile->mem.ggtt);
drm_gem_object_put(&bo->ttm.base);
}
}
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (4 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 22:04 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 07/12] drm/xe: Privatize xe_ggtt_node Maarten Lankhorst
` (9 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
Do not directly dereference xe_ggtt_node, and add
a member to store the GGTT size.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 15 ++++++++-------
drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h | 8 ++++++--
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index 2289756761636..c0dfffd5c553b 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -264,7 +264,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
if (!xe_ggtt_node_allocated(node))
return 0;
- return encode_ggtt(cfg, node->base.start, node->base.size, details);
+ return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
}
/* Return: number of configuration dwords written */
@@ -495,13 +495,14 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
xe_ggtt_assign(node, vfid);
xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
- vfid, node->base.start, node->base.start + node->base.size - 1);
+ vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
- err = pf_distribute_config_ggtt(gt->tile, vfid, node->base.start, node->base.size);
+ err = pf_distribute_config_ggtt(gt->tile, vfid, xe_ggtt_node_addr(node), size);
if (unlikely(err))
goto err;
config->ggtt_region = node;
+ config->ggtt_size = size;
return 0;
err:
pf_release_ggtt(tile, node);
@@ -514,7 +515,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
struct xe_ggtt_node *node = config->ggtt_region;
xe_gt_assert(gt, xe_gt_is_main_type(gt));
- return xe_ggtt_node_allocated(node) ? node->base.size : 0;
+ return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
}
/**
@@ -2516,11 +2517,11 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
if (!xe_ggtt_node_allocated(config->ggtt_region))
continue;
- string_get_size(config->ggtt_region->base.size, 1, STRING_UNITS_2,
+ string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
buf, sizeof(buf));
drm_printf(p, "VF%u:\t%#0llx-%#llx\t(%s)\n",
- n, config->ggtt_region->base.start,
- config->ggtt_region->base.start + config->ggtt_region->base.size - 1,
+ n, xe_ggtt_node_addr(config->ggtt_region),
+ xe_ggtt_node_addr(config->ggtt_region) + config->ggtt_size - 1,
buf);
}
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
index 686c7b3b6d7a5..9a8e66c8b539f 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
@@ -17,10 +17,14 @@ struct xe_bo;
* Used by the PF driver to maintain per-VF provisioning data.
*/
struct xe_gt_sriov_config {
- /** @ggtt_region: GGTT region assigned to the VF. */
- struct xe_ggtt_node *ggtt_region;
/** @lmem_obj: LMEM allocation for use by the VF. */
struct xe_bo *lmem_obj;
+
+ /** @ggtt_region: GGTT region assigned to the VF. */
+ struct xe_ggtt_node *ggtt_region;
+ /** @ggtt_size: Size of GGTT region */
+ u64 ggtt_size;
+
/** @num_ctxs: number of GuC contexts IDs. */
u16 num_ctxs;
/** @begin_ctx: start index of GuC context ID range. */
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 07/12] drm/xe: Privatize xe_ggtt_node
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (5 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 22:05 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset Maarten Lankhorst
` (8 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
Nothing requires it any more, make the member private.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_ggtt.c | 18 ++++++++++++++++++
drivers/gpu/drm/xe/xe_ggtt_types.h | 19 +------------------
2 files changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 05515037e2d6a..5c07d63189ab1 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -34,6 +34,24 @@
#include "xe_wa.h"
#include "xe_wopcm.h"
+/**
+ * struct xe_ggtt_node - A node in GGTT.
+ *
+ * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
+ * insertion, reservation, or 'ballooning'.
+ * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
+ */
+struct xe_ggtt_node {
+ /** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
+ struct xe_ggtt *ggtt;
+ /** @base: A drm_mm_node */
+ struct drm_mm_node base;
+ /** @delayed_removal_work: The work struct for the delayed removal */
+ struct work_struct delayed_removal_work;
+ /** @invalidate_on_remove: If it needs invalidation upon removal */
+ bool invalidate_on_remove;
+};
+
/**
* DOC: Global Graphics Translation Table (GGTT)
*
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index f4aa5671cb3e3..31054e00daa6b 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -11,6 +11,7 @@
#include "xe_pt_types.h"
struct xe_bo;
+struct xe_ggtt_node;
struct xe_gt;
/**
@@ -53,24 +54,6 @@ struct xe_ggtt {
struct workqueue_struct *wq;
};
-/**
- * struct xe_ggtt_node - A node in GGTT.
- *
- * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
- * insertion, reservation, or 'ballooning'.
- * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
- */
-struct xe_ggtt_node {
- /** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
- struct xe_ggtt *ggtt;
- /** @base: A drm_mm_node */
- struct drm_mm_node base;
- /** @delayed_removal_work: The work struct for the delayed removal */
- struct work_struct delayed_removal_work;
- /** @invalidate_on_remove: If it needs invalidation upon removal */
- bool invalidate_on_remove;
-};
-
typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
struct xe_ggtt_node *node,
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (6 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 07/12] drm/xe: Privatize xe_ggtt_node Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 22:38 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 09/12] drm/xe: Rewrite GGTT VF initialisation Maarten Lankhorst
` (7 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
This will make node shifting in the next commit a one-liner.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_ggtt.c | 21 ++++++++++++++-------
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 5c07d63189ab1..1c97a06424b5c 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -289,7 +289,7 @@ static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
{
ggtt->start = start;
ggtt->size = size;
- drm_mm_init(&ggtt->mm, start, size);
+ drm_mm_init(&ggtt->mm, 0, size - start);
}
int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
@@ -388,7 +388,7 @@ static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
/* Display may have allocated inside ggtt, so be careful with clearing here */
mutex_lock(&ggtt->lock);
drm_mm_for_each_hole(hole, &ggtt->mm, start, end)
- xe_ggtt_clear(ggtt, start, end - start);
+ xe_ggtt_clear(ggtt, ggtt->start + start, end - start);
xe_ggtt_invalidate(ggtt);
mutex_unlock(&ggtt->lock);
@@ -405,7 +405,7 @@ static void ggtt_node_remove(struct xe_ggtt_node *node)
mutex_lock(&ggtt->lock);
if (bound)
- xe_ggtt_clear(ggtt, node->base.start, node->base.size);
+ xe_ggtt_clear(ggtt, xe_ggtt_node_addr(node), node->base.size);
drm_mm_remove_node(&node->base);
node->base.size = 0;
mutex_unlock(&ggtt->lock);
@@ -561,13 +561,13 @@ int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64
lockdep_assert_held(&ggtt->lock);
node->base.color = 0;
- node->base.start = start;
+ node->base.start = start - ggtt->start;
node->base.size = end - start;
err = drm_mm_reserve_node(&ggtt->mm, &node->base);
if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
- node->base.start, node->base.start + node->base.size, ERR_PTR(err)))
+ xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + node->base.size, ERR_PTR(err)))
return err;
xe_ggtt_dump_node(ggtt, &node->base, "balloon");
@@ -744,7 +744,7 @@ static void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
if (XE_WARN_ON(!node))
return;
- start = node->base.start;
+ start = xe_ggtt_node_addr(node);
end = start + xe_bo_size(bo);
if (!xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo)) {
@@ -865,6 +865,13 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
}
mutex_lock(&ggtt->lock);
+ if (start >= ggtt->start)
+ start -= ggtt->start;
+ else
+ start = 0;
+
+ end -= ggtt->start;
+
err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base,
xe_bo_size(bo), alignment, 0, start, end, 0);
if (err) {
@@ -1106,5 +1113,5 @@ u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset)
*/
u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node)
{
- return node->base.start;
+ return node->base.start + READ_ONCE(node->ggtt->start);
}
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 09/12] drm/xe: Rewrite GGTT VF initialisation
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (7 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-16 0:30 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 10/12] drm/xe: Move struct xe_ggtt to xe_ggtt.c Maarten Lankhorst
` (6 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst, Matthew Brost
The previous code was using a complicated system with 2 balloons to
set GGTT size and adjust GGTT offset. While it works, it's overly
complicated.
A better approach is to set the offset and size when initialising GGTT,
this removes the need for adding balloons. The resize function only
needs readjust ggtt->start to have GGTT at the new offset.
This removes the need to manipulate the internals of xe_ggtt outside
of xe_ggtt, and cleans up a lot of now unneeded code.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Co-developed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 2 +-
drivers/gpu/drm/xe/xe_device_types.h | 2 -
drivers/gpu/drm/xe/xe_ggtt.c | 158 +++-------------
drivers/gpu/drm/xe/xe_ggtt.h | 5 +-
drivers/gpu/drm/xe/xe_ggtt_types.h | 1 +
drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 5 +-
drivers/gpu/drm/xe/xe_pci.c | 7 +
drivers/gpu/drm/xe/xe_tile_sriov_vf.c | 197 ++------------------
drivers/gpu/drm/xe/xe_tile_sriov_vf.h | 4 +-
drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h | 4 +
10 files changed, 60 insertions(+), 325 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
index d266882adc0e0..acddbedcf17cb 100644
--- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
+++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
@@ -67,7 +67,7 @@ static int guc_buf_test_init(struct kunit *test)
KUNIT_ASSERT_EQ(test, 0,
xe_ggtt_init_kunit(ggtt, DUT_GGTT_START,
- DUT_GGTT_START + DUT_GGTT_SIZE));
+ DUT_GGTT_SIZE));
kunit_activate_static_stub(test, xe_managed_bo_create_pin_map,
replacement_xe_managed_bo_create_pin_map);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 02c04ad7296e4..a05164cc669f9 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -192,8 +192,6 @@ struct xe_tile {
struct xe_lmtt lmtt;
} pf;
struct {
- /** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
- struct xe_ggtt_node *ggtt_balloon[2];
/** @sriov.vf.self_config: VF configuration data */
struct xe_tile_sriov_vf_selfconfig self_config;
} vf;
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 1c97a06424b5c..3b7f6a8dca242 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -38,8 +38,8 @@
* struct xe_ggtt_node - A node in GGTT.
*
* This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
- * insertion, reservation, or 'ballooning'.
- * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
+ * insertion or reservation.
+ * It will, then, be finalized by xe_ggtt_node_remove().
*/
struct xe_ggtt_node {
/** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
@@ -337,9 +337,15 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
ggtt_start = wopcm;
ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
} else {
- /* GGTT is expected to be 4GiB */
- ggtt_start = wopcm;
- ggtt_size = SZ_4G - ggtt_start;
+ ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
+ ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
+
+ if (ggtt_start < wopcm || ggtt_start > GUC_GGTT_TOP ||
+ ggtt_size > GUC_GGTT_TOP - ggtt_start) {
+ xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
+ ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);
+ return -ERANGE;
+ }
}
ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
@@ -364,17 +370,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
if (err)
return err;
- err = devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);
- if (err)
- return err;
-
- if (IS_SRIOV_VF(xe)) {
- err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
- if (err)
- return err;
- }
-
- return 0;
+ return devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);
}
ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
@@ -526,119 +522,29 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
}
-static void xe_ggtt_dump_node(struct xe_ggtt *ggtt,
- const struct drm_mm_node *node, const char *description)
-{
- char buf[10];
-
- if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
- string_get_size(node->size, 1, STRING_UNITS_2, buf, sizeof(buf));
- xe_tile_dbg(ggtt->tile, "GGTT %#llx-%#llx (%s) %s\n",
- node->start, node->start + node->size, buf, description);
- }
-}
-
-/**
- * xe_ggtt_node_insert_balloon_locked - prevent allocation of specified GGTT addresses
- * @node: the &xe_ggtt_node to hold reserved GGTT node
- * @start: the starting GGTT address of the reserved region
- * @end: then end GGTT address of the reserved region
- *
- * To be used in cases where ggtt->lock is already taken.
- * Use xe_ggtt_node_remove_balloon_locked() to release a reserved GGTT node.
- *
- * Return: 0 on success or a negative error code on failure.
- */
-int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64 end)
-{
- struct xe_ggtt *ggtt = node->ggtt;
- int err;
-
- xe_tile_assert(ggtt->tile, start < end);
- xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE));
- xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE));
- xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base));
- lockdep_assert_held(&ggtt->lock);
-
- node->base.color = 0;
- node->base.start = start - ggtt->start;
- node->base.size = end - start;
-
- err = drm_mm_reserve_node(&ggtt->mm, &node->base);
-
- if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
- xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + node->base.size, ERR_PTR(err)))
- return err;
-
- xe_ggtt_dump_node(ggtt, &node->base, "balloon");
- return 0;
-}
-
-/**
- * xe_ggtt_node_remove_balloon_locked - release a reserved GGTT region
- * @node: the &xe_ggtt_node with reserved GGTT region
- *
- * To be used in cases where ggtt->lock is already taken.
- * See xe_ggtt_node_insert_balloon_locked() for details.
- */
-void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
-{
- if (!xe_ggtt_node_allocated(node))
- return;
-
- lockdep_assert_held(&node->ggtt->lock);
-
- xe_ggtt_dump_node(node->ggtt, &node->base, "remove-balloon");
-
- drm_mm_remove_node(&node->base);
-}
-
-static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
-{
- struct xe_tile *tile = ggtt->tile;
-
- xe_tile_assert(tile, start >= ggtt->start);
- xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
-}
-
/**
- * xe_ggtt_shift_nodes_locked - Shift GGTT nodes to adjust for a change in usable address range.
+ * xe_ggtt_shift_nodes - Shift GGTT nodes to adjust for a change in usable address range.
* @ggtt: the &xe_ggtt struct instance
* @shift: change to the location of area provisioned for current VF
*
- * This function moves all nodes from the GGTT VM, to a temp list. These nodes are expected
- * to represent allocations in range formerly assigned to current VF, before the range changed.
- * When the GGTT VM is completely clear of any nodes, they are re-added with shifted offsets.
- *
- * The function has no ability of failing - because it shifts existing nodes, without
- * any additional processing. If the nodes were successfully existing at the old address,
- * they will do the same at the new one. A fail inside this function would indicate that
- * the list of nodes was either already damaged, or that the shift brings the address range
- * outside of valid bounds. Both cases justify an assert rather than error code.
+ * Adjust the base offset of the GGTT.
*/
-void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)
+void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift)
{
- struct xe_tile *tile __maybe_unused = ggtt->tile;
- struct drm_mm_node *node, *tmpn;
- LIST_HEAD(temp_list_head);
+ s64 new_start;
- lockdep_assert_held(&ggtt->lock);
+ if (!ggtt->size) {
+ xe_tile_err(ggtt->tile, "Asked to resize before xe_ggtt_init_early()?\n");
+ return;
+ }
- if (IS_ENABLED(CONFIG_DRM_XE_DEBUG))
- drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm)
- xe_ggtt_assert_fit(ggtt, node->start + shift, node->size);
+ guard(mutex)(&ggtt->lock);
- drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) {
- drm_mm_remove_node(node);
- list_add(&node->node_list, &temp_list_head);
- }
+ new_start = ggtt->start + shift;
+ xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
+ xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
- list_for_each_entry_safe(node, tmpn, &temp_list_head, node_list) {
- list_del(&node->node_list);
- node->start += shift;
- drm_mm_reserve_node(&ggtt->mm, node);
- xe_tile_assert(tile, drm_mm_node_allocated(node));
- }
+ WRITE_ONCE(ggtt->start, new_start);
}
static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
@@ -679,12 +585,8 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
*
* This function will allocate the struct %xe_ggtt_node and return its pointer.
* This struct will then be freed after the node removal upon xe_ggtt_node_remove()
- * or xe_ggtt_node_remove_balloon_locked().
- *
- * Having %xe_ggtt_node struct allocated doesn't mean that the node is already
- * allocated in GGTT. Only xe_ggtt_node_insert(), allocation through
- * xe_ggtt_node_insert_transform(), or xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved
- * in GGTT.
+ * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
+ * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
*
* Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
**/
@@ -705,9 +607,9 @@ struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
* xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
* @node: the &xe_ggtt_node to be freed
*
- * If anything went wrong with either xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
- * or xe_ggtt_node_insert_balloon_locked(); and this @node is not going to be reused, then,
- * this function needs to be called to free the %xe_ggtt_node struct
+ * If anything went wrong with either xe_ggtt_node_insert() and this @node is
+ * not going to be reused, then this function needs to be called to free the
+ * %xe_ggtt_node struct
**/
void xe_ggtt_node_fini(struct xe_ggtt_node *node)
{
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 4a8ef1b824156..dd321261bd599 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -19,10 +19,7 @@ int xe_ggtt_init(struct xe_ggtt *ggtt);
struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
void xe_ggtt_node_fini(struct xe_ggtt_node *node);
-int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
- u64 start, u64 size);
-void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
-void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
+void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
u64 xe_ggtt_start(struct xe_ggtt *ggtt);
u64 xe_ggtt_size(struct xe_ggtt *ggtt);
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index 31054e00daa6b..2058082234591 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -59,6 +59,7 @@ typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
struct xe_ggtt_node *node,
u64 pte_flags,
xe_ggtt_set_pte_fn set_pte, void *arg);
+
/**
* struct xe_ggtt_pt_ops - GGTT Page table operations
* Which can vary from platform to platform.
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 46518e629ba36..dd3cd7f140cd1 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -442,7 +442,6 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
static int vf_get_ggtt_info(struct xe_gt *gt)
{
struct xe_tile *tile = gt_to_tile(gt);
- struct xe_ggtt *ggtt = tile->mem.ggtt;
struct xe_guc *guc = >->uc.guc;
u64 start, size, ggtt_size;
s64 shift;
@@ -450,7 +449,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
- guard(mutex)(&ggtt->lock);
+ guard(mutex)(&tile->sriov.vf.self_config.ggtt_move_mutex);
err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_START_KEY, &start);
if (unlikely(err))
@@ -480,7 +479,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
if (shift && shift != start) {
xe_gt_sriov_info(gt, "Shifting GGTT base by %lld to 0x%016llx\n",
shift, start);
- xe_tile_sriov_vf_fixup_ggtt_nodes_locked(gt_to_tile(gt), shift);
+ xe_ggtt_shift_nodes(tile->mem.ggtt, shift);
}
if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 24a38904bb508..1a799e6bd4bcb 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -32,6 +32,7 @@
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_sriov.h"
+#include "xe_tile_sriov_vf.h"
#include "xe_step.h"
#include "xe_survivability_mode.h"
#include "xe_tile.h"
@@ -836,6 +837,12 @@ static int xe_info_init(struct xe_device *xe,
for_each_tile(tile, xe, id) {
int err;
+ if (IS_SRIOV_VF(xe)) {
+ err = xe_tile_sriov_vf_init(tile);
+ if (err)
+ return err;
+ }
+
err = xe_tile_alloc_vram(tile);
if (err)
return err;
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
index c9bac2cfdd044..d1fa46e268350 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
@@ -14,173 +14,12 @@
#include "xe_tile_sriov_vf.h"
#include "xe_wopcm.h"
-static int vf_init_ggtt_balloons(struct xe_tile *tile)
-{
- struct xe_ggtt *ggtt = tile->mem.ggtt;
-
- xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
-
- tile->sriov.vf.ggtt_balloon[0] = xe_ggtt_node_init(ggtt);
- if (IS_ERR(tile->sriov.vf.ggtt_balloon[0]))
- return PTR_ERR(tile->sriov.vf.ggtt_balloon[0]);
-
- tile->sriov.vf.ggtt_balloon[1] = xe_ggtt_node_init(ggtt);
- if (IS_ERR(tile->sriov.vf.ggtt_balloon[1])) {
- xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
- return PTR_ERR(tile->sriov.vf.ggtt_balloon[1]);
- }
-
- return 0;
-}
-
-/**
- * xe_tile_sriov_vf_balloon_ggtt_locked - Insert balloon nodes to limit used GGTT address range.
- * @tile: the &xe_tile struct instance
- *
- * Return: 0 on success or a negative error code on failure.
- */
-static int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
-{
- u64 ggtt_base = tile->sriov.vf.self_config.ggtt_base;
- u64 ggtt_size = tile->sriov.vf.self_config.ggtt_size;
- struct xe_device *xe = tile_to_xe(tile);
- u64 wopcm = xe_wopcm_size(xe);
- u64 start, end;
- int err;
-
- xe_tile_assert(tile, IS_SRIOV_VF(xe));
- xe_tile_assert(tile, ggtt_size);
- lockdep_assert_held(&tile->mem.ggtt->lock);
-
- /*
- * VF can only use part of the GGTT as allocated by the PF:
- *
- * WOPCM GUC_GGTT_TOP
- * |<------------ Total GGTT size ------------------>|
- *
- * VF GGTT base -->|<- size ->|
- *
- * +--------------------+----------+-----------------+
- * |////////////////////| block |\\\\\\\\\\\\\\\\\|
- * +--------------------+----------+-----------------+
- *
- * |<--- balloon[0] --->|<-- VF -->|<-- balloon[1] ->|
- */
-
- if (ggtt_base < wopcm || ggtt_base > GUC_GGTT_TOP ||
- ggtt_size > GUC_GGTT_TOP - ggtt_base) {
- xe_sriov_err(xe, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
- tile->id, ggtt_base, ggtt_base + ggtt_size - 1);
- return -ERANGE;
- }
-
- start = wopcm;
- end = ggtt_base;
- if (end != start) {
- err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[0],
- start, end);
- if (err)
- return err;
- }
-
- start = ggtt_base + ggtt_size;
- end = GUC_GGTT_TOP;
- if (end != start) {
- err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[1],
- start, end);
- if (err) {
- xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
- return err;
- }
- }
-
- return 0;
-}
-
-static int vf_balloon_ggtt(struct xe_tile *tile)
-{
- struct xe_ggtt *ggtt = tile->mem.ggtt;
- int err;
-
- mutex_lock(&ggtt->lock);
- err = xe_tile_sriov_vf_balloon_ggtt_locked(tile);
- mutex_unlock(&ggtt->lock);
-
- return err;
-}
-
-/**
- * xe_tile_sriov_vf_deballoon_ggtt_locked - Remove balloon nodes.
- * @tile: the &xe_tile struct instance
- */
-void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile)
-{
- xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
-
- xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[1]);
- xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
-}
-
-static void vf_deballoon_ggtt(struct xe_tile *tile)
-{
- mutex_lock(&tile->mem.ggtt->lock);
- xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
- mutex_unlock(&tile->mem.ggtt->lock);
-}
-
-static void vf_fini_ggtt_balloons(struct xe_tile *tile)
-{
- xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
-
- xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[1]);
- xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
-}
-
-static void cleanup_ggtt(struct drm_device *drm, void *arg)
-{
- struct xe_tile *tile = arg;
-
- vf_deballoon_ggtt(tile);
- vf_fini_ggtt_balloons(tile);
-}
-
-/**
- * xe_tile_sriov_vf_prepare_ggtt - Prepare a VF's GGTT configuration.
- * @tile: the &xe_tile
- *
- * This function is for VF use only.
- *
- * Return: 0 on success or a negative error code on failure.
- */
-int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
-{
- struct xe_device *xe = tile_to_xe(tile);
- int err;
-
- err = vf_init_ggtt_balloons(tile);
- if (err)
- return err;
-
- err = vf_balloon_ggtt(tile);
- if (err) {
- vf_fini_ggtt_balloons(tile);
- return err;
- }
-
- return drmm_add_action_or_reset(&xe->drm, cleanup_ggtt, tile);
-}
-
/**
* DOC: GGTT nodes shifting during VF post-migration recovery
*
* The first fixup applied to the VF KMD structures as part of post-migration
* recovery is shifting nodes within &xe_ggtt instance. The nodes are moved
* from range previously assigned to this VF, into newly provisioned area.
- * The changes include balloons, which are resized accordingly.
- *
- * The balloon nodes are there to eliminate unavailable ranges from use: one
- * reserves the GGTT area below the range for current VF, and another one
- * reserves area above.
*
* Below is a GGTT layout of example VF, with a certain address range assigned to
* said VF, and inaccessible areas above and below:
@@ -198,10 +37,6 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
*
* |<------- inaccessible for VF ------->|<VF owned>|<-- inaccessible for VF ->|
*
- * GGTT nodes used for tracking allocations:
- *
- * |<---------- balloon ------------>|<- nodes->|<----- balloon ------>|
- *
* After the migration, GGTT area assigned to the VF might have shifted, either
* to lower or to higher address. But we expect the total size and extra areas to
* be identical, as migration can only happen between matching platforms.
@@ -219,35 +54,27 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
* So the VF has a new slice of GGTT assigned, and during migration process, the
* memory content was copied to that new area. But the &xe_ggtt nodes are still
* tracking allocations using the old addresses. The nodes within VF owned area
- * have to be shifted, and balloon nodes need to be resized to properly mask out
- * areas not owned by the VF.
- *
- * Fixed &xe_ggtt nodes used for tracking allocations:
+ * have to be shifted, and the start offset for GGTT adjusted.
*
- * |<------ balloon ------>|<- nodes->|<----------- balloon ----------->|
- *
- * Due to use of GPU profiles, we do not expect the old and new GGTT ares to
+ * Due to use of GPU profiles, we do not expect the old and new GGTT areas to
* overlap; but our node shifting will fix addresses properly regardless.
*/
/**
- * xe_tile_sriov_vf_fixup_ggtt_nodes_locked - Shift GGTT allocations to match assigned range.
- * @tile: the &xe_tile struct instance
- * @shift: the shift value
+ * xe_tile_sriov_vf_init - Init tile specific GGTT configuration.
+ * @tile: the &xe_tile
*
- * Since Global GTT is not virtualized, each VF has an assigned range
- * within the global space. This range might have changed during migration,
- * which requires all memory addresses pointing to GGTT to be shifted.
+ * This function is for VF use only.
+ *
+ * Return: 0 on success, negative value on error.
*/
-void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift)
+int xe_tile_sriov_vf_init(struct xe_tile *tile)
{
- struct xe_ggtt *ggtt = tile->mem.ggtt;
+ struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
- lockdep_assert_held(&ggtt->lock);
+ xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
- xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
- xe_ggtt_shift_nodes_locked(ggtt, shift);
- xe_tile_sriov_vf_balloon_ggtt_locked(tile);
+ return drmm_mutex_init(&tile->xe->drm, &config->ggtt_move_mutex);
}
/**
@@ -312,6 +139,7 @@ void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size)
struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
+ lockdep_assert_held(&config->ggtt_move_mutex);
config->ggtt_size = ggtt_size;
}
@@ -345,6 +173,7 @@ void xe_tile_sriov_vf_ggtt_base_store(struct xe_tile *tile, u64 ggtt_base)
struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
+ lockdep_assert_held(&config->ggtt_move_mutex);
config->ggtt_base = ggtt_base;
}
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
index 749f41504883c..1ca5bc87963f0 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
@@ -10,9 +10,7 @@
struct xe_tile;
-int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
-void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
-void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift);
+int xe_tile_sriov_vf_init(struct xe_tile *tile);
u64 xe_tile_sriov_vf_ggtt(struct xe_tile *tile);
void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size);
u64 xe_tile_sriov_vf_ggtt_base(struct xe_tile *tile);
diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
index 4807ca51614cf..2cbbc51c101d4 100644
--- a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
+++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
@@ -7,11 +7,15 @@
#define _XE_TILE_SRIOV_VF_TYPES_H_
#include <linux/types.h>
+#include <linux/mutex.h>
/**
* struct xe_tile_sriov_vf_selfconfig - VF configuration data.
*/
struct xe_tile_sriov_vf_selfconfig {
+ /** @ggtt_move_mutex: Prevents multiple movements from happening in parallel */
+ struct mutex ggtt_move_mutex;
+
/** @ggtt_base: assigned base offset of the GGTT region. */
u64 ggtt_base;
/** @ggtt_size: assigned size of the GGTT region. */
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 10/12] drm/xe: Move struct xe_ggtt to xe_ggtt.c
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (8 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 09/12] drm/xe: Rewrite GGTT VF initialisation Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 11/12] drm/xe: Make xe_ggtt_node_insert return a node Maarten Lankhorst
` (5 subsequent siblings)
15 siblings, 0 replies; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst, Matthew Brost, Maarten Lankhorst
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
No users left outside of xe_ggtt.c, so we can make the struct private.
This prevents us from accidentally touching it before init.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/xe_ggtt.c | 52 +++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ggtt.h | 1 +
drivers/gpu/drm/xe/xe_ggtt_types.h | 58 ++----------------------------
3 files changed, 55 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 3b7f6a8dca242..94cf886785ca2 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -85,6 +85,58 @@ struct xe_ggtt_node {
* give us the correct placement for free.
*/
+/**
+ * struct xe_ggtt_pt_ops - GGTT Page table operations
+ * Which can vary from platform to platform.
+ */
+struct xe_ggtt_pt_ops {
+ /** @pte_encode_flags: Encode PTE flags for a given BO */
+ u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
+
+ /** @ggtt_set_pte: Directly write into GGTT's PTE */
+ xe_ggtt_set_pte_fn ggtt_set_pte;
+};
+
+/**
+ * struct xe_ggtt - Main GGTT struct
+ *
+ * In general, each tile can contains its own Global Graphics Translation Table
+ * (GGTT) instance.
+ */
+struct xe_ggtt {
+ /** @tile: Back pointer to tile where this GGTT belongs */
+ struct xe_tile *tile;
+ /** @start: Start offset of GGTT */
+ u64 start;
+ /** @size: Total usable size of this GGTT */
+ u64 size;
+
+#define XE_GGTT_FLAGS_64K BIT(0)
+ /**
+ * @flags: Flags for this GGTT
+ * Acceptable flags:
+ * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
+ */
+ unsigned int flags;
+ /** @scratch: Internal object allocation used as a scratch page */
+ struct xe_bo *scratch;
+ /** @lock: Mutex lock to protect GGTT data */
+ struct mutex lock;
+ /**
+ * @gsm: The iomem pointer to the actual location of the translation
+ * table located in the GSM for easy PTE manipulation
+ */
+ u64 __iomem *gsm;
+ /** @pt_ops: Page Table operations per platform */
+ const struct xe_ggtt_pt_ops *pt_ops;
+ /** @mm: The memory manager used to manage individual GGTT allocations */
+ struct drm_mm mm;
+ /** @access_count: counts GGTT writes */
+ unsigned int access_count;
+ /** @wq: Dedicated unordered work queue to process node removals */
+ struct workqueue_struct *wq;
+};
+
static u64 xelp_ggtt_pte_flags(struct xe_bo *bo, u16 pat_index)
{
u64 pte = XE_PAGE_PRESENT;
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index dd321261bd599..9f97f63496bcb 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -9,6 +9,7 @@
#include "xe_ggtt_types.h"
struct drm_printer;
+struct xe_bo;
struct xe_tile;
struct drm_exec;
diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
index 2058082234591..cf754e4d502ad 100644
--- a/drivers/gpu/drm/xe/xe_ggtt_types.h
+++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
@@ -6,53 +6,11 @@
#ifndef _XE_GGTT_TYPES_H_
#define _XE_GGTT_TYPES_H_
+#include <linux/types.h>
#include <drm/drm_mm.h>
-#include "xe_pt_types.h"
-
-struct xe_bo;
+struct xe_ggtt;
struct xe_ggtt_node;
-struct xe_gt;
-
-/**
- * struct xe_ggtt - Main GGTT struct
- *
- * In general, each tile can contains its own Global Graphics Translation Table
- * (GGTT) instance.
- */
-struct xe_ggtt {
- /** @tile: Back pointer to tile where this GGTT belongs */
- struct xe_tile *tile;
- /** @start: Start offset of GGTT */
- u64 start;
- /** @size: Total usable size of this GGTT */
- u64 size;
-
-#define XE_GGTT_FLAGS_64K BIT(0)
- /**
- * @flags: Flags for this GGTT
- * Acceptable flags:
- * - %XE_GGTT_FLAGS_64K - if PTE size is 64K. Otherwise, regular is 4K.
- */
- unsigned int flags;
- /** @scratch: Internal object allocation used as a scratch page */
- struct xe_bo *scratch;
- /** @lock: Mutex lock to protect GGTT data */
- struct mutex lock;
- /**
- * @gsm: The iomem pointer to the actual location of the translation
- * table located in the GSM for easy PTE manipulation
- */
- u64 __iomem *gsm;
- /** @pt_ops: Page Table operations per platform */
- const struct xe_ggtt_pt_ops *pt_ops;
- /** @mm: The memory manager used to manage individual GGTT allocations */
- struct drm_mm mm;
- /** @access_count: counts GGTT writes */
- unsigned int access_count;
- /** @wq: Dedicated unordered work queue to process node removals */
- struct workqueue_struct *wq;
-};
typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
@@ -60,16 +18,4 @@ typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
u64 pte_flags,
xe_ggtt_set_pte_fn set_pte, void *arg);
-/**
- * struct xe_ggtt_pt_ops - GGTT Page table operations
- * Which can vary from platform to platform.
- */
-struct xe_ggtt_pt_ops {
- /** @pte_encode_flags: Encode PTE flags for a given BO */
- u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index);
-
- /** @ggtt_set_pte: Directly write into GGTT's PTE */
- xe_ggtt_set_pte_fn ggtt_set_pte;
-};
-
#endif
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 11/12] drm/xe: Make xe_ggtt_node_insert return a node
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (9 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 10/12] drm/xe: Move struct xe_ggtt to xe_ggtt.c Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 22:44 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 12/12] drm/xe: Remove xe_ggtt_node_allocated Maarten Lankhorst
` (4 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
This extra step is easier to handle inside xe_ggtt.c and makes
xe_ggtt_node_allocated a simple null check instead, as the intermediate
state 'allocated but not inserted' is no longer used.
Privatize xe_ggtt_node_fini() as it's no longer used outside of
xe_ggtt.c
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 6 +-
drivers/gpu/drm/xe/xe_ggtt.c | 76 +++++++++------------
drivers/gpu/drm/xe/xe_ggtt.h | 5 +-
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 24 +------
4 files changed, 38 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
index acddbedcf17cb..7aeee6680d78c 100644
--- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
+++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
@@ -38,12 +38,8 @@ static struct xe_bo *replacement_xe_managed_bo_create_pin_map(struct xe_device *
if (flags & XE_BO_FLAG_GGTT) {
struct xe_ggtt *ggtt = tile->mem.ggtt;
- bo->ggtt_node[tile->id] = xe_ggtt_node_init(ggtt);
+ bo->ggtt_node[tile->id] = xe_ggtt_node_insert(ggtt, xe_bo_size(bo), SZ_4K);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, bo->ggtt_node[tile->id]);
-
- KUNIT_ASSERT_EQ(test, 0,
- xe_ggtt_node_insert(bo->ggtt_node[tile->id],
- xe_bo_size(bo), SZ_4K));
}
return bo;
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index 94cf886785ca2..e4e8be114786a 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -442,6 +442,11 @@ static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
mutex_unlock(&ggtt->lock);
}
+static void xe_ggtt_node_fini(struct xe_ggtt_node *node)
+{
+ kfree(node);
+}
+
static void ggtt_node_remove(struct xe_ggtt_node *node)
{
struct xe_ggtt *ggtt = node->ggtt;
@@ -606,68 +611,51 @@ static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
mm_flags);
}
+static struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
+{
+ struct xe_ggtt_node *node = kzalloc(sizeof(*node), GFP_NOFS);
+
+ if (!node)
+ return ERR_PTR(-ENOMEM);
+
+ INIT_WORK(&node->delayed_removal_work, ggtt_node_remove_work_func);
+ node->ggtt = ggtt;
+
+ return node;
+}
+
/**
* xe_ggtt_node_insert - Insert a &xe_ggtt_node into the GGTT
- * @node: the &xe_ggtt_node to be inserted
+ * @ggtt: the @ggtt into which the node should be inserted.
* @size: size of the node
* @align: alignment constrain of the node
*
- * It cannot be called without first having called xe_ggtt_init() once.
- *
- * Return: 0 on success or a negative error code on failure.
+ * Return: &xe_ggtt_node on success or a ERR_PTR on failure.
*/
-int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
+struct xe_ggtt_node *xe_ggtt_node_insert(struct xe_ggtt *ggtt, u32 size, u32 align)
{
+ struct xe_ggtt_node *node;
int ret;
- if (!node || !node->ggtt)
- return -ENOENT;
+ if (!ggtt)
+ return ERR_PTR(-ENOENT);
+
+ node = xe_ggtt_node_init(ggtt);
+ if (IS_ERR(node))
+ return node;
mutex_lock(&node->ggtt->lock);
ret = xe_ggtt_node_insert_locked(node, size, align,
DRM_MM_INSERT_HIGH);
mutex_unlock(&node->ggtt->lock);
-
- return ret;
-}
-
-/**
- * xe_ggtt_node_init - Initialize %xe_ggtt_node struct
- * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved.
- *
- * This function will allocate the struct %xe_ggtt_node and return its pointer.
- * This struct will then be freed after the node removal upon xe_ggtt_node_remove()
- * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
- * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
- *
- * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
- **/
-struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
-{
- struct xe_ggtt_node *node = kzalloc(sizeof(*node), GFP_NOFS);
-
- if (!node)
- return ERR_PTR(-ENOMEM);
-
- INIT_WORK(&node->delayed_removal_work, ggtt_node_remove_work_func);
- node->ggtt = ggtt;
+ if (ret) {
+ xe_ggtt_node_fini(node);
+ return ERR_PTR(ret);
+ }
return node;
}
-/**
- * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
- * @node: the &xe_ggtt_node to be freed
- *
- * If anything went wrong with either xe_ggtt_node_insert() and this @node is
- * not going to be reused, then this function needs to be called to free the
- * %xe_ggtt_node struct
- **/
-void xe_ggtt_node_fini(struct xe_ggtt_node *node)
-{
- kfree(node);
-}
-
/**
* xe_ggtt_node_allocated - Check if node is allocated in GGTT
* @node: the &xe_ggtt_node to be inspected
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index 9f97f63496bcb..d0ad541a40baf 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -18,13 +18,12 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt);
int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size);
int xe_ggtt_init(struct xe_ggtt *ggtt);
-struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
-void xe_ggtt_node_fini(struct xe_ggtt_node *node);
void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
u64 xe_ggtt_start(struct xe_ggtt *ggtt);
u64 xe_ggtt_size(struct xe_ggtt *ggtt);
-int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
+struct xe_ggtt_node *
+xe_ggtt_node_insert(struct xe_ggtt *ggtt, u32 size, u32 align);
struct xe_ggtt_node *
xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
struct xe_bo *bo, u64 pte,
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index c0dfffd5c553b..d71041a611d35 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -434,23 +434,9 @@ static int pf_distribute_config_ggtt(struct xe_tile *tile, unsigned int vfid, u6
return err ?: err2;
}
-static void pf_release_ggtt(struct xe_tile *tile, struct xe_ggtt_node *node)
-{
- if (xe_ggtt_node_allocated(node)) {
- /*
- * explicit GGTT PTE assignment to the PF using xe_ggtt_assign()
- * is redundant, as PTE will be implicitly re-assigned to PF by
- * the xe_ggtt_clear() called by below xe_ggtt_remove_node().
- */
- xe_ggtt_node_remove(node, false);
- } else {
- xe_ggtt_node_fini(node);
- }
-}
-
static void pf_release_vf_config_ggtt(struct xe_gt *gt, struct xe_gt_sriov_config *config)
{
- pf_release_ggtt(gt_to_tile(gt), config->ggtt_region);
+ xe_ggtt_node_remove(config->ggtt_region, false);
config->ggtt_region = NULL;
}
@@ -485,14 +471,10 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
if (!size)
return 0;
- node = xe_ggtt_node_init(ggtt);
+ node = xe_ggtt_node_insert(ggtt, size, alignment);
if (IS_ERR(node))
return PTR_ERR(node);
- err = xe_ggtt_node_insert(node, size, alignment);
- if (unlikely(err))
- goto err;
-
xe_ggtt_assign(node, vfid);
xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
@@ -505,7 +487,7 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
config->ggtt_size = size;
return 0;
err:
- pf_release_ggtt(tile, node);
+ xe_ggtt_node_remove(node, false);
return err;
}
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v7 12/12] drm/xe: Remove xe_ggtt_node_allocated
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (10 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 11/12] drm/xe: Make xe_ggtt_node_insert return a node Maarten Lankhorst
@ 2025-10-15 7:47 ` Maarten Lankhorst
2025-10-15 22:41 ` Matthew Brost
2025-10-15 9:47 ` ✗ CI.checkpatch: warning for drm/xe: Make all xe_ggtt structs private. (rev2) Patchwork
` (3 subsequent siblings)
15 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-15 7:47 UTC (permalink / raw)
To: intel-xe; +Cc: Maarten Lankhorst
With the intermediate state gone, no longer useful. Just check against
NULL.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 +--
drivers/gpu/drm/xe/xe_ggtt.c | 14 --------------
drivers/gpu/drm/xe/xe_ggtt.h | 1 -
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 12 ++++++------
4 files changed, 7 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 784d2db5fd0db..6592b000950ff 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -350,8 +350,7 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
if (vma->dpt)
xe_bo_unpin_map_no_vm(vma->dpt);
- else if (!xe_ggtt_node_allocated(vma->bo->ggtt_node[tile_id]) ||
- vma->bo->ggtt_node[tile_id] != vma->node)
+ else if (vma->bo->ggtt_node[tile_id] != vma->node)
xe_ggtt_node_remove(vma->node, false);
ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
index e4e8be114786a..e9ab8d9415412 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.c
+++ b/drivers/gpu/drm/xe/xe_ggtt.c
@@ -656,20 +656,6 @@ struct xe_ggtt_node *xe_ggtt_node_insert(struct xe_ggtt *ggtt, u32 size, u32 ali
return node;
}
-/**
- * xe_ggtt_node_allocated - Check if node is allocated in GGTT
- * @node: the &xe_ggtt_node to be inspected
- *
- * Return: True if allocated, False otherwise.
- */
-bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node)
-{
- if (!node || !node->ggtt)
- return false;
-
- return drm_mm_node_allocated(&node->base);
-}
-
/**
* xe_ggtt_map_bo - Map the BO into GGTT
* @ggtt: the &xe_ggtt where node will be mapped
diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
index d0ad541a40baf..e32a14ac63665 100644
--- a/drivers/gpu/drm/xe/xe_ggtt.h
+++ b/drivers/gpu/drm/xe/xe_ggtt.h
@@ -30,7 +30,6 @@ xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
u64 size, u32 align,
xe_ggtt_transform_cb transform, void *arg);
void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate);
-bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node);
void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo);
int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *exec);
int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
index d71041a611d35..db47b49e5842c 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
@@ -261,7 +261,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
{
struct xe_ggtt_node *node = config->ggtt_region;
- if (!xe_ggtt_node_allocated(node))
+ if (!node)
return 0;
return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
@@ -455,7 +455,7 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
size = round_up(size, alignment);
- if (xe_ggtt_node_allocated(config->ggtt_region)) {
+ if (config->ggtt_region) {
err = pf_distribute_config_ggtt(tile, vfid, 0, 0);
if (unlikely(err))
return err;
@@ -466,7 +466,7 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
if (unlikely(err))
return err;
}
- xe_gt_assert(gt, !xe_ggtt_node_allocated(config->ggtt_region));
+ xe_gt_assert(gt, !config->ggtt_region);
if (!size)
return 0;
@@ -497,7 +497,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
struct xe_ggtt_node *node = config->ggtt_region;
xe_gt_assert(gt, xe_gt_is_main_type(gt));
- return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
+ return node ? config->ggtt_size : 0;
}
/**
@@ -2049,7 +2049,7 @@ int xe_gt_sriov_pf_config_release(struct xe_gt *gt, unsigned int vfid, bool forc
static void pf_sanitize_ggtt(struct xe_ggtt_node *ggtt_region, unsigned int vfid)
{
- if (xe_ggtt_node_allocated(ggtt_region))
+ if (ggtt_region)
xe_ggtt_assign(ggtt_region, vfid);
}
@@ -2496,7 +2496,7 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
for (n = 1; n <= total_vfs; n++) {
config = >->sriov.pf.vfs[n].config;
- if (!xe_ggtt_node_allocated(config->ggtt_region))
+ if (!config->ggtt_region)
continue;
string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
--
2.51.0
^ permalink raw reply related [flat|nested] 34+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe: Make all xe_ggtt structs private. (rev2)
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (11 preceding siblings ...)
2025-10-15 7:47 ` [PATCH v7 12/12] drm/xe: Remove xe_ggtt_node_allocated Maarten Lankhorst
@ 2025-10-15 9:47 ` Patchwork
2025-10-15 9:49 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
15 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2025-10-15 9:47 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Make all xe_ggtt structs private. (rev2)
URL : https://patchwork.freedesktop.org/series/155941/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit bf945dfb55549bc0586aa960fe978a4744284ec6
Author: Maarten Lankhorst <dev@lankhorst.se>
Date: Wed Oct 15 09:47:21 2025 +0200
drm/xe: Remove xe_ggtt_node_allocated
With the intermediate state gone, no longer useful. Just check against
NULL.
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch 6a9cafb6723c47062cc4d593804d5bb69155d81a drm-intel
e2ac055293d1 drm/xe: Start using ggtt->start in preparation of balloon removal
-:102: CHECK:SPACING: No space is necessary after a cast
#102: FILE: drivers/gpu/drm/xe/xe_ggtt.c:320:
+ ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
total: 0 errors, 0 warnings, 1 checks, 179 lines checked
4986a82bc462 drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT
-:195: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#195: FILE: drivers/gpu/drm/xe/xe_ggtt.c:627:
+static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
u32 size, u32 align, u32 mm_flags)
-:208: WARNING:LONG_LINE_COMMENT: line length of 120 exceeds 100 columns
#208: FILE: drivers/gpu/drm/xe/xe_ggtt.c:668:
+ * xe_ggtt_node_insert_transform(), or xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved
total: 0 errors, 1 warnings, 1 checks, 317 lines checked
3eafecb516ab drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node
f5f1fbaf3211 drm/xe/display: Avoid dereferencing xe_ggtt_node
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#9:
Also sneak in a xe_bo_size() for stolen, too small to put as separate commit.
total: 0 errors, 1 warnings, 0 checks, 40 lines checked
8f7880b96411 drm/xe: Do not dereference ggtt_node in xe_bo.c
724d34bf8f3f drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
54851a9de3ad drm/xe: Privatize xe_ggtt_node
d0b26246ff1b drm/xe: Make xe_ggtt_node offset relative to starting offset
-:53: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#53: FILE: drivers/gpu/drm/xe/xe_ggtt.c:570:
+ xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + node->base.size, ERR_PTR(err)))
total: 0 errors, 1 warnings, 0 checks, 66 lines checked
1c469275aace drm/xe: Rewrite GGTT VF initialisation
-:18: WARNING:BAD_SIGN_OFF: Co-developed-by: must be immediately followed by Signed-off-by:
#18:
Co-developed-by: Matthew Brost <matthew.brost@intel.com>
-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#74: FILE: drivers/gpu/drm/xe/xe_ggtt.c:346:
+ xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
+ ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);
total: 0 errors, 1 warnings, 1 checks, 548 lines checked
4e630b89fe28 drm/xe: Move struct xe_ggtt to xe_ggtt.c
-:43: ERROR:CODE_INDENT: code indent should use tabs where possible
#43: FILE: drivers/gpu/drm/xe/xe_ggtt.c:109:
+ /** @start: Start offset of GGTT */$
total: 1 errors, 0 warnings, 0 checks, 136 lines checked
67fb8f8d62a9 drm/xe: Make xe_ggtt_node_insert return a node
bf945dfb5554 drm/xe: Remove xe_ggtt_node_allocated
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Make all xe_ggtt structs private. (rev2)
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (12 preceding siblings ...)
2025-10-15 9:47 ` ✗ CI.checkpatch: warning for drm/xe: Make all xe_ggtt structs private. (rev2) Patchwork
@ 2025-10-15 9:49 ` Patchwork
2025-10-15 11:03 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-15 19:55 ` ✗ Xe.CI.Full: failure " Patchwork
15 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2025-10-15 9:49 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Make all xe_ggtt structs private. (rev2)
URL : https://patchwork.freedesktop.org/series/155941/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:47:50] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:47:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:48:24] Starting KUnit Kernel (1/1)...
[09:48:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:48:24] ================== guc_buf (11 subtests) ===================
[09:48:24] [PASSED] test_smallest
[09:48:24] [PASSED] test_largest
[09:48:24] [PASSED] test_granular
[09:48:24] [PASSED] test_unique
[09:48:24] [PASSED] test_overlap
[09:48:24] [PASSED] test_reusable
[09:48:24] [PASSED] test_too_big
[09:48:25] [PASSED] test_flush
[09:48:25] [PASSED] test_lookup
[09:48:25] [PASSED] test_data
[09:48:25] [PASSED] test_class
[09:48:25] ===================== [PASSED] guc_buf =====================
[09:48:25] =================== guc_dbm (7 subtests) ===================
[09:48:25] [PASSED] test_empty
[09:48:25] [PASSED] test_default
[09:48:25] ======================== test_size ========================
[09:48:25] [PASSED] 4
[09:48:25] [PASSED] 8
[09:48:25] [PASSED] 32
[09:48:25] [PASSED] 256
[09:48:25] ==================== [PASSED] test_size ====================
[09:48:25] ======================= test_reuse ========================
[09:48:25] [PASSED] 4
[09:48:25] [PASSED] 8
[09:48:25] [PASSED] 32
[09:48:25] [PASSED] 256
[09:48:25] =================== [PASSED] test_reuse ====================
[09:48:25] =================== test_range_overlap ====================
[09:48:25] [PASSED] 4
[09:48:25] [PASSED] 8
[09:48:25] [PASSED] 32
[09:48:25] [PASSED] 256
[09:48:25] =============== [PASSED] test_range_overlap ================
[09:48:25] =================== test_range_compact ====================
[09:48:25] [PASSED] 4
[09:48:25] [PASSED] 8
[09:48:25] [PASSED] 32
[09:48:25] [PASSED] 256
[09:48:25] =============== [PASSED] test_range_compact ================
[09:48:25] ==================== test_range_spare =====================
[09:48:25] [PASSED] 4
[09:48:25] [PASSED] 8
[09:48:25] [PASSED] 32
[09:48:25] [PASSED] 256
[09:48:25] ================ [PASSED] test_range_spare =================
[09:48:25] ===================== [PASSED] guc_dbm =====================
[09:48:25] =================== guc_idm (6 subtests) ===================
[09:48:25] [PASSED] bad_init
[09:48:25] [PASSED] no_init
[09:48:25] [PASSED] init_fini
[09:48:25] [PASSED] check_used
[09:48:25] [PASSED] check_quota
[09:48:25] [PASSED] check_all
[09:48:25] ===================== [PASSED] guc_idm =====================
[09:48:25] ================== no_relay (3 subtests) ===================
[09:48:25] [PASSED] xe_drops_guc2pf_if_not_ready
[09:48:25] [PASSED] xe_drops_guc2vf_if_not_ready
[09:48:25] [PASSED] xe_rejects_send_if_not_ready
[09:48:25] ==================== [PASSED] no_relay =====================
[09:48:25] ================== pf_relay (14 subtests) ==================
[09:48:25] [PASSED] pf_rejects_guc2pf_too_short
[09:48:25] [PASSED] pf_rejects_guc2pf_too_long
[09:48:25] [PASSED] pf_rejects_guc2pf_no_payload
[09:48:25] [PASSED] pf_fails_no_payload
[09:48:25] [PASSED] pf_fails_bad_origin
[09:48:25] [PASSED] pf_fails_bad_type
[09:48:25] [PASSED] pf_txn_reports_error
[09:48:25] [PASSED] pf_txn_sends_pf2guc
[09:48:25] [PASSED] pf_sends_pf2guc
[09:48:25] [SKIPPED] pf_loopback_nop
[09:48:25] [SKIPPED] pf_loopback_echo
[09:48:25] [SKIPPED] pf_loopback_fail
[09:48:25] [SKIPPED] pf_loopback_busy
[09:48:25] [SKIPPED] pf_loopback_retry
[09:48:25] ==================== [PASSED] pf_relay =====================
[09:48:25] ================== vf_relay (3 subtests) ===================
[09:48:25] [PASSED] vf_rejects_guc2vf_too_short
[09:48:25] [PASSED] vf_rejects_guc2vf_too_long
[09:48:25] [PASSED] vf_rejects_guc2vf_no_payload
[09:48:25] ==================== [PASSED] vf_relay =====================
[09:48:25] ===================== lmtt (1 subtest) =====================
[09:48:25] ======================== test_ops =========================
[09:48:25] [PASSED] 2-level
[09:48:25] [PASSED] multi-level
[09:48:25] ==================== [PASSED] test_ops =====================
[09:48:25] ====================== [PASSED] lmtt =======================
[09:48:25] ================= pf_service (11 subtests) =================
[09:48:25] [PASSED] pf_negotiate_any
[09:48:25] [PASSED] pf_negotiate_base_match
[09:48:25] [PASSED] pf_negotiate_base_newer
[09:48:25] [PASSED] pf_negotiate_base_next
[09:48:25] [SKIPPED] pf_negotiate_base_older
[09:48:25] [PASSED] pf_negotiate_base_prev
[09:48:25] [PASSED] pf_negotiate_latest_match
[09:48:25] [PASSED] pf_negotiate_latest_newer
[09:48:25] [PASSED] pf_negotiate_latest_next
[09:48:25] [SKIPPED] pf_negotiate_latest_older
[09:48:25] [SKIPPED] pf_negotiate_latest_prev
[09:48:25] =================== [PASSED] pf_service ====================
[09:48:25] ================= xe_guc_g2g (2 subtests) ==================
[09:48:25] ============== xe_live_guc_g2g_kunit_default ==============
[09:48:25] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:48:25] ============== xe_live_guc_g2g_kunit_allmem ===============
[09:48:25] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:48:25] =================== [SKIPPED] xe_guc_g2g ===================
[09:48:25] =================== xe_mocs (2 subtests) ===================
[09:48:25] ================ xe_live_mocs_kernel_kunit ================
[09:48:25] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:48:25] ================ xe_live_mocs_reset_kunit =================
[09:48:25] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:48:25] ==================== [SKIPPED] xe_mocs =====================
[09:48:25] ================= xe_migrate (2 subtests) ==================
[09:48:25] ================= xe_migrate_sanity_kunit =================
[09:48:25] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:48:25] ================== xe_validate_ccs_kunit ==================
[09:48:25] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:48:25] =================== [SKIPPED] xe_migrate ===================
[09:48:25] ================== xe_dma_buf (1 subtest) ==================
[09:48:25] ==================== xe_dma_buf_kunit =====================
[09:48:25] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:48:25] =================== [SKIPPED] xe_dma_buf ===================
[09:48:25] ================= xe_bo_shrink (1 subtest) =================
[09:48:25] =================== xe_bo_shrink_kunit ====================
[09:48:25] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:48:25] ================== [SKIPPED] xe_bo_shrink ==================
[09:48:25] ==================== xe_bo (2 subtests) ====================
[09:48:25] ================== xe_ccs_migrate_kunit ===================
[09:48:25] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:48:25] ==================== xe_bo_evict_kunit ====================
[09:48:25] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:48:25] ===================== [SKIPPED] xe_bo ======================
[09:48:25] ==================== args (11 subtests) ====================
[09:48:25] [PASSED] count_args_test
[09:48:25] [PASSED] call_args_example
[09:48:25] [PASSED] call_args_test
[09:48:25] [PASSED] drop_first_arg_example
[09:48:25] [PASSED] drop_first_arg_test
[09:48:25] [PASSED] first_arg_example
[09:48:25] [PASSED] first_arg_test
[09:48:25] [PASSED] last_arg_example
[09:48:25] [PASSED] last_arg_test
[09:48:25] [PASSED] pick_arg_example
[09:48:25] [PASSED] sep_comma_example
[09:48:25] ====================== [PASSED] args =======================
[09:48:25] =================== xe_pci (3 subtests) ====================
[09:48:25] ==================== check_graphics_ip ====================
[09:48:25] [PASSED] 12.00 Xe_LP
[09:48:25] [PASSED] 12.10 Xe_LP+
[09:48:25] [PASSED] 12.55 Xe_HPG
[09:48:25] [PASSED] 12.60 Xe_HPC
[09:48:25] [PASSED] 12.70 Xe_LPG
[09:48:25] [PASSED] 12.71 Xe_LPG
[09:48:25] [PASSED] 12.74 Xe_LPG+
[09:48:25] [PASSED] 20.01 Xe2_HPG
[09:48:25] [PASSED] 20.02 Xe2_HPG
[09:48:25] [PASSED] 20.04 Xe2_LPG
[09:48:25] [PASSED] 30.00 Xe3_LPG
[09:48:25] [PASSED] 30.01 Xe3_LPG
[09:48:25] [PASSED] 30.03 Xe3_LPG
[09:48:25] ================ [PASSED] check_graphics_ip ================
[09:48:25] ===================== check_media_ip ======================
[09:48:25] [PASSED] 12.00 Xe_M
[09:48:25] [PASSED] 12.55 Xe_HPM
[09:48:25] [PASSED] 13.00 Xe_LPM+
[09:48:25] [PASSED] 13.01 Xe2_HPM
[09:48:25] [PASSED] 20.00 Xe2_LPM
[09:48:25] [PASSED] 30.00 Xe3_LPM
[09:48:25] [PASSED] 30.02 Xe3_LPM
[09:48:25] ================= [PASSED] check_media_ip ==================
[09:48:25] ================= check_platform_gt_count =================
[09:48:25] [PASSED] 0x9A60 (TIGERLAKE)
[09:48:25] [PASSED] 0x9A68 (TIGERLAKE)
[09:48:25] [PASSED] 0x9A70 (TIGERLAKE)
[09:48:25] [PASSED] 0x9A40 (TIGERLAKE)
[09:48:25] [PASSED] 0x9A49 (TIGERLAKE)
[09:48:25] [PASSED] 0x9A59 (TIGERLAKE)
[09:48:25] [PASSED] 0x9A78 (TIGERLAKE)
[09:48:25] [PASSED] 0x9AC0 (TIGERLAKE)
[09:48:25] [PASSED] 0x9AC9 (TIGERLAKE)
[09:48:25] [PASSED] 0x9AD9 (TIGERLAKE)
[09:48:25] [PASSED] 0x9AF8 (TIGERLAKE)
[09:48:25] [PASSED] 0x4C80 (ROCKETLAKE)
[09:48:25] [PASSED] 0x4C8A (ROCKETLAKE)
[09:48:25] [PASSED] 0x4C8B (ROCKETLAKE)
[09:48:25] [PASSED] 0x4C8C (ROCKETLAKE)
[09:48:25] [PASSED] 0x4C90 (ROCKETLAKE)
[09:48:25] [PASSED] 0x4C9A (ROCKETLAKE)
[09:48:25] [PASSED] 0x4680 (ALDERLAKE_S)
[09:48:25] [PASSED] 0x4682 (ALDERLAKE_S)
[09:48:25] [PASSED] 0x4688 (ALDERLAKE_S)
[09:48:25] [PASSED] 0x468A (ALDERLAKE_S)
[09:48:25] [PASSED] 0x468B (ALDERLAKE_S)
[09:48:25] [PASSED] 0x4690 (ALDERLAKE_S)
[09:48:25] [PASSED] 0x4692 (ALDERLAKE_S)
[09:48:25] [PASSED] 0x4693 (ALDERLAKE_S)
[09:48:25] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46AA (ALDERLAKE_P)
[09:48:25] [PASSED] 0x462A (ALDERLAKE_P)
[09:48:25] [PASSED] 0x4626 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x4628 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:48:25] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:48:25] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:48:25] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:48:25] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:48:25] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:48:25] [PASSED] 0xA721 (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA720 (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:48:25] [PASSED] 0xA780 (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA781 (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA782 (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA783 (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA788 (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA789 (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA78A (ALDERLAKE_S)
[09:48:25] [PASSED] 0xA78B (ALDERLAKE_S)
[09:48:25] [PASSED] 0x4905 (DG1)
[09:48:25] [PASSED] 0x4906 (DG1)
[09:48:25] [PASSED] 0x4907 (DG1)
[09:48:25] [PASSED] 0x4908 (DG1)
[09:48:25] [PASSED] 0x4909 (DG1)
[09:48:25] [PASSED] 0x56C0 (DG2)
[09:48:25] [PASSED] 0x56C2 (DG2)
[09:48:25] [PASSED] 0x56C1 (DG2)
[09:48:25] [PASSED] 0x7D51 (METEORLAKE)
[09:48:25] [PASSED] 0x7DD1 (METEORLAKE)
[09:48:25] [PASSED] 0x7D41 (METEORLAKE)
[09:48:25] [PASSED] 0x7D67 (METEORLAKE)
[09:48:25] [PASSED] 0xB640 (METEORLAKE)
[09:48:25] [PASSED] 0x56A0 (DG2)
[09:48:25] [PASSED] 0x56A1 (DG2)
[09:48:25] [PASSED] 0x56A2 (DG2)
[09:48:25] [PASSED] 0x56BE (DG2)
[09:48:25] [PASSED] 0x56BF (DG2)
[09:48:25] [PASSED] 0x5690 (DG2)
[09:48:25] [PASSED] 0x5691 (DG2)
[09:48:25] [PASSED] 0x5692 (DG2)
[09:48:25] [PASSED] 0x56A5 (DG2)
[09:48:25] [PASSED] 0x56A6 (DG2)
[09:48:25] [PASSED] 0x56B0 (DG2)
[09:48:25] [PASSED] 0x56B1 (DG2)
[09:48:25] [PASSED] 0x56BA (DG2)
[09:48:25] [PASSED] 0x56BB (DG2)
[09:48:25] [PASSED] 0x56BC (DG2)
[09:48:25] [PASSED] 0x56BD (DG2)
[09:48:25] [PASSED] 0x5693 (DG2)
[09:48:25] [PASSED] 0x5694 (DG2)
[09:48:25] [PASSED] 0x5695 (DG2)
[09:48:25] [PASSED] 0x56A3 (DG2)
[09:48:25] [PASSED] 0x56A4 (DG2)
[09:48:25] [PASSED] 0x56B2 (DG2)
[09:48:25] [PASSED] 0x56B3 (DG2)
[09:48:25] [PASSED] 0x5696 (DG2)
[09:48:25] [PASSED] 0x5697 (DG2)
[09:48:25] [PASSED] 0xB69 (PVC)
[09:48:25] [PASSED] 0xB6E (PVC)
[09:48:25] [PASSED] 0xBD4 (PVC)
[09:48:25] [PASSED] 0xBD5 (PVC)
[09:48:25] [PASSED] 0xBD6 (PVC)
[09:48:25] [PASSED] 0xBD7 (PVC)
[09:48:25] [PASSED] 0xBD8 (PVC)
[09:48:25] [PASSED] 0xBD9 (PVC)
[09:48:25] [PASSED] 0xBDA (PVC)
[09:48:25] [PASSED] 0xBDB (PVC)
[09:48:25] [PASSED] 0xBE0 (PVC)
[09:48:25] [PASSED] 0xBE1 (PVC)
[09:48:25] [PASSED] 0xBE5 (PVC)
[09:48:25] [PASSED] 0x7D40 (METEORLAKE)
[09:48:25] [PASSED] 0x7D45 (METEORLAKE)
[09:48:25] [PASSED] 0x7D55 (METEORLAKE)
[09:48:25] [PASSED] 0x7D60 (METEORLAKE)
[09:48:25] [PASSED] 0x7DD5 (METEORLAKE)
[09:48:25] [PASSED] 0x6420 (LUNARLAKE)
[09:48:25] [PASSED] 0x64A0 (LUNARLAKE)
[09:48:25] [PASSED] 0x64B0 (LUNARLAKE)
[09:48:25] [PASSED] 0xE202 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE209 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE20B (BATTLEMAGE)
[09:48:25] [PASSED] 0xE20C (BATTLEMAGE)
[09:48:25] [PASSED] 0xE20D (BATTLEMAGE)
[09:48:25] [PASSED] 0xE210 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE211 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE212 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE216 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE220 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE221 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE222 (BATTLEMAGE)
[09:48:25] [PASSED] 0xE223 (BATTLEMAGE)
[09:48:25] [PASSED] 0xB080 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB081 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB082 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB083 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB084 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB085 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB086 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB087 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB08F (PANTHERLAKE)
[09:48:25] [PASSED] 0xB090 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:48:25] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:48:25] [PASSED] 0xFD80 (PANTHERLAKE)
[09:48:25] [PASSED] 0xFD81 (PANTHERLAKE)
[09:48:25] ============= [PASSED] check_platform_gt_count =============
[09:48:25] ===================== [PASSED] xe_pci ======================
[09:48:25] =================== xe_rtp (2 subtests) ====================
[09:48:25] =============== xe_rtp_process_to_sr_tests ================
[09:48:25] [PASSED] coalesce-same-reg
[09:48:25] [PASSED] no-match-no-add
[09:48:25] [PASSED] match-or
[09:48:25] [PASSED] match-or-xfail
[09:48:25] [PASSED] no-match-no-add-multiple-rules
[09:48:25] [PASSED] two-regs-two-entries
[09:48:25] [PASSED] clr-one-set-other
[09:48:25] [PASSED] set-field
[09:48:25] [PASSED] conflict-duplicate
[09:48:25] [PASSED] conflict-not-disjoint
[09:48:25] [PASSED] conflict-reg-type
[09:48:25] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:48:25] ================== xe_rtp_process_tests ===================
[09:48:25] [PASSED] active1
[09:48:25] [PASSED] active2
[09:48:25] [PASSED] active-inactive
[09:48:25] [PASSED] inactive-active
[09:48:25] [PASSED] inactive-1st_or_active-inactive
[09:48:25] [PASSED] inactive-2nd_or_active-inactive
[09:48:25] [PASSED] inactive-last_or_active-inactive
[09:48:25] [PASSED] inactive-no_or_active-inactive
[09:48:25] ============== [PASSED] xe_rtp_process_tests ===============
[09:48:25] ===================== [PASSED] xe_rtp ======================
[09:48:25] ==================== xe_wa (1 subtest) =====================
[09:48:25] ======================== xe_wa_gt =========================
[09:48:25] [PASSED] TIGERLAKE B0
[09:48:25] [PASSED] DG1 A0
[09:48:25] [PASSED] DG1 B0
[09:48:25] [PASSED] ALDERLAKE_S A0
[09:48:25] [PASSED] ALDERLAKE_S B0
stty: 'standard input': Inappropriate ioctl for device
[09:48:25] [PASSED] ALDERLAKE_S C0
[09:48:25] [PASSED] ALDERLAKE_S D0
[09:48:25] [PASSED] ALDERLAKE_P A0
[09:48:25] [PASSED] ALDERLAKE_P B0
[09:48:25] [PASSED] ALDERLAKE_P C0
[09:48:25] [PASSED] ALDERLAKE_S RPLS D0
[09:48:25] [PASSED] ALDERLAKE_P RPLU E0
[09:48:25] [PASSED] DG2 G10 C0
[09:48:25] [PASSED] DG2 G11 B1
[09:48:25] [PASSED] DG2 G12 A1
[09:48:25] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:48:25] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:48:25] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:48:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:48:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:48:25] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:48:25] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:48:25] ==================== [PASSED] xe_wa_gt =====================
[09:48:25] ====================== [PASSED] xe_wa ======================
[09:48:25] ============================================================
[09:48:25] Testing complete. Ran 306 tests: passed: 288, skipped: 18
[09:48:25] Elapsed time: 34.957s total, 4.261s configuring, 30.330s building, 0.336s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:48:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:48:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:48:51] Starting KUnit Kernel (1/1)...
[09:48:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:48:51] ============ drm_test_pick_cmdline (2 subtests) ============
[09:48:51] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:48:51] =============== drm_test_pick_cmdline_named ===============
[09:48:51] [PASSED] NTSC
[09:48:51] [PASSED] NTSC-J
[09:48:51] [PASSED] PAL
[09:48:51] [PASSED] PAL-M
[09:48:51] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:48:51] ============== [PASSED] drm_test_pick_cmdline ==============
[09:48:51] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:48:51] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:48:51] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:48:51] =========== drm_validate_clone_mode (2 subtests) ===========
[09:48:51] ============== drm_test_check_in_clone_mode ===============
[09:48:51] [PASSED] in_clone_mode
[09:48:51] [PASSED] not_in_clone_mode
[09:48:51] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:48:51] =============== drm_test_check_valid_clones ===============
[09:48:51] [PASSED] not_in_clone_mode
[09:48:51] [PASSED] valid_clone
[09:48:51] [PASSED] invalid_clone
[09:48:51] =========== [PASSED] drm_test_check_valid_clones ===========
[09:48:51] ============= [PASSED] drm_validate_clone_mode =============
[09:48:51] ============= drm_validate_modeset (1 subtest) =============
[09:48:51] [PASSED] drm_test_check_connector_changed_modeset
[09:48:51] ============== [PASSED] drm_validate_modeset ===============
[09:48:51] ====== drm_test_bridge_get_current_state (2 subtests) ======
[09:48:51] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:48:51] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[09:48:51] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:48:51] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:48:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:48:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:48:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[09:48:51] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:48:51] ============== drm_bridge_alloc (2 subtests) ===============
[09:48:51] [PASSED] drm_test_drm_bridge_alloc_basic
[09:48:51] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:48:51] ================ [PASSED] drm_bridge_alloc =================
[09:48:51] ================== drm_buddy (8 subtests) ==================
[09:48:51] [PASSED] drm_test_buddy_alloc_limit
[09:48:51] [PASSED] drm_test_buddy_alloc_optimistic
[09:48:51] [PASSED] drm_test_buddy_alloc_pessimistic
[09:48:51] [PASSED] drm_test_buddy_alloc_pathological
[09:48:51] [PASSED] drm_test_buddy_alloc_contiguous
[09:48:51] [PASSED] drm_test_buddy_alloc_clear
[09:48:51] [PASSED] drm_test_buddy_alloc_range_bias
[09:48:52] [PASSED] drm_test_buddy_fragmentation_performance
[09:48:52] ==================== [PASSED] drm_buddy ====================
[09:48:52] ============= drm_cmdline_parser (40 subtests) =============
[09:48:52] [PASSED] drm_test_cmdline_force_d_only
[09:48:52] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:48:52] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:48:52] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:48:52] [PASSED] drm_test_cmdline_force_e_only
[09:48:52] [PASSED] drm_test_cmdline_res
[09:48:52] [PASSED] drm_test_cmdline_res_vesa
[09:48:52] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:48:52] [PASSED] drm_test_cmdline_res_rblank
[09:48:52] [PASSED] drm_test_cmdline_res_bpp
[09:48:52] [PASSED] drm_test_cmdline_res_refresh
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:48:52] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:48:52] [PASSED] drm_test_cmdline_res_margins_force_on
[09:48:52] [PASSED] drm_test_cmdline_res_vesa_margins
[09:48:52] [PASSED] drm_test_cmdline_name
[09:48:52] [PASSED] drm_test_cmdline_name_bpp
[09:48:52] [PASSED] drm_test_cmdline_name_option
[09:48:52] [PASSED] drm_test_cmdline_name_bpp_option
[09:48:52] [PASSED] drm_test_cmdline_rotate_0
[09:48:52] [PASSED] drm_test_cmdline_rotate_90
[09:48:52] [PASSED] drm_test_cmdline_rotate_180
[09:48:52] [PASSED] drm_test_cmdline_rotate_270
[09:48:52] [PASSED] drm_test_cmdline_hmirror
[09:48:52] [PASSED] drm_test_cmdline_vmirror
[09:48:52] [PASSED] drm_test_cmdline_margin_options
[09:48:52] [PASSED] drm_test_cmdline_multiple_options
[09:48:52] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:48:52] [PASSED] drm_test_cmdline_extra_and_option
[09:48:52] [PASSED] drm_test_cmdline_freestanding_options
[09:48:52] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:48:52] [PASSED] drm_test_cmdline_panel_orientation
[09:48:52] ================ drm_test_cmdline_invalid =================
[09:48:52] [PASSED] margin_only
[09:48:52] [PASSED] interlace_only
[09:48:52] [PASSED] res_missing_x
[09:48:52] [PASSED] res_missing_y
[09:48:52] [PASSED] res_bad_y
[09:48:52] [PASSED] res_missing_y_bpp
[09:48:52] [PASSED] res_bad_bpp
[09:48:52] [PASSED] res_bad_refresh
[09:48:52] [PASSED] res_bpp_refresh_force_on_off
[09:48:52] [PASSED] res_invalid_mode
[09:48:52] [PASSED] res_bpp_wrong_place_mode
[09:48:52] [PASSED] name_bpp_refresh
[09:48:52] [PASSED] name_refresh
[09:48:52] [PASSED] name_refresh_wrong_mode
[09:48:52] [PASSED] name_refresh_invalid_mode
[09:48:52] [PASSED] rotate_multiple
[09:48:52] [PASSED] rotate_invalid_val
[09:48:52] [PASSED] rotate_truncated
[09:48:52] [PASSED] invalid_option
[09:48:52] [PASSED] invalid_tv_option
[09:48:52] [PASSED] truncated_tv_option
[09:48:52] ============ [PASSED] drm_test_cmdline_invalid =============
[09:48:52] =============== drm_test_cmdline_tv_options ===============
[09:48:52] [PASSED] NTSC
[09:48:52] [PASSED] NTSC_443
[09:48:52] [PASSED] NTSC_J
[09:48:52] [PASSED] PAL
[09:48:52] [PASSED] PAL_M
[09:48:52] [PASSED] PAL_N
[09:48:52] [PASSED] SECAM
[09:48:52] [PASSED] MONO_525
[09:48:52] [PASSED] MONO_625
[09:48:52] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:48:52] =============== [PASSED] drm_cmdline_parser ================
[09:48:52] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:48:52] [PASSED] drm_test_connector_hdmi_init_valid
[09:48:52] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:48:52] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:48:52] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:48:52] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:48:52] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:48:52] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:48:52] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:48:52] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:48:52] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:48:52] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:48:52] [PASSED] supported_formats=0x3 yuv420_allowed=1
[09:48:52] [PASSED] supported_formats=0x3 yuv420_allowed=0
[09:48:52] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:48:52] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:48:52] [PASSED] drm_test_connector_hdmi_init_null_product
[09:48:52] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:48:52] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:48:52] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:48:52] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:48:52] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:48:52] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:48:52] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:48:52] ========= drm_test_connector_hdmi_init_type_valid =========
[09:48:52] [PASSED] HDMI-A
[09:48:52] [PASSED] HDMI-B
[09:48:52] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:48:52] ======== drm_test_connector_hdmi_init_type_invalid ========
[09:48:52] [PASSED] Unknown
[09:48:52] [PASSED] VGA
[09:48:52] [PASSED] DVI-I
[09:48:52] [PASSED] DVI-D
[09:48:52] [PASSED] DVI-A
[09:48:52] [PASSED] Composite
[09:48:52] [PASSED] SVIDEO
[09:48:52] [PASSED] LVDS
[09:48:52] [PASSED] Component
[09:48:52] [PASSED] DIN
[09:48:52] [PASSED] DP
[09:48:52] [PASSED] TV
[09:48:52] [PASSED] eDP
[09:48:52] [PASSED] Virtual
[09:48:52] [PASSED] DSI
[09:48:52] [PASSED] DPI
[09:48:52] [PASSED] Writeback
[09:48:52] [PASSED] SPI
[09:48:52] [PASSED] USB
[09:48:52] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:48:52] ============ [PASSED] drmm_connector_hdmi_init =============
[09:48:52] ============= drmm_connector_init (3 subtests) =============
[09:48:52] [PASSED] drm_test_drmm_connector_init
[09:48:52] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:48:52] ========= drm_test_drmm_connector_init_type_valid =========
[09:48:52] [PASSED] Unknown
[09:48:52] [PASSED] VGA
[09:48:52] [PASSED] DVI-I
[09:48:52] [PASSED] DVI-D
[09:48:52] [PASSED] DVI-A
[09:48:52] [PASSED] Composite
[09:48:52] [PASSED] SVIDEO
[09:48:52] [PASSED] LVDS
[09:48:52] [PASSED] Component
[09:48:52] [PASSED] DIN
[09:48:52] [PASSED] DP
[09:48:52] [PASSED] HDMI-A
[09:48:52] [PASSED] HDMI-B
[09:48:52] [PASSED] TV
[09:48:52] [PASSED] eDP
[09:48:52] [PASSED] Virtual
[09:48:52] [PASSED] DSI
[09:48:52] [PASSED] DPI
[09:48:52] [PASSED] Writeback
[09:48:52] [PASSED] SPI
[09:48:52] [PASSED] USB
[09:48:52] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:48:52] =============== [PASSED] drmm_connector_init ===============
[09:48:52] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_init
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:48:52] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[09:48:52] [PASSED] Unknown
[09:48:52] [PASSED] VGA
[09:48:52] [PASSED] DVI-I
[09:48:52] [PASSED] DVI-D
[09:48:52] [PASSED] DVI-A
[09:48:52] [PASSED] Composite
[09:48:52] [PASSED] SVIDEO
[09:48:52] [PASSED] LVDS
[09:48:52] [PASSED] Component
[09:48:52] [PASSED] DIN
[09:48:52] [PASSED] DP
[09:48:52] [PASSED] HDMI-A
[09:48:52] [PASSED] HDMI-B
[09:48:52] [PASSED] TV
[09:48:52] [PASSED] eDP
[09:48:52] [PASSED] Virtual
[09:48:52] [PASSED] DSI
[09:48:52] [PASSED] DPI
[09:48:52] [PASSED] Writeback
[09:48:52] [PASSED] SPI
[09:48:52] [PASSED] USB
[09:48:52] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:48:52] ======== drm_test_drm_connector_dynamic_init_name =========
[09:48:52] [PASSED] Unknown
[09:48:52] [PASSED] VGA
[09:48:52] [PASSED] DVI-I
[09:48:52] [PASSED] DVI-D
[09:48:52] [PASSED] DVI-A
[09:48:52] [PASSED] Composite
[09:48:52] [PASSED] SVIDEO
[09:48:52] [PASSED] LVDS
[09:48:52] [PASSED] Component
[09:48:52] [PASSED] DIN
[09:48:52] [PASSED] DP
[09:48:52] [PASSED] HDMI-A
[09:48:52] [PASSED] HDMI-B
[09:48:52] [PASSED] TV
[09:48:52] [PASSED] eDP
[09:48:52] [PASSED] Virtual
[09:48:52] [PASSED] DSI
[09:48:52] [PASSED] DPI
[09:48:52] [PASSED] Writeback
[09:48:52] [PASSED] SPI
[09:48:52] [PASSED] USB
[09:48:52] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:48:52] =========== [PASSED] drm_connector_dynamic_init ============
[09:48:52] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:48:52] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:48:52] ======= drm_connector_dynamic_register (7 subtests) ========
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:48:52] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:48:52] ========= [PASSED] drm_connector_dynamic_register ==========
[09:48:52] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:48:52] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:48:52] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:48:52] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:48:52] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:48:52] ========== drm_test_get_tv_mode_from_name_valid ===========
[09:48:52] [PASSED] NTSC
[09:48:52] [PASSED] NTSC-443
[09:48:52] [PASSED] NTSC-J
[09:48:52] [PASSED] PAL
[09:48:52] [PASSED] PAL-M
[09:48:52] [PASSED] PAL-N
[09:48:52] [PASSED] SECAM
[09:48:52] [PASSED] Mono
[09:48:52] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:48:52] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:48:52] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:48:52] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:48:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:48:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:48:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:48:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:48:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:48:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:48:52] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[09:48:52] [PASSED] VIC 96
[09:48:52] [PASSED] VIC 97
[09:48:52] [PASSED] VIC 101
[09:48:52] [PASSED] VIC 102
[09:48:52] [PASSED] VIC 106
[09:48:52] [PASSED] VIC 107
[09:48:52] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:48:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:48:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:48:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:48:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:48:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:48:52] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:48:52] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:48:52] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[09:48:52] [PASSED] Automatic
[09:48:52] [PASSED] Full
[09:48:52] [PASSED] Limited 16:235
[09:48:52] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:48:52] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:48:52] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:48:52] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:48:52] === drm_test_drm_hdmi_connector_get_output_format_name ====
[09:48:52] [PASSED] RGB
[09:48:52] [PASSED] YUV 4:2:0
[09:48:52] [PASSED] YUV 4:2:2
[09:48:52] [PASSED] YUV 4:4:4
[09:48:52] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:48:52] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:48:52] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:48:52] ============= drm_damage_helper (21 subtests) ==============
[09:48:52] [PASSED] drm_test_damage_iter_no_damage
[09:48:52] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:48:52] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:48:52] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:48:52] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:48:52] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:48:52] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:48:52] [PASSED] drm_test_damage_iter_simple_damage
[09:48:52] [PASSED] drm_test_damage_iter_single_damage
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:48:52] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:48:52] [PASSED] drm_test_damage_iter_damage
[09:48:52] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:48:52] [PASSED] drm_test_damage_iter_damage_one_outside
[09:48:52] [PASSED] drm_test_damage_iter_damage_src_moved
[09:48:52] [PASSED] drm_test_damage_iter_damage_not_visible
[09:48:52] ================ [PASSED] drm_damage_helper ================
[09:48:52] ============== drm_dp_mst_helper (3 subtests) ==============
[09:48:52] ============== drm_test_dp_mst_calc_pbn_mode ==============
[09:48:52] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:48:52] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:48:52] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:48:52] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:48:52] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:48:52] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:48:52] ============== drm_test_dp_mst_calc_pbn_div ===============
[09:48:52] [PASSED] Link rate 2000000 lane count 4
[09:48:52] [PASSED] Link rate 2000000 lane count 2
[09:48:52] [PASSED] Link rate 2000000 lane count 1
[09:48:52] [PASSED] Link rate 1350000 lane count 4
[09:48:52] [PASSED] Link rate 1350000 lane count 2
[09:48:52] [PASSED] Link rate 1350000 lane count 1
[09:48:52] [PASSED] Link rate 1000000 lane count 4
[09:48:52] [PASSED] Link rate 1000000 lane count 2
[09:48:52] [PASSED] Link rate 1000000 lane count 1
[09:48:52] [PASSED] Link rate 810000 lane count 4
[09:48:52] [PASSED] Link rate 810000 lane count 2
[09:48:52] [PASSED] Link rate 810000 lane count 1
[09:48:52] [PASSED] Link rate 540000 lane count 4
[09:48:52] [PASSED] Link rate 540000 lane count 2
[09:48:52] [PASSED] Link rate 540000 lane count 1
[09:48:52] [PASSED] Link rate 270000 lane count 4
[09:48:52] [PASSED] Link rate 270000 lane count 2
[09:48:52] [PASSED] Link rate 270000 lane count 1
[09:48:52] [PASSED] Link rate 162000 lane count 4
[09:48:52] [PASSED] Link rate 162000 lane count 2
[09:48:52] [PASSED] Link rate 162000 lane count 1
[09:48:52] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:48:52] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[09:48:52] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:48:52] [PASSED] DP_POWER_UP_PHY with port number
[09:48:52] [PASSED] DP_POWER_DOWN_PHY with port number
[09:48:52] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:48:52] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:48:52] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:48:52] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:48:52] [PASSED] DP_QUERY_PAYLOAD with port number
[09:48:52] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:48:52] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:48:52] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:48:52] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:48:52] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:48:52] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:48:52] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:48:52] [PASSED] DP_REMOTE_I2C_READ with port number
[09:48:52] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:48:52] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:48:52] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:48:52] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:48:52] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:48:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:48:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:48:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:48:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:48:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:48:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:48:52] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:48:52] ================ [PASSED] drm_dp_mst_helper ================
[09:48:52] ================== drm_exec (7 subtests) ===================
[09:48:52] [PASSED] sanitycheck
[09:48:52] [PASSED] test_lock
[09:48:52] [PASSED] test_lock_unlock
[09:48:52] [PASSED] test_duplicates
[09:48:52] [PASSED] test_prepare
[09:48:52] [PASSED] test_prepare_array
[09:48:52] [PASSED] test_multiple_loops
[09:48:52] ==================== [PASSED] drm_exec =====================
[09:48:52] =========== drm_format_helper_test (17 subtests) ===========
[09:48:52] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:48:52] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:48:52] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:48:52] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:48:52] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:48:52] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:48:52] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:48:52] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:48:52] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:48:52] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:48:52] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:48:52] ============== drm_test_fb_xrgb8888_to_mono ===============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:48:52] ==================== drm_test_fb_swab =====================
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ================ [PASSED] drm_test_fb_swab =================
[09:48:52] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:48:52] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[09:48:52] [PASSED] single_pixel_source_buffer
[09:48:52] [PASSED] single_pixel_clip_rectangle
[09:48:52] [PASSED] well_known_colors
[09:48:52] [PASSED] destination_pitch
[09:48:52] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:48:52] ================= drm_test_fb_clip_offset =================
[09:48:52] [PASSED] pass through
[09:48:52] [PASSED] horizontal offset
[09:48:52] [PASSED] vertical offset
[09:48:52] [PASSED] horizontal and vertical offset
[09:48:52] [PASSED] horizontal offset (custom pitch)
[09:48:52] [PASSED] vertical offset (custom pitch)
[09:48:52] [PASSED] horizontal and vertical offset (custom pitch)
[09:48:52] ============= [PASSED] drm_test_fb_clip_offset =============
[09:48:52] =================== drm_test_fb_memcpy ====================
[09:48:52] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:48:52] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:48:52] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:48:52] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:48:52] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:48:52] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:48:52] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:48:52] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:48:52] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:48:52] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:48:52] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:48:52] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:48:52] =============== [PASSED] drm_test_fb_memcpy ================
[09:48:52] ============= [PASSED] drm_format_helper_test ==============
[09:48:52] ================= drm_format (18 subtests) =================
[09:48:52] [PASSED] drm_test_format_block_width_invalid
[09:48:52] [PASSED] drm_test_format_block_width_one_plane
[09:48:52] [PASSED] drm_test_format_block_width_two_plane
[09:48:52] [PASSED] drm_test_format_block_width_three_plane
[09:48:52] [PASSED] drm_test_format_block_width_tiled
[09:48:52] [PASSED] drm_test_format_block_height_invalid
[09:48:52] [PASSED] drm_test_format_block_height_one_plane
[09:48:52] [PASSED] drm_test_format_block_height_two_plane
[09:48:52] [PASSED] drm_test_format_block_height_three_plane
[09:48:52] [PASSED] drm_test_format_block_height_tiled
[09:48:52] [PASSED] drm_test_format_min_pitch_invalid
[09:48:52] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:48:52] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:48:52] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:48:52] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:48:52] [PASSED] drm_test_format_min_pitch_two_plane
[09:48:52] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:48:52] [PASSED] drm_test_format_min_pitch_tiled
[09:48:52] =================== [PASSED] drm_format ====================
[09:48:52] ============== drm_framebuffer (10 subtests) ===============
[09:48:52] ========== drm_test_framebuffer_check_src_coords ==========
[09:48:52] [PASSED] Success: source fits into fb
[09:48:52] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:48:52] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:48:52] [PASSED] Fail: overflowing fb with source width
[09:48:52] [PASSED] Fail: overflowing fb with source height
[09:48:52] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:48:52] [PASSED] drm_test_framebuffer_cleanup
[09:48:52] =============== drm_test_framebuffer_create ===============
[09:48:52] [PASSED] ABGR8888 normal sizes
[09:48:52] [PASSED] ABGR8888 max sizes
[09:48:52] [PASSED] ABGR8888 pitch greater than min required
[09:48:52] [PASSED] ABGR8888 pitch less than min required
[09:48:52] [PASSED] ABGR8888 Invalid width
[09:48:52] [PASSED] ABGR8888 Invalid buffer handle
[09:48:52] [PASSED] No pixel format
[09:48:52] [PASSED] ABGR8888 Width 0
[09:48:52] [PASSED] ABGR8888 Height 0
[09:48:52] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:48:52] [PASSED] ABGR8888 Large buffer offset
[09:48:52] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:48:52] [PASSED] ABGR8888 Invalid flag
[09:48:52] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:48:52] [PASSED] ABGR8888 Valid buffer modifier
[09:48:52] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:48:52] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] NV12 Normal sizes
[09:48:52] [PASSED] NV12 Max sizes
[09:48:52] [PASSED] NV12 Invalid pitch
[09:48:52] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:48:52] [PASSED] NV12 different modifier per-plane
[09:48:52] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:48:52] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] NV12 Modifier for inexistent plane
[09:48:52] [PASSED] NV12 Handle for inexistent plane
[09:48:52] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:48:52] [PASSED] YVU420 Normal sizes
[09:48:52] [PASSED] YVU420 Max sizes
[09:48:52] [PASSED] YVU420 Invalid pitch
[09:48:52] [PASSED] YVU420 Different pitches
[09:48:52] [PASSED] YVU420 Different buffer offsets/pitches
[09:48:52] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:48:52] [PASSED] YVU420 Valid modifier
[09:48:52] [PASSED] YVU420 Different modifiers per plane
[09:48:52] [PASSED] YVU420 Modifier for inexistent plane
[09:48:52] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:48:52] [PASSED] X0L2 Normal sizes
[09:48:52] [PASSED] X0L2 Max sizes
[09:48:52] [PASSED] X0L2 Invalid pitch
[09:48:52] [PASSED] X0L2 Pitch greater than minimum required
[09:48:52] [PASSED] X0L2 Handle for inexistent plane
[09:48:52] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:48:52] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:48:52] [PASSED] X0L2 Valid modifier
[09:48:52] [PASSED] X0L2 Modifier for inexistent plane
[09:48:52] =========== [PASSED] drm_test_framebuffer_create ===========
[09:48:52] [PASSED] drm_test_framebuffer_free
[09:48:52] [PASSED] drm_test_framebuffer_init
[09:48:52] [PASSED] drm_test_framebuffer_init_bad_format
[09:48:52] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:48:52] [PASSED] drm_test_framebuffer_lookup
[09:48:52] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:48:52] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:48:52] ================= [PASSED] drm_framebuffer =================
[09:48:52] ================ drm_gem_shmem (8 subtests) ================
[09:48:52] [PASSED] drm_gem_shmem_test_obj_create
[09:48:52] [PASSED] drm_gem_shmem_test_obj_create_private
[09:48:52] [PASSED] drm_gem_shmem_test_pin_pages
[09:48:52] [PASSED] drm_gem_shmem_test_vmap
[09:48:52] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:48:52] [PASSED] drm_gem_shmem_test_get_sg_table
[09:48:52] [PASSED] drm_gem_shmem_test_madvise
[09:48:52] [PASSED] drm_gem_shmem_test_purge
[09:48:52] ================== [PASSED] drm_gem_shmem ==================
[09:48:52] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:48:52] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[09:48:52] [PASSED] Automatic
[09:48:52] [PASSED] Full
[09:48:52] [PASSED] Limited 16:235
[09:48:52] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:48:52] [PASSED] drm_test_check_disable_connector
[09:48:52] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:48:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:48:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:48:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:48:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:48:52] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:48:52] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:48:52] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:48:52] [PASSED] drm_test_check_output_bpc_dvi
[09:48:52] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:48:52] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:48:52] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:48:52] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:48:52] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:48:52] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:48:52] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:48:52] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:48:52] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:48:52] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:48:52] [PASSED] drm_test_check_broadcast_rgb_value
[09:48:52] [PASSED] drm_test_check_bpc_8_value
[09:48:52] [PASSED] drm_test_check_bpc_10_value
[09:48:52] [PASSED] drm_test_check_bpc_12_value
[09:48:52] [PASSED] drm_test_check_format_value
[09:48:52] [PASSED] drm_test_check_tmds_char_value
[09:48:52] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:48:52] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[09:48:52] [PASSED] drm_test_check_mode_valid
[09:48:52] [PASSED] drm_test_check_mode_valid_reject
[09:48:52] [PASSED] drm_test_check_mode_valid_reject_rate
[09:48:52] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:48:52] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:48:52] ================= drm_managed (2 subtests) =================
[09:48:52] [PASSED] drm_test_managed_release_action
[09:48:52] [PASSED] drm_test_managed_run_action
[09:48:52] =================== [PASSED] drm_managed ===================
[09:48:52] =================== drm_mm (6 subtests) ====================
[09:48:52] [PASSED] drm_test_mm_init
[09:48:52] [PASSED] drm_test_mm_debug
[09:48:52] [PASSED] drm_test_mm_align32
[09:48:52] [PASSED] drm_test_mm_align64
[09:48:52] [PASSED] drm_test_mm_lowest
[09:48:52] [PASSED] drm_test_mm_highest
[09:48:52] ===================== [PASSED] drm_mm ======================
[09:48:52] ============= drm_modes_analog_tv (5 subtests) =============
[09:48:52] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:48:52] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:48:52] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:48:52] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:48:52] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:48:52] =============== [PASSED] drm_modes_analog_tv ===============
[09:48:52] ============== drm_plane_helper (2 subtests) ===============
[09:48:52] =============== drm_test_check_plane_state ================
[09:48:52] [PASSED] clipping_simple
[09:48:52] [PASSED] clipping_rotate_reflect
[09:48:52] [PASSED] positioning_simple
[09:48:52] [PASSED] upscaling
[09:48:52] [PASSED] downscaling
[09:48:52] [PASSED] rounding1
[09:48:52] [PASSED] rounding2
[09:48:52] [PASSED] rounding3
[09:48:52] [PASSED] rounding4
[09:48:52] =========== [PASSED] drm_test_check_plane_state ============
[09:48:52] =========== drm_test_check_invalid_plane_state ============
[09:48:52] [PASSED] positioning_invalid
[09:48:52] [PASSED] upscaling_invalid
[09:48:52] [PASSED] downscaling_invalid
[09:48:52] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:48:52] ================ [PASSED] drm_plane_helper =================
[09:48:52] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:48:52] ====== drm_test_connector_helper_tv_get_modes_check =======
[09:48:52] [PASSED] None
[09:48:52] [PASSED] PAL
[09:48:52] [PASSED] NTSC
[09:48:52] [PASSED] Both, NTSC Default
[09:48:52] [PASSED] Both, PAL Default
[09:48:52] [PASSED] Both, NTSC Default, with PAL on command-line
[09:48:52] [PASSED] Both, PAL Default, with NTSC on command-line
[09:48:52] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:48:52] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:48:52] ================== drm_rect (9 subtests) ===================
[09:48:52] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:48:52] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:48:52] [PASSED] drm_test_rect_clip_scaled_clipped
[09:48:52] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:48:52] ================= drm_test_rect_intersect =================
[09:48:52] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:48:52] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:48:52] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:48:52] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:48:52] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:48:52] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:48:52] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:48:52] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:48:52] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:48:52] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:48:52] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:48:52] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:48:52] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:48:52] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:48:52] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:48:52] ============= [PASSED] drm_test_rect_intersect =============
[09:48:52] ================ drm_test_rect_calc_hscale ================
[09:48:52] [PASSED] normal use
[09:48:52] [PASSED] out of max range
[09:48:52] [PASSED] out of min range
[09:48:52] [PASSED] zero dst
[09:48:52] [PASSED] negative src
[09:48:52] [PASSED] negative dst
[09:48:52] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:48:52] ================ drm_test_rect_calc_vscale ================
[09:48:52] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[09:48:52] [PASSED] out of max range
[09:48:52] [PASSED] out of min range
[09:48:52] [PASSED] zero dst
[09:48:52] [PASSED] negative src
[09:48:52] [PASSED] negative dst
[09:48:52] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:48:52] ================== drm_test_rect_rotate ===================
[09:48:52] [PASSED] reflect-x
[09:48:52] [PASSED] reflect-y
[09:48:52] [PASSED] rotate-0
[09:48:52] [PASSED] rotate-90
[09:48:52] [PASSED] rotate-180
[09:48:52] [PASSED] rotate-270
[09:48:52] ============== [PASSED] drm_test_rect_rotate ===============
[09:48:52] ================ drm_test_rect_rotate_inv =================
[09:48:52] [PASSED] reflect-x
[09:48:52] [PASSED] reflect-y
[09:48:52] [PASSED] rotate-0
[09:48:52] [PASSED] rotate-90
[09:48:52] [PASSED] rotate-180
[09:48:52] [PASSED] rotate-270
[09:48:52] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:48:52] ==================== [PASSED] drm_rect =====================
[09:48:52] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:48:52] ============ drm_test_sysfb_build_fourcc_list =============
[09:48:52] [PASSED] no native formats
[09:48:52] [PASSED] XRGB8888 as native format
[09:48:52] [PASSED] remove duplicates
[09:48:52] [PASSED] convert alpha formats
[09:48:52] [PASSED] random formats
[09:48:52] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:48:52] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:48:52] ============================================================
[09:48:52] Testing complete. Ran 622 tests: passed: 622
[09:48:52] Elapsed time: 26.906s total, 1.711s configuring, 24.774s building, 0.390s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:48:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:48:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:49:03] Starting KUnit Kernel (1/1)...
[09:49:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:49:03] ================= ttm_device (5 subtests) ==================
[09:49:03] [PASSED] ttm_device_init_basic
[09:49:03] [PASSED] ttm_device_init_multiple
[09:49:03] [PASSED] ttm_device_fini_basic
[09:49:03] [PASSED] ttm_device_init_no_vma_man
[09:49:03] ================== ttm_device_init_pools ==================
[09:49:03] [PASSED] No DMA allocations, no DMA32 required
[09:49:03] [PASSED] DMA allocations, DMA32 required
[09:49:03] [PASSED] No DMA allocations, DMA32 required
[09:49:03] [PASSED] DMA allocations, no DMA32 required
[09:49:03] ============== [PASSED] ttm_device_init_pools ==============
[09:49:03] =================== [PASSED] ttm_device ====================
[09:49:03] ================== ttm_pool (8 subtests) ===================
[09:49:03] ================== ttm_pool_alloc_basic ===================
[09:49:03] [PASSED] One page
[09:49:03] [PASSED] More than one page
[09:49:03] [PASSED] Above the allocation limit
[09:49:03] [PASSED] One page, with coherent DMA mappings enabled
[09:49:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:49:03] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:49:03] ============== ttm_pool_alloc_basic_dma_addr ==============
[09:49:03] [PASSED] One page
[09:49:03] [PASSED] More than one page
[09:49:03] [PASSED] Above the allocation limit
[09:49:03] [PASSED] One page, with coherent DMA mappings enabled
[09:49:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:49:03] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:49:03] [PASSED] ttm_pool_alloc_order_caching_match
[09:49:03] [PASSED] ttm_pool_alloc_caching_mismatch
[09:49:03] [PASSED] ttm_pool_alloc_order_mismatch
[09:49:03] [PASSED] ttm_pool_free_dma_alloc
[09:49:03] [PASSED] ttm_pool_free_no_dma_alloc
[09:49:03] [PASSED] ttm_pool_fini_basic
[09:49:03] ==================== [PASSED] ttm_pool =====================
[09:49:03] ================ ttm_resource (8 subtests) =================
[09:49:03] ================= ttm_resource_init_basic =================
[09:49:03] [PASSED] Init resource in TTM_PL_SYSTEM
[09:49:03] [PASSED] Init resource in TTM_PL_VRAM
[09:49:03] [PASSED] Init resource in a private placement
[09:49:03] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:49:03] ============= [PASSED] ttm_resource_init_basic =============
[09:49:03] [PASSED] ttm_resource_init_pinned
[09:49:03] [PASSED] ttm_resource_fini_basic
[09:49:03] [PASSED] ttm_resource_manager_init_basic
[09:49:03] [PASSED] ttm_resource_manager_usage_basic
[09:49:03] [PASSED] ttm_resource_manager_set_used_basic
[09:49:03] [PASSED] ttm_sys_man_alloc_basic
[09:49:03] [PASSED] ttm_sys_man_free_basic
[09:49:03] ================== [PASSED] ttm_resource ===================
[09:49:03] =================== ttm_tt (15 subtests) ===================
[09:49:03] ==================== ttm_tt_init_basic ====================
[09:49:03] [PASSED] Page-aligned size
[09:49:03] [PASSED] Extra pages requested
[09:49:03] ================ [PASSED] ttm_tt_init_basic ================
[09:49:03] [PASSED] ttm_tt_init_misaligned
[09:49:03] [PASSED] ttm_tt_fini_basic
[09:49:03] [PASSED] ttm_tt_fini_sg
[09:49:03] [PASSED] ttm_tt_fini_shmem
[09:49:03] [PASSED] ttm_tt_create_basic
[09:49:03] [PASSED] ttm_tt_create_invalid_bo_type
[09:49:03] [PASSED] ttm_tt_create_ttm_exists
[09:49:03] [PASSED] ttm_tt_create_failed
[09:49:03] [PASSED] ttm_tt_destroy_basic
[09:49:03] [PASSED] ttm_tt_populate_null_ttm
[09:49:03] [PASSED] ttm_tt_populate_populated_ttm
[09:49:03] [PASSED] ttm_tt_unpopulate_basic
[09:49:03] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:49:03] [PASSED] ttm_tt_swapin_basic
[09:49:03] ===================== [PASSED] ttm_tt ======================
[09:49:03] =================== ttm_bo (14 subtests) ===================
[09:49:03] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[09:49:03] [PASSED] Cannot be interrupted and sleeps
[09:49:03] [PASSED] Cannot be interrupted, locks straight away
[09:49:03] [PASSED] Can be interrupted, sleeps
[09:49:03] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:49:03] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:49:03] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:49:03] [PASSED] ttm_bo_reserve_double_resv
[09:49:03] [PASSED] ttm_bo_reserve_interrupted
[09:49:03] [PASSED] ttm_bo_reserve_deadlock
[09:49:03] [PASSED] ttm_bo_unreserve_basic
[09:49:03] [PASSED] ttm_bo_unreserve_pinned
[09:49:03] [PASSED] ttm_bo_unreserve_bulk
[09:49:03] [PASSED] ttm_bo_fini_basic
[09:49:03] [PASSED] ttm_bo_fini_shared_resv
[09:49:03] [PASSED] ttm_bo_pin_basic
[09:49:03] [PASSED] ttm_bo_pin_unpin_resource
[09:49:03] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:49:03] ===================== [PASSED] ttm_bo ======================
[09:49:03] ============== ttm_bo_validate (21 subtests) ===============
[09:49:03] ============== ttm_bo_init_reserved_sys_man ===============
[09:49:03] [PASSED] Buffer object for userspace
[09:49:03] [PASSED] Kernel buffer object
[09:49:03] [PASSED] Shared buffer object
[09:49:03] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:49:03] ============== ttm_bo_init_reserved_mock_man ==============
[09:49:03] [PASSED] Buffer object for userspace
[09:49:03] [PASSED] Kernel buffer object
[09:49:03] [PASSED] Shared buffer object
[09:49:03] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:49:03] [PASSED] ttm_bo_init_reserved_resv
[09:49:03] ================== ttm_bo_validate_basic ==================
[09:49:03] [PASSED] Buffer object for userspace
[09:49:03] [PASSED] Kernel buffer object
[09:49:03] [PASSED] Shared buffer object
[09:49:03] ============== [PASSED] ttm_bo_validate_basic ==============
[09:49:03] [PASSED] ttm_bo_validate_invalid_placement
[09:49:03] ============= ttm_bo_validate_same_placement ==============
[09:49:03] [PASSED] System manager
[09:49:03] [PASSED] VRAM manager
[09:49:03] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:49:03] [PASSED] ttm_bo_validate_failed_alloc
[09:49:03] [PASSED] ttm_bo_validate_pinned
[09:49:03] [PASSED] ttm_bo_validate_busy_placement
[09:49:03] ================ ttm_bo_validate_multihop =================
[09:49:03] [PASSED] Buffer object for userspace
[09:49:03] [PASSED] Kernel buffer object
[09:49:03] [PASSED] Shared buffer object
[09:49:03] ============ [PASSED] ttm_bo_validate_multihop =============
[09:49:03] ========== ttm_bo_validate_no_placement_signaled ==========
[09:49:03] [PASSED] Buffer object in system domain, no page vector
[09:49:03] [PASSED] Buffer object in system domain with an existing page vector
[09:49:03] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:49:03] ======== ttm_bo_validate_no_placement_not_signaled ========
[09:49:03] [PASSED] Buffer object for userspace
[09:49:03] [PASSED] Kernel buffer object
[09:49:03] [PASSED] Shared buffer object
[09:49:03] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:49:03] [PASSED] ttm_bo_validate_move_fence_signaled
[09:49:03] ========= ttm_bo_validate_move_fence_not_signaled =========
[09:49:03] [PASSED] Waits for GPU
[09:49:03] [PASSED] Tries to lock straight away
[09:49:03] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:49:03] [PASSED] ttm_bo_validate_happy_evict
[09:49:03] [PASSED] ttm_bo_validate_all_pinned_evict
[09:49:03] [PASSED] ttm_bo_validate_allowed_only_evict
[09:49:03] [PASSED] ttm_bo_validate_deleted_evict
[09:49:03] [PASSED] ttm_bo_validate_busy_domain_evict
[09:49:03] [PASSED] ttm_bo_validate_evict_gutting
[09:49:03] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[09:49:03] ================= [PASSED] ttm_bo_validate =================
[09:49:03] ============================================================
[09:49:03] Testing complete. Ran 101 tests: passed: 101
[09:49:03] Elapsed time: 11.472s total, 1.717s configuring, 9.539s building, 0.189s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Make all xe_ggtt structs private. (rev2)
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (13 preceding siblings ...)
2025-10-15 9:49 ` ✓ CI.KUnit: success " Patchwork
@ 2025-10-15 11:03 ` Patchwork
2025-10-15 19:55 ` ✗ Xe.CI.Full: failure " Patchwork
15 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2025-10-15 11:03 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 871 bytes --]
== Series Details ==
Series: drm/xe: Make all xe_ggtt structs private. (rev2)
URL : https://patchwork.freedesktop.org/series/155941/
State : success
== Summary ==
CI Bug Log - changes from xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10_BAT -> xe-pw-155941v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10 -> xe-pw-155941v2
IGT_8585: 8585
xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10: 5338aee4a6d5ef0d735cabbb3cd939ec10d0da10
xe-pw-155941v2: 155941v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/index.html
[-- Attachment #2: Type: text/html, Size: 1419 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* ✗ Xe.CI.Full: failure for drm/xe: Make all xe_ggtt structs private. (rev2)
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
` (14 preceding siblings ...)
2025-10-15 11:03 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-10-15 19:55 ` Patchwork
15 siblings, 0 replies; 34+ messages in thread
From: Patchwork @ 2025-10-15 19:55 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 70573 bytes --]
== Series Details ==
Series: drm/xe: Make all xe_ggtt structs private. (rev2)
URL : https://patchwork.freedesktop.org/series/155941/
State : failure
== Summary ==
CI Bug Log - changes from xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10_FULL -> xe-pw-155941v2_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-155941v2_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-155941v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-155941v2_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-edp-1:
- shard-lnl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-lnl-3/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-edp-1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-lnl-4/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-edp-1.html
* igt@xe_compute_preempt@compute-preempt-many-all-ram:
- shard-adlp: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_compute_preempt@compute-preempt-many-all-ram.html
* igt@xe_pmu@engine-activity-all-load-idle:
- shard-bmg: NOTRUN -> [ABORT][4]
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_pmu@engine-activity-all-load-idle.html
* igt@xe_pmu@engine-activity-most-load-idle:
- shard-adlp: [PASS][5] -> [ABORT][6] +6 other tests abort
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-2/igt@xe_pmu@engine-activity-most-load-idle.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_pmu@engine-activity-most-load-idle.html
* igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_enhance0:
- shard-adlp: NOTRUN -> [ABORT][7] +3 other tests abort
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_pmu@engine-activity-most-load@engine-drm_xe_engine_class_video_enhance0.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
- shard-bmg: [PASS][8] -> [ABORT][9] +23 other tests abort
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-2/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
#### Warnings ####
* igt@xe_sriov_scheduling@equal-throughput:
- shard-adlp: [DMESG-FAIL][10] ([Intel XE#3868] / [Intel XE#5213]) -> [ABORT][11] +1 other test abort
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-9/igt@xe_sriov_scheduling@equal-throughput.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_sriov_scheduling@equal-throughput.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
- shard-adlp: [ABORT][12] ([Intel XE#4917] / [Intel XE#5545]) -> [ABORT][13] +1 other test abort
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-9/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_configfs@ctx-restore-post-bb}:
- shard-bmg: [PASS][14] -> [DMESG-WARN][15]
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@xe_configfs@ctx-restore-post-bb.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@xe_configfs@ctx-restore-post-bb.html
* {igt@xe_pmu@engine-activity-gt-reset}:
- shard-adlp: NOTRUN -> [ABORT][16]
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_pmu@engine-activity-gt-reset.html
* {igt@xe_pmu@engine-activity-multi-client@engine-drm_xe_engine_class_video_enhance1}:
- shard-bmg: [PASS][17] -> [ABORT][18] +12 other tests abort
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-2/igt@xe_pmu@engine-activity-multi-client@engine-drm_xe_engine_class_video_enhance1.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-7/igt@xe_pmu@engine-activity-multi-client@engine-drm_xe_engine_class_video_enhance1.html
* {igt@xe_pmu@engine-activity-render-node-idle}:
- shard-adlp: [PASS][19] -> [ABORT][20] +7 other tests abort
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-1/igt@xe_pmu@engine-activity-render-node-idle.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_pmu@engine-activity-render-node-idle.html
New tests
---------
New tests have been introduced between xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10_FULL and xe-pw-155941v2_FULL:
### New IGT tests (1) ###
* igt@xe_oa@buffer-size@oag-0-2m:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
Known issues
------------
Here are the changes found in xe-pw-155941v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip-atomic:
- shard-lnl: [PASS][21] -> [FAIL][22] ([Intel XE#3718])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-lnl-3/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-lnl-4/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-1-y:
- shard-adlp: NOTRUN -> [DMESG-WARN][23] ([Intel XE#4543]) +5 other tests dmesg-warn
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-1-y.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-adlp: NOTRUN -> [SKIP][24] ([Intel XE#619])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-adlp: NOTRUN -> [SKIP][25] ([Intel XE#1124]) +4 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-adlp: NOTRUN -> [SKIP][26] ([Intel XE#316]) +2 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2327]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#316])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-434/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-adlp: NOTRUN -> [DMESG-FAIL][29] ([Intel XE#4543]) +3 other tests dmesg-fail
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#1124]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-adlp: NOTRUN -> [SKIP][31] ([Intel XE#607])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#1124]) +2 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [PASS][33] -> [SKIP][34] ([Intel XE#2314] / [Intel XE#2894])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p:
- shard-adlp: NOTRUN -> [SKIP][35] ([Intel XE#2191]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][36] ([Intel XE#367]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-3-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#367])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-adlp: NOTRUN -> [SKIP][38] ([Intel XE#455] / [Intel XE#787]) +21 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][39] ([Intel XE#787]) +32 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2887]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-adlp: NOTRUN -> [SKIP][41] ([Intel XE#3442])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: [PASS][42] -> [INCOMPLETE][43] ([Intel XE#2705] / [Intel XE#4212])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][44] ([Intel XE#6168] / [i915#14968])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#787]) +34 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#455] / [Intel XE#787]) +9 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-dp-4.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#306]) +2 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#373]) +2 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-434/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
* igt@kms_chamelium_hpd@dp-hpd-storm-disable:
- shard-adlp: NOTRUN -> [SKIP][49] ([Intel XE#373]) +6 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-adlp: NOTRUN -> [SKIP][50] ([Intel XE#307])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@mei-interface:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2341])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@srm@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][52] ([Intel XE#1178]) +1 other test fail
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_content_protection@srm@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-offscreen-128x128:
- shard-bmg: [PASS][53] -> [SKIP][54] ([Intel XE#2320])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@kms_cursor_crc@cursor-offscreen-128x128.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-128x128.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][55] ([Intel XE#309]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
- shard-bmg: [PASS][56] -> [SKIP][57] ([Intel XE#2291]) +2 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [PASS][58] -> [SKIP][59] ([Intel XE#4354])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@kms_dp_link_training@non-uhbr-sst.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-adlp: NOTRUN -> [SKIP][60] ([Intel XE#4356]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-adlp: NOTRUN -> [SKIP][61] ([Intel XE#4331])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2244])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#776])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@display-2x:
- shard-adlp: NOTRUN -> [SKIP][64] ([Intel XE#702])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-adlp: NOTRUN -> [SKIP][65] ([Intel XE#310]) +5 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [PASS][66] -> [SKIP][67] ([Intel XE#2316]) +5 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@blocking-absolute-wf_vblank-interruptible:
- shard-adlp: [PASS][68] -> [DMESG-WARN][69] ([Intel XE#2953] / [Intel XE#4173])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-1/igt@kms_flip@blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@dpms-vs-vblank-race-interruptible@d-hdmi-a6:
- shard-dg2-set2: [PASS][70] -> [INCOMPLETE][71] ([Intel XE#2049] / [Intel XE#4842]) +1 other test incomplete
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-dg2-466/igt@kms_flip@dpms-vs-vblank-race-interruptible@d-hdmi-a6.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-434/igt@kms_flip@dpms-vs-vblank-race-interruptible@d-hdmi-a6.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [PASS][72] -> [FAIL][73] ([Intel XE#301] / [Intel XE#3149])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][74] -> [FAIL][75] ([Intel XE#301])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a3:
- shard-bmg: [PASS][76] -> [INCOMPLETE][77] ([Intel XE#2049] / [Intel XE#2597])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a3.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-1/igt@kms_flip@flip-vs-suspend-interruptible@c-hdmi-a3.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
- shard-bmg: NOTRUN -> [SKIP][78] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#2293]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-dg2-set2: NOTRUN -> [SKIP][80] ([Intel XE#651]) +2 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#5390]) +3 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][82] ([Intel XE#651]) +5 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#2311]) +4 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][84] ([Intel XE#1151])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][85] ([Intel XE#653]) +7 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#653]) +4 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
- shard-adlp: NOTRUN -> [SKIP][87] ([Intel XE#656]) +31 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#1158])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#2313]) +5 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-bmg: [PASS][90] -> [SKIP][91] ([Intel XE#1503])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@kms_hdr@invalid-metadata-sizes.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][92] ([Intel XE#3012])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-adlp: NOTRUN -> [SKIP][93] ([Intel XE#2925])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#2486])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#5021])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_dc@dc5-psr:
- shard-adlp: NOTRUN -> [SKIP][96] ([Intel XE#1129]) +1 other test skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-adlp: NOTRUN -> [SKIP][97] ([Intel XE#734])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-adlp: NOTRUN -> [SKIP][98] ([Intel XE#836])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_properties@invalid-properties-legacy:
- shard-bmg: [PASS][99] -> [DMESG-WARN][100] ([Intel XE#3428]) +1 other test dmesg-warn
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@kms_properties@invalid-properties-legacy.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_properties@invalid-properties-legacy.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#1406] / [Intel XE#1489])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-adlp: NOTRUN -> [SKIP][102] ([Intel XE#1406] / [Intel XE#1489]) +7 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][103] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-adlp: NOTRUN -> [SKIP][104] ([Intel XE#1122] / [Intel XE#1406] / [Intel XE#5580])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-pr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +4 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-435/igt@kms_psr@fbc-pr-dpms.html
* igt@kms_psr@pr-primary-page-flip:
- shard-adlp: NOTRUN -> [SKIP][106] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +8 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_psr@pr-primary-page-flip.html
* igt@kms_psr@psr-cursor-plane-onoff:
- shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@kms_psr@psr-cursor-plane-onoff.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-adlp: NOTRUN -> [SKIP][108] ([Intel XE#455]) +13 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@kms_scaling_modes@scaling-mode-center.html
- shard-dg2-set2: NOTRUN -> [SKIP][109] ([Intel XE#455]) +3 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-435/igt@kms_scaling_modes@scaling-mode-center.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-adlp: NOTRUN -> [SKIP][110] ([Intel XE#1447] / [Intel XE#5596])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_configfs@survivability-mode:
- shard-adlp: NOTRUN -> [SKIP][111] ([Intel XE#6010])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_configfs@survivability-mode.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-adlp: NOTRUN -> [SKIP][112] ([Intel XE#1123])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_create@multigpu-create-massive-size:
- shard-bmg: NOTRUN -> [SKIP][113] ([Intel XE#2504])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eu_stall@blocking-re-enable:
- shard-adlp: NOTRUN -> [SKIP][114] ([Intel XE#5626]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_eu_stall@blocking-re-enable.html
* igt@xe_eu_stall@blocking-read:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#5626])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_eu_stall@blocking-read.html
* igt@xe_eudebug@attach-debug-metadata:
- shard-adlp: NOTRUN -> [SKIP][116] ([Intel XE#4837] / [Intel XE#5565]) +5 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_eudebug@attach-debug-metadata.html
* igt@xe_eudebug@read-metadata:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#4837]) +1 other test skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_eudebug@read-metadata.html
* igt@xe_eudebug_sriov@deny-sriov:
- shard-adlp: NOTRUN -> [SKIP][118] ([Intel XE#4519])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_eudebug_sriov@deny-sriov.html
* igt@xe_evict@evict-beng-small-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][119] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_evict@evict-beng-small-multi-vm.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][120] -> [INCOMPLETE][121] ([Intel XE#6321]) +1 other test incomplete
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_evict@evict-threads-large-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][122] ([Intel XE#261]) +3 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_evict@evict-threads-large-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen:
- shard-adlp: NOTRUN -> [SKIP][123] ([Intel XE#688]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind:
- shard-adlp: NOTRUN -> [SKIP][124] ([Intel XE#1392] / [Intel XE#5575]) +5 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#2322])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html
* igt@xe_exec_fault_mode@many-execqueues-rebind:
- shard-adlp: NOTRUN -> [SKIP][126] ([Intel XE#288] / [Intel XE#5561]) +18 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_exec_fault_mode@many-execqueues-rebind.html
* igt@xe_exec_fault_mode@many-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#288]) +6 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_exec_fault_mode@many-userptr-rebind-imm.html
* igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug:
- shard-dg2-set2: NOTRUN -> [SKIP][128] ([Intel XE#4837]) +2 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-434/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html
* igt@xe_exec_system_allocator@many-large-malloc-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#4915]) +47 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html
* igt@xe_exec_system_allocator@process-many-execqueues-free:
- shard-adlp: NOTRUN -> [SKIP][130] ([Intel XE#4915]) +165 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_exec_system_allocator@process-many-execqueues-free.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge:
- shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#4943]) +3 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge.html
* igt@xe_module_load@force-load:
- shard-adlp: NOTRUN -> [SKIP][132] ([Intel XE#378] / [Intel XE#5612])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_module_load@force-load.html
* igt@xe_oa@buffer-fill:
- shard-adlp: NOTRUN -> [SKIP][133] ([Intel XE#3573]) +6 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_oa@buffer-fill.html
* igt@xe_oa@oa-unit-exclusive-stream-exec-q:
- shard-dg2-set2: NOTRUN -> [SKIP][134] ([Intel XE#3573])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_oa@oa-unit-exclusive-stream-exec-q.html
* igt@xe_pat@pat-index-xehpc:
- shard-adlp: NOTRUN -> [SKIP][135] ([Intel XE#2838] / [Intel XE#979])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_pat@pat-index-xehpc.html
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [FAIL][136] ([Intel XE#1173]) +1 other test fail
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: NOTRUN -> [SKIP][137] ([Intel XE#2284])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@d3hot-i2c:
- shard-dg2-set2: NOTRUN -> [SKIP][138] ([Intel XE#5742])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_pm@d3hot-i2c.html
* igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0:
- shard-adlp: NOTRUN -> [ABORT][139] ([Intel XE#5545]) +1 other test abort
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-adlp: NOTRUN -> [SKIP][140] ([Intel XE#4733] / [Intel XE#5594]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_pxp@pxp-stale-queue-post-termination-irq:
- shard-dg2-set2: NOTRUN -> [SKIP][141] ([Intel XE#4733])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html
* igt@xe_query@multigpu-query-config:
- shard-adlp: NOTRUN -> [SKIP][142] ([Intel XE#944]) +1 other test skip
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_query@multigpu-query-config.html
* igt@xe_query@multigpu-query-engines:
- shard-dg2-set2: NOTRUN -> [SKIP][143] ([Intel XE#944])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-434/igt@xe_query@multigpu-query-engines.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][144] ([Intel XE#944])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_render_copy@render-stress-1-copies:
- shard-adlp: NOTRUN -> [SKIP][145] ([Intel XE#4814] / [Intel XE#5614])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_render_copy@render-stress-1-copies.html
* igt@xe_spin_batch@spin-fixed-duration:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][146] ([Intel XE#2594])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-435/igt@xe_spin_batch@spin-fixed-duration.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-adlp: NOTRUN -> [SKIP][147] ([Intel XE#4821])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_spin_batch@spin-mem-copy.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1:
- shard-adlp: [DMESG-WARN][148] ([Intel XE#4543]) -> [PASS][149] +1 other test pass
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-d-dp-4:
- shard-dg2-set2: [INCOMPLETE][150] ([Intel XE#3862]) -> [PASS][151] +1 other test pass
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-d-dp-4.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-d-dp-4.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ad-dp2-hdmi-a3:
- shard-bmg: [DMESG-FAIL][152] ([Intel XE#3428]) -> [PASS][153] +1 other test pass
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ad-dp2-hdmi-a3.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ad-dp2-hdmi-a3.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
- shard-bmg: [SKIP][154] ([Intel XE#2316]) -> [PASS][155]
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-bmg: [DMESG-WARN][156] ([Intel XE#5208]) -> [PASS][157]
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_flip@flip-vs-rmfb-interruptible.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a3:
- shard-bmg: [DMESG-WARN][158] ([Intel XE#3428]) -> [PASS][159] +7 other tests pass
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a3.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@kms_flip@flip-vs-rmfb-interruptible@d-hdmi-a3.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp2:
- shard-bmg: [DMESG-WARN][160] -> [PASS][161]
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp2.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp2.html
* igt@kms_flip@flip-vs-suspend@c-dp4:
- shard-dg2-set2: [INCOMPLETE][162] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][163] +1 other test pass
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-dg2-432/igt@kms_flip@flip-vs-suspend@c-dp4.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-435/igt@kms_flip@flip-vs-suspend@c-dp4.html
* igt@kms_flip@nonexisting-fb:
- shard-adlp: [DMESG-WARN][164] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][165] +7 other tests pass
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-8/igt@kms_flip@nonexisting-fb.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-1/igt@kms_flip@nonexisting-fb.html
* igt@kms_flip_tiling@flip-change-tiling:
- shard-adlp: [DMESG-FAIL][166] ([Intel XE#4543]) -> [PASS][167] +1 other test pass
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling.html
* igt@kms_pm_dc@dc6-dpms:
- shard-adlp: [FAIL][168] ([Intel XE#718]) -> [PASS][169]
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-1/igt@kms_pm_dc@dc6-dpms.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@kms_pm_dc@dc6-dpms.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][170], [PASS][171], [PASS][172], [SKIP][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195]) ([Intel XE#2457]) -> ([PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-8/igt@xe_module_load@load.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@xe_module_load@load.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-5/igt@xe_module_load@load.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-3/igt@xe_module_load@load.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-3/igt@xe_module_load@load.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@xe_module_load@load.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@xe_module_load@load.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@xe_module_load@load.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@xe_module_load@load.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@xe_module_load@load.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@xe_module_load@load.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-5/igt@xe_module_load@load.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-5/igt@xe_module_load@load.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@xe_module_load@load.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-2/igt@xe_module_load@load.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-3/igt@xe_module_load@load.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-3/igt@xe_module_load@load.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@xe_module_load@load.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@xe_module_load@load.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@xe_module_load@load.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-2/igt@xe_module_load@load.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-2/igt@xe_module_load@load.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-8/igt@xe_module_load@load.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-8/igt@xe_module_load@load.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@xe_module_load@load.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@xe_module_load@load.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_module_load@load.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-4/igt@xe_module_load@load.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-4/igt@xe_module_load@load.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-4/igt@xe_module_load@load.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@xe_module_load@load.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@xe_module_load@load.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@xe_module_load@load.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@xe_module_load@load.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-1/igt@xe_module_load@load.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@xe_module_load@load.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-4/igt@xe_module_load@load.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@xe_module_load@load.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@xe_module_load@load.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@xe_module_load@load.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-2/igt@xe_module_load@load.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-7/igt@xe_module_load@load.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-2/igt@xe_module_load@load.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-7/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-2/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-2/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-7/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-1/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-8/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@xe_module_load@load.html
- shard-adlp: ([PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [SKIP][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236]) ([Intel XE#378] / [Intel XE#5612]) -> ([PASS][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251])
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-1/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-9/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-9/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-9/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-1/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-1/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-8/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-8/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-2/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-8/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-2/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-2/igt@xe_module_load@load.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@xe_module_load@load.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@xe_module_load@load.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@xe_module_load@load.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_module_load@load.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_module_load@load.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-1/igt@xe_module_load@load.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-9/igt@xe_module_load@load.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_module_load@load.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_module_load@load.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_module_load@load.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-6/igt@xe_module_load@load.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_module_load@load.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-1/igt@xe_module_load@load.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_module_load@load.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-8/igt@xe_module_load@load.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-1/igt@xe_module_load@load.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-2/igt@xe_module_load@load.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-2/igt@xe_module_load@load.html
* igt@xe_pm@s2idle-vm-bind-prefetch:
- shard-adlp: [DMESG-WARN][252] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504]) -> [PASS][253]
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-adlp-6/igt@xe_pm@s2idle-vm-bind-prefetch.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-adlp-2/igt@xe_pm@s2idle-vm-bind-prefetch.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][254] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [INCOMPLETE][255] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345])
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][256] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168]) -> [DMESG-WARN][257] ([Intel XE#1727] / [Intel XE#3113])
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][258] ([Intel XE#2312]) -> [SKIP][259] ([Intel XE#5390]) +4 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move:
- shard-bmg: [SKIP][260] ([Intel XE#5390]) -> [SKIP][261] ([Intel XE#2312])
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt:
- shard-bmg: [SKIP][262] ([Intel XE#2311]) -> [SKIP][263] ([Intel XE#2312]) +5 other tests skip
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][264] ([Intel XE#2312]) -> [SKIP][265] ([Intel XE#2311]) +3 other tests skip
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][266] ([Intel XE#2312]) -> [SKIP][267] ([Intel XE#2313]) +4 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][268] ([Intel XE#2313]) -> [SKIP][269] ([Intel XE#2312]) +5 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][270] ([Intel XE#2426]) -> [SKIP][271] ([Intel XE#2509])
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-bmg: [ABORT][272] ([Intel XE#5466] / [Intel XE#5530]) -> [ABORT][273] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530])
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-3/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-bmg: [DMESG-WARN][274] ([Intel XE#3876]) -> [ABORT][275] ([Intel XE#3970])
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10/shard-bmg-4/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/shard-bmg-6/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
[Intel XE#1158]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1158
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3428
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4519
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5580]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5580
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#5596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5596
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5614]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5614
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#14968]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14968
Build changes
-------------
* Linux: xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10 -> xe-pw-155941v2
IGT_8585: 8585
xe-3923-5338aee4a6d5ef0d735cabbb3cd939ec10d0da10: 5338aee4a6d5ef0d735cabbb3cd939ec10d0da10
xe-pw-155941v2: 155941v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-155941v2/index.html
[-- Attachment #2: Type: text/html, Size: 80358 bytes --]
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node
2025-10-15 7:47 ` [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node Maarten Lankhorst
@ 2025-10-15 21:49 ` Matthew Brost
2025-10-16 6:13 ` Maarten Lankhorst
0 siblings, 1 reply; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 21:49 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:12AM +0200, Maarten Lankhorst wrote:
> This function makes it possible to add an offset that is applied to
> all xe_ggtt_node's, and hides the internals from all its users.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> drivers/gpu/drm/xe/xe_bo.h | 8 +++++---
> drivers/gpu/drm/xe/xe_ggtt.c | 11 +++++++++++
> drivers/gpu/drm/xe/xe_ggtt.h | 2 ++
> 3 files changed, 18 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index 353d607d301da..dd67a6f40a16d 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -9,6 +9,7 @@
> #include <drm/ttm/ttm_tt.h>
>
> #include "xe_bo_types.h"
> +#include "xe_ggtt.h"
> #include "xe_macros.h"
> #include "xe_validation.h"
> #include "xe_vm_types.h"
> @@ -251,13 +252,14 @@ static inline u32
> __xe_bo_ggtt_addr(struct xe_bo *bo, u8 tile_id)
> {
> struct xe_ggtt_node *ggtt_node = bo->ggtt_node[tile_id];
> + u64 offset;
>
> if (XE_WARN_ON(!ggtt_node))
> return 0;
>
> - XE_WARN_ON(ggtt_node->base.size > xe_bo_size(bo));
Is there any reason this warning was dropped? It's not immediately
obvious to me why it would be.
Matt
> - XE_WARN_ON(ggtt_node->base.start + ggtt_node->base.size > (1ull << 32));
> - return ggtt_node->base.start;
> + offset = xe_ggtt_node_addr(ggtt_node);
> + XE_WARN_ON(offset + xe_bo_size(bo) > (1ull << 32));
> + return offset;
> }
>
> static inline u32
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 42e3caa3a6d9c..05515037e2d6a 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -1079,3 +1079,14 @@ u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset)
> {
> return ioread64(ggtt->gsm + (offset / XE_PAGE_SIZE));
> }
> +
> +/**
> + * xe_ggtt_node_addr - Get @node offset in GGTT.
> + * @node: &xe_ggtt_node
> + *
> + * Get the GGTT offset for allocated node.
> + */
> +u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node)
> +{
> + return node->base.start;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index d54a2ae2b4aa8..4a8ef1b824156 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -58,4 +58,6 @@ void xe_ggtt_might_lock(struct xe_ggtt *ggtt);
> u64 xe_ggtt_encode_pte_flags(struct xe_ggtt *ggtt, struct xe_bo *bo, u16 pat_index);
> u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset);
>
> +u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node);
> +
> #endif
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 04/12] drm/xe/display: Avoid dereferencing xe_ggtt_node
2025-10-15 7:47 ` [PATCH v7 04/12] drm/xe/display: Avoid " Maarten Lankhorst
@ 2025-10-15 21:53 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 21:53 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:13AM +0200, Maarten Lankhorst wrote:
> Start using xe_ggtt_node_addr, and avoid comparing the base offset
> as vma->node is dynamically allocated.
>
> Also sneak in a xe_bo_size() for stolen, too small to put as separate commit.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h | 4 ++--
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 4 ++--
> drivers/gpu/drm/xe/display/xe_stolen.c | 2 +-
> 3 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
> index 4465c40f81341..1c599963169a0 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
> @@ -8,7 +8,7 @@
>
> #include <uapi/drm/i915_drm.h>
>
> -#include "xe_ggtt_types.h"
> +#include "xe_ggtt.h"
>
> #include <linux/refcount.h>
>
> @@ -32,7 +32,7 @@ struct i915_vma {
>
> static inline u32 i915_ggtt_offset(const struct i915_vma *vma)
> {
> - return vma->node->base.start;
> + return xe_ggtt_node_addr(vma->node);
> }
>
> #endif
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index d2e4903de0977..784d2db5fd0db 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -206,7 +206,7 @@ static void write_ggtt_rotated_node(struct xe_ggtt *ggtt, struct xe_ggtt_node *n
> struct fb_rotate_args *args = data;
> struct xe_bo *bo = args->bo;
> const struct intel_rotation_info *rot_info = &args->view->rotated;
> - u32 ggtt_ofs = node->base.start;
> + u32 ggtt_ofs = xe_ggtt_node_addr(node);
>
> for (u32 i = 0; i < ARRAY_SIZE(rot_info->plane); i++)
> write_ggtt_rotated(ggtt, &ggtt_ofs, pte_flags, write_pte,
> @@ -351,7 +351,7 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
> if (vma->dpt)
> xe_bo_unpin_map_no_vm(vma->dpt);
> else if (!xe_ggtt_node_allocated(vma->bo->ggtt_node[tile_id]) ||
> - vma->bo->ggtt_node[tile_id]->base.start != vma->node->base.start)
> + vma->bo->ggtt_node[tile_id] != vma->node)
> xe_ggtt_node_remove(vma->node, false);
>
> ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
> diff --git a/drivers/gpu/drm/xe/display/xe_stolen.c b/drivers/gpu/drm/xe/display/xe_stolen.c
> index 9f04ba36e930b..ef5ef5aa8d847 100644
> --- a/drivers/gpu/drm/xe/display/xe_stolen.c
> +++ b/drivers/gpu/drm/xe/display/xe_stolen.c
> @@ -100,7 +100,7 @@ u64 i915_gem_stolen_node_address(struct intel_stolen_node *node)
>
> u64 i915_gem_stolen_node_size(const struct intel_stolen_node *node)
> {
> - return node->bo->ttm.base.size;
> + return xe_bo_size(node->bo);
> }
>
> struct intel_stolen_node *i915_gem_stolen_node_alloc(struct drm_device *drm)
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c
2025-10-15 7:47 ` [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c Maarten Lankhorst
@ 2025-10-15 21:58 ` Matthew Brost
2025-10-16 6:33 ` Maarten Lankhorst
0 siblings, 1 reply; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 21:58 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:14AM +0200, Maarten Lankhorst wrote:
> A careful inspection of __xe_ggtt_insert_bo_at() shows that
> the ggtt_node can always be seen as inserted from xe_bo.c
> due to the way error handling is performed.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 7b65020818738..c895214a7a570 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1700,7 +1700,7 @@ static void xe_ttm_bo_destroy(struct ttm_buffer_object *ttm_bo)
> xe_assert(xe, list_empty(&ttm_bo->base.gpuva.list));
>
> for_each_tile(tile, xe, id)
> - if (bo->ggtt_node[id] && bo->ggtt_node[id]->base.size)
> + if (bo->ggtt_node[id])
The additional checks beyond if ggtt node is present indeed look bogus.
But perhaps to be little parnoid, maybe call
xe_ggtt_node_allocated(bo->ggtt_node[id]) here?
> xe_ggtt_remove_bo(tile->mem.ggtt, bo);
>
> #ifdef CONFIG_PROC_FS
> @@ -3581,8 +3581,8 @@ void xe_bo_put(struct xe_bo *bo)
> might_lock(&bo->client->bos_lock);
> #endif
> for_each_tile(tile, xe_bo_device(bo), id)
> - if (bo->ggtt_node[id] && bo->ggtt_node[id]->ggtt)
> - xe_ggtt_might_lock(bo->ggtt_node[id]->ggtt);
> + if (bo->ggtt_node[id])
Same here, call xe_ggtt_node_allocated(bo->ggtt_node[id])?
Matt
> + xe_ggtt_might_lock(tile->mem.ggtt);
> drm_gem_object_put(&bo->ttm.base);
> }
> }
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
2025-10-15 7:47 ` [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling Maarten Lankhorst
@ 2025-10-15 22:04 ` Matthew Brost
2025-10-16 8:50 ` Michal Wajdeczko
0 siblings, 1 reply; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 22:04 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:15AM +0200, Maarten Lankhorst wrote:
> Do not directly dereference xe_ggtt_node, and add
> a member to store the GGTT size.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 15 ++++++++-------
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h | 8 ++++++--
> 2 files changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index 2289756761636..c0dfffd5c553b 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -264,7 +264,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
> if (!xe_ggtt_node_allocated(node))
> return 0;
>
> - return encode_ggtt(cfg, node->base.start, node->base.size, details);
> + return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
> }
>
> /* Return: number of configuration dwords written */
> @@ -495,13 +495,14 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
>
> xe_ggtt_assign(node, vfid);
> xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
> - vfid, node->base.start, node->base.start + node->base.size - 1);
> + vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
>
> - err = pf_distribute_config_ggtt(gt->tile, vfid, node->base.start, node->base.size);
> + err = pf_distribute_config_ggtt(gt->tile, vfid, xe_ggtt_node_addr(node), size);
> if (unlikely(err))
> goto err;
>
> config->ggtt_region = node;
> + config->ggtt_size = size;
> return 0;
> err:
> pf_release_ggtt(tile, node);
> @@ -514,7 +515,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
> struct xe_ggtt_node *node = config->ggtt_region;
>
> xe_gt_assert(gt, xe_gt_is_main_type(gt));
> - return xe_ggtt_node_allocated(node) ? node->base.size : 0;
> + return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
> }
>
> /**
> @@ -2516,11 +2517,11 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
> if (!xe_ggtt_node_allocated(config->ggtt_region))
> continue;
>
> - string_get_size(config->ggtt_region->base.size, 1, STRING_UNITS_2,
> + string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
> buf, sizeof(buf));
> drm_printf(p, "VF%u:\t%#0llx-%#llx\t(%s)\n",
> - n, config->ggtt_region->base.start,
> - config->ggtt_region->base.start + config->ggtt_region->base.size - 1,
> + n, xe_ggtt_node_addr(config->ggtt_region),
> + xe_ggtt_node_addr(config->ggtt_region) + config->ggtt_size - 1,
> buf);
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
> index 686c7b3b6d7a5..9a8e66c8b539f 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
> @@ -17,10 +17,14 @@ struct xe_bo;
> * Used by the PF driver to maintain per-VF provisioning data.
> */
> struct xe_gt_sriov_config {
> - /** @ggtt_region: GGTT region assigned to the VF. */
> - struct xe_ggtt_node *ggtt_region;
> /** @lmem_obj: LMEM allocation for use by the VF. */
> struct xe_bo *lmem_obj;
> +
> + /** @ggtt_region: GGTT region assigned to the VF. */
> + struct xe_ggtt_node *ggtt_region;
> + /** @ggtt_size: Size of GGTT region */
> + u64 ggtt_size;
Nit: Couldn't we have a helper to dervive the size from the
xe_ggtt_node to avoid storing the ggtt_size explicitly?
> +
Longterm we should likely move the PF GGTT config to a per-tile
structure like we did for the VF GGTT config. IMO we can do that in
follow up. Maybe ping Michal for his thoughts here.
Anyways, this looks like a good cleanup for the existing code structure.
With that:
Reviewed-by: <Matthew.brost@intel.com>
> /** @num_ctxs: number of GuC contexts IDs. */
> u16 num_ctxs;
> /** @begin_ctx: start index of GuC context ID range. */
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 07/12] drm/xe: Privatize xe_ggtt_node
2025-10-15 7:47 ` [PATCH v7 07/12] drm/xe: Privatize xe_ggtt_node Maarten Lankhorst
@ 2025-10-15 22:05 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 22:05 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:16AM +0200, Maarten Lankhorst wrote:
> Nothing requires it any more, make the member private.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_ggtt.c | 18 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_ggtt_types.h | 19 +------------------
> 2 files changed, 19 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 05515037e2d6a..5c07d63189ab1 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -34,6 +34,24 @@
> #include "xe_wa.h"
> #include "xe_wopcm.h"
>
> +/**
> + * struct xe_ggtt_node - A node in GGTT.
> + *
> + * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
> + * insertion, reservation, or 'ballooning'.
> + * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
> + */
> +struct xe_ggtt_node {
> + /** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
> + struct xe_ggtt *ggtt;
> + /** @base: A drm_mm_node */
> + struct drm_mm_node base;
> + /** @delayed_removal_work: The work struct for the delayed removal */
> + struct work_struct delayed_removal_work;
> + /** @invalidate_on_remove: If it needs invalidation upon removal */
> + bool invalidate_on_remove;
> +};
> +
> /**
> * DOC: Global Graphics Translation Table (GGTT)
> *
> diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
> index f4aa5671cb3e3..31054e00daa6b 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
> @@ -11,6 +11,7 @@
> #include "xe_pt_types.h"
>
> struct xe_bo;
> +struct xe_ggtt_node;
> struct xe_gt;
>
> /**
> @@ -53,24 +54,6 @@ struct xe_ggtt {
> struct workqueue_struct *wq;
> };
>
> -/**
> - * struct xe_ggtt_node - A node in GGTT.
> - *
> - * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
> - * insertion, reservation, or 'ballooning'.
> - * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
> - */
> -struct xe_ggtt_node {
> - /** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
> - struct xe_ggtt *ggtt;
> - /** @base: A drm_mm_node */
> - struct drm_mm_node base;
> - /** @delayed_removal_work: The work struct for the delayed removal */
> - struct work_struct delayed_removal_work;
> - /** @invalidate_on_remove: If it needs invalidation upon removal */
> - bool invalidate_on_remove;
> -};
> -
> typedef void (*xe_ggtt_set_pte_fn)(struct xe_ggtt *ggtt, u64 addr, u64 pte);
> typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
> struct xe_ggtt_node *node,
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset
2025-10-15 7:47 ` [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset Maarten Lankhorst
@ 2025-10-15 22:38 ` Matthew Brost
2025-10-16 6:40 ` Maarten Lankhorst
0 siblings, 1 reply; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 22:38 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:17AM +0200, Maarten Lankhorst wrote:
> This will make node shifting in the next commit a one-liner.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> drivers/gpu/drm/xe/xe_ggtt.c | 21 ++++++++++++++-------
> 1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 5c07d63189ab1..1c97a06424b5c 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -289,7 +289,7 @@ static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
> {
> ggtt->start = start;
> ggtt->size = size;
> - drm_mm_init(&ggtt->mm, start, size);
> + drm_mm_init(&ggtt->mm, 0, size - start);
We should probably fix the drm_mm_init function signature so the last
argument is called 'end' rather than 'size'. Can be done in a follow up
though.
> }
>
> int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
> @@ -388,7 +388,7 @@ static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
> /* Display may have allocated inside ggtt, so be careful with clearing here */
> mutex_lock(&ggtt->lock);
> drm_mm_for_each_hole(hole, &ggtt->mm, start, end)
> - xe_ggtt_clear(ggtt, start, end - start);
> + xe_ggtt_clear(ggtt, ggtt->start + start, end - start);
>
> xe_ggtt_invalidate(ggtt);
> mutex_unlock(&ggtt->lock);
> @@ -405,7 +405,7 @@ static void ggtt_node_remove(struct xe_ggtt_node *node)
>
> mutex_lock(&ggtt->lock);
> if (bound)
> - xe_ggtt_clear(ggtt, node->base.start, node->base.size);
> + xe_ggtt_clear(ggtt, xe_ggtt_node_addr(node), node->base.size);
> drm_mm_remove_node(&node->base);
> node->base.size = 0;
> mutex_unlock(&ggtt->lock);
> @@ -561,13 +561,13 @@ int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64
> lockdep_assert_held(&ggtt->lock);
>
> node->base.color = 0;
> - node->base.start = start;
> + node->base.start = start - ggtt->start;
> node->base.size = end - start;
>
> err = drm_mm_reserve_node(&ggtt->mm, &node->base);
>
> if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
> - node->base.start, node->base.start + node->base.size, ERR_PTR(err)))
> + xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + node->base.size, ERR_PTR(err)))
> return err;
>
> xe_ggtt_dump_node(ggtt, &node->base, "balloon");
> @@ -744,7 +744,7 @@ static void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
> if (XE_WARN_ON(!node))
> return;
>
> - start = node->base.start;
> + start = xe_ggtt_node_addr(node);
> end = start + xe_bo_size(bo);
>
> if (!xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo)) {
> @@ -865,6 +865,13 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
> }
>
> mutex_lock(&ggtt->lock);
> + if (start >= ggtt->start)
> + start -= ggtt->start;
> + else
> + start = 0;
Does this logic work if let's say start == 0x1000 and ggtt->start ==
0x2000. It seems like that is caller bug which we should assert 'start
>= ggtt->start', right?
> +
> + end -= ggtt->start;
> +
> err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base,
> xe_bo_size(bo), alignment, 0, start, end, 0);
> if (err) {
> @@ -1106,5 +1113,5 @@ u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset)
> */
> u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node)
> {
> - return node->base.start;
> + return node->base.start + READ_ONCE(node->ggtt->start);
Why the READ_ONCE here?
Matt
> }
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 12/12] drm/xe: Remove xe_ggtt_node_allocated
2025-10-15 7:47 ` [PATCH v7 12/12] drm/xe: Remove xe_ggtt_node_allocated Maarten Lankhorst
@ 2025-10-15 22:41 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 22:41 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:21AM +0200, Maarten Lankhorst wrote:
> With the intermediate state gone, no longer useful. Just check against
> NULL.
>
Ah, ok. I suggested earlier in the series to use xe_ggtt_node_allocated
but I see now this function is removed. Before I can give an RB I'd like
to apply the entire series to a branch to make sure I understand this
change. The mbox as is doesn't apply to drm-tip. Any chance you can
rebase this series?
Matt
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 +--
> drivers/gpu/drm/xe/xe_ggtt.c | 14 --------------
> drivers/gpu/drm/xe/xe_ggtt.h | 1 -
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 12 ++++++------
> 4 files changed, 7 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 784d2db5fd0db..6592b000950ff 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -350,8 +350,7 @@ static void __xe_unpin_fb_vma(struct i915_vma *vma)
>
> if (vma->dpt)
> xe_bo_unpin_map_no_vm(vma->dpt);
> - else if (!xe_ggtt_node_allocated(vma->bo->ggtt_node[tile_id]) ||
> - vma->bo->ggtt_node[tile_id] != vma->node)
> + else if (vma->bo->ggtt_node[tile_id] != vma->node)
> xe_ggtt_node_remove(vma->node, false);
>
> ttm_bo_reserve(&vma->bo->ttm, false, false, NULL);
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index e4e8be114786a..e9ab8d9415412 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -656,20 +656,6 @@ struct xe_ggtt_node *xe_ggtt_node_insert(struct xe_ggtt *ggtt, u32 size, u32 ali
> return node;
> }
>
> -/**
> - * xe_ggtt_node_allocated - Check if node is allocated in GGTT
> - * @node: the &xe_ggtt_node to be inspected
> - *
> - * Return: True if allocated, False otherwise.
> - */
> -bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node)
> -{
> - if (!node || !node->ggtt)
> - return false;
> -
> - return drm_mm_node_allocated(&node->base);
> -}
> -
> /**
> * xe_ggtt_map_bo - Map the BO into GGTT
> * @ggtt: the &xe_ggtt where node will be mapped
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index d0ad541a40baf..e32a14ac63665 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -30,7 +30,6 @@ xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
> u64 size, u32 align,
> xe_ggtt_transform_cb transform, void *arg);
> void xe_ggtt_node_remove(struct xe_ggtt_node *node, bool invalidate);
> -bool xe_ggtt_node_allocated(const struct xe_ggtt_node *node);
> void xe_ggtt_map_bo_unlocked(struct xe_ggtt *ggtt, struct xe_bo *bo);
> int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo, struct drm_exec *exec);
> int xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index d71041a611d35..db47b49e5842c 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -261,7 +261,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
> {
> struct xe_ggtt_node *node = config->ggtt_region;
>
> - if (!xe_ggtt_node_allocated(node))
> + if (!node)
> return 0;
>
> return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
> @@ -455,7 +455,7 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
>
> size = round_up(size, alignment);
>
> - if (xe_ggtt_node_allocated(config->ggtt_region)) {
> + if (config->ggtt_region) {
> err = pf_distribute_config_ggtt(tile, vfid, 0, 0);
> if (unlikely(err))
> return err;
> @@ -466,7 +466,7 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
> if (unlikely(err))
> return err;
> }
> - xe_gt_assert(gt, !xe_ggtt_node_allocated(config->ggtt_region));
> + xe_gt_assert(gt, !config->ggtt_region);
>
> if (!size)
> return 0;
> @@ -497,7 +497,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
> struct xe_ggtt_node *node = config->ggtt_region;
>
> xe_gt_assert(gt, xe_gt_is_main_type(gt));
> - return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
> + return node ? config->ggtt_size : 0;
> }
>
> /**
> @@ -2049,7 +2049,7 @@ int xe_gt_sriov_pf_config_release(struct xe_gt *gt, unsigned int vfid, bool forc
>
> static void pf_sanitize_ggtt(struct xe_ggtt_node *ggtt_region, unsigned int vfid)
> {
> - if (xe_ggtt_node_allocated(ggtt_region))
> + if (ggtt_region)
> xe_ggtt_assign(ggtt_region, vfid);
> }
>
> @@ -2496,7 +2496,7 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
>
> for (n = 1; n <= total_vfs; n++) {
> config = >->sriov.pf.vfs[n].config;
> - if (!xe_ggtt_node_allocated(config->ggtt_region))
> + if (!config->ggtt_region)
> continue;
>
> string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 11/12] drm/xe: Make xe_ggtt_node_insert return a node
2025-10-15 7:47 ` [PATCH v7 11/12] drm/xe: Make xe_ggtt_node_insert return a node Maarten Lankhorst
@ 2025-10-15 22:44 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-15 22:44 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:20AM +0200, Maarten Lankhorst wrote:
> This extra step is easier to handle inside xe_ggtt.c and makes
> xe_ggtt_node_allocated a simple null check instead, as the intermediate
> state 'allocated but not inserted' is no longer used.
>
> Privatize xe_ggtt_node_fini() as it's no longer used outside of
> xe_ggtt.c
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
Good cleanup.
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 6 +-
> drivers/gpu/drm/xe/xe_ggtt.c | 76 +++++++++------------
> drivers/gpu/drm/xe/xe_ggtt.h | 5 +-
> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 24 +------
> 4 files changed, 38 insertions(+), 73 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> index acddbedcf17cb..7aeee6680d78c 100644
> --- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> +++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> @@ -38,12 +38,8 @@ static struct xe_bo *replacement_xe_managed_bo_create_pin_map(struct xe_device *
> if (flags & XE_BO_FLAG_GGTT) {
> struct xe_ggtt *ggtt = tile->mem.ggtt;
>
> - bo->ggtt_node[tile->id] = xe_ggtt_node_init(ggtt);
> + bo->ggtt_node[tile->id] = xe_ggtt_node_insert(ggtt, xe_bo_size(bo), SZ_4K);
> KUNIT_ASSERT_NOT_ERR_OR_NULL(test, bo->ggtt_node[tile->id]);
> -
> - KUNIT_ASSERT_EQ(test, 0,
> - xe_ggtt_node_insert(bo->ggtt_node[tile->id],
> - xe_bo_size(bo), SZ_4K));
> }
>
> return bo;
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 94cf886785ca2..e4e8be114786a 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -442,6 +442,11 @@ static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
> mutex_unlock(&ggtt->lock);
> }
>
> +static void xe_ggtt_node_fini(struct xe_ggtt_node *node)
> +{
> + kfree(node);
> +}
> +
> static void ggtt_node_remove(struct xe_ggtt_node *node)
> {
> struct xe_ggtt *ggtt = node->ggtt;
> @@ -606,68 +611,51 @@ static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
> mm_flags);
> }
>
> +static struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
> +{
> + struct xe_ggtt_node *node = kzalloc(sizeof(*node), GFP_NOFS);
> +
> + if (!node)
> + return ERR_PTR(-ENOMEM);
> +
> + INIT_WORK(&node->delayed_removal_work, ggtt_node_remove_work_func);
> + node->ggtt = ggtt;
> +
> + return node;
> +}
> +
> /**
> * xe_ggtt_node_insert - Insert a &xe_ggtt_node into the GGTT
> - * @node: the &xe_ggtt_node to be inserted
> + * @ggtt: the @ggtt into which the node should be inserted.
> * @size: size of the node
> * @align: alignment constrain of the node
> *
> - * It cannot be called without first having called xe_ggtt_init() once.
> - *
> - * Return: 0 on success or a negative error code on failure.
> + * Return: &xe_ggtt_node on success or a ERR_PTR on failure.
> */
> -int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
> +struct xe_ggtt_node *xe_ggtt_node_insert(struct xe_ggtt *ggtt, u32 size, u32 align)
> {
> + struct xe_ggtt_node *node;
> int ret;
>
> - if (!node || !node->ggtt)
> - return -ENOENT;
> + if (!ggtt)
> + return ERR_PTR(-ENOENT);
> +
> + node = xe_ggtt_node_init(ggtt);
> + if (IS_ERR(node))
> + return node;
>
> mutex_lock(&node->ggtt->lock);
> ret = xe_ggtt_node_insert_locked(node, size, align,
> DRM_MM_INSERT_HIGH);
> mutex_unlock(&node->ggtt->lock);
> -
> - return ret;
> -}
> -
> -/**
> - * xe_ggtt_node_init - Initialize %xe_ggtt_node struct
> - * @ggtt: the &xe_ggtt where the new node will later be inserted/reserved.
> - *
> - * This function will allocate the struct %xe_ggtt_node and return its pointer.
> - * This struct will then be freed after the node removal upon xe_ggtt_node_remove()
> - * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
> - * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
> - *
> - * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
> - **/
> -struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
> -{
> - struct xe_ggtt_node *node = kzalloc(sizeof(*node), GFP_NOFS);
> -
> - if (!node)
> - return ERR_PTR(-ENOMEM);
> -
> - INIT_WORK(&node->delayed_removal_work, ggtt_node_remove_work_func);
> - node->ggtt = ggtt;
> + if (ret) {
> + xe_ggtt_node_fini(node);
> + return ERR_PTR(ret);
> + }
>
> return node;
> }
>
> -/**
> - * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
> - * @node: the &xe_ggtt_node to be freed
> - *
> - * If anything went wrong with either xe_ggtt_node_insert() and this @node is
> - * not going to be reused, then this function needs to be called to free the
> - * %xe_ggtt_node struct
> - **/
> -void xe_ggtt_node_fini(struct xe_ggtt_node *node)
> -{
> - kfree(node);
> -}
> -
> /**
> * xe_ggtt_node_allocated - Check if node is allocated in GGTT
> * @node: the &xe_ggtt_node to be inspected
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index 9f97f63496bcb..d0ad541a40baf 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -18,13 +18,12 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt);
> int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 reserved, u32 size);
> int xe_ggtt_init(struct xe_ggtt *ggtt);
>
> -struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
> -void xe_ggtt_node_fini(struct xe_ggtt_node *node);
> void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
> u64 xe_ggtt_start(struct xe_ggtt *ggtt);
> u64 xe_ggtt_size(struct xe_ggtt *ggtt);
>
> -int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align);
> +struct xe_ggtt_node *
> +xe_ggtt_node_insert(struct xe_ggtt *ggtt, u32 size, u32 align);
> struct xe_ggtt_node *
> xe_ggtt_node_insert_transform(struct xe_ggtt *ggtt,
> struct xe_bo *bo, u64 pte,
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index c0dfffd5c553b..d71041a611d35 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -434,23 +434,9 @@ static int pf_distribute_config_ggtt(struct xe_tile *tile, unsigned int vfid, u6
> return err ?: err2;
> }
>
> -static void pf_release_ggtt(struct xe_tile *tile, struct xe_ggtt_node *node)
> -{
> - if (xe_ggtt_node_allocated(node)) {
> - /*
> - * explicit GGTT PTE assignment to the PF using xe_ggtt_assign()
> - * is redundant, as PTE will be implicitly re-assigned to PF by
> - * the xe_ggtt_clear() called by below xe_ggtt_remove_node().
> - */
> - xe_ggtt_node_remove(node, false);
> - } else {
> - xe_ggtt_node_fini(node);
> - }
> -}
> -
> static void pf_release_vf_config_ggtt(struct xe_gt *gt, struct xe_gt_sriov_config *config)
> {
> - pf_release_ggtt(gt_to_tile(gt), config->ggtt_region);
> + xe_ggtt_node_remove(config->ggtt_region, false);
> config->ggtt_region = NULL;
> }
>
> @@ -485,14 +471,10 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
> if (!size)
> return 0;
>
> - node = xe_ggtt_node_init(ggtt);
> + node = xe_ggtt_node_insert(ggtt, size, alignment);
> if (IS_ERR(node))
> return PTR_ERR(node);
>
> - err = xe_ggtt_node_insert(node, size, alignment);
> - if (unlikely(err))
> - goto err;
> -
> xe_ggtt_assign(node, vfid);
> xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
> vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
> @@ -505,7 +487,7 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
> config->ggtt_size = size;
> return 0;
> err:
> - pf_release_ggtt(tile, node);
> + xe_ggtt_node_remove(node, false);
> return err;
> }
>
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 09/12] drm/xe: Rewrite GGTT VF initialisation
2025-10-15 7:47 ` [PATCH v7 09/12] drm/xe: Rewrite GGTT VF initialisation Maarten Lankhorst
@ 2025-10-16 0:30 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-16 0:30 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Wed, Oct 15, 2025 at 09:47:18AM +0200, Maarten Lankhorst wrote:
> The previous code was using a complicated system with 2 balloons to
> set GGTT size and adjust GGTT offset. While it works, it's overly
> complicated.
>
> A better approach is to set the offset and size when initialising GGTT,
> this removes the need for adding balloons. The resize function only
> needs readjust ggtt->start to have GGTT at the new offset.
>
> This removes the need to manipulate the internals of xe_ggtt outside
> of xe_ggtt, and cleans up a lot of now unneeded code.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> Co-developed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 2 +-
> drivers/gpu/drm/xe/xe_device_types.h | 2 -
> drivers/gpu/drm/xe/xe_ggtt.c | 158 +++-------------
> drivers/gpu/drm/xe/xe_ggtt.h | 5 +-
> drivers/gpu/drm/xe/xe_ggtt_types.h | 1 +
> drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 5 +-
> drivers/gpu/drm/xe/xe_pci.c | 7 +
> drivers/gpu/drm/xe/xe_tile_sriov_vf.c | 197 ++------------------
> drivers/gpu/drm/xe/xe_tile_sriov_vf.h | 4 +-
> drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h | 4 +
> 10 files changed, 60 insertions(+), 325 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> index d266882adc0e0..acddbedcf17cb 100644
> --- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> +++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c
> @@ -67,7 +67,7 @@ static int guc_buf_test_init(struct kunit *test)
>
> KUNIT_ASSERT_EQ(test, 0,
> xe_ggtt_init_kunit(ggtt, DUT_GGTT_START,
> - DUT_GGTT_START + DUT_GGTT_SIZE));
> + DUT_GGTT_SIZE));
>
> kunit_activate_static_stub(test, xe_managed_bo_create_pin_map,
> replacement_xe_managed_bo_create_pin_map);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 02c04ad7296e4..a05164cc669f9 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -192,8 +192,6 @@ struct xe_tile {
> struct xe_lmtt lmtt;
> } pf;
> struct {
> - /** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
> - struct xe_ggtt_node *ggtt_balloon[2];
> /** @sriov.vf.self_config: VF configuration data */
> struct xe_tile_sriov_vf_selfconfig self_config;
> } vf;
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
> index 1c97a06424b5c..3b7f6a8dca242 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.c
> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
> @@ -38,8 +38,8 @@
> * struct xe_ggtt_node - A node in GGTT.
> *
> * This struct needs to be initialized (only-once) with xe_ggtt_node_init() before any node
> - * insertion, reservation, or 'ballooning'.
> - * It will, then, be finalized by either xe_ggtt_node_remove() or xe_ggtt_node_deballoon().
> + * insertion or reservation.
> + * It will, then, be finalized by xe_ggtt_node_remove().
> */
> struct xe_ggtt_node {
> /** @ggtt: Back pointer to xe_ggtt where this region will be inserted at */
> @@ -337,9 +337,15 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> ggtt_start = wopcm;
> ggtt_size = (gsm_size / 8) * (u64) XE_PAGE_SIZE - ggtt_start;
> } else {
> - /* GGTT is expected to be 4GiB */
> - ggtt_start = wopcm;
> - ggtt_size = SZ_4G - ggtt_start;
> + ggtt_start = xe_tile_sriov_vf_ggtt_base(ggtt->tile);
> + ggtt_size = xe_tile_sriov_vf_ggtt(ggtt->tile);
> +
> + if (ggtt_start < wopcm || ggtt_start > GUC_GGTT_TOP ||
> + ggtt_size > GUC_GGTT_TOP - ggtt_start) {
> + xe_tile_err(ggtt->tile, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
> + ggtt->tile->id, ggtt_start, ggtt_start + ggtt_size - 1);
> + return -ERANGE;
> + }
> }
>
> ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
> @@ -364,17 +370,7 @@ int xe_ggtt_init_early(struct xe_ggtt *ggtt)
> if (err)
> return err;
>
> - err = devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);
> - if (err)
> - return err;
> -
> - if (IS_SRIOV_VF(xe)) {
> - err = xe_tile_sriov_vf_prepare_ggtt(ggtt->tile);
> - if (err)
> - return err;
> - }
> -
> - return 0;
> + return devm_add_action_or_reset(xe->drm.dev, dev_fini_ggtt, ggtt);
> }
> ALLOW_ERROR_INJECTION(xe_ggtt_init_early, ERRNO); /* See xe_pci_probe() */
>
> @@ -526,119 +522,29 @@ static void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
> ggtt_invalidate_gt_tlb(ggtt->tile->media_gt);
> }
>
> -static void xe_ggtt_dump_node(struct xe_ggtt *ggtt,
> - const struct drm_mm_node *node, const char *description)
> -{
> - char buf[10];
> -
> - if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) {
> - string_get_size(node->size, 1, STRING_UNITS_2, buf, sizeof(buf));
> - xe_tile_dbg(ggtt->tile, "GGTT %#llx-%#llx (%s) %s\n",
> - node->start, node->start + node->size, buf, description);
> - }
> -}
> -
> -/**
> - * xe_ggtt_node_insert_balloon_locked - prevent allocation of specified GGTT addresses
> - * @node: the &xe_ggtt_node to hold reserved GGTT node
> - * @start: the starting GGTT address of the reserved region
> - * @end: then end GGTT address of the reserved region
> - *
> - * To be used in cases where ggtt->lock is already taken.
> - * Use xe_ggtt_node_remove_balloon_locked() to release a reserved GGTT node.
> - *
> - * Return: 0 on success or a negative error code on failure.
> - */
> -int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64 end)
> -{
> - struct xe_ggtt *ggtt = node->ggtt;
> - int err;
> -
> - xe_tile_assert(ggtt->tile, start < end);
> - xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE));
> - xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE));
> - xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base));
> - lockdep_assert_held(&ggtt->lock);
> -
> - node->base.color = 0;
> - node->base.start = start - ggtt->start;
> - node->base.size = end - start;
> -
> - err = drm_mm_reserve_node(&ggtt->mm, &node->base);
> -
> - if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
> - xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + node->base.size, ERR_PTR(err)))
> - return err;
> -
> - xe_ggtt_dump_node(ggtt, &node->base, "balloon");
> - return 0;
> -}
> -
> -/**
> - * xe_ggtt_node_remove_balloon_locked - release a reserved GGTT region
> - * @node: the &xe_ggtt_node with reserved GGTT region
> - *
> - * To be used in cases where ggtt->lock is already taken.
> - * See xe_ggtt_node_insert_balloon_locked() for details.
> - */
> -void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node)
> -{
> - if (!xe_ggtt_node_allocated(node))
> - return;
> -
> - lockdep_assert_held(&node->ggtt->lock);
> -
> - xe_ggtt_dump_node(node->ggtt, &node->base, "remove-balloon");
> -
> - drm_mm_remove_node(&node->base);
> -}
> -
> -static void xe_ggtt_assert_fit(struct xe_ggtt *ggtt, u64 start, u64 size)
> -{
> - struct xe_tile *tile = ggtt->tile;
> -
> - xe_tile_assert(tile, start >= ggtt->start);
> - xe_tile_assert(tile, start + size <= ggtt->start + ggtt->size);
> -}
> -
> /**
> - * xe_ggtt_shift_nodes_locked - Shift GGTT nodes to adjust for a change in usable address range.
> + * xe_ggtt_shift_nodes - Shift GGTT nodes to adjust for a change in usable address range.
> * @ggtt: the &xe_ggtt struct instance
> * @shift: change to the location of area provisioned for current VF
> *
> - * This function moves all nodes from the GGTT VM, to a temp list. These nodes are expected
> - * to represent allocations in range formerly assigned to current VF, before the range changed.
> - * When the GGTT VM is completely clear of any nodes, they are re-added with shifted offsets.
> - *
> - * The function has no ability of failing - because it shifts existing nodes, without
> - * any additional processing. If the nodes were successfully existing at the old address,
> - * they will do the same at the new one. A fail inside this function would indicate that
> - * the list of nodes was either already damaged, or that the shift brings the address range
> - * outside of valid bounds. Both cases justify an assert rather than error code.
> + * Adjust the base offset of the GGTT.
> */
> -void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift)
> +void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift)
> {
> - struct xe_tile *tile __maybe_unused = ggtt->tile;
> - struct drm_mm_node *node, *tmpn;
> - LIST_HEAD(temp_list_head);
> + s64 new_start;
>
> - lockdep_assert_held(&ggtt->lock);
> + if (!ggtt->size) {
> + xe_tile_err(ggtt->tile, "Asked to resize before xe_ggtt_init_early()?\n");
> + return;
> + }
>
> - if (IS_ENABLED(CONFIG_DRM_XE_DEBUG))
> - drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm)
> - xe_ggtt_assert_fit(ggtt, node->start + shift, node->size);
> + guard(mutex)(&ggtt->lock);
>
> - drm_mm_for_each_node_safe(node, tmpn, &ggtt->mm) {
> - drm_mm_remove_node(node);
> - list_add(&node->node_list, &temp_list_head);
> - }
> + new_start = ggtt->start + shift;
> + xe_tile_assert(ggtt->tile, new_start >= xe_wopcm_size(tile_to_xe(ggtt->tile)));
> + xe_tile_assert(ggtt->tile, new_start + ggtt->size <= GUC_GGTT_TOP);
>
> - list_for_each_entry_safe(node, tmpn, &temp_list_head, node_list) {
> - list_del(&node->node_list);
> - node->start += shift;
> - drm_mm_reserve_node(&ggtt->mm, node);
> - xe_tile_assert(tile, drm_mm_node_allocated(node));
> - }
Ah, I see where this pairs with a READ_ONCE. Can you add comments to
both the WRITE_ONCE / READ_ONCE indicating where it pairs with?
> + WRITE_ONCE(ggtt->start, new_start);
> }
>
> static int xe_ggtt_node_insert_locked(struct xe_ggtt_node *node,
> @@ -679,12 +585,8 @@ int xe_ggtt_node_insert(struct xe_ggtt_node *node, u32 size, u32 align)
> *
> * This function will allocate the struct %xe_ggtt_node and return its pointer.
> * This struct will then be freed after the node removal upon xe_ggtt_node_remove()
> - * or xe_ggtt_node_remove_balloon_locked().
> - *
> - * Having %xe_ggtt_node struct allocated doesn't mean that the node is already
> - * allocated in GGTT. Only xe_ggtt_node_insert(), allocation through
> - * xe_ggtt_node_insert_transform(), or xe_ggtt_node_insert_balloon_locked() will ensure the node is inserted or reserved
> - * in GGTT.
> + * Having %xe_ggtt_node struct allocated doesn't mean that the node is already allocated
> + * in GGTT. Only xe_ggtt_node_insert() will ensure the node is inserted or reserved in GGTT.
> *
> * Return: A pointer to %xe_ggtt_node struct on success. An ERR_PTR otherwise.
> **/
> @@ -705,9 +607,9 @@ struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt)
> * xe_ggtt_node_fini - Forcebly finalize %xe_ggtt_node struct
> * @node: the &xe_ggtt_node to be freed
> *
> - * If anything went wrong with either xe_ggtt_node_insert(), xe_ggtt_node_insert_locked(),
> - * or xe_ggtt_node_insert_balloon_locked(); and this @node is not going to be reused, then,
> - * this function needs to be called to free the %xe_ggtt_node struct
> + * If anything went wrong with either xe_ggtt_node_insert() and this @node is
> + * not going to be reused, then this function needs to be called to free the
> + * %xe_ggtt_node struct
> **/
> void xe_ggtt_node_fini(struct xe_ggtt_node *node)
> {
> diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h
> index 4a8ef1b824156..dd321261bd599 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt.h
> @@ -19,10 +19,7 @@ int xe_ggtt_init(struct xe_ggtt *ggtt);
>
> struct xe_ggtt_node *xe_ggtt_node_init(struct xe_ggtt *ggtt);
> void xe_ggtt_node_fini(struct xe_ggtt_node *node);
> -int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node,
> - u64 start, u64 size);
> -void xe_ggtt_node_remove_balloon_locked(struct xe_ggtt_node *node);
> -void xe_ggtt_shift_nodes_locked(struct xe_ggtt *ggtt, s64 shift);
> +void xe_ggtt_shift_nodes(struct xe_ggtt *ggtt, s64 shift);
> u64 xe_ggtt_start(struct xe_ggtt *ggtt);
> u64 xe_ggtt_size(struct xe_ggtt *ggtt);
>
> diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggtt_types.h
> index 31054e00daa6b..2058082234591 100644
> --- a/drivers/gpu/drm/xe/xe_ggtt_types.h
> +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h
> @@ -59,6 +59,7 @@ typedef void (*xe_ggtt_transform_cb)(struct xe_ggtt *ggtt,
> struct xe_ggtt_node *node,
> u64 pte_flags,
> xe_ggtt_set_pte_fn set_pte, void *arg);
> +
> /**
> * struct xe_ggtt_pt_ops - GGTT Page table operations
> * Which can vary from platform to platform.
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index 46518e629ba36..dd3cd7f140cd1 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -442,7 +442,6 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
> static int vf_get_ggtt_info(struct xe_gt *gt)
> {
> struct xe_tile *tile = gt_to_tile(gt);
> - struct xe_ggtt *ggtt = tile->mem.ggtt;
> struct xe_guc *guc = >->uc.guc;
> u64 start, size, ggtt_size;
> s64 shift;
> @@ -450,7 +449,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
>
> xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
>
> - guard(mutex)(&ggtt->lock);
> + guard(mutex)(&tile->sriov.vf.self_config.ggtt_move_mutex);
>
Again a small helper to return mutex rather than reaching into another
layers structures.
> err = guc_action_query_single_klv64(guc, GUC_KLV_VF_CFG_GGTT_START_KEY, &start);
> if (unlikely(err))
> @@ -480,7 +479,7 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
> if (shift && shift != start) {
> xe_gt_sriov_info(gt, "Shifting GGTT base by %lld to 0x%016llx\n",
> shift, start);
> - xe_tile_sriov_vf_fixup_ggtt_nodes_locked(gt_to_tile(gt), shift);
> + xe_ggtt_shift_nodes(tile->mem.ggtt, shift);
> }
>
> if (xe_sriov_vf_migration_supported(gt_to_xe(gt))) {
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 24a38904bb508..1a799e6bd4bcb 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -32,6 +32,7 @@
> #include "xe_pm.h"
> #include "xe_printk.h"
> #include "xe_sriov.h"
> +#include "xe_tile_sriov_vf.h"
> #include "xe_step.h"
> #include "xe_survivability_mode.h"
> #include "xe_tile.h"
> @@ -836,6 +837,12 @@ static int xe_info_init(struct xe_device *xe,
> for_each_tile(tile, xe, id) {
> int err;
>
> + if (IS_SRIOV_VF(xe)) {
> + err = xe_tile_sriov_vf_init(tile);
> + if (err)
> + return err;
> + }
> +
> err = xe_tile_alloc_vram(tile);
> if (err)
> return err;
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> index c9bac2cfdd044..d1fa46e268350 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> @@ -14,173 +14,12 @@
> #include "xe_tile_sriov_vf.h"
> #include "xe_wopcm.h"
>
> -static int vf_init_ggtt_balloons(struct xe_tile *tile)
> -{
> - struct xe_ggtt *ggtt = tile->mem.ggtt;
> -
> - xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> -
> - tile->sriov.vf.ggtt_balloon[0] = xe_ggtt_node_init(ggtt);
> - if (IS_ERR(tile->sriov.vf.ggtt_balloon[0]))
> - return PTR_ERR(tile->sriov.vf.ggtt_balloon[0]);
> -
> - tile->sriov.vf.ggtt_balloon[1] = xe_ggtt_node_init(ggtt);
> - if (IS_ERR(tile->sriov.vf.ggtt_balloon[1])) {
> - xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
> - return PTR_ERR(tile->sriov.vf.ggtt_balloon[1]);
> - }
> -
> - return 0;
> -}
> -
> -/**
> - * xe_tile_sriov_vf_balloon_ggtt_locked - Insert balloon nodes to limit used GGTT address range.
> - * @tile: the &xe_tile struct instance
> - *
> - * Return: 0 on success or a negative error code on failure.
> - */
> -static int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile)
> -{
> - u64 ggtt_base = tile->sriov.vf.self_config.ggtt_base;
> - u64 ggtt_size = tile->sriov.vf.self_config.ggtt_size;
> - struct xe_device *xe = tile_to_xe(tile);
> - u64 wopcm = xe_wopcm_size(xe);
> - u64 start, end;
> - int err;
> -
> - xe_tile_assert(tile, IS_SRIOV_VF(xe));
> - xe_tile_assert(tile, ggtt_size);
> - lockdep_assert_held(&tile->mem.ggtt->lock);
> -
> - /*
> - * VF can only use part of the GGTT as allocated by the PF:
> - *
> - * WOPCM GUC_GGTT_TOP
> - * |<------------ Total GGTT size ------------------>|
> - *
> - * VF GGTT base -->|<- size ->|
> - *
> - * +--------------------+----------+-----------------+
> - * |////////////////////| block |\\\\\\\\\\\\\\\\\|
> - * +--------------------+----------+-----------------+
> - *
> - * |<--- balloon[0] --->|<-- VF -->|<-- balloon[1] ->|
> - */
> -
> - if (ggtt_base < wopcm || ggtt_base > GUC_GGTT_TOP ||
> - ggtt_size > GUC_GGTT_TOP - ggtt_base) {
> - xe_sriov_err(xe, "tile%u: Invalid GGTT configuration: %#llx-%#llx\n",
> - tile->id, ggtt_base, ggtt_base + ggtt_size - 1);
> - return -ERANGE;
> - }
> -
> - start = wopcm;
> - end = ggtt_base;
> - if (end != start) {
> - err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[0],
> - start, end);
> - if (err)
> - return err;
> - }
> -
> - start = ggtt_base + ggtt_size;
> - end = GUC_GGTT_TOP;
> - if (end != start) {
> - err = xe_ggtt_node_insert_balloon_locked(tile->sriov.vf.ggtt_balloon[1],
> - start, end);
> - if (err) {
> - xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
> - return err;
> - }
> - }
> -
> - return 0;
> -}
> -
> -static int vf_balloon_ggtt(struct xe_tile *tile)
> -{
> - struct xe_ggtt *ggtt = tile->mem.ggtt;
> - int err;
> -
> - mutex_lock(&ggtt->lock);
> - err = xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> - mutex_unlock(&ggtt->lock);
> -
> - return err;
> -}
> -
> -/**
> - * xe_tile_sriov_vf_deballoon_ggtt_locked - Remove balloon nodes.
> - * @tile: the &xe_tile struct instance
> - */
> -void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile)
> -{
> - xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> -
> - xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[1]);
> - xe_ggtt_node_remove_balloon_locked(tile->sriov.vf.ggtt_balloon[0]);
> -}
> -
> -static void vf_deballoon_ggtt(struct xe_tile *tile)
> -{
> - mutex_lock(&tile->mem.ggtt->lock);
> - xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> - mutex_unlock(&tile->mem.ggtt->lock);
> -}
> -
> -static void vf_fini_ggtt_balloons(struct xe_tile *tile)
> -{
> - xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> -
> - xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[1]);
> - xe_ggtt_node_fini(tile->sriov.vf.ggtt_balloon[0]);
> -}
> -
> -static void cleanup_ggtt(struct drm_device *drm, void *arg)
> -{
> - struct xe_tile *tile = arg;
> -
> - vf_deballoon_ggtt(tile);
> - vf_fini_ggtt_balloons(tile);
> -}
> -
> -/**
> - * xe_tile_sriov_vf_prepare_ggtt - Prepare a VF's GGTT configuration.
> - * @tile: the &xe_tile
> - *
> - * This function is for VF use only.
> - *
> - * Return: 0 on success or a negative error code on failure.
> - */
> -int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> -{
> - struct xe_device *xe = tile_to_xe(tile);
> - int err;
> -
> - err = vf_init_ggtt_balloons(tile);
> - if (err)
> - return err;
> -
> - err = vf_balloon_ggtt(tile);
> - if (err) {
> - vf_fini_ggtt_balloons(tile);
> - return err;
> - }
> -
> - return drmm_add_action_or_reset(&xe->drm, cleanup_ggtt, tile);
> -}
> -
> /**
> * DOC: GGTT nodes shifting during VF post-migration recovery
> *
> * The first fixup applied to the VF KMD structures as part of post-migration
> * recovery is shifting nodes within &xe_ggtt instance. The nodes are moved
> * from range previously assigned to this VF, into newly provisioned area.
> - * The changes include balloons, which are resized accordingly.
> - *
> - * The balloon nodes are there to eliminate unavailable ranges from use: one
> - * reserves the GGTT area below the range for current VF, and another one
> - * reserves area above.
> *
> * Below is a GGTT layout of example VF, with a certain address range assigned to
> * said VF, and inaccessible areas above and below:
> @@ -198,10 +37,6 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> *
> * |<------- inaccessible for VF ------->|<VF owned>|<-- inaccessible for VF ->|
> *
> - * GGTT nodes used for tracking allocations:
> - *
> - * |<---------- balloon ------------>|<- nodes->|<----- balloon ------>|
> - *
> * After the migration, GGTT area assigned to the VF might have shifted, either
> * to lower or to higher address. But we expect the total size and extra areas to
> * be identical, as migration can only happen between matching platforms.
> @@ -219,35 +54,27 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile)
> * So the VF has a new slice of GGTT assigned, and during migration process, the
> * memory content was copied to that new area. But the &xe_ggtt nodes are still
> * tracking allocations using the old addresses. The nodes within VF owned area
> - * have to be shifted, and balloon nodes need to be resized to properly mask out
> - * areas not owned by the VF.
> - *
> - * Fixed &xe_ggtt nodes used for tracking allocations:
> + * have to be shifted, and the start offset for GGTT adjusted.
> *
> - * |<------ balloon ------>|<- nodes->|<----------- balloon ----------->|
> - *
> - * Due to use of GPU profiles, we do not expect the old and new GGTT ares to
> + * Due to use of GPU profiles, we do not expect the old and new GGTT areas to
> * overlap; but our node shifting will fix addresses properly regardless.
> */
>
> /**
> - * xe_tile_sriov_vf_fixup_ggtt_nodes_locked - Shift GGTT allocations to match assigned range.
> - * @tile: the &xe_tile struct instance
> - * @shift: the shift value
> + * xe_tile_sriov_vf_init - Init tile specific GGTT configuration.
> + * @tile: the &xe_tile
> *
> - * Since Global GTT is not virtualized, each VF has an assigned range
> - * within the global space. This range might have changed during migration,
> - * which requires all memory addresses pointing to GGTT to be shifted.
> + * This function is for VF use only.
> + *
> + * Return: 0 on success, negative value on error.
> */
> -void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift)
> +int xe_tile_sriov_vf_init(struct xe_tile *tile)
> {
> - struct xe_ggtt *ggtt = tile->mem.ggtt;
> + struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
>
> - lockdep_assert_held(&ggtt->lock);
> + xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
>
> - xe_tile_sriov_vf_deballoon_ggtt_locked(tile);
> - xe_ggtt_shift_nodes_locked(ggtt, shift);
> - xe_tile_sriov_vf_balloon_ggtt_locked(tile);
> + return drmm_mutex_init(&tile->xe->drm, &config->ggtt_move_mutex);
> }
>
> /**
> @@ -312,6 +139,7 @@ void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size)
> struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
>
> xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> + lockdep_assert_held(&config->ggtt_move_mutex);
>
> config->ggtt_size = ggtt_size;
> }
> @@ -345,6 +173,7 @@ void xe_tile_sriov_vf_ggtt_base_store(struct xe_tile *tile, u64 ggtt_base)
> struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
>
> xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> + lockdep_assert_held(&config->ggtt_move_mutex);
>
> config->ggtt_base = ggtt_base;
> }
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> index 749f41504883c..1ca5bc87963f0 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> @@ -10,9 +10,7 @@
>
> struct xe_tile;
>
> -int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
> -void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
> -void xe_tile_sriov_vf_fixup_ggtt_nodes_locked(struct xe_tile *tile, s64 shift);
> +int xe_tile_sriov_vf_init(struct xe_tile *tile);
> u64 xe_tile_sriov_vf_ggtt(struct xe_tile *tile);
> void xe_tile_sriov_vf_ggtt_store(struct xe_tile *tile, u64 ggtt_size);
> u64 xe_tile_sriov_vf_ggtt_base(struct xe_tile *tile);
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> index 4807ca51614cf..2cbbc51c101d4 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> @@ -7,11 +7,15 @@
> #define _XE_TILE_SRIOV_VF_TYPES_H_
>
> #include <linux/types.h>
> +#include <linux/mutex.h>
>
> /**
> * struct xe_tile_sriov_vf_selfconfig - VF configuration data.
> */
> struct xe_tile_sriov_vf_selfconfig {
> + /** @ggtt_move_mutex: Prevents multiple movements from happening in parallel */
> + struct mutex ggtt_move_mutex;
> +
Extra newline.
Matt
> /** @ggtt_base: assigned base offset of the GGTT region. */
> u64 ggtt_base;
> /** @ggtt_size: assigned size of the GGTT region. */
> --
> 2.51.0
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node
2025-10-15 21:49 ` Matthew Brost
@ 2025-10-16 6:13 ` Maarten Lankhorst
2025-10-17 20:53 ` Matthew Brost
0 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-16 6:13 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
Hey,
Den 2025-10-15 kl. 23:49, skrev Matthew Brost:
> On Wed, Oct 15, 2025 at 09:47:12AM +0200, Maarten Lankhorst wrote:
>> This function makes it possible to add an offset that is applied to
>> all xe_ggtt_node's, and hides the internals from all its users.
>>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>> drivers/gpu/drm/xe/xe_bo.h | 8 +++++---
>> drivers/gpu/drm/xe/xe_ggtt.c | 11 +++++++++++
>> drivers/gpu/drm/xe/xe_ggtt.h | 2 ++
>> 3 files changed, 18 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
>> index 353d607d301da..dd67a6f40a16d 100644
>> --- a/drivers/gpu/drm/xe/xe_bo.h
>> +++ b/drivers/gpu/drm/xe/xe_bo.h
>> @@ -9,6 +9,7 @@
>> #include <drm/ttm/ttm_tt.h>
>>
>> #include "xe_bo_types.h"
>> +#include "xe_ggtt.h"
>> #include "xe_macros.h"
>> #include "xe_validation.h"
>> #include "xe_vm_types.h"
>> @@ -251,13 +252,14 @@ static inline u32
>> __xe_bo_ggtt_addr(struct xe_bo *bo, u8 tile_id)
>> {
>> struct xe_ggtt_node *ggtt_node = bo->ggtt_node[tile_id];
>> + u64 offset;
>>
>> if (XE_WARN_ON(!ggtt_node))
>> return 0;
>>
>> - XE_WARN_ON(ggtt_node->base.size > xe_bo_size(bo));
>
> Is there any reason this warning was dropped? It's not immediately
> obvious to me why it would be.
>
The impossibility because of being allocated with a different size
than xe_bo_size() in __xe_ggtt_insert_bo_at(). I dropped it
because it's redundant.
Kind regards,
~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c
2025-10-15 21:58 ` Matthew Brost
@ 2025-10-16 6:33 ` Maarten Lankhorst
2025-10-17 20:54 ` Matthew Brost
0 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-16 6:33 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
Hey,
Den 2025-10-15 kl. 23:58, skrev Matthew Brost:
> On Wed, Oct 15, 2025 at 09:47:14AM +0200, Maarten Lankhorst wrote:
>> A careful inspection of __xe_ggtt_insert_bo_at() shows that
>> the ggtt_node can always be seen as inserted from xe_bo.c
>> due to the way error handling is performed.
>>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>> drivers/gpu/drm/xe/xe_bo.c | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
>> index 7b65020818738..c895214a7a570 100644
>> --- a/drivers/gpu/drm/xe/xe_bo.c
>> +++ b/drivers/gpu/drm/xe/xe_bo.c
>> @@ -1700,7 +1700,7 @@ static void xe_ttm_bo_destroy(struct ttm_buffer_object *ttm_bo)
>> xe_assert(xe, list_empty(&ttm_bo->base.gpuva.list));
>>
>> for_each_tile(tile, xe, id)
>> - if (bo->ggtt_node[id] && bo->ggtt_node[id]->base.size)
>> + if (bo->ggtt_node[id])
>
> The additional checks beyond if ggtt node is present indeed look bogus.
> But perhaps to be little parnoid, maybe call
> xe_ggtt_node_allocated(bo->ggtt_node[id]) here?
A quick check of __xe_ggtt_insert_bo_at() shows that we never assign
a created but not allocated node to bo->ggtt_node[id].
I'm getting rid of xe_ggtt_node_init() as an external call later anyway,
so it's safe to remove here.
>
>> xe_ggtt_remove_bo(tile->mem.ggtt, bo);
>>
>> #ifdef CONFIG_PROC_FS
>> @@ -3581,8 +3581,8 @@ void xe_bo_put(struct xe_bo *bo)
>> might_lock(&bo->client->bos_lock);
>> #endif
>> for_each_tile(tile, xe_bo_device(bo), id)
>> - if (bo->ggtt_node[id] && bo->ggtt_node[id]->ggtt)
>> - xe_ggtt_might_lock(bo->ggtt_node[id]->ggtt);
>> + if (bo->ggtt_node[id])
>
> Same here, call xe_ggtt_node_allocated(bo->ggtt_node[id])?
Same reasoning. :-)
>
> Matt
>
Best regards,
~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset
2025-10-15 22:38 ` Matthew Brost
@ 2025-10-16 6:40 ` Maarten Lankhorst
0 siblings, 0 replies; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-16 6:40 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
Hey,
Den 2025-10-16 kl. 00:38, skrev Matthew Brost:
> On Wed, Oct 15, 2025 at 09:47:17AM +0200, Maarten Lankhorst wrote:
>> This will make node shifting in the next commit a one-liner.
>>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>> drivers/gpu/drm/xe/xe_ggtt.c | 21 ++++++++++++++-------
>> 1 file changed, 14 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c
>> index 5c07d63189ab1..1c97a06424b5c 100644
>> --- a/drivers/gpu/drm/xe/xe_ggtt.c
>> +++ b/drivers/gpu/drm/xe/xe_ggtt.c
>> @@ -289,7 +289,7 @@ static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u64 start, u64 size)
>> {
>> ggtt->start = start;
>> ggtt->size = size;
>> - drm_mm_init(&ggtt->mm, start, size);
>> + drm_mm_init(&ggtt->mm, 0, size - start);
>
> We should probably fix the drm_mm_init function signature so the last
> argument is called 'end' rather than 'size'. Can be done in a follow up
> though.
>
>> }
>>
>> int xe_ggtt_init_kunit(struct xe_ggtt *ggtt, u32 start, u32 size)
>> @@ -388,7 +388,7 @@ static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
>> /* Display may have allocated inside ggtt, so be careful with clearing here */
>> mutex_lock(&ggtt->lock);
>> drm_mm_for_each_hole(hole, &ggtt->mm, start, end)
>> - xe_ggtt_clear(ggtt, start, end - start);
>> + xe_ggtt_clear(ggtt, ggtt->start + start, end - start);
>>
>> xe_ggtt_invalidate(ggtt);
>> mutex_unlock(&ggtt->lock);
>> @@ -405,7 +405,7 @@ static void ggtt_node_remove(struct xe_ggtt_node *node)
>>
>> mutex_lock(&ggtt->lock);
>> if (bound)
>> - xe_ggtt_clear(ggtt, node->base.start, node->base.size);
>> + xe_ggtt_clear(ggtt, xe_ggtt_node_addr(node), node->base.size);
>> drm_mm_remove_node(&node->base);
>> node->base.size = 0;
>> mutex_unlock(&ggtt->lock);
>> @@ -561,13 +561,13 @@ int xe_ggtt_node_insert_balloon_locked(struct xe_ggtt_node *node, u64 start, u64
>> lockdep_assert_held(&ggtt->lock);
>>
>> node->base.color = 0;
>> - node->base.start = start;
>> + node->base.start = start - ggtt->start;
>> node->base.size = end - start;
>>
>> err = drm_mm_reserve_node(&ggtt->mm, &node->base);
>>
>> if (xe_tile_WARN(ggtt->tile, err, "Failed to balloon GGTT %#llx-%#llx (%pe)\n",
>> - node->base.start, node->base.start + node->base.size, ERR_PTR(err)))
>> + xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + node->base.size, ERR_PTR(err)))
>> return err;
>>
>> xe_ggtt_dump_node(ggtt, &node->base, "balloon");
>> @@ -744,7 +744,7 @@ static void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_ggtt_node *node,
>> if (XE_WARN_ON(!node))
>> return;
>>
>> - start = node->base.start;
>> + start = xe_ggtt_node_addr(node);
>> end = start + xe_bo_size(bo);
>>
>> if (!xe_bo_is_vram(bo) && !xe_bo_is_stolen(bo)) {
>> @@ -865,6 +865,13 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
>> }
>>
>> mutex_lock(&ggtt->lock);
>> + if (start >= ggtt->start)
>> + start -= ggtt->start;
>> + else
>> + start = 0;
>
> Does this logic work if let's say start == 0x1000 and ggtt->start ==
> 0x2000. It seems like that is caller bug which we should assert 'start
>> = ggtt->start', right?
This is to handle the special case start = 0 with end = UINT_MAX, and then being permissive
and allowing all values < ggtt->start as well.
Specifying start = 0 is valid.
>> +
>> + end -= ggtt->start;
>> +
>> err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node[tile_id]->base,
>> xe_bo_size(bo), alignment, 0, start, end, 0);
>> if (err) {
>> @@ -1106,5 +1113,5 @@ u64 xe_ggtt_read_pte(struct xe_ggtt *ggtt, u64 offset)
>> */
>> u64 xe_ggtt_node_addr(const struct xe_ggtt_node *node)
>> {
>> - return node->base.start;
>> + return node->base.start + READ_ONCE(node->ggtt->start);
>
> Why the READ_ONCE here?
Will be paired with a WRITE_ONCE in shift_nodes() in the next couple of patches.
Best regards,
~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
2025-10-15 22:04 ` Matthew Brost
@ 2025-10-16 8:50 ` Michal Wajdeczko
2025-10-16 13:46 ` Maarten Lankhorst
0 siblings, 1 reply; 34+ messages in thread
From: Michal Wajdeczko @ 2025-10-16 8:50 UTC (permalink / raw)
To: Matthew Brost, Maarten Lankhorst; +Cc: intel-xe
On 10/16/2025 12:04 AM, Matthew Brost wrote:
> On Wed, Oct 15, 2025 at 09:47:15AM +0200, Maarten Lankhorst wrote:
>> Do not directly dereference xe_ggtt_node, and add
>> a member to store the GGTT size.
>>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 15 ++++++++-------
>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h | 8 ++++++--
>> 2 files changed, 14 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>> index 2289756761636..c0dfffd5c553b 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>> @@ -264,7 +264,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
>> if (!xe_ggtt_node_allocated(node))
>> return 0;
>>
>> - return encode_ggtt(cfg, node->base.start, node->base.size, details);
>> + return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
>> }
>>
>> /* Return: number of configuration dwords written */
>> @@ -495,13 +495,14 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
>>
>> xe_ggtt_assign(node, vfid);
>> xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
>> - vfid, node->base.start, node->base.start + node->base.size - 1);
>> + vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
>>
>> - err = pf_distribute_config_ggtt(gt->tile, vfid, node->base.start, node->base.size);
>> + err = pf_distribute_config_ggtt(gt->tile, vfid, xe_ggtt_node_addr(node), size);
>> if (unlikely(err))
>> goto err;
>>
>> config->ggtt_region = node;
>> + config->ggtt_size = size;
>> return 0;
>> err:
>> pf_release_ggtt(tile, node);
>> @@ -514,7 +515,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
>> struct xe_ggtt_node *node = config->ggtt_region;
>>
>> xe_gt_assert(gt, xe_gt_is_main_type(gt));
>> - return xe_ggtt_node_allocated(node) ? node->base.size : 0;
>> + return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
>> }
>>
>> /**
>> @@ -2516,11 +2517,11 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
>> if (!xe_ggtt_node_allocated(config->ggtt_region))
>> continue;
>>
>> - string_get_size(config->ggtt_region->base.size, 1, STRING_UNITS_2,
>> + string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
>> buf, sizeof(buf));
>> drm_printf(p, "VF%u:\t%#0llx-%#llx\t(%s)\n",
>> - n, config->ggtt_region->base.start,
>> - config->ggtt_region->base.start + config->ggtt_region->base.size - 1,
>> + n, xe_ggtt_node_addr(config->ggtt_region),
>> + xe_ggtt_node_addr(config->ggtt_region) + config->ggtt_size - 1,
>> buf);
>> }
>>
>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>> index 686c7b3b6d7a5..9a8e66c8b539f 100644
>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>> @@ -17,10 +17,14 @@ struct xe_bo;
>> * Used by the PF driver to maintain per-VF provisioning data.
>> */
>> struct xe_gt_sriov_config {
>> - /** @ggtt_region: GGTT region assigned to the VF. */
>> - struct xe_ggtt_node *ggtt_region;
>> /** @lmem_obj: LMEM allocation for use by the VF. */
>> struct xe_bo *lmem_obj;
>> +
>> + /** @ggtt_region: GGTT region assigned to the VF. */
>> + struct xe_ggtt_node *ggtt_region;
>> + /** @ggtt_size: Size of GGTT region */
>> + u64 ggtt_size;
>
> Nit: Couldn't we have a helper to dervive the size from the
> xe_ggtt_node to avoid storing the ggtt_size explicitly?
+1 (as already commented)
>
>> +
>
> Longterm we should likely move the PF GGTT config to a per-tile
> structure like we did for the VF GGTT config. IMO we can do that in
> follow up. Maybe ping Michal for his thoughts here.
I have almost finished series with GGTT/LMEM changes, but switched to
higher priority task (provisioning over sysfs), hopefully will be able
to return to this topic soon
>
> Anyways, this looks like a good cleanup for the existing code structure.
>
> With that:
> Reviewed-by: <Matthew.brost@intel.com>
>
>> /** @num_ctxs: number of GuC contexts IDs. */
>> u16 num_ctxs;
>> /** @begin_ctx: start index of GuC context ID range. */
>> --
>> 2.51.0
>>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
2025-10-16 8:50 ` Michal Wajdeczko
@ 2025-10-16 13:46 ` Maarten Lankhorst
2025-10-16 13:58 ` Michal Wajdeczko
0 siblings, 1 reply; 34+ messages in thread
From: Maarten Lankhorst @ 2025-10-16 13:46 UTC (permalink / raw)
To: Michal Wajdeczko, Matthew Brost; +Cc: intel-xe
Hey,
Den 2025-10-16 kl. 10:50, skrev Michal Wajdeczko:
>
>
> On 10/16/2025 12:04 AM, Matthew Brost wrote:
>> On Wed, Oct 15, 2025 at 09:47:15AM +0200, Maarten Lankhorst wrote:
>>> Do not directly dereference xe_ggtt_node, and add
>>> a member to store the GGTT size.
>>>
>>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>>> ---
>>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 15 ++++++++-------
>>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h | 8 ++++++--
>>> 2 files changed, 14 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>>> index 2289756761636..c0dfffd5c553b 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>>> @@ -264,7 +264,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
>>> if (!xe_ggtt_node_allocated(node))
>>> return 0;
>>>
>>> - return encode_ggtt(cfg, node->base.start, node->base.size, details);
>>> + return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
>>> }
>>>
>>> /* Return: number of configuration dwords written */
>>> @@ -495,13 +495,14 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
>>>
>>> xe_ggtt_assign(node, vfid);
>>> xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
>>> - vfid, node->base.start, node->base.start + node->base.size - 1);
>>> + vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
>>>
>>> - err = pf_distribute_config_ggtt(gt->tile, vfid, node->base.start, node->base.size);
>>> + err = pf_distribute_config_ggtt(gt->tile, vfid, xe_ggtt_node_addr(node), size);
>>> if (unlikely(err))
>>> goto err;
>>>
>>> config->ggtt_region = node;
>>> + config->ggtt_size = size;
>>> return 0;
>>> err:
>>> pf_release_ggtt(tile, node);
>>> @@ -514,7 +515,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
>>> struct xe_ggtt_node *node = config->ggtt_region;
>>>
>>> xe_gt_assert(gt, xe_gt_is_main_type(gt));
>>> - return xe_ggtt_node_allocated(node) ? node->base.size : 0;
>>> + return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
>>> }
>>>
>>> /**
>>> @@ -2516,11 +2517,11 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
>>> if (!xe_ggtt_node_allocated(config->ggtt_region))
>>> continue;
>>>
>>> - string_get_size(config->ggtt_region->base.size, 1, STRING_UNITS_2,
>>> + string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
>>> buf, sizeof(buf));
>>> drm_printf(p, "VF%u:\t%#0llx-%#llx\t(%s)\n",
>>> - n, config->ggtt_region->base.start,
>>> - config->ggtt_region->base.start + config->ggtt_region->base.size - 1,
>>> + n, xe_ggtt_node_addr(config->ggtt_region),
>>> + xe_ggtt_node_addr(config->ggtt_region) + config->ggtt_size - 1,
>>> buf);
>>> }
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>>> index 686c7b3b6d7a5..9a8e66c8b539f 100644
>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>>> @@ -17,10 +17,14 @@ struct xe_bo;
>>> * Used by the PF driver to maintain per-VF provisioning data.
>>> */
>>> struct xe_gt_sriov_config {
>>> - /** @ggtt_region: GGTT region assigned to the VF. */
>>> - struct xe_ggtt_node *ggtt_region;
>>> /** @lmem_obj: LMEM allocation for use by the VF. */
>>> struct xe_bo *lmem_obj;
>>> +
>>> + /** @ggtt_region: GGTT region assigned to the VF. */
>>> + struct xe_ggtt_node *ggtt_region;
>>> + /** @ggtt_size: Size of GGTT region */
>>> + u64 ggtt_size;
>>
>> Nit: Couldn't we have a helper to dervive the size from the
>> xe_ggtt_node to avoid storing the ggtt_size explicitly?
>
> +1 (as already commented)
>
>>
>>> +
>>
>> Longterm we should likely move the PF GGTT config to a per-tile
>> structure like we did for the VF GGTT config. IMO we can do that in
>> follow up. Maybe ping Michal for his thoughts here.
>
> I have almost finished series with GGTT/LMEM changes, but switched to
> higher priority task (provisioning over sysfs), hopefully will be able
> to return to this topic soon
>
>>
>> Anyways, this looks like a good cleanup for the existing code structure.
>>
>> With that:
>> Reviewed-by: <Matthew.brost@intel.com>
All other users of xe_ggtt_node are not using the size member, would it
be too terrible to maintain it in a separate member for SRIOV PF
provisioning, instead of exposing it too?
Seems to me that the size of the ggtt_node is a detail, that we just
happened to expose and use in xe_sriov_pf_config. If necessary I can
keep maintaining that API, but it feels cleaner not to here.
Kind regards,
~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling
2025-10-16 13:46 ` Maarten Lankhorst
@ 2025-10-16 13:58 ` Michal Wajdeczko
0 siblings, 0 replies; 34+ messages in thread
From: Michal Wajdeczko @ 2025-10-16 13:58 UTC (permalink / raw)
To: Maarten Lankhorst, Matthew Brost; +Cc: intel-xe
On 10/16/2025 3:46 PM, Maarten Lankhorst wrote:
> Hey,
>
> Den 2025-10-16 kl. 10:50, skrev Michal Wajdeczko:
>>
>>
>> On 10/16/2025 12:04 AM, Matthew Brost wrote:
>>> On Wed, Oct 15, 2025 at 09:47:15AM +0200, Maarten Lankhorst wrote:
>>>> Do not directly dereference xe_ggtt_node, and add
>>>> a member to store the GGTT size.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>>>> ---
>>>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 15 ++++++++-------
>>>> drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h | 8 ++++++--
>>>> 2 files changed, 14 insertions(+), 9 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>>>> index 2289756761636..c0dfffd5c553b 100644
>>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
>>>> @@ -264,7 +264,7 @@ static u32 encode_config_ggtt(u32 *cfg, const struct xe_gt_sriov_config *config,
>>>> if (!xe_ggtt_node_allocated(node))
>>>> return 0;
>>>>
>>>> - return encode_ggtt(cfg, node->base.start, node->base.size, details);
>>>> + return encode_ggtt(cfg, xe_ggtt_node_addr(node), config->ggtt_size, details);
>>>> }
>>>>
>>>> /* Return: number of configuration dwords written */
>>>> @@ -495,13 +495,14 @@ static int pf_provision_vf_ggtt(struct xe_gt *gt, unsigned int vfid, u64 size)
>>>>
>>>> xe_ggtt_assign(node, vfid);
>>>> xe_gt_sriov_dbg_verbose(gt, "VF%u assigned GGTT %llx-%llx\n",
>>>> - vfid, node->base.start, node->base.start + node->base.size - 1);
>>>> + vfid, xe_ggtt_node_addr(node), xe_ggtt_node_addr(node) + size - 1);
>>>>
>>>> - err = pf_distribute_config_ggtt(gt->tile, vfid, node->base.start, node->base.size);
>>>> + err = pf_distribute_config_ggtt(gt->tile, vfid, xe_ggtt_node_addr(node), size);
>>>> if (unlikely(err))
>>>> goto err;
>>>>
>>>> config->ggtt_region = node;
>>>> + config->ggtt_size = size;
>>>> return 0;
>>>> err:
>>>> pf_release_ggtt(tile, node);
>>>> @@ -514,7 +515,7 @@ static u64 pf_get_vf_config_ggtt(struct xe_gt *gt, unsigned int vfid)
>>>> struct xe_ggtt_node *node = config->ggtt_region;
>>>>
>>>> xe_gt_assert(gt, xe_gt_is_main_type(gt));
>>>> - return xe_ggtt_node_allocated(node) ? node->base.size : 0;
>>>> + return xe_ggtt_node_allocated(node) ? config->ggtt_size : 0;
>>>> }
>>>>
>>>> /**
>>>> @@ -2516,11 +2517,11 @@ int xe_gt_sriov_pf_config_print_ggtt(struct xe_gt *gt, struct drm_printer *p)
>>>> if (!xe_ggtt_node_allocated(config->ggtt_region))
>>>> continue;
>>>>
>>>> - string_get_size(config->ggtt_region->base.size, 1, STRING_UNITS_2,
>>>> + string_get_size(config->ggtt_size, 1, STRING_UNITS_2,
>>>> buf, sizeof(buf));
>>>> drm_printf(p, "VF%u:\t%#0llx-%#llx\t(%s)\n",
>>>> - n, config->ggtt_region->base.start,
>>>> - config->ggtt_region->base.start + config->ggtt_region->base.size - 1,
>>>> + n, xe_ggtt_node_addr(config->ggtt_region),
>>>> + xe_ggtt_node_addr(config->ggtt_region) + config->ggtt_size - 1,
>>>> buf);
>>>> }
>>>>
>>>> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>>>> index 686c7b3b6d7a5..9a8e66c8b539f 100644
>>>> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>>>> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config_types.h
>>>> @@ -17,10 +17,14 @@ struct xe_bo;
>>>> * Used by the PF driver to maintain per-VF provisioning data.
>>>> */
>>>> struct xe_gt_sriov_config {
>>>> - /** @ggtt_region: GGTT region assigned to the VF. */
>>>> - struct xe_ggtt_node *ggtt_region;
>>>> /** @lmem_obj: LMEM allocation for use by the VF. */
>>>> struct xe_bo *lmem_obj;
>>>> +
>>>> + /** @ggtt_region: GGTT region assigned to the VF. */
>>>> + struct xe_ggtt_node *ggtt_region;
>>>> + /** @ggtt_size: Size of GGTT region */
>>>> + u64 ggtt_size;
>>>
>>> Nit: Couldn't we have a helper to dervive the size from the
>>> xe_ggtt_node to avoid storing the ggtt_size explicitly?
>>
>> +1 (as already commented)
>>
>>>
>>>> +
>>>
>>> Longterm we should likely move the PF GGTT config to a per-tile
>>> structure like we did for the VF GGTT config. IMO we can do that in
>>> follow up. Maybe ping Michal for his thoughts here.
>>
>> I have almost finished series with GGTT/LMEM changes, but switched to
>> higher priority task (provisioning over sysfs), hopefully will be able
>> to return to this topic soon
>>
>>>
>>> Anyways, this looks like a good cleanup for the existing code structure.
>>>
>>> With that:
>>> Reviewed-by: <Matthew.brost@intel.com>
>
> All other users of xe_ggtt_node are not using the size member, would it
because they don't interact with GGTT directly, and they can get the size
from the xe_bo itself
while in case of the PF, there is no BOs for those "allocations"
that's why PF directly uses xe_ggtt_node_insert() that doesn't take xe_bo*
> be too terrible to maintain it in a separate member for SRIOV PF
> provisioning, instead of exposing it too?
but why forcing the PF to cache something that the node already has (for free)
>
> Seems to me that the size of the ggtt_node is a detail, that we just
> happened to expose and use in xe_sriov_pf_config. If necessary I can
> keep maintaining that API, but it feels cleaner not to here.
exposing oneline function shouldn't be a huge maintenance cost IMO
>
> Kind regards,
> ~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node
2025-10-16 6:13 ` Maarten Lankhorst
@ 2025-10-17 20:53 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-17 20:53 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Thu, Oct 16, 2025 at 08:13:44AM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Den 2025-10-15 kl. 23:49, skrev Matthew Brost:
> > On Wed, Oct 15, 2025 at 09:47:12AM +0200, Maarten Lankhorst wrote:
> >> This function makes it possible to add an offset that is applied to
> >> all xe_ggtt_node's, and hides the internals from all its users.
> >>
> >> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> >> ---
> >> drivers/gpu/drm/xe/xe_bo.h | 8 +++++---
> >> drivers/gpu/drm/xe/xe_ggtt.c | 11 +++++++++++
> >> drivers/gpu/drm/xe/xe_ggtt.h | 2 ++
> >> 3 files changed, 18 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> >> index 353d607d301da..dd67a6f40a16d 100644
> >> --- a/drivers/gpu/drm/xe/xe_bo.h
> >> +++ b/drivers/gpu/drm/xe/xe_bo.h
> >> @@ -9,6 +9,7 @@
> >> #include <drm/ttm/ttm_tt.h>
> >>
> >> #include "xe_bo_types.h"
> >> +#include "xe_ggtt.h"
> >> #include "xe_macros.h"
> >> #include "xe_validation.h"
> >> #include "xe_vm_types.h"
> >> @@ -251,13 +252,14 @@ static inline u32
> >> __xe_bo_ggtt_addr(struct xe_bo *bo, u8 tile_id)
> >> {
> >> struct xe_ggtt_node *ggtt_node = bo->ggtt_node[tile_id];
> >> + u64 offset;
> >>
> >> if (XE_WARN_ON(!ggtt_node))
> >> return 0;
> >>
> >> - XE_WARN_ON(ggtt_node->base.size > xe_bo_size(bo));
> >
> > Is there any reason this warning was dropped? It's not immediately
> > obvious to me why it would be.
> >
> The impossibility because of being allocated with a different size
> than xe_bo_size() in __xe_ggtt_insert_bo_at(). I dropped it
> because it's redundant.
Ok, makes sense. I suppose with the GGTT being private you can't access
this information a bit later in the series.
Matt
>
> Kind regards,
> ~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c
2025-10-16 6:33 ` Maarten Lankhorst
@ 2025-10-17 20:54 ` Matthew Brost
0 siblings, 0 replies; 34+ messages in thread
From: Matthew Brost @ 2025-10-17 20:54 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-xe
On Thu, Oct 16, 2025 at 08:33:19AM +0200, Maarten Lankhorst wrote:
> Hey,
>
> Den 2025-10-15 kl. 23:58, skrev Matthew Brost:
> > On Wed, Oct 15, 2025 at 09:47:14AM +0200, Maarten Lankhorst wrote:
> >> A careful inspection of __xe_ggtt_insert_bo_at() shows that
> >> the ggtt_node can always be seen as inserted from xe_bo.c
> >> due to the way error handling is performed.
> >>
> >> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> >> ---
> >> drivers/gpu/drm/xe/xe_bo.c | 6 +++---
> >> 1 file changed, 3 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> >> index 7b65020818738..c895214a7a570 100644
> >> --- a/drivers/gpu/drm/xe/xe_bo.c
> >> +++ b/drivers/gpu/drm/xe/xe_bo.c
> >> @@ -1700,7 +1700,7 @@ static void xe_ttm_bo_destroy(struct ttm_buffer_object *ttm_bo)
> >> xe_assert(xe, list_empty(&ttm_bo->base.gpuva.list));
> >>
> >> for_each_tile(tile, xe, id)
> >> - if (bo->ggtt_node[id] && bo->ggtt_node[id]->base.size)
> >> + if (bo->ggtt_node[id])
> >
> > The additional checks beyond if ggtt node is present indeed look bogus.
> > But perhaps to be little parnoid, maybe call
> > xe_ggtt_node_allocated(bo->ggtt_node[id]) here?
>
> A quick check of __xe_ggtt_insert_bo_at() shows that we never assign
> a created but not allocated node to bo->ggtt_node[id].
>
> I'm getting rid of xe_ggtt_node_init() as an external call later anyway,
> so it's safe to remove here.
>
Yes, I see that xe_ggtt_node_init is dropped later in the series.
Code makes sense with that.
Matt
> >
> >> xe_ggtt_remove_bo(tile->mem.ggtt, bo);
> >>
> >> #ifdef CONFIG_PROC_FS
> >> @@ -3581,8 +3581,8 @@ void xe_bo_put(struct xe_bo *bo)
> >> might_lock(&bo->client->bos_lock);
> >> #endif
> >> for_each_tile(tile, xe_bo_device(bo), id)
> >> - if (bo->ggtt_node[id] && bo->ggtt_node[id]->ggtt)
> >> - xe_ggtt_might_lock(bo->ggtt_node[id]->ggtt);
> >> + if (bo->ggtt_node[id])
> >
> > Same here, call xe_ggtt_node_allocated(bo->ggtt_node[id])?
> Same reasoning. :-)
>
> >
> > Matt
> >
> Best regards,
> ~Maarten Lankhorst
^ permalink raw reply [flat|nested] 34+ messages in thread
end of thread, other threads:[~2025-10-18 2:48 UTC | newest]
Thread overview: 34+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-10-15 7:47 [PATCH v7 00/12] drm/xe: Make all xe_ggtt structs private Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 01/12] drm/xe: Start using ggtt->start in preparation of balloon removal Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 02/12] drm/xe: Convert xe_fb_pin to use a callback for insertion into GGTT Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 03/12] drm/xe: Add xe_ggtt_node_addr() to avoid dereferencing xe_ggtt_node Maarten Lankhorst
2025-10-15 21:49 ` Matthew Brost
2025-10-16 6:13 ` Maarten Lankhorst
2025-10-17 20:53 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 04/12] drm/xe/display: Avoid " Maarten Lankhorst
2025-10-15 21:53 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 05/12] drm/xe: Do not dereference ggtt_node in xe_bo.c Maarten Lankhorst
2025-10-15 21:58 ` Matthew Brost
2025-10-16 6:33 ` Maarten Lankhorst
2025-10-17 20:54 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 06/12] drm/xe: Improve xe_gt_sriov_pf_config GGTT handling Maarten Lankhorst
2025-10-15 22:04 ` Matthew Brost
2025-10-16 8:50 ` Michal Wajdeczko
2025-10-16 13:46 ` Maarten Lankhorst
2025-10-16 13:58 ` Michal Wajdeczko
2025-10-15 7:47 ` [PATCH v7 07/12] drm/xe: Privatize xe_ggtt_node Maarten Lankhorst
2025-10-15 22:05 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 08/12] drm/xe: Make xe_ggtt_node offset relative to starting offset Maarten Lankhorst
2025-10-15 22:38 ` Matthew Brost
2025-10-16 6:40 ` Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 09/12] drm/xe: Rewrite GGTT VF initialisation Maarten Lankhorst
2025-10-16 0:30 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 10/12] drm/xe: Move struct xe_ggtt to xe_ggtt.c Maarten Lankhorst
2025-10-15 7:47 ` [PATCH v7 11/12] drm/xe: Make xe_ggtt_node_insert return a node Maarten Lankhorst
2025-10-15 22:44 ` Matthew Brost
2025-10-15 7:47 ` [PATCH v7 12/12] drm/xe: Remove xe_ggtt_node_allocated Maarten Lankhorst
2025-10-15 22:41 ` Matthew Brost
2025-10-15 9:47 ` ✗ CI.checkpatch: warning for drm/xe: Make all xe_ggtt structs private. (rev2) Patchwork
2025-10-15 9:49 ` ✓ CI.KUnit: success " Patchwork
2025-10-15 11:03 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-15 19:55 ` ✗ Xe.CI.Full: failure " Patchwork
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