* [RFC v1 1/5] drm/xe/xe_sysctrl: Add System Controller support
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
@ 2026-03-20 7:25 ` Anoop, Vijay
2026-03-20 7:25 ` [RFC v1 2/5] drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support Anoop, Vijay
` (9 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anoop, Vijay @ 2026-03-20 7:25 UTC (permalink / raw)
To: intel-xe
Cc: umesh.nerlige.ramappa, badal.nilawar, rodrigo.vivi,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim,
anoop.c.vijay
From: Anoop Vijay <anoop.c.vijay@intel.com>
Do not review, CI only.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
---
drivers/gpu/drm/xe/Makefile | 2 +
drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 65 +++
drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++
drivers/gpu/drm/xe/xe_device.c | 5 +
drivers/gpu/drm/xe/xe_device_types.h | 6 +
drivers/gpu/drm/xe/xe_pci.c | 2 +
drivers/gpu/drm/xe/xe_pci_types.h | 1 +
drivers/gpu/drm/xe/xe_pm.c | 11 +
drivers/gpu/drm/xe/xe_sysctrl.c | 128 ++++++
drivers/gpu/drm/xe/xe_sysctrl.h | 23 ++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 369 ++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 31 ++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 40 ++
drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++
14 files changed, 751 insertions(+)
create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index dab979287a96..f9abaf687d46 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -123,6 +123,8 @@ xe-y += xe_bb.o \
xe_step.o \
xe_survivability_mode.o \
xe_sync.o \
+ xe_sysctrl.o \
+ xe_sysctrl_mailbox.o \
xe_tile.o \
xe_tile_sysfs.o \
xe_tlb_inval.o \
diff --git a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
new file mode 100644
index 000000000000..4cbde267ac44
--- /dev/null
+++ b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_ABI_H_
+#define _XE_SYSCTRL_ABI_H_
+
+#include <linux/types.h>
+
+/**
+ * DOC: System Controller ABI
+ *
+ * This header defines the Application Binary Interface (ABI) used by
+ * drm/xe to communicate with System Controller firmware on Intel Xe3p
+ * discrete GPU platforms.
+ *
+ * System Controller (sysctrl) is a firmware-managed entity on Intel
+ * dGPUs responsible for certain low-level platform management
+ * functions.
+ *
+ * Communication protocol:
+ *
+ * Communication uses a mailbox interface with messages composed of:
+ *
+ * - Application message header (struct xe_sysctrl_app_msg_hdr)
+ * containing group_id, command, and version
+ * - Variable-length, command-specific payload
+ *
+ * Message header format:
+ *
+ * The 32-bit application message header is packed as:
+ *
+ * - Bits [7:0] : Group ID identifying command group
+ * - Bits [15:8] : Command identifier within group
+ * - Bits [23:16] : Command version for interface compatibility
+ * - Bits [31:24] : Reserved, must be zero
+ *
+ * This header defines firmware ABI message formats and constants shared
+ * between driver and System Controller firmware.
+ */
+
+/**
+ * struct xe_sysctrl_app_msg_hdr - Application layer message header
+ * @data: 32-bit header data
+ *
+ * Header structure for application-level messages.
+ */
+struct xe_sysctrl_app_msg_hdr {
+ u32 data;
+} __packed;
+
+#define SYSCTRL_HDR_GROUP_ID_MASK GENMASK(7, 0)
+#define SYSCTRL_HDR_COMMAND_MASK GENMASK(14, 8)
+#define SYSCTRL_HDR_COMMAND_MAX 0x7f
+#define SYSCTRL_HDR_IS_RESPONSE BIT(15)
+#define SYSCTRL_HDR_RESERVED_MASK GENMASK(23, 16)
+#define SYSCTRL_HDR_RESULT_MASK GENMASK(31, 24)
+
+#define APP_HDR_GROUP_ID_MASK GENMASK(7, 0)
+#define APP_HDR_COMMAND_MASK GENMASK(15, 8)
+#define APP_HDR_VERSION_MASK GENMASK(23, 16)
+#define APP_HDR_RESERVED_MASK GENMASK(31, 24)
+
+#endif
diff --git a/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h b/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
new file mode 100644
index 000000000000..59f3f3ec59a6
--- /dev/null
+++ b/drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_REGS_H_
+#define _XE_SYSCTRL_REGS_H_
+
+#include "xe_regs.h"
+
+#define SYSCTRL_BASE_OFFSET 0xdb000
+#define SYSCTRL_BASE (SOC_BASE + SYSCTRL_BASE_OFFSET)
+#define SYSCTRL_MAILBOX_INDEX 0x03
+#define SYSCTRL_BAR_LENGTH 0x1000
+
+#define SYSCTRL_MB_CTRL XE_REG(0x10)
+#define SYSCTRL_MB_CTRL_RUN_BUSY REG_BIT(31)
+#define SYSCTRL_MB_CTRL_IRQ REG_BIT(30)
+#define SYSCTRL_MB_CTRL_RUN_BUSY_OUT REG_BIT(29)
+#define SYSCTRL_MB_CTRL_PARAM3_MASK REG_GENMASK(28, 24)
+#define SYSCTRL_MB_CTRL_PARAM2_MASK REG_GENMASK(23, 16)
+#define SYSCTRL_MB_CTRL_PARAM1_MASK REG_GENMASK(15, 8)
+#define SYSCTRL_MB_CTRL_COMMAND_MASK REG_GENMASK(7, 0)
+#define SYSCTRL_MB_CTRL_CMD REG_FIELD_PREP(SYSCTRL_MB_CTRL_COMMAND_MASK, 5)
+
+#define SYSCTRL_MB_DATA0 XE_REG(0x14)
+#define SYSCTRL_MB_DATA1 XE_REG(0x18)
+#define SYSCTRL_MB_DATA2 XE_REG(0x1c)
+#define SYSCTRL_MB_DATA3 XE_REG(0x20)
+
+#define SYSCTRL_FRAME_PHASE REG_BIT(24)
+#define SYSCTRL_FRAME_CURRENT_MASK REG_GENMASK(21, 16)
+#define SYSCTRL_FRAME_TOTAL_MASK REG_GENMASK(13, 8)
+#define SYSCTRL_FRAME_COMMAND_MASK REG_GENMASK(7, 0)
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index e77a3a3db73d..c70d4ae413a9 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -65,6 +65,7 @@
#include "xe_survivability_mode.h"
#include "xe_sriov.h"
#include "xe_svm.h"
+#include "xe_sysctrl.h"
#include "xe_tile.h"
#include "xe_ttm_stolen_mgr.h"
#include "xe_ttm_sys_mgr.h"
@@ -985,6 +986,10 @@ int xe_device_probe(struct xe_device *xe)
if (err)
goto err_unregister_display;
+ err = xe_sysctrl_init(xe);
+ if (err)
+ goto err_unregister_display;
+
err = xe_device_sysfs_init(xe);
if (err)
goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 615218d775b1..150c76b2acaf 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -27,6 +27,7 @@
#include "xe_sriov_vf_ccs_types.h"
#include "xe_step_types.h"
#include "xe_survivability_mode_types.h"
+#include "xe_sysctrl_types.h"
#include "xe_tile_types.h"
#include "xe_validation.h"
@@ -196,6 +197,8 @@ struct xe_device {
u8 has_soc_remapper_telem:1;
/** @info.has_sriov: Supports SR-IOV */
u8 has_sriov:1;
+ /** @info.has_sysctrl: Supports System Controller */
+ u8 has_sysctrl:1;
/** @info.has_usm: Device has unified shared memory support */
u8 has_usm:1;
/** @info.has_64bit_timestamp: Device supports 64-bit timestamps */
@@ -508,6 +511,9 @@ struct xe_device {
/** @i2c: I2C host controller */
struct xe_i2c *i2c;
+ /** @sc: System Controller */
+ struct xe_sysctrl sc;
+
/** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */
u32 atomic_svm_timeslice_ms;
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 189e2a1c29f9..f5dd77b6680f 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -465,6 +465,7 @@ static const struct xe_device_desc cri_desc = {
.has_soc_remapper_sysctrl = true,
.has_soc_remapper_telem = true,
.has_sriov = true,
+ .has_sysctrl = true,
.max_gt_per_tile = 2,
MULTI_LRC_MASK,
.require_force_probe = true,
@@ -764,6 +765,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
desc->has_sriov;
+ xe->info.has_sysctrl = desc->has_sysctrl;
xe->info.skip_guc_pc = desc->skip_guc_pc;
xe->info.skip_mtcfg = desc->skip_mtcfg;
xe->info.skip_pcode = desc->skip_pcode;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 8eee4fb1c57c..08386c5eca27 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -57,6 +57,7 @@ struct xe_device_desc {
u8 has_soc_remapper_sysctrl:1;
u8 has_soc_remapper_telem:1;
u8 has_sriov:1;
+ u8 has_sysctrl:1;
u8 needs_scratch:1;
u8 skip_guc_pc:1;
u8 skip_mtcfg:1;
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 01185f10a883..abdddd44a575 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -26,6 +26,7 @@
#include "xe_pcode.h"
#include "xe_pxp.h"
#include "xe_sriov_vf_ccs.h"
+#include "xe_sysctrl.h"
#include "xe_trace.h"
#include "xe_vm.h"
#include "xe_wa.h"
@@ -206,6 +207,8 @@ int xe_pm_suspend(struct xe_device *xe)
xe_i2c_pm_suspend(xe);
+ xe_sysctrl_pm_suspend(xe);
+
drm_dbg(&xe->drm, "Device suspended\n");
xe_pm_block_end_signalling();
@@ -259,6 +262,8 @@ int xe_pm_resume(struct xe_device *xe)
xe_i2c_pm_resume(xe, true);
+ xe_sysctrl_pm_resume(xe);
+
xe_irq_resume(xe);
for_each_gt(gt, xe, id) {
@@ -618,6 +623,9 @@ int xe_pm_runtime_suspend(struct xe_device *xe)
xe_i2c_pm_suspend(xe);
+ if (xe->d3cold.allowed)
+ xe_sysctrl_pm_suspend(xe);
+
xe_rpm_lockmap_release(xe);
xe_pm_write_callback_task(xe, NULL);
return 0;
@@ -670,6 +678,9 @@ int xe_pm_runtime_resume(struct xe_device *xe)
xe_i2c_pm_resume(xe, xe->d3cold.allowed);
+ if (xe->d3cold.allowed)
+ xe_sysctrl_pm_resume(xe);
+
xe_irq_resume(xe);
for_each_gt(gt, xe, id) {
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c
new file mode 100644
index 000000000000..d8f1f8cc2244
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl.c
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/mutex.h>
+
+#include <drm/drm_managed.h>
+
+#include "regs/xe_sysctrl_regs.h"
+#include "xe_assert.h"
+#include "xe_device.h"
+#include "xe_mmio.h"
+#include "xe_printk.h"
+#include "xe_soc_remapper.h"
+#include "xe_sriov.h"
+#include "xe_sysctrl.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_types.h"
+
+/**
+ * DOC: System Controller (sysctrl)
+ *
+ * System Controller (sysctrl) is a firmware-managed entity on Intel dGPUs
+ * responsible for selected low-level platform management functions.
+ * Communication between driver and System Controller is performed
+ * via a mailbox interface, enabling command and response exchange.
+ *
+ * This module provides initialization and support code for interacting
+ * with System Controller through the mailbox interface.
+ */
+static void sysctrl_fini(void *arg)
+{
+ struct xe_device *xe = arg;
+
+ xe->soc_remapper.set_sysctrl_region(xe, 0);
+}
+
+/**
+ * xe_sysctrl_init() - Initialize System Controller subsystem
+ * @xe: xe device instance
+ *
+ * Entry point for System Controller initialization, called from xe_device_probe.
+ * This function checks platform support and initializes the system controller.
+ *
+ * Return: 0 on success, error code on failure
+ */
+int xe_sysctrl_init(struct xe_device *xe)
+{
+ struct xe_tile *tile = xe_device_get_root_tile(xe);
+ struct xe_sysctrl *sc = &xe->sc;
+ int ret;
+
+ if (!xe->info.has_sysctrl)
+ return 0;
+
+ if (IS_SRIOV_VF(xe))
+ return 0;
+
+ xe_assert(xe, xe->soc_remapper.set_sysctrl_region);
+
+ xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
+
+ ret = devm_add_action_or_reset(xe->drm.dev, sysctrl_fini, xe);
+ if (ret)
+ return ret;
+
+ sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL);
+ if (!sc->mmio)
+ return -ENOMEM;
+
+ xe_mmio_init(sc->mmio, tile, tile->mmio.regs, tile->mmio.regs_size);
+ sc->mmio->adj_offset = SYSCTRL_BASE;
+ sc->mmio->adj_limit = U32_MAX;
+
+ ret = devm_mutex_init(xe->drm.dev, &sc->cmd_lock);
+ if (ret)
+ return ret;
+
+ xe_sysctrl_mailbox_init(sc);
+
+ return 0;
+}
+
+/**
+ * xe_sysctrl_pm_suspend() - System Controller suspend handler
+ * @xe: xe device instance
+ *
+ * Invoked during system suspend (S3/S4) and runtime suspend to D3.
+ *
+ * The SoC remapper region is cleared automatically by hardware on D3
+ * cold entry. No action is required. This function is kept to preserve
+ * suspend/resume symmetry and provide a hook for future System Controller
+ * suspend handling.
+ */
+void xe_sysctrl_pm_suspend(struct xe_device *xe)
+{
+ if (!xe->info.has_sysctrl)
+ return;
+
+ if (IS_SRIOV_VF(xe))
+ return;
+
+ /* SoC remapper region is disabled automatically on D3 cold entry; no action required. */
+}
+
+/**
+ * xe_sysctrl_pm_resume() - System Controller resume handler
+ * @xe: xe device instance
+ *
+ * Invoked during system resume (S3/S4 to S0) and runtime resume from D3cold.
+ * Restores SoC remapper configuration and reinitializes mailbox interface.
+ */
+void xe_sysctrl_pm_resume(struct xe_device *xe)
+{
+ struct xe_sysctrl *sc = &xe->sc;
+
+ if (!xe->info.has_sysctrl)
+ return;
+
+ if (IS_SRIOV_VF(xe))
+ return;
+
+ xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
+
+ xe_sysctrl_mailbox_init(sc);
+}
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h
new file mode 100644
index 000000000000..a816feed8da6
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_H_
+#define _XE_SYSCTRL_H_
+
+#include <linux/container_of.h>
+
+#include "xe_device_types.h"
+#include "xe_sysctrl_types.h"
+
+static inline struct xe_device *sc_to_xe(struct xe_sysctrl *sc)
+{
+ return container_of(sc, struct xe_device, sc);
+}
+
+int xe_sysctrl_init(struct xe_device *xe);
+void xe_sysctrl_pm_suspend(struct xe_device *xe);
+void xe_sysctrl_pm_resume(struct xe_device *xe);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
new file mode 100644
index 000000000000..b10c8b7e0c40
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
@@ -0,0 +1,369 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include <linux/bitfield.h>
+#include <linux/cleanup.h>
+#include <linux/minmax.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+
+#include "regs/xe_sysctrl_regs.h"
+#include "xe_device.h"
+#include "xe_mmio.h"
+#include "xe_pm.h"
+#include "xe_printk.h"
+#include "xe_sysctrl.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+struct xe_sysctrl_mailbox_msg_hdr {
+ __le32 data;
+} __packed;
+
+#define XE_SYSCTRL_HDR_GROUP_ID(hdr) \
+ FIELD_GET(SYSCTRL_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data))
+
+#define XE_SYSCTRL_HDR_COMMAND(hdr) \
+ FIELD_GET(SYSCTRL_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data))
+
+#define XE_SYSCTRL_HDR_IS_RESPONSE(hdr) \
+ FIELD_GET(SYSCTRL_HDR_IS_RESPONSE, le32_to_cpu((hdr)->data))
+
+#define XE_SYSCTRL_HDR_RESULT(hdr) \
+ FIELD_GET(SYSCTRL_HDR_RESULT_MASK, le32_to_cpu((hdr)->data))
+
+static bool sysctrl_wait_bit_clear(struct xe_sysctrl *sc, u32 bit_mask,
+ unsigned int timeout_ms)
+{
+ int ret;
+
+ ret = xe_mmio_wait32_not(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask,
+ timeout_ms * 1000, NULL, false);
+
+ return ret == 0;
+}
+
+static bool sysctrl_wait_bit_set(struct xe_sysctrl *sc, u32 bit_mask,
+ unsigned int timeout_ms)
+{
+ int ret;
+
+ ret = xe_mmio_wait32(sc->mmio, SYSCTRL_MB_CTRL, bit_mask, bit_mask,
+ timeout_ms * 1000, NULL, false);
+
+ return ret == 0;
+}
+
+static int sysctrl_write_frame(struct xe_sysctrl *sc, const void *frame,
+ size_t len)
+{
+ static const struct xe_reg regs[] = {
+ SYSCTRL_MB_DATA0, SYSCTRL_MB_DATA1, SYSCTRL_MB_DATA2, SYSCTRL_MB_DATA3
+ };
+ struct xe_device *xe = sc_to_xe(sc);
+ u32 val[XE_SYSCTRL_MB_FRAME_SIZE / sizeof(u32)] = {0};
+ u32 dw = DIV_ROUND_UP(len, sizeof(u32));
+ u32 i;
+
+ xe_assert(xe, len > 0 && len <= XE_SYSCTRL_MB_FRAME_SIZE);
+
+ memcpy(val, frame, len);
+
+ for (i = 0; i < dw; i++)
+ xe_mmio_write32(sc->mmio, regs[i], val[i]);
+
+ return 0;
+}
+
+static int sysctrl_read_frame(struct xe_sysctrl *sc, void *frame,
+ size_t len)
+{
+ static const struct xe_reg regs[] = {
+ SYSCTRL_MB_DATA0, SYSCTRL_MB_DATA1, SYSCTRL_MB_DATA2, SYSCTRL_MB_DATA3
+ };
+ struct xe_device *xe = sc_to_xe(sc);
+ u32 val[XE_SYSCTRL_MB_FRAME_SIZE / sizeof(u32)] = {0};
+ u32 dw = DIV_ROUND_UP(len, sizeof(u32));
+ u32 i;
+
+ xe_assert(xe, len > 0 && len <= XE_SYSCTRL_MB_FRAME_SIZE);
+
+ for (i = 0; i < dw; i++)
+ val[i] = xe_mmio_read32(sc->mmio, regs[i]);
+
+ memcpy(frame, val, len);
+
+ return 0;
+}
+
+static void sysctrl_clear_response(struct xe_sysctrl *sc)
+{
+ xe_mmio_rmw32(sc->mmio, SYSCTRL_MB_CTRL, SYSCTRL_MB_CTRL_RUN_BUSY_OUT, 0);
+}
+
+static int sysctrl_prepare_command(struct xe_device *xe,
+ u8 group_id, u8 command,
+ const void *data_in, size_t data_in_len,
+ u8 **mbox_cmd, size_t *cmd_size)
+{
+ struct xe_sysctrl_mailbox_msg_hdr *hdr;
+ size_t size;
+ u8 *buffer;
+
+ xe_assert(xe, command <= SYSCTRL_HDR_COMMAND_MAX);
+
+ if (data_in_len > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE - sizeof(*hdr)) {
+ xe_err(xe, "sysctrl: Input data too large: %zu bytes\n", data_in_len);
+ return -EINVAL;
+ }
+
+ size = sizeof(*hdr) + data_in_len;
+
+ buffer = kmalloc(size, GFP_KERNEL);
+ if (!buffer)
+ return -ENOMEM;
+
+ hdr = (struct xe_sysctrl_mailbox_msg_hdr *)buffer;
+ hdr->data = cpu_to_le32(FIELD_PREP(SYSCTRL_HDR_GROUP_ID_MASK, group_id) |
+ FIELD_PREP(SYSCTRL_HDR_COMMAND_MASK, command));
+
+ if (data_in && data_in_len)
+ memcpy(buffer + sizeof(*hdr), data_in, data_in_len);
+
+ *mbox_cmd = buffer;
+ *cmd_size = size;
+
+ return 0;
+}
+
+static int sysctrl_send_frames(struct xe_sysctrl *sc,
+ const u8 *mbox_cmd,
+ size_t cmd_size, unsigned int timeout_ms)
+{
+ struct xe_device *xe = sc_to_xe(sc);
+ u32 ctrl_reg, total_frames, frame;
+ size_t bytes_sent, frame_size;
+
+ total_frames = DIV_ROUND_UP(cmd_size, XE_SYSCTRL_MB_FRAME_SIZE);
+
+ if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) {
+ xe_err(xe, "sysctrl: Mailbox busy\n");
+ return -EBUSY;
+ }
+
+ sc->phase_bit ^= 1;
+ bytes_sent = 0;
+
+ for (frame = 0; frame < total_frames; frame++) {
+ frame_size = min_t(size_t, cmd_size - bytes_sent, XE_SYSCTRL_MB_FRAME_SIZE);
+
+ if (sysctrl_write_frame(sc, mbox_cmd + bytes_sent, frame_size)) {
+ xe_err(xe, "sysctrl: Failed to write frame %u\n", frame);
+ sc->phase_bit = 0;
+ return -EIO;
+ }
+
+ ctrl_reg = SYSCTRL_MB_CTRL_RUN_BUSY |
+ REG_FIELD_PREP(SYSCTRL_FRAME_CURRENT_MASK, frame) |
+ REG_FIELD_PREP(SYSCTRL_FRAME_TOTAL_MASK, total_frames - 1) |
+ SYSCTRL_MB_CTRL_CMD |
+ (sc->phase_bit ? SYSCTRL_FRAME_PHASE : 0);
+
+ xe_mmio_write32(sc->mmio, SYSCTRL_MB_CTRL, ctrl_reg);
+
+ if (!sysctrl_wait_bit_clear(sc, SYSCTRL_MB_CTRL_RUN_BUSY, timeout_ms)) {
+ xe_err(xe, "sysctrl: Frame %u acknowledgment timeout\n", frame);
+ sc->phase_bit = 0;
+ return -ETIMEDOUT;
+ }
+
+ bytes_sent += frame_size;
+ }
+
+ return 0;
+}
+
+static int sysctrl_process_frame(struct xe_sysctrl *sc, void *out,
+ size_t frame_size, unsigned int timeout_ms,
+ bool *done)
+{
+ u32 curr_frame, total_frames, ctrl_reg;
+ struct xe_device *xe = sc_to_xe(sc);
+ int ret;
+
+ if (!sysctrl_wait_bit_set(sc, SYSCTRL_MB_CTRL_RUN_BUSY_OUT, timeout_ms)) {
+ xe_err(xe, "sysctrl: Response frame timeout\n");
+ return -ETIMEDOUT;
+ }
+
+ ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL);
+ total_frames = FIELD_GET(SYSCTRL_FRAME_TOTAL_MASK, ctrl_reg);
+ curr_frame = FIELD_GET(SYSCTRL_FRAME_CURRENT_MASK, ctrl_reg);
+
+ ret = sysctrl_read_frame(sc, out, frame_size);
+ if (ret)
+ return ret;
+
+ sysctrl_clear_response(sc);
+
+ if (curr_frame == total_frames)
+ *done = true;
+
+ return 0;
+}
+
+static int sysctrl_receive_frames(struct xe_sysctrl *sc,
+ const struct xe_sysctrl_mailbox_msg_hdr *req,
+ void *data_out, size_t data_out_len,
+ size_t *rdata_len, unsigned int timeout_ms)
+{
+ struct xe_sysctrl_mailbox_msg_hdr *hdr;
+ struct xe_device *xe = sc_to_xe(sc);
+ size_t remain = sizeof(*hdr) + data_out_len;
+ u8 *buffer __free(kfree) = kzalloc(remain, GFP_KERNEL);
+ size_t frame_size;
+ bool done = false;
+ int ret = 0;
+ u8 *out;
+
+ if (!buffer)
+ return -ENOMEM;
+
+ out = buffer;
+ while (!done && remain) {
+ frame_size = min_t(size_t, remain, XE_SYSCTRL_MB_FRAME_SIZE);
+
+ ret = sysctrl_process_frame(sc, out, frame_size, timeout_ms,
+ &done);
+ if (ret)
+ return ret;
+
+ remain -= frame_size;
+ out += frame_size;
+ }
+
+ hdr = (struct xe_sysctrl_mailbox_msg_hdr *)buffer;
+
+ if (!XE_SYSCTRL_HDR_IS_RESPONSE(hdr) ||
+ XE_SYSCTRL_HDR_GROUP_ID(hdr) != XE_SYSCTRL_HDR_GROUP_ID(req) ||
+ XE_SYSCTRL_HDR_COMMAND(hdr) != XE_SYSCTRL_HDR_COMMAND(req)) {
+ xe_err(xe, "sysctrl: Response header mismatch\n");
+ return -EPROTO;
+ }
+
+ if (XE_SYSCTRL_HDR_RESULT(hdr) != 0) {
+ xe_err(xe, "sysctrl: Firmware error: 0x%02lx\n",
+ XE_SYSCTRL_HDR_RESULT(hdr));
+ return -EIO;
+ }
+
+ memcpy(data_out, hdr + 1, data_out_len);
+ *rdata_len = out - buffer - sizeof(*hdr);
+
+ return 0;
+}
+
+static int sysctrl_send_command(struct xe_sysctrl *sc,
+ const u8 *mbox_cmd, size_t cmd_size,
+ void *data_out, size_t data_out_len,
+ size_t *rdata_len, unsigned int timeout_ms)
+{
+ const struct xe_sysctrl_mailbox_msg_hdr *hdr;
+ size_t received;
+ int ret;
+
+ ret = sysctrl_send_frames(sc, mbox_cmd, cmd_size, timeout_ms);
+ if (ret)
+ return ret;
+
+ if (!data_out || !rdata_len)
+ return 0;
+
+ hdr = (const struct xe_sysctrl_mailbox_msg_hdr *)mbox_cmd;
+
+ ret = sysctrl_receive_frames(sc, hdr, data_out, data_out_len,
+ &received, timeout_ms);
+ if (ret)
+ return ret;
+
+ *rdata_len = received;
+
+ return 0;
+}
+
+/**
+ * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface
+ * @sc: System controller structure
+ *
+ * Initialize system controller mailbox interface for communication.
+ */
+void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc)
+{
+ u32 ctrl_reg;
+
+ ctrl_reg = xe_mmio_read32(sc->mmio, SYSCTRL_MB_CTRL);
+ sc->phase_bit = (ctrl_reg & SYSCTRL_FRAME_PHASE) ? 1 : 0;
+}
+
+/**
+ * xe_sysctrl_send_command() - Send mailbox command to System Controller
+ * @sc: System Controller instance
+ * @cmd: Command descriptor containing request header and payload buffers
+ * @rdata_len: Pointer to store actual response data length
+ *
+ * Sends a mailbox command to System Controller firmware using
+ * System Controller mailbox and waits for a response.
+ *
+ * Request payload is provided via @cmd->data_in and @cmd->data_in_len.
+ * If a response is expected, @cmd->data_out must point to a buffer of
+ * size @cmd->data_out_len supplied by caller.
+ *
+ * On success, @rdata_len is updated with number of valid response bytes
+ * returned by firmware, bounded by @cmd->data_out_len.
+ *
+ * Return: 0 on success, or negative errno on failure.
+ */
+int xe_sysctrl_send_command(struct xe_sysctrl *sc,
+ struct xe_sysctrl_mailbox_command *cmd,
+ size_t *rdata_len)
+{
+ struct xe_device *xe = sc_to_xe(sc);
+ u8 group_id, command_code;
+ u8 *mbox_cmd = NULL;
+ size_t cmd_size = 0;
+ int ret;
+
+ guard(xe_pm_runtime_noresume)(xe);
+
+ xe_assert(xe, xe->info.has_sysctrl);
+ xe_assert(xe, cmd->data_in || cmd->data_out);
+ xe_assert(xe, !cmd->data_in || cmd->data_in_len);
+ xe_assert(xe, !cmd->data_out || cmd->data_out_len);
+
+ group_id = XE_SYSCTRL_APP_HDR_GROUP_ID(&cmd->header);
+ command_code = XE_SYSCTRL_APP_HDR_COMMAND(&cmd->header);
+
+ might_sleep();
+
+ ret = sysctrl_prepare_command(xe, group_id, command_code,
+ cmd->data_in, cmd->data_in_len,
+ &mbox_cmd, &cmd_size);
+ if (ret) {
+ xe_err(xe, "sysctrl: Failed to prepare command: %pe\n", ERR_PTR(ret));
+ return ret;
+ }
+
+ guard(mutex)(&sc->cmd_lock);
+
+ ret = sysctrl_send_command(sc, mbox_cmd, cmd_size,
+ cmd->data_out, cmd->data_out_len, rdata_len,
+ XE_SYSCTRL_MB_DEFAULT_TIMEOUT_MS);
+ if (ret)
+ xe_err(xe, "sysctrl: Mailbox command failed: %pe\n", ERR_PTR(ret));
+
+ kfree(mbox_cmd);
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
new file mode 100644
index 000000000000..91460be9e22c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_MAILBOX_H_
+#define _XE_SYSCTRL_MAILBOX_H_
+
+#include <linux/bitfield.h>
+#include <linux/types.h>
+
+#include "abi/xe_sysctrl_abi.h"
+
+struct xe_sysctrl;
+struct xe_sysctrl_mailbox_command;
+
+#define XE_SYSCTRL_APP_HDR_GROUP_ID(hdr) \
+ FIELD_GET(APP_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data))
+
+#define XE_SYSCTRL_APP_HDR_COMMAND(hdr) \
+ FIELD_GET(APP_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data))
+
+#define XE_SYSCTRL_APP_HDR_VERSION(hdr) \
+ FIELD_GET(APP_HDR_VERSION_MASK, le32_to_cpu((hdr)->data))
+
+void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
+int xe_sysctrl_send_command(struct xe_sysctrl *sc,
+ struct xe_sysctrl_mailbox_command *cmd,
+ size_t *rdata_len);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
new file mode 100644
index 000000000000..89456aec6097
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_MAILBOX_TYPES_H_
+#define _XE_SYSCTRL_MAILBOX_TYPES_H_
+
+#include <linux/types.h>
+
+#include "abi/xe_sysctrl_abi.h"
+
+/**
+ * struct xe_sysctrl_mailbox_command - System Controller mailbox command
+ */
+struct xe_sysctrl_mailbox_command {
+ /** @header: Application message header containing command information */
+ struct xe_sysctrl_app_msg_hdr header;
+
+ /** @data_in: Pointer to input payload data (can be NULL if no input data) */
+ void *data_in;
+
+ /** @data_in_len: Size of input payload in bytes (0 if no input data) */
+ size_t data_in_len;
+
+ /** @data_out: Pointer to output buffer for response data (can be NULL if no response) */
+ void *data_out;
+
+ /** @data_out_len: Size of output buffer in bytes (0 if no response expected) */
+ size_t data_out_len;
+};
+
+#define XE_SYSCTRL_MB_FRAME_SIZE 16
+#define XE_SYSCTRL_MB_MAX_FRAMES 64
+#define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE \
+ (XE_SYSCTRL_MB_FRAME_SIZE * XE_SYSCTRL_MB_MAX_FRAMES)
+
+#define XE_SYSCTRL_MB_DEFAULT_TIMEOUT_MS 500
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h
new file mode 100644
index 000000000000..8217f6befe70
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_SYSCTRL_TYPES_H_
+#define _XE_SYSCTRL_TYPES_H_
+
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+struct xe_mmio;
+
+/**
+ * struct xe_sysctrl - System Controller driver context
+ *
+ * This structure maintains the runtime state for System Controller
+ * communication. All fields are initialized during xe_sysctrl_init()
+ * and protected appropriately for concurrent access.
+ */
+struct xe_sysctrl {
+ /** @mmio: MMIO region for system control registers */
+ struct xe_mmio *mmio;
+
+ /** @cmd_lock: Mutex protecting mailbox command operations */
+ struct mutex cmd_lock;
+
+ /** @phase_bit: Message boundary phase toggle bit (0 or 1) */
+ bool phase_bit;
+};
+
+#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [RFC v1 2/5] drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
2026-03-20 7:25 ` [RFC v1 1/5] drm/xe/xe_sysctrl: Add System Controller support Anoop, Vijay
@ 2026-03-20 7:25 ` Anoop, Vijay
2026-05-07 21:05 ` Rodrigo Vivi
2026-03-20 7:25 ` [RFC v1 3/5] drm/xe/fwctl: Add Xe FWCTL type definitions Anoop, Vijay
` (8 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Anoop, Vijay @ 2026-03-20 7:25 UTC (permalink / raw)
To: intel-xe
Cc: umesh.nerlige.ramappa, badal.nilawar, rodrigo.vivi,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim,
anoop.c.vijay
From: Anoop Vijay <anoop.c.vijay@intel.com>
Add Xe-specific uAPI definitions for FWCTL support. Introduce
include/uapi/fwctl/xe.h to describe userspace ABI for Xe firmware
control operations, and extend core FWCTL uAPI to recognize
Xe device type.
This patch adds uAPI definitions only. No functional kernel code
is introduced.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
---
include/uapi/fwctl/fwctl.h | 1 +
include/uapi/fwctl/xe.h | 38 ++++++++++++++++++++++++++++++++++++++
2 files changed, 39 insertions(+)
create mode 100644 include/uapi/fwctl/xe.h
diff --git a/include/uapi/fwctl/fwctl.h b/include/uapi/fwctl/fwctl.h
index 716ac0eee42d..c63bc15159d3 100644
--- a/include/uapi/fwctl/fwctl.h
+++ b/include/uapi/fwctl/fwctl.h
@@ -45,6 +45,7 @@ enum fwctl_device_type {
FWCTL_DEVICE_TYPE_MLX5 = 1,
FWCTL_DEVICE_TYPE_CXL = 2,
FWCTL_DEVICE_TYPE_PDS = 4,
+ FWCTL_DEVICE_TYPE_XE = 5,
};
/**
diff --git a/include/uapi/fwctl/xe.h b/include/uapi/fwctl/xe.h
new file mode 100644
index 000000000000..fb5612dec610
--- /dev/null
+++ b/include/uapi/fwctl/xe.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _UAPI_FWCTL_XE_H_
+#define _UAPI_FWCTL_XE_H_
+
+#include <linux/types.h>
+
+/**
+ * DOC: Xe FWCTL Interface
+ *
+ * The Xe FWCTL interface provides userspace access to firmware subsystems
+ * on Intel Xe discrete GPUs. It exposes firmware management capabilities
+ * through the kernel FWCTL framework.
+ */
+
+/**
+ * struct fwctl_info_xe - FWCTL Information struct for Xe
+ *
+ * @fw_caps: Firmware capability bitmap
+ * @platform: Platform type
+ */
+struct fwctl_info_xe {
+ __u32 fw_caps;
+ __u32 platform;
+};
+
+/**
+ * struct fwctl_rpc_xe - Common Xe FWCTL RPC header
+ * @firmware_type: Firmware type
+ */
+struct fwctl_rpc_xe {
+ __u32 firmware_type;
+};
+
+#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [RFC v1 2/5] drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support
2026-03-20 7:25 ` [RFC v1 2/5] drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support Anoop, Vijay
@ 2026-05-07 21:05 ` Rodrigo Vivi
0 siblings, 0 replies; 15+ messages in thread
From: Rodrigo Vivi @ 2026-05-07 21:05 UTC (permalink / raw)
To: Anoop, Vijay
Cc: intel-xe, umesh.nerlige.ramappa, badal.nilawar,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim
On Fri, Mar 20, 2026 at 12:25:30AM -0700, Anoop, Vijay wrote:
> From: Anoop Vijay <anoop.c.vijay@intel.com>
>
> Add Xe-specific uAPI definitions for FWCTL support. Introduce
> include/uapi/fwctl/xe.h to describe userspace ABI for Xe firmware
> control operations, and extend core FWCTL uAPI to recognize
> Xe device type.
>
> This patch adds uAPI definitions only. No functional kernel code
> is introduced.
>
> Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
> ---
> include/uapi/fwctl/fwctl.h | 1 +
> include/uapi/fwctl/xe.h | 38 ++++++++++++++++++++++++++++++++++++++
> 2 files changed, 39 insertions(+)
> create mode 100644 include/uapi/fwctl/xe.h
>
> diff --git a/include/uapi/fwctl/fwctl.h b/include/uapi/fwctl/fwctl.h
> index 716ac0eee42d..c63bc15159d3 100644
> --- a/include/uapi/fwctl/fwctl.h
> +++ b/include/uapi/fwctl/fwctl.h
> @@ -45,6 +45,7 @@ enum fwctl_device_type {
> FWCTL_DEVICE_TYPE_MLX5 = 1,
> FWCTL_DEVICE_TYPE_CXL = 2,
> FWCTL_DEVICE_TYPE_PDS = 4,
> + FWCTL_DEVICE_TYPE_XE = 5,
I don't believe we should have a generic XE component here, but one per
FW since we have many different FW underneath and each one with its
own different Mailboxes.
Check: https://lore.kernel.org/intel-xe/20250429073804.972137-10-badal.nilawar@intel.com/
> };
>
> /**
> diff --git a/include/uapi/fwctl/xe.h b/include/uapi/fwctl/xe.h
> new file mode 100644
> index 000000000000..fb5612dec610
> --- /dev/null
> +++ b/include/uapi/fwctl/xe.h
> @@ -0,0 +1,38 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _UAPI_FWCTL_XE_H_
> +#define _UAPI_FWCTL_XE_H_
> +
> +#include <linux/types.h>
> +
> +/**
> + * DOC: Xe FWCTL Interface
> + *
> + * The Xe FWCTL interface provides userspace access to firmware subsystems
> + * on Intel Xe discrete GPUs. It exposes firmware management capabilities
> + * through the kernel FWCTL framework.
> + */
> +
> +/**
> + * struct fwctl_info_xe - FWCTL Information struct for Xe
> + *
> + * @fw_caps: Firmware capability bitmap
> + * @platform: Platform type
> + */
> +struct fwctl_info_xe {
> + __u32 fw_caps;
> + __u32 platform;
> +};
> +
> +/**
> + * struct fwctl_rpc_xe - Common Xe FWCTL RPC header
> + * @firmware_type: Firmware type
> + */
> +struct fwctl_rpc_xe {
> + __u32 firmware_type;
> +};
> +
> +#endif
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [RFC v1 3/5] drm/xe/fwctl: Add Xe FWCTL type definitions
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
2026-03-20 7:25 ` [RFC v1 1/5] drm/xe/xe_sysctrl: Add System Controller support Anoop, Vijay
2026-03-20 7:25 ` [RFC v1 2/5] drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support Anoop, Vijay
@ 2026-03-20 7:25 ` Anoop, Vijay
2026-05-07 21:07 ` Rodrigo Vivi
2026-03-20 7:25 ` [RFC v1 4/5] drm/xe/fwctl: Add Xe FWCTL infrastructure support Anoop, Vijay
` (7 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Anoop, Vijay @ 2026-03-20 7:25 UTC (permalink / raw)
To: intel-xe
Cc: umesh.nerlige.ramappa, badal.nilawar, rodrigo.vivi,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim,
anoop.c.vijay
From: Anoop Vijay <anoop.c.vijay@intel.com>
Add type definitions required for Xe FWCTL infrastructure. Introduce
xe_fwctl_types.h to define core data structures used by driver,
including Xe FWCTL device context, per-file context, and firmware
operation hooks.
This patch adds type definitions only and does not introduce functional
FWCTL logic.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
---
drivers/gpu/drm/xe/xe_fwctl_types.h | 52 +++++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_fwctl_types.h
diff --git a/drivers/gpu/drm/xe/xe_fwctl_types.h b/drivers/gpu/drm/xe/xe_fwctl_types.h
new file mode 100644
index 000000000000..22498f2b2fd9
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_fwctl_types.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_FWCTL_TYPES_H_
+#define _XE_FWCTL_TYPES_H_
+
+#include <linux/fwctl.h>
+
+struct xe_device;
+
+/**
+ * struct xe_fwctl - Xe fwctl device context
+ * @fwctl: Base fwctl device
+ * @xe: Back-pointer to Xe device
+ *
+ * This structure wraps the fwctl subsystem device with Xe specific
+ * context.
+ */
+struct xe_fwctl {
+ struct fwctl_device fwctl;
+ struct xe_device *xe;
+};
+
+/**
+ * struct xe_fwctl_uctx - Per-FD context
+ * @uctx: Base fwctl context
+ *
+ * Per file-descriptor context for Xe fwctl operations.
+ */
+struct xe_fwctl_uctx {
+ struct fwctl_uctx uctx;
+};
+
+/**
+ * struct xe_fw_ops - Per-firmware operations
+ * @name: Firmware name
+ * @rpc: Execute RPC
+ * @validate_scope: Validate RPC vs scope
+ *
+ * Operations table for each firmware type
+ */
+struct xe_fw_ops {
+ const char *name;
+ void *(*rpc)(struct xe_device *xe, enum fwctl_rpc_scope scope,
+ void *in, size_t in_len, size_t *out_len);
+ bool (*validate_scope)(void *in, size_t in_len,
+ enum fwctl_rpc_scope scope);
+};
+
+#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [RFC v1 3/5] drm/xe/fwctl: Add Xe FWCTL type definitions
2026-03-20 7:25 ` [RFC v1 3/5] drm/xe/fwctl: Add Xe FWCTL type definitions Anoop, Vijay
@ 2026-05-07 21:07 ` Rodrigo Vivi
0 siblings, 0 replies; 15+ messages in thread
From: Rodrigo Vivi @ 2026-05-07 21:07 UTC (permalink / raw)
To: Anoop, Vijay
Cc: intel-xe, umesh.nerlige.ramappa, badal.nilawar,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim
On Fri, Mar 20, 2026 at 12:25:31AM -0700, Anoop, Vijay wrote:
> From: Anoop Vijay <anoop.c.vijay@intel.com>
>
> Add type definitions required for Xe FWCTL infrastructure. Introduce
> xe_fwctl_types.h to define core data structures used by driver,
> including Xe FWCTL device context, per-file context, and firmware
> operation hooks.
>
> This patch adds type definitions only and does not introduce functional
> FWCTL logic.
I know it is counter intuitive. Most of the times splitting the work into
smaller patches helps to speed up the review. But in this case here it just
make it a lot harder to review.
A single patch like https://lore.kernel.org/intel-xe/20250429073804.972137-10-badal.nilawar@intel.com/
is probably the way to go.
> Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
> ---
> drivers/gpu/drm/xe/xe_fwctl_types.h | 52 +++++++++++++++++++++++++++++
> 1 file changed, 52 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/xe_fwctl_types.h
>
> diff --git a/drivers/gpu/drm/xe/xe_fwctl_types.h b/drivers/gpu/drm/xe/xe_fwctl_types.h
> new file mode 100644
> index 000000000000..22498f2b2fd9
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_fwctl_types.h
> @@ -0,0 +1,52 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_FWCTL_TYPES_H_
> +#define _XE_FWCTL_TYPES_H_
> +
> +#include <linux/fwctl.h>
> +
> +struct xe_device;
> +
> +/**
> + * struct xe_fwctl - Xe fwctl device context
> + * @fwctl: Base fwctl device
> + * @xe: Back-pointer to Xe device
> + *
> + * This structure wraps the fwctl subsystem device with Xe specific
> + * context.
> + */
> +struct xe_fwctl {
> + struct fwctl_device fwctl;
> + struct xe_device *xe;
> +};
> +
> +/**
> + * struct xe_fwctl_uctx - Per-FD context
> + * @uctx: Base fwctl context
> + *
> + * Per file-descriptor context for Xe fwctl operations.
> + */
> +struct xe_fwctl_uctx {
> + struct fwctl_uctx uctx;
> +};
> +
> +/**
> + * struct xe_fw_ops - Per-firmware operations
> + * @name: Firmware name
> + * @rpc: Execute RPC
> + * @validate_scope: Validate RPC vs scope
> + *
> + * Operations table for each firmware type
> + */
> +struct xe_fw_ops {
> + const char *name;
> + void *(*rpc)(struct xe_device *xe, enum fwctl_rpc_scope scope,
> + void *in, size_t in_len, size_t *out_len);
> + bool (*validate_scope)(void *in, size_t in_len,
> + enum fwctl_rpc_scope scope);
> +};
> +
> +#endif
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [RFC v1 4/5] drm/xe/fwctl: Add Xe FWCTL infrastructure support
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (2 preceding siblings ...)
2026-03-20 7:25 ` [RFC v1 3/5] drm/xe/fwctl: Add Xe FWCTL type definitions Anoop, Vijay
@ 2026-03-20 7:25 ` Anoop, Vijay
2026-03-20 7:25 ` [RFC v1 5/5] drm/xe/fwctl: Add System Controller FWCTL RPC handler Anoop, Vijay
` (6 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Anoop, Vijay @ 2026-03-20 7:25 UTC (permalink / raw)
To: intel-xe
Cc: umesh.nerlige.ramappa, badal.nilawar, rodrigo.vivi,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim,
anoop.c.vijay
From: Anoop Vijay <anoop.c.vijay@intel.com>
Add core infrastructure required to support FWCTL subsystem in Xe driver.
This introduces a generic xe_fwctl device context, integrates FWCTL state
into xe_device, and sets up device registration and cleanup.
This provides foundation for future firmware-specific FWCTL handlers.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
---
Documentation/userspace-api/fwctl/index.rst | 1 +
drivers/gpu/drm/xe/Kconfig | 1 +
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device.c | 5 +
drivers/gpu/drm/xe/xe_device_types.h | 4 +
drivers/gpu/drm/xe/xe_fwctl.c | 200 ++++++++++++++++++++
drivers/gpu/drm/xe/xe_fwctl.h | 15 ++
include/uapi/fwctl/xe.h | 4 +
8 files changed, 231 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_fwctl.c
create mode 100644 drivers/gpu/drm/xe/xe_fwctl.h
diff --git a/Documentation/userspace-api/fwctl/index.rst b/Documentation/userspace-api/fwctl/index.rst
index 316ac456ad3b..7ef115216316 100644
--- a/Documentation/userspace-api/fwctl/index.rst
+++ b/Documentation/userspace-api/fwctl/index.rst
@@ -12,3 +12,4 @@ to securely construct and execute RPCs inside device firmware.
fwctl
fwctl-cxl
pds_fwctl
+ xe_fwctl
diff --git a/drivers/gpu/drm/xe/Kconfig b/drivers/gpu/drm/xe/Kconfig
index 4d7dcaff2b91..b215ccdc1911 100644
--- a/drivers/gpu/drm/xe/Kconfig
+++ b/drivers/gpu/drm/xe/Kconfig
@@ -46,6 +46,7 @@ config DRM_XE
select WANT_DEV_COREDUMP
select AUXILIARY_BUS
select REGMAP if I2C
+ select FWCTL
help
Driver for Intel Xe2 series GPUs and later. Experimental support
for Xe series is also available.
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index f9abaf687d46..6d47d5d59cf4 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -47,6 +47,7 @@ xe-y += xe_bb.o \
xe_exec_queue.o \
xe_execlist.o \
xe_force_wake.o \
+ xe_fwctl.o \
xe_ggtt.o \
xe_gpu_scheduler.o \
xe_gsc.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index c70d4ae413a9..8771c40d1582 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -35,6 +35,7 @@
#include "xe_exec.h"
#include "xe_exec_queue.h"
#include "xe_force_wake.h"
+#include "xe_fwctl.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
#include "xe_gt_mcr.h"
@@ -996,6 +997,10 @@ int xe_device_probe(struct xe_device *xe)
xe_debugfs_register(xe);
+ err = xe_fwctl_init(xe);
+ if (err)
+ goto err_unregister_display;
+
err = xe_hwmon_register(xe);
if (err)
goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 150c76b2acaf..78262e60d7a2 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -38,6 +38,7 @@
struct drm_pagemap_shrinker;
struct intel_display;
struct intel_dg_nvm_dev;
+struct xe_fwctl;
struct xe_ggtt;
struct xe_i2c;
struct xe_pat_ops;
@@ -514,6 +515,9 @@ struct xe_device {
/** @sc: System Controller */
struct xe_sysctrl sc;
+ /** @fwctl: FWCTL device for firmware management */
+ struct xe_fwctl *fwctl;
+
/** @atomic_svm_timeslice_ms: Atomic SVM fault timeslice MS */
u32 atomic_svm_timeslice_ms;
diff --git a/drivers/gpu/drm/xe/xe_fwctl.c b/drivers/gpu/drm/xe/xe_fwctl.c
new file mode 100644
index 000000000000..72124b5b3c87
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_fwctl.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+/**
+ * DOC: Xe FWCTL
+ *
+ * Xe FWCTL implements generic FWCTL IOCTLs to provide userspace access to
+ * firmware management interfaces on Intel Xe discrete GPUs.
+ *
+ * Driver registers a FWCTL device during xe_device initialization and
+ * dispatches firmware RPCs to an appropriate handler based on firmware_type
+ * field in RPC header.
+ *
+ * Each firmware type implements xe_fw_ops interface, providing:
+ * - validate_scope(): Validate whether RPC command is allowed for requested
+ * access scope (CONFIGURATION, DEBUG_READ_ONLY, DEBUG_WRITE_FULL).
+ * - rpc(): Execute firmware RPC and return response.
+ *
+ * Userspace should first issue FWCTL_INFO ioctl and check capability flags to
+ * determine supported firmware types and commands.
+ *
+ * After verifying support, userspace may issue FWCTL_RPC with input and output
+ * buffers pointing to struct fwctl_rpc_xe or firmware‑specific RPC structure
+ * allocated by userspace. Input and output lengths must match structure size.
+ *
+ * Unsupported or invalid commands return -EBADMSG.
+ *
+ * Example:
+ *
+ * .. code-block:: C
+ *
+ * struct fwctl_info_xe xe_info = {0};
+ * struct fwctl_info info = {
+ * .size = sizeof(info),
+ * .device_data_len = sizeof(xe_info),
+ * .out_device_data = (uint64_t)&xe_info,
+ * };
+ *
+ * int fd = open("/dev/fwctl/fwctl0", O_RDWR);
+ * ioctl(fd, FWCTL_INFO, &info);
+ *
+ * struct xe_sysctrl_rpc req = { ... };
+ * struct xe_sysctrl_rpc resp = {0};
+ * struct fwctl_rpc rpc = {
+ * .size = sizeof(struct fwctl_rpc),
+ * .scope = FWCTL_RPC_DEBUG_READ_ONLY,
+ * .in_len = sizeof(req),
+ * .out_len = sizeof(resp),
+ * .in = (uint64_t)&req,
+ * .out = (uint64_t)&resp,
+ * };
+ *
+ * ioctl(fd, FWCTL_RPC, &rpc);
+ */
+
+#include <linux/fwctl.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+
+#include <uapi/fwctl/fwctl.h>
+#include <uapi/fwctl/xe.h>
+
+#include "xe_device.h"
+#include "xe_fwctl.h"
+#include "xe_fwctl_types.h"
+#include "xe_pm.h"
+#include "xe_printk.h"
+
+DEFINE_FREE(xe_fwctl, struct xe_fwctl *, if (_T) fwctl_put(&_T->fwctl))
+
+static const struct xe_fw_ops *fw_ops_table[XE_FW_MAX] = {
+ /* [XE_FW_...] = &ops, */
+};
+
+static int xe_fwctl_uctx_open(struct fwctl_uctx *uctx)
+{
+ struct xe_fwctl *fwctl = container_of(uctx->fwctl,
+ struct xe_fwctl,
+ fwctl);
+ struct xe_device *xe = fwctl->xe;
+
+ xe_pm_runtime_get(xe);
+
+ return 0;
+}
+
+static void xe_fwctl_uctx_close(struct fwctl_uctx *uctx)
+{
+ struct xe_fwctl *fwctl = container_of(uctx->fwctl,
+ struct xe_fwctl,
+ fwctl);
+ struct xe_device *xe = fwctl->xe;
+
+ xe_pm_runtime_put(xe);
+}
+
+static void *xe_fwctl_info(struct fwctl_uctx *uctx, size_t *length)
+{
+ struct xe_fwctl *fwctl = container_of(uctx->fwctl,
+ struct xe_fwctl,
+ fwctl);
+ struct xe_device *xe = fwctl->xe;
+ struct fwctl_info_xe *info;
+
+ info = kzalloc_obj(*info);
+ if (!info)
+ return ERR_PTR(-ENOMEM);
+
+ info->fw_caps = 0;
+ info->platform = xe->info.platform;
+
+ *length = sizeof(*info);
+ return info;
+}
+
+static void *xe_fwctl_rpc(struct fwctl_uctx *uctx,
+ enum fwctl_rpc_scope scope,
+ void *rpc_in, size_t in_len,
+ size_t *out_len)
+{
+ struct xe_fwctl *fwctl = container_of(uctx->fwctl,
+ struct xe_fwctl,
+ fwctl);
+ struct xe_device *xe = fwctl->xe;
+ const struct fwctl_rpc_xe *hdr = rpc_in;
+ const struct xe_fw_ops *ops;
+ void *resp;
+
+ if (in_len < sizeof(*hdr))
+ return ERR_PTR(-EMSGSIZE);
+
+ if (hdr->firmware_type >= XE_FW_MAX)
+ return ERR_PTR(-EINVAL);
+
+ ops = fw_ops_table[hdr->firmware_type];
+ if (!ops)
+ return ERR_PTR(-EOPNOTSUPP);
+
+ if (ops->validate_scope &&
+ !ops->validate_scope(rpc_in, in_len, scope))
+ return ERR_PTR(-EBADMSG);
+
+ resp = ops->rpc(xe, scope, rpc_in, in_len, out_len);
+ if (IS_ERR(resp))
+ xe_err(xe, "FWCTL RPC failed: fw=%s err=%ld\n",
+ ops->name ?: "unknown", PTR_ERR(resp));
+
+ return resp;
+}
+
+static const struct fwctl_ops xe_fwctl_ops = {
+ .device_type = FWCTL_DEVICE_TYPE_XE,
+ .uctx_size = sizeof(struct xe_fwctl_uctx),
+ .open_uctx = xe_fwctl_uctx_open,
+ .close_uctx = xe_fwctl_uctx_close,
+ .info = xe_fwctl_info,
+ .fw_rpc = xe_fwctl_rpc,
+};
+
+static void xe_fwctl_fini(void *dev)
+{
+ struct xe_fwctl *fwctl = dev;
+
+ fwctl_unregister(&fwctl->fwctl);
+ fwctl_put(&fwctl->fwctl);
+}
+
+/**
+ * xe_fwctl_init() - Initialize FWCTL for Xe device
+ * @xe: xe device instance
+ *
+ * Creates and registers FWCTL device for firmware management.
+ *
+ * Return: 0 on success, error code on failure
+ */
+int xe_fwctl_init(struct xe_device *xe)
+{
+ struct xe_fwctl *fwctl __free(xe_fwctl) =
+ fwctl_alloc_device(xe->drm.dev, &xe_fwctl_ops,
+ struct xe_fwctl, fwctl);
+
+ int ret;
+
+ if (!fwctl)
+ return -ENOMEM;
+
+ fwctl->xe = xe;
+
+ ret = fwctl_register(&fwctl->fwctl);
+ if (ret)
+ return ret;
+
+ xe->fwctl = fwctl;
+
+ return devm_add_action_or_reset(xe->drm.dev, xe_fwctl_fini,
+ no_free_ptr(fwctl));
+}
+
+MODULE_IMPORT_NS("FWCTL");
diff --git a/drivers/gpu/drm/xe/xe_fwctl.h b/drivers/gpu/drm/xe/xe_fwctl.h
new file mode 100644
index 000000000000..190405720892
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_fwctl.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_FWCTL_H_
+#define _XE_FWCTL_H_
+
+#include <linux/types.h>
+
+struct xe_device;
+
+int xe_fwctl_init(struct xe_device *xe);
+
+#endif
diff --git a/include/uapi/fwctl/xe.h b/include/uapi/fwctl/xe.h
index fb5612dec610..3720f188a7ec 100644
--- a/include/uapi/fwctl/xe.h
+++ b/include/uapi/fwctl/xe.h
@@ -16,6 +16,10 @@
* through the kernel FWCTL framework.
*/
+enum xe_firmware_type {
+ XE_FW_MAX = 1,
+};
+
/**
* struct fwctl_info_xe - FWCTL Information struct for Xe
*
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [RFC v1 5/5] drm/xe/fwctl: Add System Controller FWCTL RPC handler
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (3 preceding siblings ...)
2026-03-20 7:25 ` [RFC v1 4/5] drm/xe/fwctl: Add Xe FWCTL infrastructure support Anoop, Vijay
@ 2026-03-20 7:25 ` Anoop, Vijay
2026-05-07 21:12 ` Rodrigo Vivi
2026-03-20 7:30 ` ✗ CI.checkpatch: warning for drm/xe/fwctl: Add FWCTL interface for Xe firmware management Patchwork
` (5 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Anoop, Vijay @ 2026-03-20 7:25 UTC (permalink / raw)
To: intel-xe
Cc: umesh.nerlige.ramappa, badal.nilawar, rodrigo.vivi,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim,
anoop.c.vijay
From: Anoop Vijay <anoop.c.vijay@intel.com>
Add FWCTL RPC handler for Xe System Controller firmware.
Implement xe_fw_ops to route FWCTL RPCs to System Controller mailbox,
allowing userspace to issue System Controller commands via FWCTL.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 29 +++++
drivers/gpu/drm/xe/xe_fwctl.c | 10 +-
drivers/gpu/drm/xe/xe_sysctrl_fwctl.c | 136 ++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 31 ++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 2 +
include/uapi/fwctl/xe.h | 25 ++++-
7 files changed, 231 insertions(+), 3 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 6d47d5d59cf4..f5d7109893c8 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -125,6 +125,7 @@ xe-y += xe_bb.o \
xe_survivability_mode.o \
xe_sync.o \
xe_sysctrl.o \
+ xe_sysctrl_fwctl.o \
xe_sysctrl_mailbox.o \
xe_tile.o \
xe_tile_sysfs.o \
diff --git a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
index 4cbde267ac44..b80e01e8ae37 100644
--- a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
+++ b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
@@ -62,4 +62,33 @@ struct xe_sysctrl_app_msg_hdr {
#define APP_HDR_VERSION_MASK GENMASK(23, 16)
#define APP_HDR_RESERVED_MASK GENMASK(31, 24)
+/** System Controller FSP Runtime command group */
+#define XE_SYSCTRL_GROUP_FSP_RUNTIME 0x31
+
+/*
+ * XE_SYSCTRL_CMD_GET_FEATURE_CFG - Query feature configuration
+ *
+ * Return platform feature capability and configuration state.
+ *
+ * Group: XE_SYSCTRL_GROUP_FSP_RUNTIME (0x31)
+ * Command: 0x10
+ */
+#define XE_SYSCTRL_CMD_GET_FEATURE_CFG 0x10
+
+/**
+ * DOC: XE_SYSCTRL_CMD_GET_FEATURE_CFG response
+ *
+ * Returns 5 DWORDs:
+ * DW0: Supported features
+ * DW1: Enabled features
+ * DW2: Software-configurable features
+ * DW3: Pending state (effective after reboot)
+ * DW4: Default (factory) state
+ *
+ * Each DWORD is a feature bitmap.
+ */
+#define XE_SYSCTRL_GET_FEATURE_CFG_NUM_DWORDS 5
+#define XE_SYSCTRL_GET_FEATURE_CFG_RESP_BYTES \
+ (XE_SYSCTRL_GET_FEATURE_CFG_NUM_DWORDS * sizeof(__u32))
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_fwctl.c b/drivers/gpu/drm/xe/xe_fwctl.c
index 72124b5b3c87..2e8faa027487 100644
--- a/drivers/gpu/drm/xe/xe_fwctl.c
+++ b/drivers/gpu/drm/xe/xe_fwctl.c
@@ -67,10 +67,12 @@
#include "xe_pm.h"
#include "xe_printk.h"
+extern const struct xe_fw_ops xe_sysctrl_fw_ops;
+
DEFINE_FREE(xe_fwctl, struct xe_fwctl *, if (_T) fwctl_put(&_T->fwctl))
static const struct xe_fw_ops *fw_ops_table[XE_FW_MAX] = {
- /* [XE_FW_...] = &ops, */
+ [XE_FW_SYSCTRL] = &xe_sysctrl_fw_ops,
};
static int xe_fwctl_uctx_open(struct fwctl_uctx *uctx)
@@ -102,12 +104,16 @@ static void *xe_fwctl_info(struct fwctl_uctx *uctx, size_t *length)
fwctl);
struct xe_device *xe = fwctl->xe;
struct fwctl_info_xe *info;
+ u32 fw_caps = 0;
info = kzalloc_obj(*info);
if (!info)
return ERR_PTR(-ENOMEM);
- info->fw_caps = 0;
+ if (xe->info.has_sysctrl && fw_ops_table[XE_FW_SYSCTRL])
+ fw_caps |= BIT(XE_FWCTL_CAP_SYSCTRL);
+
+ info->fw_caps = fw_caps;
info->platform = xe->info.platform;
*length = sizeof(*info);
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_fwctl.c b/drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
new file mode 100644
index 000000000000..ebdbe6d1dfd8
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+/**
+ * DOC: Xe System Controller FWCTL backend
+ *
+ * Implement FWCTL support for Xe System Controller firmware.
+ *
+ * Provide xe_fw_ops implementation to route FWCTL RPCs to System Controller
+ * mailbox using struct xe_sysctrl_rpc.
+ *
+ * validate_scope() enforces required access level for System Controller
+ * commands. rpc() executes mailbox transactions and returns responses to
+ * FWCTL core.
+ *
+ * See xe_fwctl.c for generic FWCTL documentation and userspace usage.
+ */
+
+#include <linux/bitfield.h>
+#include <linux/err.h>
+#include <linux/vmalloc.h>
+
+#include <uapi/fwctl/xe.h>
+
+#include "abi/xe_sysctrl_abi.h"
+#include "xe_device.h"
+#include "xe_fwctl_types.h"
+#include "xe_sysctrl.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+#include "xe_printk.h"
+
+static bool xe_sysctrl_validate_scope(void *rpc_in, size_t in_len,
+ enum fwctl_rpc_scope scope)
+{
+ struct xe_sysctrl_rpc *req = rpc_in;
+
+ if (in_len < sizeof(*req))
+ return false;
+
+ if (req->hdr.firmware_type != XE_FW_SYSCTRL)
+ return false;
+
+ switch (req->group_id) {
+ case XE_SYSCTRL_GROUP_FSP_RUNTIME:
+ switch (req->command) {
+ case XE_SYSCTRL_CMD_GET_FEATURE_CFG:
+ return scope >= FWCTL_RPC_CONFIGURATION;
+ default:
+ return false;
+ }
+
+ default:
+ return false;
+ }
+}
+
+static void *xe_sysctrl_rpc(struct xe_device *xe,
+ enum fwctl_rpc_scope scope,
+ void *rpc_in, size_t in_len,
+ size_t *out_len)
+{
+ struct xe_sysctrl_rpc *req = rpc_in;
+ struct xe_sysctrl_mailbox_command cmd = {};
+ size_t in_payload, out_payload = 0;
+ size_t expected_resp_len, resp_size;
+ int ret;
+
+ if (!xe->info.has_sysctrl)
+ return ERR_PTR(-ENODEV);
+
+ if (in_len < sizeof(*req))
+ return ERR_PTR(-EINVAL);
+
+ if (req->hdr.firmware_type != XE_FW_SYSCTRL)
+ return ERR_PTR(-EBADMSG);
+
+ in_payload = in_len - sizeof(*req);
+ if (in_payload > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE)
+ return ERR_PTR(-EMSGSIZE);
+
+ ret = xe_sysctrl_get_response_len(req->group_id, req->command,
+ req->version, in_payload,
+ &expected_resp_len);
+ if (ret)
+ return ERR_PTR(-EOPNOTSUPP);
+
+ if (expected_resp_len > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE)
+ return ERR_PTR(-EMSGSIZE);
+
+ resp_size = sizeof(*req) + expected_resp_len;
+ if (*out_len < resp_size)
+ return ERR_PTR(-EMSGSIZE);
+
+ struct xe_sysctrl_rpc *resp __free(kvfree) = kvzalloc(resp_size, GFP_KERNEL);
+ if (!resp)
+ return ERR_PTR(-ENOMEM);
+
+ cmd.header.data = cpu_to_le32(FIELD_PREP(APP_HDR_GROUP_ID_MASK, req->group_id) |
+ FIELD_PREP(APP_HDR_COMMAND_MASK, req->command) |
+ FIELD_PREP(APP_HDR_VERSION_MASK, req->version));
+
+ cmd.data_in = in_payload ? req->payload : NULL;
+ cmd.data_in_len = in_payload;
+
+ cmd.data_out = expected_resp_len ? resp->payload : NULL;
+ cmd.data_out_len = expected_resp_len;
+
+ ret = xe_sysctrl_send_command(&xe->sc, &cmd, &out_payload);
+ if (ret) {
+ xe_err(xe, "sysctrl fwctl RPC failed: group=0x%02x cmd=0x%02x err=%d\n",
+ req->group_id, req->command, ret);
+ return ERR_PTR(ret);
+ }
+
+ if (out_payload > expected_resp_len)
+ return ERR_PTR(-EIO);
+
+ resp->hdr.firmware_type = XE_FW_SYSCTRL;
+ resp->group_id = req->group_id;
+ resp->command = req->command;
+ resp->version = req->version;
+ resp->reserved = 0;
+
+ *out_len = sizeof(*resp) + out_payload;
+
+ return no_free_ptr(resp);
+}
+
+const struct xe_fw_ops xe_sysctrl_fw_ops = {
+ .name = "sysctrl",
+ .rpc = xe_sysctrl_rpc,
+ .validate_scope = xe_sysctrl_validate_scope,
+};
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
index b10c8b7e0c40..418ab672528f 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
@@ -293,6 +293,37 @@ static int sysctrl_send_command(struct xe_sysctrl *sc,
return 0;
}
+/**
+ * xe_sysctrl_get_response_len - Get expected response length for a command
+ * @group_id: Command group ID
+ * @command: Command ID
+ * @version: Command version
+ * @in_len: Input payload length
+ * @out_len: Pointer to store expected output length
+ *
+ * Returns: 0 on success, -EOPNOTSUPP if command is unknown
+ */
+int xe_sysctrl_get_response_len(u8 group_id, u8 command, u8 version,
+ size_t in_len, size_t *out_len)
+{
+ (void)version;
+ (void)in_len;
+
+ switch (group_id) {
+ case XE_SYSCTRL_GROUP_FSP_RUNTIME:
+ switch (command) {
+ case XE_SYSCTRL_CMD_GET_FEATURE_CFG:
+ *out_len = XE_SYSCTRL_GET_FEATURE_CFG_RESP_BYTES;
+ return 0;
+ default:
+ return -EOPNOTSUPP;
+ }
+
+ default:
+ return -EOPNOTSUPP;
+ }
+}
+
/**
* xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface
* @sc: System controller structure
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
index 91460be9e22c..f219ad738b81 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
@@ -23,6 +23,8 @@ struct xe_sysctrl_mailbox_command;
#define XE_SYSCTRL_APP_HDR_VERSION(hdr) \
FIELD_GET(APP_HDR_VERSION_MASK, le32_to_cpu((hdr)->data))
+int xe_sysctrl_get_response_len(u8 group_id, u8 command, u8 version,
+ size_t in_len, size_t *out_len);
void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
int xe_sysctrl_send_command(struct xe_sysctrl *sc,
struct xe_sysctrl_mailbox_command *cmd,
diff --git a/include/uapi/fwctl/xe.h b/include/uapi/fwctl/xe.h
index 3720f188a7ec..2a1e559f94f2 100644
--- a/include/uapi/fwctl/xe.h
+++ b/include/uapi/fwctl/xe.h
@@ -16,8 +16,13 @@
* through the kernel FWCTL framework.
*/
+enum xe_fwctl_capabilities {
+ XE_FWCTL_CAP_SYSCTRL = 0,
+};
+
enum xe_firmware_type {
- XE_FW_MAX = 1,
+ XE_FW_SYSCTRL = 0,
+ XE_FW_MAX,
};
/**
@@ -39,4 +44,22 @@ struct fwctl_rpc_xe {
__u32 firmware_type;
};
+/**
+ * struct xe_sysctrl_rpc - System Controller RPC
+ * @hdr: Common Xe RPC header (firmware_type = XE_FW_SYSCTRL)
+ * @group_id: Command group identifier
+ * @command: Command code
+ * @version: Command version
+ * @reserved: Reserved for alignment, must be 0
+ * @payload: Variable-length command-specific payload
+ */
+struct xe_sysctrl_rpc {
+ struct fwctl_rpc_xe hdr;
+ __u8 group_id;
+ __u8 command;
+ __u8 version;
+ __u8 reserved;
+ __u8 payload[];
+};
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [RFC v1 5/5] drm/xe/fwctl: Add System Controller FWCTL RPC handler
2026-03-20 7:25 ` [RFC v1 5/5] drm/xe/fwctl: Add System Controller FWCTL RPC handler Anoop, Vijay
@ 2026-05-07 21:12 ` Rodrigo Vivi
0 siblings, 0 replies; 15+ messages in thread
From: Rodrigo Vivi @ 2026-05-07 21:12 UTC (permalink / raw)
To: Anoop, Vijay
Cc: intel-xe, umesh.nerlige.ramappa, badal.nilawar,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim
On Fri, Mar 20, 2026 at 12:25:33AM -0700, Anoop, Vijay wrote:
> From: Anoop Vijay <anoop.c.vijay@intel.com>
>
> Add FWCTL RPC handler for Xe System Controller firmware.
>
> Implement xe_fw_ops to route FWCTL RPCs to System Controller mailbox,
> allowing userspace to issue System Controller commands via FWCTL.
>
> Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 29 +++++
> drivers/gpu/drm/xe/xe_fwctl.c | 10 +-
> drivers/gpu/drm/xe/xe_sysctrl_fwctl.c | 136 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 31 ++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 2 +
> include/uapi/fwctl/xe.h | 25 ++++-
> 7 files changed, 231 insertions(+), 3 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 6d47d5d59cf4..f5d7109893c8 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -125,6 +125,7 @@ xe-y += xe_bb.o \
> xe_survivability_mode.o \
> xe_sync.o \
> xe_sysctrl.o \
> + xe_sysctrl_fwctl.o \
> xe_sysctrl_mailbox.o \
> xe_tile.o \
> xe_tile_sysfs.o \
> diff --git a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
> index 4cbde267ac44..b80e01e8ae37 100644
> --- a/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
> +++ b/drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
> @@ -62,4 +62,33 @@ struct xe_sysctrl_app_msg_hdr {
> #define APP_HDR_VERSION_MASK GENMASK(23, 16)
> #define APP_HDR_RESERVED_MASK GENMASK(31, 24)
>
> +/** System Controller FSP Runtime command group */
> +#define XE_SYSCTRL_GROUP_FSP_RUNTIME 0x31
> +
> +/*
> + * XE_SYSCTRL_CMD_GET_FEATURE_CFG - Query feature configuration
> + *
> + * Return platform feature capability and configuration state.
> + *
> + * Group: XE_SYSCTRL_GROUP_FSP_RUNTIME (0x31)
> + * Command: 0x10
> + */
> +#define XE_SYSCTRL_CMD_GET_FEATURE_CFG 0x10
> +
> +/**
> + * DOC: XE_SYSCTRL_CMD_GET_FEATURE_CFG response
> + *
> + * Returns 5 DWORDs:
> + * DW0: Supported features
> + * DW1: Enabled features
> + * DW2: Software-configurable features
> + * DW3: Pending state (effective after reboot)
> + * DW4: Default (factory) state
> + *
> + * Each DWORD is a feature bitmap.
> + */
> +#define XE_SYSCTRL_GET_FEATURE_CFG_NUM_DWORDS 5
> +#define XE_SYSCTRL_GET_FEATURE_CFG_RESP_BYTES \
> + (XE_SYSCTRL_GET_FEATURE_CFG_NUM_DWORDS * sizeof(__u32))
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_fwctl.c b/drivers/gpu/drm/xe/xe_fwctl.c
> index 72124b5b3c87..2e8faa027487 100644
> --- a/drivers/gpu/drm/xe/xe_fwctl.c
> +++ b/drivers/gpu/drm/xe/xe_fwctl.c
> @@ -67,10 +67,12 @@
> #include "xe_pm.h"
> #include "xe_printk.h"
>
> +extern const struct xe_fw_ops xe_sysctrl_fw_ops;
> +
> DEFINE_FREE(xe_fwctl, struct xe_fwctl *, if (_T) fwctl_put(&_T->fwctl))
>
> static const struct xe_fw_ops *fw_ops_table[XE_FW_MAX] = {
> - /* [XE_FW_...] = &ops, */
> + [XE_FW_SYSCTRL] = &xe_sysctrl_fw_ops,
> };
>
> static int xe_fwctl_uctx_open(struct fwctl_uctx *uctx)
> @@ -102,12 +104,16 @@ static void *xe_fwctl_info(struct fwctl_uctx *uctx, size_t *length)
> fwctl);
> struct xe_device *xe = fwctl->xe;
> struct fwctl_info_xe *info;
> + u32 fw_caps = 0;
>
> info = kzalloc_obj(*info);
> if (!info)
> return ERR_PTR(-ENOMEM);
>
> - info->fw_caps = 0;
> + if (xe->info.has_sysctrl && fw_ops_table[XE_FW_SYSCTRL])
> + fw_caps |= BIT(XE_FWCTL_CAP_SYSCTRL);
> +
> + info->fw_caps = fw_caps;
> info->platform = xe->info.platform;
>
> *length = sizeof(*info);
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_fwctl.c b/drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
> new file mode 100644
> index 000000000000..ebdbe6d1dfd8
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
> @@ -0,0 +1,136 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +/**
> + * DOC: Xe System Controller FWCTL backend
> + *
> + * Implement FWCTL support for Xe System Controller firmware.
> + *
> + * Provide xe_fw_ops implementation to route FWCTL RPCs to System Controller
> + * mailbox using struct xe_sysctrl_rpc.
> + *
> + * validate_scope() enforces required access level for System Controller
> + * commands. rpc() executes mailbox transactions and returns responses to
> + * FWCTL core.
> + *
> + * See xe_fwctl.c for generic FWCTL documentation and userspace usage.
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/err.h>
> +#include <linux/vmalloc.h>
> +
> +#include <uapi/fwctl/xe.h>
> +
> +#include "abi/xe_sysctrl_abi.h"
> +#include "xe_device.h"
> +#include "xe_fwctl_types.h"
> +#include "xe_sysctrl.h"
> +#include "xe_sysctrl_mailbox.h"
> +#include "xe_sysctrl_mailbox_types.h"
> +#include "xe_printk.h"
> +
> +static bool xe_sysctrl_validate_scope(void *rpc_in, size_t in_len,
> + enum fwctl_rpc_scope scope)
> +{
> + struct xe_sysctrl_rpc *req = rpc_in;
> +
> + if (in_len < sizeof(*req))
> + return false;
> +
> + if (req->hdr.firmware_type != XE_FW_SYSCTRL)
> + return false;
> +
> + switch (req->group_id) {
> + case XE_SYSCTRL_GROUP_FSP_RUNTIME:
> + switch (req->command) {
> + case XE_SYSCTRL_CMD_GET_FEATURE_CFG:
> + return scope >= FWCTL_RPC_CONFIGURATION;
The validate scope needs to explicit validate bit by bit of the API.
> + default:
> + return false;
> + }
> +
> + default:
> + return false;
> + }
> +}
> +
> +static void *xe_sysctrl_rpc(struct xe_device *xe,
> + enum fwctl_rpc_scope scope,
> + void *rpc_in, size_t in_len,
> + size_t *out_len)
> +{
> + struct xe_sysctrl_rpc *req = rpc_in;
> + struct xe_sysctrl_mailbox_command cmd = {};
> + size_t in_payload, out_payload = 0;
> + size_t expected_resp_len, resp_size;
> + int ret;
> +
> + if (!xe->info.has_sysctrl)
> + return ERR_PTR(-ENODEV);
> +
> + if (in_len < sizeof(*req))
> + return ERR_PTR(-EINVAL);
> +
> + if (req->hdr.firmware_type != XE_FW_SYSCTRL)
> + return ERR_PTR(-EBADMSG);
> +
> + in_payload = in_len - sizeof(*req);
> + if (in_payload > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE)
> + return ERR_PTR(-EMSGSIZE);
> +
> + ret = xe_sysctrl_get_response_len(req->group_id, req->command,
> + req->version, in_payload,
> + &expected_resp_len);
> + if (ret)
> + return ERR_PTR(-EOPNOTSUPP);
> +
> + if (expected_resp_len > XE_SYSCTRL_MB_MAX_MESSAGE_SIZE)
> + return ERR_PTR(-EMSGSIZE);
> +
> + resp_size = sizeof(*req) + expected_resp_len;
> + if (*out_len < resp_size)
> + return ERR_PTR(-EMSGSIZE);
> +
> + struct xe_sysctrl_rpc *resp __free(kvfree) = kvzalloc(resp_size, GFP_KERNEL);
> + if (!resp)
> + return ERR_PTR(-ENOMEM);
> +
> + cmd.header.data = cpu_to_le32(FIELD_PREP(APP_HDR_GROUP_ID_MASK, req->group_id) |
> + FIELD_PREP(APP_HDR_COMMAND_MASK, req->command) |
> + FIELD_PREP(APP_HDR_VERSION_MASK, req->version));
> +
> + cmd.data_in = in_payload ? req->payload : NULL;
> + cmd.data_in_len = in_payload;
> +
> + cmd.data_out = expected_resp_len ? resp->payload : NULL;
> + cmd.data_out_len = expected_resp_len;
> +
> + ret = xe_sysctrl_send_command(&xe->sc, &cmd, &out_payload);
> + if (ret) {
> + xe_err(xe, "sysctrl fwctl RPC failed: group=0x%02x cmd=0x%02x err=%d\n",
> + req->group_id, req->command, ret);
> + return ERR_PTR(ret);
> + }
> +
> + if (out_payload > expected_resp_len)
> + return ERR_PTR(-EIO);
> +
> + resp->hdr.firmware_type = XE_FW_SYSCTRL;
> + resp->group_id = req->group_id;
> + resp->command = req->command;
> + resp->version = req->version;
> + resp->reserved = 0;
> +
> + *out_len = sizeof(*resp) + out_payload;
> +
> + return no_free_ptr(resp);
> +}
> +
> +const struct xe_fw_ops xe_sysctrl_fw_ops = {
> + .name = "sysctrl",
> + .rpc = xe_sysctrl_rpc,
> + .validate_scope = xe_sysctrl_validate_scope,
> +};
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> index b10c8b7e0c40..418ab672528f 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> @@ -293,6 +293,37 @@ static int sysctrl_send_command(struct xe_sysctrl *sc,
> return 0;
> }
>
> +/**
> + * xe_sysctrl_get_response_len - Get expected response length for a command
> + * @group_id: Command group ID
> + * @command: Command ID
> + * @version: Command version
> + * @in_len: Input payload length
> + * @out_len: Pointer to store expected output length
> + *
> + * Returns: 0 on success, -EOPNOTSUPP if command is unknown
> + */
> +int xe_sysctrl_get_response_len(u8 group_id, u8 command, u8 version,
> + size_t in_len, size_t *out_len)
> +{
> + (void)version;
> + (void)in_len;
> +
> + switch (group_id) {
> + case XE_SYSCTRL_GROUP_FSP_RUNTIME:
> + switch (command) {
> + case XE_SYSCTRL_CMD_GET_FEATURE_CFG:
> + *out_len = XE_SYSCTRL_GET_FEATURE_CFG_RESP_BYTES;
> + return 0;
> + default:
> + return -EOPNOTSUPP;
> + }
> +
> + default:
> + return -EOPNOTSUPP;
> + }
> +}
> +
> /**
> * xe_sysctrl_mailbox_init - Initialize System Controller mailbox interface
> * @sc: System controller structure
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> index 91460be9e22c..f219ad738b81 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> @@ -23,6 +23,8 @@ struct xe_sysctrl_mailbox_command;
> #define XE_SYSCTRL_APP_HDR_VERSION(hdr) \
> FIELD_GET(APP_HDR_VERSION_MASK, le32_to_cpu((hdr)->data))
>
> +int xe_sysctrl_get_response_len(u8 group_id, u8 command, u8 version,
> + size_t in_len, size_t *out_len);
> void xe_sysctrl_mailbox_init(struct xe_sysctrl *sc);
> int xe_sysctrl_send_command(struct xe_sysctrl *sc,
> struct xe_sysctrl_mailbox_command *cmd,
> diff --git a/include/uapi/fwctl/xe.h b/include/uapi/fwctl/xe.h
> index 3720f188a7ec..2a1e559f94f2 100644
> --- a/include/uapi/fwctl/xe.h
> +++ b/include/uapi/fwctl/xe.h
> @@ -16,8 +16,13 @@
> * through the kernel FWCTL framework.
> */
>
> +enum xe_fwctl_capabilities {
> + XE_FWCTL_CAP_SYSCTRL = 0,
> +};
> +
> enum xe_firmware_type {
> - XE_FW_MAX = 1,
> + XE_FW_SYSCTRL = 0,
> + XE_FW_MAX,
> };
>
> /**
> @@ -39,4 +44,22 @@ struct fwctl_rpc_xe {
> __u32 firmware_type;
> };
>
> +/**
> + * struct xe_sysctrl_rpc - System Controller RPC
> + * @hdr: Common Xe RPC header (firmware_type = XE_FW_SYSCTRL)
> + * @group_id: Command group identifier
> + * @command: Command code
> + * @version: Command version
> + * @reserved: Reserved for alignment, must be 0
> + * @payload: Variable-length command-specific payload
> + */
> +struct xe_sysctrl_rpc {
> + struct fwctl_rpc_xe hdr;
> + __u8 group_id;
> + __u8 command;
> + __u8 version;
> + __u8 reserved;
> + __u8 payload[];
> +};
> +
> #endif
> --
> 2.43.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe/fwctl: Add FWCTL interface for Xe firmware management
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (4 preceding siblings ...)
2026-03-20 7:25 ` [RFC v1 5/5] drm/xe/fwctl: Add System Controller FWCTL RPC handler Anoop, Vijay
@ 2026-03-20 7:30 ` Patchwork
2026-03-20 7:32 ` ✓ CI.KUnit: success " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-03-20 7:30 UTC (permalink / raw)
To: Anoop, Vijay; +Cc: intel-xe
== Series Details ==
Series: drm/xe/fwctl: Add FWCTL interface for Xe firmware management
URL : https://patchwork.freedesktop.org/series/163562/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0de8a0183acdae2a4fcc342aa06e0ffcad371d43
Author: Anoop Vijay <anoop.c.vijay@intel.com>
Date: Fri Mar 20 00:25:33 2026 -0700
drm/xe/fwctl: Add System Controller FWCTL RPC handler
Add FWCTL RPC handler for Xe System Controller firmware.
Implement xe_fw_ops to route FWCTL RPCs to System Controller mailbox,
allowing userspace to issue System Controller commands via FWCTL.
Signed-off-by: Anoop Vijay <anoop.c.vijay@intel.com>
+ /mt/dim checkpatch 4ae9f18564e78a5447be68aa1e9232a4f2c37b5a drm-intel
f29bc788568e drm/xe/xe_sysctrl: Add System Controller support
-:24: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#24:
new file mode 100644
-:665: WARNING:LINE_SPACING: Missing a blank line after declarations
#665: FILE: drivers/gpu/drm/xe/xe_sysctrl_mailbox.c:225:
+ size_t remain = sizeof(*hdr) + data_out_len;
+ u8 *buffer __free(kfree) = kzalloc(remain, GFP_KERNEL);
total: 0 errors, 2 warnings, 0 checks, 835 lines checked
99bd9fd8b0de drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support
-:29: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#29:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 45 lines checked
a6805c1eec93 drm/xe/fwctl: Add Xe FWCTL type definitions
-:17: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#17:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 52 lines checked
445dc0bc1e24 drm/xe/fwctl: Add Xe FWCTL infrastructure support
-:93: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#93:
new file mode 100644
-:167: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional statements (0, 0)
#167: FILE: drivers/gpu/drm/xe/xe_fwctl.c:70:
+DEFINE_FREE(xe_fwctl, struct xe_fwctl *, if (_T) fwctl_put(&_T->fwctl))
[...]
+static const struct xe_fw_ops *fw_ops_table[XE_FW_MAX] = {
total: 0 errors, 2 warnings, 0 checks, 276 lines checked
0de8a0183acd drm/xe/fwctl: Add System Controller FWCTL RPC handler
-:100: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#100:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 287 lines checked
^ permalink raw reply [flat|nested] 15+ messages in thread* ✓ CI.KUnit: success for drm/xe/fwctl: Add FWCTL interface for Xe firmware management
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (5 preceding siblings ...)
2026-03-20 7:30 ` ✗ CI.checkpatch: warning for drm/xe/fwctl: Add FWCTL interface for Xe firmware management Patchwork
@ 2026-03-20 7:32 ` Patchwork
2026-03-20 7:46 ` ✗ CI.checksparse: warning " Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-03-20 7:32 UTC (permalink / raw)
To: Anoop, Vijay; +Cc: intel-xe
== Series Details ==
Series: drm/xe/fwctl: Add FWCTL interface for Xe firmware management
URL : https://patchwork.freedesktop.org/series/163562/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:30:57] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:31:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:31:32] Starting KUnit Kernel (1/1)...
[07:31:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:31:32] ================== guc_buf (11 subtests) ===================
[07:31:32] [PASSED] test_smallest
[07:31:32] [PASSED] test_largest
[07:31:32] [PASSED] test_granular
[07:31:32] [PASSED] test_unique
[07:31:32] [PASSED] test_overlap
[07:31:32] [PASSED] test_reusable
[07:31:32] [PASSED] test_too_big
[07:31:32] [PASSED] test_flush
[07:31:32] [PASSED] test_lookup
[07:31:32] [PASSED] test_data
[07:31:32] [PASSED] test_class
[07:31:32] ===================== [PASSED] guc_buf =====================
[07:31:32] =================== guc_dbm (7 subtests) ===================
[07:31:32] [PASSED] test_empty
[07:31:32] [PASSED] test_default
[07:31:32] ======================== test_size ========================
[07:31:32] [PASSED] 4
[07:31:32] [PASSED] 8
[07:31:32] [PASSED] 32
[07:31:32] [PASSED] 256
[07:31:32] ==================== [PASSED] test_size ====================
[07:31:32] ======================= test_reuse ========================
[07:31:32] [PASSED] 4
[07:31:32] [PASSED] 8
[07:31:32] [PASSED] 32
[07:31:32] [PASSED] 256
[07:31:32] =================== [PASSED] test_reuse ====================
[07:31:32] =================== test_range_overlap ====================
[07:31:32] [PASSED] 4
[07:31:32] [PASSED] 8
[07:31:32] [PASSED] 32
[07:31:32] [PASSED] 256
[07:31:32] =============== [PASSED] test_range_overlap ================
[07:31:32] =================== test_range_compact ====================
[07:31:32] [PASSED] 4
[07:31:32] [PASSED] 8
[07:31:32] [PASSED] 32
[07:31:32] [PASSED] 256
[07:31:32] =============== [PASSED] test_range_compact ================
[07:31:32] ==================== test_range_spare =====================
[07:31:32] [PASSED] 4
[07:31:32] [PASSED] 8
[07:31:32] [PASSED] 32
[07:31:32] [PASSED] 256
[07:31:32] ================ [PASSED] test_range_spare =================
[07:31:32] ===================== [PASSED] guc_dbm =====================
[07:31:32] =================== guc_idm (6 subtests) ===================
[07:31:32] [PASSED] bad_init
[07:31:32] [PASSED] no_init
[07:31:32] [PASSED] init_fini
[07:31:32] [PASSED] check_used
[07:31:32] [PASSED] check_quota
[07:31:32] [PASSED] check_all
[07:31:32] ===================== [PASSED] guc_idm =====================
[07:31:32] ================== no_relay (3 subtests) ===================
[07:31:32] [PASSED] xe_drops_guc2pf_if_not_ready
[07:31:32] [PASSED] xe_drops_guc2vf_if_not_ready
[07:31:32] [PASSED] xe_rejects_send_if_not_ready
[07:31:32] ==================== [PASSED] no_relay =====================
[07:31:32] ================== pf_relay (14 subtests) ==================
[07:31:32] [PASSED] pf_rejects_guc2pf_too_short
[07:31:32] [PASSED] pf_rejects_guc2pf_too_long
[07:31:32] [PASSED] pf_rejects_guc2pf_no_payload
[07:31:32] [PASSED] pf_fails_no_payload
[07:31:32] [PASSED] pf_fails_bad_origin
[07:31:32] [PASSED] pf_fails_bad_type
[07:31:32] [PASSED] pf_txn_reports_error
[07:31:32] [PASSED] pf_txn_sends_pf2guc
[07:31:32] [PASSED] pf_sends_pf2guc
[07:31:32] [SKIPPED] pf_loopback_nop
[07:31:32] [SKIPPED] pf_loopback_echo
[07:31:32] [SKIPPED] pf_loopback_fail
[07:31:32] [SKIPPED] pf_loopback_busy
[07:31:32] [SKIPPED] pf_loopback_retry
[07:31:32] ==================== [PASSED] pf_relay =====================
[07:31:32] ================== vf_relay (3 subtests) ===================
[07:31:32] [PASSED] vf_rejects_guc2vf_too_short
[07:31:32] [PASSED] vf_rejects_guc2vf_too_long
[07:31:32] [PASSED] vf_rejects_guc2vf_no_payload
[07:31:32] ==================== [PASSED] vf_relay =====================
[07:31:32] ================ pf_gt_config (9 subtests) =================
[07:31:32] [PASSED] fair_contexts_1vf
[07:31:32] [PASSED] fair_doorbells_1vf
[07:31:32] [PASSED] fair_ggtt_1vf
[07:31:32] ====================== fair_vram_1vf ======================
[07:31:32] [PASSED] 3.50 GiB
[07:31:32] [PASSED] 11.5 GiB
[07:31:32] [PASSED] 15.5 GiB
[07:31:32] [PASSED] 31.5 GiB
[07:31:32] [PASSED] 63.5 GiB
[07:31:32] [PASSED] 1.91 GiB
[07:31:32] ================== [PASSED] fair_vram_1vf ==================
[07:31:32] ================ fair_vram_1vf_admin_only =================
[07:31:32] [PASSED] 3.50 GiB
[07:31:32] [PASSED] 11.5 GiB
[07:31:32] [PASSED] 15.5 GiB
[07:31:32] [PASSED] 31.5 GiB
[07:31:32] [PASSED] 63.5 GiB
[07:31:32] [PASSED] 1.91 GiB
[07:31:32] ============ [PASSED] fair_vram_1vf_admin_only =============
[07:31:32] ====================== fair_contexts ======================
[07:31:32] [PASSED] 1 VF
[07:31:32] [PASSED] 2 VFs
[07:31:32] [PASSED] 3 VFs
[07:31:32] [PASSED] 4 VFs
[07:31:32] [PASSED] 5 VFs
[07:31:32] [PASSED] 6 VFs
[07:31:32] [PASSED] 7 VFs
[07:31:32] [PASSED] 8 VFs
[07:31:32] [PASSED] 9 VFs
[07:31:32] [PASSED] 10 VFs
[07:31:32] [PASSED] 11 VFs
[07:31:32] [PASSED] 12 VFs
[07:31:32] [PASSED] 13 VFs
[07:31:32] [PASSED] 14 VFs
[07:31:32] [PASSED] 15 VFs
[07:31:32] [PASSED] 16 VFs
[07:31:32] [PASSED] 17 VFs
[07:31:32] [PASSED] 18 VFs
[07:31:32] [PASSED] 19 VFs
[07:31:32] [PASSED] 20 VFs
[07:31:32] [PASSED] 21 VFs
[07:31:32] [PASSED] 22 VFs
[07:31:32] [PASSED] 23 VFs
[07:31:32] [PASSED] 24 VFs
[07:31:32] [PASSED] 25 VFs
[07:31:32] [PASSED] 26 VFs
[07:31:32] [PASSED] 27 VFs
[07:31:32] [PASSED] 28 VFs
[07:31:32] [PASSED] 29 VFs
[07:31:32] [PASSED] 30 VFs
[07:31:32] [PASSED] 31 VFs
[07:31:32] [PASSED] 32 VFs
[07:31:32] [PASSED] 33 VFs
[07:31:32] [PASSED] 34 VFs
[07:31:32] [PASSED] 35 VFs
[07:31:32] [PASSED] 36 VFs
[07:31:32] [PASSED] 37 VFs
[07:31:32] [PASSED] 38 VFs
[07:31:32] [PASSED] 39 VFs
[07:31:32] [PASSED] 40 VFs
[07:31:32] [PASSED] 41 VFs
[07:31:32] [PASSED] 42 VFs
[07:31:32] [PASSED] 43 VFs
[07:31:32] [PASSED] 44 VFs
[07:31:32] [PASSED] 45 VFs
[07:31:32] [PASSED] 46 VFs
[07:31:32] [PASSED] 47 VFs
[07:31:32] [PASSED] 48 VFs
[07:31:32] [PASSED] 49 VFs
[07:31:32] [PASSED] 50 VFs
[07:31:32] [PASSED] 51 VFs
[07:31:32] [PASSED] 52 VFs
[07:31:32] [PASSED] 53 VFs
[07:31:32] [PASSED] 54 VFs
[07:31:32] [PASSED] 55 VFs
[07:31:32] [PASSED] 56 VFs
[07:31:32] [PASSED] 57 VFs
[07:31:32] [PASSED] 58 VFs
[07:31:32] [PASSED] 59 VFs
[07:31:32] [PASSED] 60 VFs
[07:31:32] [PASSED] 61 VFs
[07:31:32] [PASSED] 62 VFs
[07:31:32] [PASSED] 63 VFs
[07:31:32] ================== [PASSED] fair_contexts ==================
[07:31:32] ===================== fair_doorbells ======================
[07:31:32] [PASSED] 1 VF
[07:31:32] [PASSED] 2 VFs
[07:31:32] [PASSED] 3 VFs
[07:31:32] [PASSED] 4 VFs
[07:31:32] [PASSED] 5 VFs
[07:31:32] [PASSED] 6 VFs
[07:31:32] [PASSED] 7 VFs
[07:31:32] [PASSED] 8 VFs
[07:31:32] [PASSED] 9 VFs
[07:31:32] [PASSED] 10 VFs
[07:31:32] [PASSED] 11 VFs
[07:31:32] [PASSED] 12 VFs
[07:31:32] [PASSED] 13 VFs
[07:31:32] [PASSED] 14 VFs
[07:31:32] [PASSED] 15 VFs
[07:31:32] [PASSED] 16 VFs
[07:31:32] [PASSED] 17 VFs
[07:31:32] [PASSED] 18 VFs
[07:31:32] [PASSED] 19 VFs
[07:31:32] [PASSED] 20 VFs
[07:31:32] [PASSED] 21 VFs
[07:31:32] [PASSED] 22 VFs
[07:31:32] [PASSED] 23 VFs
[07:31:32] [PASSED] 24 VFs
[07:31:32] [PASSED] 25 VFs
[07:31:32] [PASSED] 26 VFs
[07:31:32] [PASSED] 27 VFs
[07:31:32] [PASSED] 28 VFs
[07:31:32] [PASSED] 29 VFs
[07:31:32] [PASSED] 30 VFs
[07:31:32] [PASSED] 31 VFs
[07:31:32] [PASSED] 32 VFs
[07:31:32] [PASSED] 33 VFs
[07:31:32] [PASSED] 34 VFs
[07:31:32] [PASSED] 35 VFs
[07:31:32] [PASSED] 36 VFs
[07:31:32] [PASSED] 37 VFs
[07:31:32] [PASSED] 38 VFs
[07:31:32] [PASSED] 39 VFs
[07:31:32] [PASSED] 40 VFs
[07:31:32] [PASSED] 41 VFs
[07:31:32] [PASSED] 42 VFs
[07:31:32] [PASSED] 43 VFs
[07:31:32] [PASSED] 44 VFs
[07:31:32] [PASSED] 45 VFs
[07:31:32] [PASSED] 46 VFs
[07:31:32] [PASSED] 47 VFs
[07:31:32] [PASSED] 48 VFs
[07:31:32] [PASSED] 49 VFs
[07:31:32] [PASSED] 50 VFs
[07:31:32] [PASSED] 51 VFs
[07:31:32] [PASSED] 52 VFs
[07:31:32] [PASSED] 53 VFs
[07:31:32] [PASSED] 54 VFs
[07:31:32] [PASSED] 55 VFs
[07:31:32] [PASSED] 56 VFs
[07:31:32] [PASSED] 57 VFs
[07:31:32] [PASSED] 58 VFs
[07:31:32] [PASSED] 59 VFs
[07:31:32] [PASSED] 60 VFs
[07:31:32] [PASSED] 61 VFs
[07:31:32] [PASSED] 62 VFs
[07:31:32] [PASSED] 63 VFs
[07:31:32] ================= [PASSED] fair_doorbells ==================
[07:31:32] ======================== fair_ggtt ========================
[07:31:32] [PASSED] 1 VF
[07:31:32] [PASSED] 2 VFs
[07:31:32] [PASSED] 3 VFs
[07:31:32] [PASSED] 4 VFs
[07:31:32] [PASSED] 5 VFs
[07:31:32] [PASSED] 6 VFs
[07:31:32] [PASSED] 7 VFs
[07:31:32] [PASSED] 8 VFs
[07:31:32] [PASSED] 9 VFs
[07:31:32] [PASSED] 10 VFs
[07:31:32] [PASSED] 11 VFs
[07:31:32] [PASSED] 12 VFs
[07:31:32] [PASSED] 13 VFs
[07:31:32] [PASSED] 14 VFs
[07:31:32] [PASSED] 15 VFs
[07:31:32] [PASSED] 16 VFs
[07:31:32] [PASSED] 17 VFs
[07:31:32] [PASSED] 18 VFs
[07:31:32] [PASSED] 19 VFs
[07:31:32] [PASSED] 20 VFs
[07:31:32] [PASSED] 21 VFs
[07:31:32] [PASSED] 22 VFs
[07:31:32] [PASSED] 23 VFs
[07:31:32] [PASSED] 24 VFs
[07:31:32] [PASSED] 25 VFs
[07:31:32] [PASSED] 26 VFs
[07:31:32] [PASSED] 27 VFs
[07:31:32] [PASSED] 28 VFs
[07:31:32] [PASSED] 29 VFs
[07:31:32] [PASSED] 30 VFs
[07:31:32] [PASSED] 31 VFs
[07:31:32] [PASSED] 32 VFs
[07:31:32] [PASSED] 33 VFs
[07:31:32] [PASSED] 34 VFs
[07:31:32] [PASSED] 35 VFs
[07:31:32] [PASSED] 36 VFs
[07:31:32] [PASSED] 37 VFs
[07:31:32] [PASSED] 38 VFs
[07:31:32] [PASSED] 39 VFs
[07:31:32] [PASSED] 40 VFs
[07:31:32] [PASSED] 41 VFs
[07:31:32] [PASSED] 42 VFs
[07:31:32] [PASSED] 43 VFs
[07:31:32] [PASSED] 44 VFs
[07:31:32] [PASSED] 45 VFs
[07:31:32] [PASSED] 46 VFs
[07:31:32] [PASSED] 47 VFs
[07:31:32] [PASSED] 48 VFs
[07:31:32] [PASSED] 49 VFs
[07:31:32] [PASSED] 50 VFs
[07:31:32] [PASSED] 51 VFs
[07:31:32] [PASSED] 52 VFs
[07:31:32] [PASSED] 53 VFs
[07:31:32] [PASSED] 54 VFs
[07:31:32] [PASSED] 55 VFs
[07:31:32] [PASSED] 56 VFs
[07:31:32] [PASSED] 57 VFs
[07:31:33] [PASSED] 58 VFs
[07:31:33] [PASSED] 59 VFs
[07:31:33] [PASSED] 60 VFs
[07:31:33] [PASSED] 61 VFs
[07:31:33] [PASSED] 62 VFs
[07:31:33] [PASSED] 63 VFs
[07:31:33] ==================== [PASSED] fair_ggtt ====================
[07:31:33] ======================== fair_vram ========================
[07:31:33] [PASSED] 1 VF
[07:31:33] [PASSED] 2 VFs
[07:31:33] [PASSED] 3 VFs
[07:31:33] [PASSED] 4 VFs
[07:31:33] [PASSED] 5 VFs
[07:31:33] [PASSED] 6 VFs
[07:31:33] [PASSED] 7 VFs
[07:31:33] [PASSED] 8 VFs
[07:31:33] [PASSED] 9 VFs
[07:31:33] [PASSED] 10 VFs
[07:31:33] [PASSED] 11 VFs
[07:31:33] [PASSED] 12 VFs
[07:31:33] [PASSED] 13 VFs
[07:31:33] [PASSED] 14 VFs
[07:31:33] [PASSED] 15 VFs
[07:31:33] [PASSED] 16 VFs
[07:31:33] [PASSED] 17 VFs
[07:31:33] [PASSED] 18 VFs
[07:31:33] [PASSED] 19 VFs
[07:31:33] [PASSED] 20 VFs
[07:31:33] [PASSED] 21 VFs
[07:31:33] [PASSED] 22 VFs
[07:31:33] [PASSED] 23 VFs
[07:31:33] [PASSED] 24 VFs
[07:31:33] [PASSED] 25 VFs
[07:31:33] [PASSED] 26 VFs
[07:31:33] [PASSED] 27 VFs
[07:31:33] [PASSED] 28 VFs
[07:31:33] [PASSED] 29 VFs
[07:31:33] [PASSED] 30 VFs
[07:31:33] [PASSED] 31 VFs
[07:31:33] [PASSED] 32 VFs
[07:31:33] [PASSED] 33 VFs
[07:31:33] [PASSED] 34 VFs
[07:31:33] [PASSED] 35 VFs
[07:31:33] [PASSED] 36 VFs
[07:31:33] [PASSED] 37 VFs
[07:31:33] [PASSED] 38 VFs
[07:31:33] [PASSED] 39 VFs
[07:31:33] [PASSED] 40 VFs
[07:31:33] [PASSED] 41 VFs
[07:31:33] [PASSED] 42 VFs
[07:31:33] [PASSED] 43 VFs
[07:31:33] [PASSED] 44 VFs
[07:31:33] [PASSED] 45 VFs
[07:31:33] [PASSED] 46 VFs
[07:31:33] [PASSED] 47 VFs
[07:31:33] [PASSED] 48 VFs
[07:31:33] [PASSED] 49 VFs
[07:31:33] [PASSED] 50 VFs
[07:31:33] [PASSED] 51 VFs
[07:31:33] [PASSED] 52 VFs
[07:31:33] [PASSED] 53 VFs
[07:31:33] [PASSED] 54 VFs
[07:31:33] [PASSED] 55 VFs
[07:31:33] [PASSED] 56 VFs
[07:31:33] [PASSED] 57 VFs
[07:31:33] [PASSED] 58 VFs
[07:31:33] [PASSED] 59 VFs
[07:31:33] [PASSED] 60 VFs
[07:31:33] [PASSED] 61 VFs
[07:31:33] [PASSED] 62 VFs
[07:31:33] [PASSED] 63 VFs
[07:31:33] ==================== [PASSED] fair_vram ====================
[07:31:33] ================== [PASSED] pf_gt_config ===================
[07:31:33] ===================== lmtt (1 subtest) =====================
[07:31:33] ======================== test_ops =========================
[07:31:33] [PASSED] 2-level
[07:31:33] [PASSED] multi-level
[07:31:33] ==================== [PASSED] test_ops =====================
[07:31:33] ====================== [PASSED] lmtt =======================
[07:31:33] ================= pf_service (11 subtests) =================
[07:31:33] [PASSED] pf_negotiate_any
[07:31:33] [PASSED] pf_negotiate_base_match
[07:31:33] [PASSED] pf_negotiate_base_newer
[07:31:33] [PASSED] pf_negotiate_base_next
[07:31:33] [SKIPPED] pf_negotiate_base_older
[07:31:33] [PASSED] pf_negotiate_base_prev
[07:31:33] [PASSED] pf_negotiate_latest_match
[07:31:33] [PASSED] pf_negotiate_latest_newer
[07:31:33] [PASSED] pf_negotiate_latest_next
[07:31:33] [SKIPPED] pf_negotiate_latest_older
[07:31:33] [SKIPPED] pf_negotiate_latest_prev
[07:31:33] =================== [PASSED] pf_service ====================
[07:31:33] ================= xe_guc_g2g (2 subtests) ==================
[07:31:33] ============== xe_live_guc_g2g_kunit_default ==============
[07:31:33] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[07:31:33] ============== xe_live_guc_g2g_kunit_allmem ===============
[07:31:33] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[07:31:33] =================== [SKIPPED] xe_guc_g2g ===================
[07:31:33] =================== xe_mocs (2 subtests) ===================
[07:31:33] ================ xe_live_mocs_kernel_kunit ================
[07:31:33] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:31:33] ================ xe_live_mocs_reset_kunit =================
[07:31:33] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:31:33] ==================== [SKIPPED] xe_mocs =====================
[07:31:33] ================= xe_migrate (2 subtests) ==================
[07:31:33] ================= xe_migrate_sanity_kunit =================
[07:31:33] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:31:33] ================== xe_validate_ccs_kunit ==================
[07:31:33] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:31:33] =================== [SKIPPED] xe_migrate ===================
[07:31:33] ================== xe_dma_buf (1 subtest) ==================
[07:31:33] ==================== xe_dma_buf_kunit =====================
[07:31:33] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:31:33] =================== [SKIPPED] xe_dma_buf ===================
[07:31:33] ================= xe_bo_shrink (1 subtest) =================
[07:31:33] =================== xe_bo_shrink_kunit ====================
[07:31:33] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:31:33] ================== [SKIPPED] xe_bo_shrink ==================
[07:31:33] ==================== xe_bo (2 subtests) ====================
[07:31:33] ================== xe_ccs_migrate_kunit ===================
[07:31:33] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:31:33] ==================== xe_bo_evict_kunit ====================
[07:31:33] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:31:33] ===================== [SKIPPED] xe_bo ======================
[07:31:33] ==================== args (13 subtests) ====================
[07:31:33] [PASSED] count_args_test
[07:31:33] [PASSED] call_args_example
[07:31:33] [PASSED] call_args_test
[07:31:33] [PASSED] drop_first_arg_example
[07:31:33] [PASSED] drop_first_arg_test
[07:31:33] [PASSED] first_arg_example
[07:31:33] [PASSED] first_arg_test
[07:31:33] [PASSED] last_arg_example
[07:31:33] [PASSED] last_arg_test
[07:31:33] [PASSED] pick_arg_example
[07:31:33] [PASSED] if_args_example
[07:31:33] [PASSED] if_args_test
[07:31:33] [PASSED] sep_comma_example
[07:31:33] ====================== [PASSED] args =======================
[07:31:33] =================== xe_pci (3 subtests) ====================
[07:31:33] ==================== check_graphics_ip ====================
[07:31:33] [PASSED] 12.00 Xe_LP
[07:31:33] [PASSED] 12.10 Xe_LP+
[07:31:33] [PASSED] 12.55 Xe_HPG
[07:31:33] [PASSED] 12.60 Xe_HPC
[07:31:33] [PASSED] 12.70 Xe_LPG
[07:31:33] [PASSED] 12.71 Xe_LPG
[07:31:33] [PASSED] 12.74 Xe_LPG+
[07:31:33] [PASSED] 20.01 Xe2_HPG
[07:31:33] [PASSED] 20.02 Xe2_HPG
[07:31:33] [PASSED] 20.04 Xe2_LPG
[07:31:33] [PASSED] 30.00 Xe3_LPG
[07:31:33] [PASSED] 30.01 Xe3_LPG
[07:31:33] [PASSED] 30.03 Xe3_LPG
[07:31:33] [PASSED] 30.04 Xe3_LPG
[07:31:33] [PASSED] 30.05 Xe3_LPG
[07:31:33] [PASSED] 35.10 Xe3p_LPG
[07:31:33] [PASSED] 35.11 Xe3p_XPC
[07:31:33] ================ [PASSED] check_graphics_ip ================
[07:31:33] ===================== check_media_ip ======================
[07:31:33] [PASSED] 12.00 Xe_M
[07:31:33] [PASSED] 12.55 Xe_HPM
[07:31:33] [PASSED] 13.00 Xe_LPM+
[07:31:33] [PASSED] 13.01 Xe2_HPM
[07:31:33] [PASSED] 20.00 Xe2_LPM
[07:31:33] [PASSED] 30.00 Xe3_LPM
[07:31:33] [PASSED] 30.02 Xe3_LPM
[07:31:33] [PASSED] 35.00 Xe3p_LPM
[07:31:33] [PASSED] 35.03 Xe3p_HPM
[07:31:33] ================= [PASSED] check_media_ip ==================
[07:31:33] =================== check_platform_desc ===================
[07:31:33] [PASSED] 0x9A60 (TIGERLAKE)
[07:31:33] [PASSED] 0x9A68 (TIGERLAKE)
[07:31:33] [PASSED] 0x9A70 (TIGERLAKE)
[07:31:33] [PASSED] 0x9A40 (TIGERLAKE)
[07:31:33] [PASSED] 0x9A49 (TIGERLAKE)
[07:31:33] [PASSED] 0x9A59 (TIGERLAKE)
[07:31:33] [PASSED] 0x9A78 (TIGERLAKE)
[07:31:33] [PASSED] 0x9AC0 (TIGERLAKE)
[07:31:33] [PASSED] 0x9AC9 (TIGERLAKE)
[07:31:33] [PASSED] 0x9AD9 (TIGERLAKE)
[07:31:33] [PASSED] 0x9AF8 (TIGERLAKE)
[07:31:33] [PASSED] 0x4C80 (ROCKETLAKE)
[07:31:33] [PASSED] 0x4C8A (ROCKETLAKE)
[07:31:33] [PASSED] 0x4C8B (ROCKETLAKE)
[07:31:33] [PASSED] 0x4C8C (ROCKETLAKE)
[07:31:33] [PASSED] 0x4C90 (ROCKETLAKE)
[07:31:33] [PASSED] 0x4C9A (ROCKETLAKE)
[07:31:33] [PASSED] 0x4680 (ALDERLAKE_S)
[07:31:33] [PASSED] 0x4682 (ALDERLAKE_S)
[07:31:33] [PASSED] 0x4688 (ALDERLAKE_S)
[07:31:33] [PASSED] 0x468A (ALDERLAKE_S)
[07:31:33] [PASSED] 0x468B (ALDERLAKE_S)
[07:31:33] [PASSED] 0x4690 (ALDERLAKE_S)
[07:31:33] [PASSED] 0x4692 (ALDERLAKE_S)
[07:31:33] [PASSED] 0x4693 (ALDERLAKE_S)
[07:31:33] [PASSED] 0x46A0 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46A1 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46A2 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46A3 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46A6 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46A8 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46AA (ALDERLAKE_P)
[07:31:33] [PASSED] 0x462A (ALDERLAKE_P)
[07:31:33] [PASSED] 0x4626 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x4628 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46B0 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46B1 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46B2 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46B3 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46C0 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46C1 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46C2 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46C3 (ALDERLAKE_P)
[07:31:33] [PASSED] 0x46D0 (ALDERLAKE_N)
[07:31:33] [PASSED] 0x46D1 (ALDERLAKE_N)
[07:31:33] [PASSED] 0x46D2 (ALDERLAKE_N)
[07:31:33] [PASSED] 0x46D3 (ALDERLAKE_N)
[07:31:33] [PASSED] 0x46D4 (ALDERLAKE_N)
[07:31:33] [PASSED] 0xA721 (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7A1 (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7A9 (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7AC (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7AD (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA720 (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7A0 (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7A8 (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7AA (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA7AB (ALDERLAKE_P)
[07:31:33] [PASSED] 0xA780 (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA781 (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA782 (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA783 (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA788 (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA789 (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA78A (ALDERLAKE_S)
[07:31:33] [PASSED] 0xA78B (ALDERLAKE_S)
[07:31:33] [PASSED] 0x4905 (DG1)
[07:31:33] [PASSED] 0x4906 (DG1)
[07:31:33] [PASSED] 0x4907 (DG1)
[07:31:33] [PASSED] 0x4908 (DG1)
[07:31:33] [PASSED] 0x4909 (DG1)
[07:31:33] [PASSED] 0x56C0 (DG2)
[07:31:33] [PASSED] 0x56C2 (DG2)
[07:31:33] [PASSED] 0x56C1 (DG2)
[07:31:33] [PASSED] 0x7D51 (METEORLAKE)
[07:31:33] [PASSED] 0x7DD1 (METEORLAKE)
[07:31:33] [PASSED] 0x7D41 (METEORLAKE)
[07:31:33] [PASSED] 0x7D67 (METEORLAKE)
[07:31:33] [PASSED] 0xB640 (METEORLAKE)
[07:31:33] [PASSED] 0x56A0 (DG2)
[07:31:33] [PASSED] 0x56A1 (DG2)
[07:31:33] [PASSED] 0x56A2 (DG2)
[07:31:33] [PASSED] 0x56BE (DG2)
[07:31:33] [PASSED] 0x56BF (DG2)
[07:31:33] [PASSED] 0x5690 (DG2)
[07:31:33] [PASSED] 0x5691 (DG2)
[07:31:33] [PASSED] 0x5692 (DG2)
[07:31:33] [PASSED] 0x56A5 (DG2)
[07:31:33] [PASSED] 0x56A6 (DG2)
[07:31:33] [PASSED] 0x56B0 (DG2)
[07:31:33] [PASSED] 0x56B1 (DG2)
[07:31:33] [PASSED] 0x56BA (DG2)
[07:31:33] [PASSED] 0x56BB (DG2)
[07:31:33] [PASSED] 0x56BC (DG2)
[07:31:33] [PASSED] 0x56BD (DG2)
[07:31:33] [PASSED] 0x5693 (DG2)
[07:31:33] [PASSED] 0x5694 (DG2)
[07:31:33] [PASSED] 0x5695 (DG2)
[07:31:33] [PASSED] 0x56A3 (DG2)
[07:31:33] [PASSED] 0x56A4 (DG2)
[07:31:33] [PASSED] 0x56B2 (DG2)
[07:31:33] [PASSED] 0x56B3 (DG2)
[07:31:33] [PASSED] 0x5696 (DG2)
[07:31:33] [PASSED] 0x5697 (DG2)
[07:31:33] [PASSED] 0xB69 (PVC)
[07:31:33] [PASSED] 0xB6E (PVC)
[07:31:33] [PASSED] 0xBD4 (PVC)
[07:31:33] [PASSED] 0xBD5 (PVC)
[07:31:33] [PASSED] 0xBD6 (PVC)
[07:31:33] [PASSED] 0xBD7 (PVC)
[07:31:33] [PASSED] 0xBD8 (PVC)
[07:31:33] [PASSED] 0xBD9 (PVC)
[07:31:33] [PASSED] 0xBDA (PVC)
[07:31:33] [PASSED] 0xBDB (PVC)
[07:31:33] [PASSED] 0xBE0 (PVC)
[07:31:33] [PASSED] 0xBE1 (PVC)
[07:31:33] [PASSED] 0xBE5 (PVC)
[07:31:33] [PASSED] 0x7D40 (METEORLAKE)
[07:31:33] [PASSED] 0x7D45 (METEORLAKE)
[07:31:33] [PASSED] 0x7D55 (METEORLAKE)
[07:31:33] [PASSED] 0x7D60 (METEORLAKE)
[07:31:33] [PASSED] 0x7DD5 (METEORLAKE)
[07:31:33] [PASSED] 0x6420 (LUNARLAKE)
[07:31:33] [PASSED] 0x64A0 (LUNARLAKE)
[07:31:33] [PASSED] 0x64B0 (LUNARLAKE)
[07:31:33] [PASSED] 0xE202 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE209 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE20B (BATTLEMAGE)
[07:31:33] [PASSED] 0xE20C (BATTLEMAGE)
[07:31:33] [PASSED] 0xE20D (BATTLEMAGE)
[07:31:33] [PASSED] 0xE210 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE211 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE212 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE216 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE220 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE221 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE222 (BATTLEMAGE)
[07:31:33] [PASSED] 0xE223 (BATTLEMAGE)
[07:31:33] [PASSED] 0xB080 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB081 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB082 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB083 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB084 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB085 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB086 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB087 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB08F (PANTHERLAKE)
[07:31:33] [PASSED] 0xB090 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB0A0 (PANTHERLAKE)
[07:31:33] [PASSED] 0xB0B0 (PANTHERLAKE)
[07:31:33] [PASSED] 0xFD80 (PANTHERLAKE)
[07:31:33] [PASSED] 0xFD81 (PANTHERLAKE)
[07:31:33] [PASSED] 0xD740 (NOVALAKE_S)
[07:31:33] [PASSED] 0xD741 (NOVALAKE_S)
[07:31:33] [PASSED] 0xD742 (NOVALAKE_S)
[07:31:33] [PASSED] 0xD743 (NOVALAKE_S)
[07:31:33] [PASSED] 0xD744 (NOVALAKE_S)
[07:31:33] [PASSED] 0xD745 (NOVALAKE_S)
[07:31:33] [PASSED] 0x674C (CRESCENTISLAND)
[07:31:33] [PASSED] 0xD750 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD751 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD752 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD753 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD754 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD755 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD756 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD757 (NOVALAKE_P)
[07:31:33] [PASSED] 0xD75F (NOVALAKE_P)
[07:31:33] =============== [PASSED] check_platform_desc ===============
[07:31:33] ===================== [PASSED] xe_pci ======================
[07:31:33] =================== xe_rtp (2 subtests) ====================
[07:31:33] =============== xe_rtp_process_to_sr_tests ================
[07:31:33] [PASSED] coalesce-same-reg
[07:31:33] [PASSED] no-match-no-add
[07:31:33] [PASSED] match-or
[07:31:33] [PASSED] match-or-xfail
[07:31:33] [PASSED] no-match-no-add-multiple-rules
[07:31:33] [PASSED] two-regs-two-entries
[07:31:33] [PASSED] clr-one-set-other
[07:31:33] [PASSED] set-field
[07:31:33] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[07:31:33] [PASSED] conflict-not-disjoint
[07:31:33] [PASSED] conflict-reg-type
[07:31:33] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:31:33] ================== xe_rtp_process_tests ===================
[07:31:33] [PASSED] active1
[07:31:33] [PASSED] active2
[07:31:33] [PASSED] active-inactive
[07:31:33] [PASSED] inactive-active
[07:31:33] [PASSED] inactive-1st_or_active-inactive
[07:31:33] [PASSED] inactive-2nd_or_active-inactive
[07:31:33] [PASSED] inactive-last_or_active-inactive
[07:31:33] [PASSED] inactive-no_or_active-inactive
[07:31:33] ============== [PASSED] xe_rtp_process_tests ===============
[07:31:33] ===================== [PASSED] xe_rtp ======================
[07:31:33] ==================== xe_wa (1 subtest) =====================
[07:31:33] ======================== xe_wa_gt =========================
[07:31:33] [PASSED] TIGERLAKE B0
[07:31:33] [PASSED] DG1 A0
[07:31:33] [PASSED] DG1 B0
[07:31:33] [PASSED] ALDERLAKE_S A0
[07:31:33] [PASSED] ALDERLAKE_S B0
[07:31:33] [PASSED] ALDERLAKE_S C0
[07:31:33] [PASSED] ALDERLAKE_S D0
[07:31:33] [PASSED] ALDERLAKE_P A0
[07:31:33] [PASSED] ALDERLAKE_P B0
[07:31:33] [PASSED] ALDERLAKE_P C0
[07:31:33] [PASSED] ALDERLAKE_S RPLS D0
[07:31:33] [PASSED] ALDERLAKE_P RPLU E0
[07:31:33] [PASSED] DG2 G10 C0
[07:31:33] [PASSED] DG2 G11 B1
[07:31:33] [PASSED] DG2 G12 A1
[07:31:33] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:31:33] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:31:33] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[07:31:33] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[07:31:33] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[07:31:33] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[07:31:33] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[07:31:33] ==================== [PASSED] xe_wa_gt =====================
[07:31:33] ====================== [PASSED] xe_wa ======================
[07:31:33] ============================================================
[07:31:33] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[07:31:33] Elapsed time: 35.700s total, 4.282s configuring, 30.801s building, 0.603s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:31:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:31:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:31:59] Starting KUnit Kernel (1/1)...
[07:31:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:31:59] ============ drm_test_pick_cmdline (2 subtests) ============
[07:31:59] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[07:31:59] =============== drm_test_pick_cmdline_named ===============
[07:31:59] [PASSED] NTSC
[07:31:59] [PASSED] NTSC-J
[07:31:59] [PASSED] PAL
[07:31:59] [PASSED] PAL-M
[07:31:59] =========== [PASSED] drm_test_pick_cmdline_named ===========
[07:31:59] ============== [PASSED] drm_test_pick_cmdline ==============
[07:31:59] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:31:59] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:31:59] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:31:59] =========== drm_validate_clone_mode (2 subtests) ===========
[07:31:59] ============== drm_test_check_in_clone_mode ===============
[07:31:59] [PASSED] in_clone_mode
[07:31:59] [PASSED] not_in_clone_mode
[07:31:59] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:31:59] =============== drm_test_check_valid_clones ===============
[07:31:59] [PASSED] not_in_clone_mode
[07:31:59] [PASSED] valid_clone
[07:31:59] [PASSED] invalid_clone
[07:31:59] =========== [PASSED] drm_test_check_valid_clones ===========
[07:31:59] ============= [PASSED] drm_validate_clone_mode =============
[07:31:59] ============= drm_validate_modeset (1 subtest) =============
[07:31:59] [PASSED] drm_test_check_connector_changed_modeset
[07:31:59] ============== [PASSED] drm_validate_modeset ===============
[07:31:59] ====== drm_test_bridge_get_current_state (2 subtests) ======
[07:31:59] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:31:59] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[07:31:59] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:31:59] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:31:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:31:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:31:59] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[07:31:59] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:31:59] ============== drm_bridge_alloc (2 subtests) ===============
[07:31:59] [PASSED] drm_test_drm_bridge_alloc_basic
[07:31:59] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:31:59] ================ [PASSED] drm_bridge_alloc =================
[07:31:59] ============= drm_cmdline_parser (40 subtests) =============
[07:31:59] [PASSED] drm_test_cmdline_force_d_only
[07:31:59] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:31:59] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:31:59] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:31:59] [PASSED] drm_test_cmdline_force_e_only
[07:31:59] [PASSED] drm_test_cmdline_res
[07:31:59] [PASSED] drm_test_cmdline_res_vesa
[07:31:59] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:31:59] [PASSED] drm_test_cmdline_res_rblank
[07:31:59] [PASSED] drm_test_cmdline_res_bpp
[07:31:59] [PASSED] drm_test_cmdline_res_refresh
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:31:59] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:31:59] [PASSED] drm_test_cmdline_res_margins_force_on
[07:31:59] [PASSED] drm_test_cmdline_res_vesa_margins
[07:31:59] [PASSED] drm_test_cmdline_name
[07:31:59] [PASSED] drm_test_cmdline_name_bpp
[07:31:59] [PASSED] drm_test_cmdline_name_option
[07:31:59] [PASSED] drm_test_cmdline_name_bpp_option
[07:31:59] [PASSED] drm_test_cmdline_rotate_0
[07:31:59] [PASSED] drm_test_cmdline_rotate_90
[07:31:59] [PASSED] drm_test_cmdline_rotate_180
[07:31:59] [PASSED] drm_test_cmdline_rotate_270
[07:31:59] [PASSED] drm_test_cmdline_hmirror
[07:31:59] [PASSED] drm_test_cmdline_vmirror
[07:31:59] [PASSED] drm_test_cmdline_margin_options
[07:31:59] [PASSED] drm_test_cmdline_multiple_options
[07:31:59] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:31:59] [PASSED] drm_test_cmdline_extra_and_option
[07:31:59] [PASSED] drm_test_cmdline_freestanding_options
[07:31:59] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:31:59] [PASSED] drm_test_cmdline_panel_orientation
[07:31:59] ================ drm_test_cmdline_invalid =================
[07:31:59] [PASSED] margin_only
[07:31:59] [PASSED] interlace_only
[07:31:59] [PASSED] res_missing_x
[07:31:59] [PASSED] res_missing_y
[07:31:59] [PASSED] res_bad_y
[07:31:59] [PASSED] res_missing_y_bpp
[07:31:59] [PASSED] res_bad_bpp
[07:31:59] [PASSED] res_bad_refresh
[07:31:59] [PASSED] res_bpp_refresh_force_on_off
[07:31:59] [PASSED] res_invalid_mode
[07:31:59] [PASSED] res_bpp_wrong_place_mode
[07:31:59] [PASSED] name_bpp_refresh
[07:31:59] [PASSED] name_refresh
[07:31:59] [PASSED] name_refresh_wrong_mode
[07:31:59] [PASSED] name_refresh_invalid_mode
[07:31:59] [PASSED] rotate_multiple
[07:31:59] [PASSED] rotate_invalid_val
[07:31:59] [PASSED] rotate_truncated
[07:31:59] [PASSED] invalid_option
[07:31:59] [PASSED] invalid_tv_option
[07:31:59] [PASSED] truncated_tv_option
[07:31:59] ============ [PASSED] drm_test_cmdline_invalid =============
[07:31:59] =============== drm_test_cmdline_tv_options ===============
[07:31:59] [PASSED] NTSC
[07:31:59] [PASSED] NTSC_443
[07:31:59] [PASSED] NTSC_J
[07:31:59] [PASSED] PAL
[07:31:59] [PASSED] PAL_M
[07:31:59] [PASSED] PAL_N
[07:31:59] [PASSED] SECAM
[07:31:59] [PASSED] MONO_525
[07:31:59] [PASSED] MONO_625
[07:31:59] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:31:59] =============== [PASSED] drm_cmdline_parser ================
[07:31:59] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:31:59] [PASSED] drm_test_connector_hdmi_init_valid
[07:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:31:59] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:31:59] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:31:59] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:31:59] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:31:59] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:31:59] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:31:59] [PASSED] supported_formats=0x3 yuv420_allowed=1
[07:31:59] [PASSED] supported_formats=0x3 yuv420_allowed=0
[07:31:59] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:31:59] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:31:59] [PASSED] drm_test_connector_hdmi_init_null_product
[07:31:59] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:31:59] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:31:59] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:31:59] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:31:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:31:59] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:31:59] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:31:59] ========= drm_test_connector_hdmi_init_type_valid =========
[07:31:59] [PASSED] HDMI-A
[07:31:59] [PASSED] HDMI-B
[07:31:59] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:31:59] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:31:59] [PASSED] Unknown
[07:31:59] [PASSED] VGA
[07:31:59] [PASSED] DVI-I
[07:31:59] [PASSED] DVI-D
[07:31:59] [PASSED] DVI-A
[07:31:59] [PASSED] Composite
[07:31:59] [PASSED] SVIDEO
[07:31:59] [PASSED] LVDS
[07:31:59] [PASSED] Component
[07:31:59] [PASSED] DIN
[07:31:59] [PASSED] DP
[07:31:59] [PASSED] TV
[07:31:59] [PASSED] eDP
[07:31:59] [PASSED] Virtual
[07:31:59] [PASSED] DSI
[07:31:59] [PASSED] DPI
[07:31:59] [PASSED] Writeback
[07:31:59] [PASSED] SPI
[07:31:59] [PASSED] USB
[07:31:59] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:31:59] ============ [PASSED] drmm_connector_hdmi_init =============
[07:31:59] ============= drmm_connector_init (3 subtests) =============
[07:31:59] [PASSED] drm_test_drmm_connector_init
[07:31:59] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:31:59] ========= drm_test_drmm_connector_init_type_valid =========
[07:31:59] [PASSED] Unknown
[07:31:59] [PASSED] VGA
[07:31:59] [PASSED] DVI-I
[07:31:59] [PASSED] DVI-D
[07:31:59] [PASSED] DVI-A
[07:31:59] [PASSED] Composite
[07:31:59] [PASSED] SVIDEO
[07:31:59] [PASSED] LVDS
[07:31:59] [PASSED] Component
[07:31:59] [PASSED] DIN
[07:31:59] [PASSED] DP
[07:31:59] [PASSED] HDMI-A
[07:31:59] [PASSED] HDMI-B
[07:31:59] [PASSED] TV
[07:31:59] [PASSED] eDP
[07:31:59] [PASSED] Virtual
[07:31:59] [PASSED] DSI
[07:31:59] [PASSED] DPI
[07:31:59] [PASSED] Writeback
[07:31:59] [PASSED] SPI
[07:31:59] [PASSED] USB
[07:31:59] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:31:59] =============== [PASSED] drmm_connector_init ===============
[07:31:59] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_init
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:31:59] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:31:59] [PASSED] Unknown
[07:31:59] [PASSED] VGA
[07:31:59] [PASSED] DVI-I
[07:31:59] [PASSED] DVI-D
[07:31:59] [PASSED] DVI-A
[07:31:59] [PASSED] Composite
[07:31:59] [PASSED] SVIDEO
[07:31:59] [PASSED] LVDS
[07:31:59] [PASSED] Component
[07:31:59] [PASSED] DIN
[07:31:59] [PASSED] DP
[07:31:59] [PASSED] HDMI-A
[07:31:59] [PASSED] HDMI-B
[07:31:59] [PASSED] TV
[07:31:59] [PASSED] eDP
[07:31:59] [PASSED] Virtual
[07:31:59] [PASSED] DSI
[07:31:59] [PASSED] DPI
[07:31:59] [PASSED] Writeback
[07:31:59] [PASSED] SPI
[07:31:59] [PASSED] USB
[07:31:59] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:31:59] ======== drm_test_drm_connector_dynamic_init_name =========
[07:31:59] [PASSED] Unknown
[07:31:59] [PASSED] VGA
[07:31:59] [PASSED] DVI-I
[07:31:59] [PASSED] DVI-D
[07:31:59] [PASSED] DVI-A
[07:31:59] [PASSED] Composite
[07:31:59] [PASSED] SVIDEO
[07:31:59] [PASSED] LVDS
[07:31:59] [PASSED] Component
[07:31:59] [PASSED] DIN
[07:31:59] [PASSED] DP
[07:31:59] [PASSED] HDMI-A
[07:31:59] [PASSED] HDMI-B
[07:31:59] [PASSED] TV
[07:31:59] [PASSED] eDP
[07:31:59] [PASSED] Virtual
[07:31:59] [PASSED] DSI
[07:31:59] [PASSED] DPI
[07:31:59] [PASSED] Writeback
[07:31:59] [PASSED] SPI
[07:31:59] [PASSED] USB
[07:31:59] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:31:59] =========== [PASSED] drm_connector_dynamic_init ============
[07:31:59] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:31:59] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:31:59] ======= drm_connector_dynamic_register (7 subtests) ========
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:31:59] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:31:59] ========= [PASSED] drm_connector_dynamic_register ==========
[07:31:59] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:31:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:31:59] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:31:59] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:31:59] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:31:59] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:31:59] [PASSED] NTSC
[07:31:59] [PASSED] NTSC-443
[07:31:59] [PASSED] NTSC-J
[07:31:59] [PASSED] PAL
[07:31:59] [PASSED] PAL-M
[07:31:59] [PASSED] PAL-N
[07:31:59] [PASSED] SECAM
[07:31:59] [PASSED] Mono
[07:31:59] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:31:59] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:31:59] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:31:59] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:31:59] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:31:59] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:31:59] [PASSED] VIC 96
[07:31:59] [PASSED] VIC 97
[07:31:59] [PASSED] VIC 101
[07:31:59] [PASSED] VIC 102
[07:31:59] [PASSED] VIC 106
[07:31:59] [PASSED] VIC 107
[07:31:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:31:59] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:31:59] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:31:59] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:31:59] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:31:59] [PASSED] Automatic
[07:31:59] [PASSED] Full
[07:31:59] [PASSED] Limited 16:235
[07:31:59] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:31:59] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:31:59] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:31:59] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:31:59] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:31:59] [PASSED] RGB
[07:31:59] [PASSED] YUV 4:2:0
[07:31:59] [PASSED] YUV 4:2:2
[07:31:59] [PASSED] YUV 4:4:4
[07:31:59] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:31:59] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:31:59] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:31:59] ============= drm_damage_helper (21 subtests) ==============
[07:31:59] [PASSED] drm_test_damage_iter_no_damage
[07:31:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:31:59] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:31:59] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:31:59] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:31:59] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:31:59] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:31:59] [PASSED] drm_test_damage_iter_simple_damage
[07:31:59] [PASSED] drm_test_damage_iter_single_damage
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:31:59] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:31:59] [PASSED] drm_test_damage_iter_damage
[07:31:59] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:31:59] [PASSED] drm_test_damage_iter_damage_one_outside
[07:31:59] [PASSED] drm_test_damage_iter_damage_src_moved
[07:31:59] [PASSED] drm_test_damage_iter_damage_not_visible
[07:31:59] ================ [PASSED] drm_damage_helper ================
[07:31:59] ============== drm_dp_mst_helper (3 subtests) ==============
[07:31:59] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:31:59] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:31:59] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:31:59] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:31:59] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:31:59] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:31:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:31:59] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:31:59] [PASSED] Link rate 2000000 lane count 4
[07:31:59] [PASSED] Link rate 2000000 lane count 2
[07:31:59] [PASSED] Link rate 2000000 lane count 1
[07:31:59] [PASSED] Link rate 1350000 lane count 4
[07:31:59] [PASSED] Link rate 1350000 lane count 2
[07:31:59] [PASSED] Link rate 1350000 lane count 1
[07:31:59] [PASSED] Link rate 1000000 lane count 4
[07:31:59] [PASSED] Link rate 1000000 lane count 2
[07:31:59] [PASSED] Link rate 1000000 lane count 1
[07:31:59] [PASSED] Link rate 810000 lane count 4
[07:31:59] [PASSED] Link rate 810000 lane count 2
[07:31:59] [PASSED] Link rate 810000 lane count 1
[07:31:59] [PASSED] Link rate 540000 lane count 4
[07:31:59] [PASSED] Link rate 540000 lane count 2
[07:31:59] [PASSED] Link rate 540000 lane count 1
[07:31:59] [PASSED] Link rate 270000 lane count 4
[07:31:59] [PASSED] Link rate 270000 lane count 2
[07:31:59] [PASSED] Link rate 270000 lane count 1
[07:31:59] [PASSED] Link rate 162000 lane count 4
[07:31:59] [PASSED] Link rate 162000 lane count 2
[07:31:59] [PASSED] Link rate 162000 lane count 1
[07:31:59] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:31:59] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:31:59] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:31:59] [PASSED] DP_POWER_UP_PHY with port number
[07:31:59] [PASSED] DP_POWER_DOWN_PHY with port number
[07:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:31:59] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:31:59] [PASSED] DP_QUERY_PAYLOAD with port number
[07:31:59] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:31:59] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:31:59] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:31:59] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:31:59] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:31:59] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:31:59] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:31:59] [PASSED] DP_REMOTE_I2C_READ with port number
[07:31:59] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:31:59] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:31:59] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:31:59] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:31:59] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:31:59] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:31:59] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:31:59] ================ [PASSED] drm_dp_mst_helper ================
[07:31:59] ================== drm_exec (7 subtests) ===================
[07:31:59] [PASSED] sanitycheck
[07:31:59] [PASSED] test_lock
[07:31:59] [PASSED] test_lock_unlock
[07:31:59] [PASSED] test_duplicates
[07:31:59] [PASSED] test_prepare
[07:31:59] [PASSED] test_prepare_array
[07:31:59] [PASSED] test_multiple_loops
[07:31:59] ==================== [PASSED] drm_exec =====================
[07:31:59] =========== drm_format_helper_test (17 subtests) ===========
[07:31:59] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:31:59] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:31:59] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:31:59] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:31:59] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:31:59] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:31:59] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:31:59] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:31:59] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:31:59] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:31:59] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:31:59] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:31:59] ==================== drm_test_fb_swab =====================
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ================ [PASSED] drm_test_fb_swab =================
[07:31:59] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:31:59] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:31:59] [PASSED] single_pixel_source_buffer
[07:31:59] [PASSED] single_pixel_clip_rectangle
[07:31:59] [PASSED] well_known_colors
[07:31:59] [PASSED] destination_pitch
[07:31:59] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:31:59] ================= drm_test_fb_clip_offset =================
[07:31:59] [PASSED] pass through
[07:31:59] [PASSED] horizontal offset
[07:31:59] [PASSED] vertical offset
[07:31:59] [PASSED] horizontal and vertical offset
[07:31:59] [PASSED] horizontal offset (custom pitch)
[07:31:59] [PASSED] vertical offset (custom pitch)
[07:31:59] [PASSED] horizontal and vertical offset (custom pitch)
[07:31:59] ============= [PASSED] drm_test_fb_clip_offset =============
[07:31:59] =================== drm_test_fb_memcpy ====================
[07:31:59] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:31:59] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:31:59] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:31:59] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:31:59] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:31:59] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:31:59] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:31:59] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:31:59] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:31:59] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:31:59] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:31:59] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:31:59] =============== [PASSED] drm_test_fb_memcpy ================
[07:31:59] ============= [PASSED] drm_format_helper_test ==============
[07:31:59] ================= drm_format (18 subtests) =================
[07:31:59] [PASSED] drm_test_format_block_width_invalid
[07:31:59] [PASSED] drm_test_format_block_width_one_plane
[07:31:59] [PASSED] drm_test_format_block_width_two_plane
[07:31:59] [PASSED] drm_test_format_block_width_three_plane
[07:31:59] [PASSED] drm_test_format_block_width_tiled
[07:31:59] [PASSED] drm_test_format_block_height_invalid
[07:31:59] [PASSED] drm_test_format_block_height_one_plane
[07:31:59] [PASSED] drm_test_format_block_height_two_plane
[07:31:59] [PASSED] drm_test_format_block_height_three_plane
[07:31:59] [PASSED] drm_test_format_block_height_tiled
[07:31:59] [PASSED] drm_test_format_min_pitch_invalid
[07:31:59] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:31:59] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:31:59] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:31:59] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:31:59] [PASSED] drm_test_format_min_pitch_two_plane
[07:31:59] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:31:59] [PASSED] drm_test_format_min_pitch_tiled
[07:31:59] =================== [PASSED] drm_format ====================
[07:31:59] ============== drm_framebuffer (10 subtests) ===============
[07:31:59] ========== drm_test_framebuffer_check_src_coords ==========
[07:31:59] [PASSED] Success: source fits into fb
[07:31:59] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:31:59] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:31:59] [PASSED] Fail: overflowing fb with source width
[07:31:59] [PASSED] Fail: overflowing fb with source height
[07:31:59] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:31:59] [PASSED] drm_test_framebuffer_cleanup
[07:31:59] =============== drm_test_framebuffer_create ===============
[07:31:59] [PASSED] ABGR8888 normal sizes
[07:31:59] [PASSED] ABGR8888 max sizes
[07:31:59] [PASSED] ABGR8888 pitch greater than min required
[07:31:59] [PASSED] ABGR8888 pitch less than min required
[07:31:59] [PASSED] ABGR8888 Invalid width
[07:31:59] [PASSED] ABGR8888 Invalid buffer handle
[07:31:59] [PASSED] No pixel format
[07:31:59] [PASSED] ABGR8888 Width 0
[07:31:59] [PASSED] ABGR8888 Height 0
[07:31:59] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:31:59] [PASSED] ABGR8888 Large buffer offset
[07:31:59] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:31:59] [PASSED] ABGR8888 Invalid flag
[07:31:59] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:31:59] [PASSED] ABGR8888 Valid buffer modifier
[07:31:59] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:31:59] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] NV12 Normal sizes
[07:31:59] [PASSED] NV12 Max sizes
[07:31:59] [PASSED] NV12 Invalid pitch
[07:31:59] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:31:59] [PASSED] NV12 different modifier per-plane
[07:31:59] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:31:59] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] NV12 Modifier for inexistent plane
[07:31:59] [PASSED] NV12 Handle for inexistent plane
[07:31:59] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:31:59] [PASSED] YVU420 Normal sizes
[07:31:59] [PASSED] YVU420 Max sizes
[07:31:59] [PASSED] YVU420 Invalid pitch
[07:31:59] [PASSED] YVU420 Different pitches
[07:31:59] [PASSED] YVU420 Different buffer offsets/pitches
[07:31:59] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:31:59] [PASSED] YVU420 Valid modifier
[07:31:59] [PASSED] YVU420 Different modifiers per plane
[07:31:59] [PASSED] YVU420 Modifier for inexistent plane
[07:31:59] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:31:59] [PASSED] X0L2 Normal sizes
[07:31:59] [PASSED] X0L2 Max sizes
[07:31:59] [PASSED] X0L2 Invalid pitch
[07:31:59] [PASSED] X0L2 Pitch greater than minimum required
[07:31:59] [PASSED] X0L2 Handle for inexistent plane
[07:31:59] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:31:59] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:31:59] [PASSED] X0L2 Valid modifier
[07:31:59] [PASSED] X0L2 Modifier for inexistent plane
[07:31:59] =========== [PASSED] drm_test_framebuffer_create ===========
[07:31:59] [PASSED] drm_test_framebuffer_free
[07:31:59] [PASSED] drm_test_framebuffer_init
[07:31:59] [PASSED] drm_test_framebuffer_init_bad_format
[07:31:59] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:31:59] [PASSED] drm_test_framebuffer_lookup
[07:31:59] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:31:59] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:31:59] ================= [PASSED] drm_framebuffer =================
[07:31:59] ================ drm_gem_shmem (8 subtests) ================
[07:31:59] [PASSED] drm_gem_shmem_test_obj_create
[07:31:59] [PASSED] drm_gem_shmem_test_obj_create_private
[07:31:59] [PASSED] drm_gem_shmem_test_pin_pages
[07:31:59] [PASSED] drm_gem_shmem_test_vmap
[07:31:59] [PASSED] drm_gem_shmem_test_get_sg_table
[07:31:59] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:31:59] [PASSED] drm_gem_shmem_test_madvise
[07:31:59] [PASSED] drm_gem_shmem_test_purge
[07:31:59] ================== [PASSED] drm_gem_shmem ==================
[07:31:59] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:31:59] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[07:31:59] [PASSED] Automatic
[07:31:59] [PASSED] Full
[07:31:59] [PASSED] Limited 16:235
[07:31:59] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:31:59] [PASSED] drm_test_check_disable_connector
[07:31:59] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:31:59] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:31:59] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:31:59] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:31:59] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:31:59] [PASSED] drm_test_check_output_bpc_dvi
[07:31:59] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:31:59] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:31:59] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:31:59] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:31:59] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:31:59] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:31:59] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:31:59] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:31:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:31:59] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:31:59] [PASSED] drm_test_check_broadcast_rgb_value
[07:31:59] [PASSED] drm_test_check_bpc_8_value
[07:31:59] [PASSED] drm_test_check_bpc_10_value
[07:31:59] [PASSED] drm_test_check_bpc_12_value
[07:31:59] [PASSED] drm_test_check_format_value
[07:31:59] [PASSED] drm_test_check_tmds_char_value
[07:31:59] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:31:59] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[07:31:59] [PASSED] drm_test_check_mode_valid
[07:31:59] [PASSED] drm_test_check_mode_valid_reject
[07:31:59] [PASSED] drm_test_check_mode_valid_reject_rate
[07:31:59] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:31:59] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:31:59] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[07:31:59] [PASSED] drm_test_check_infoframes
[07:31:59] [PASSED] drm_test_check_reject_avi_infoframe
[07:31:59] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[07:31:59] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[07:31:59] [PASSED] drm_test_check_reject_audio_infoframe
[07:31:59] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[07:31:59] ================= drm_managed (2 subtests) =================
[07:31:59] [PASSED] drm_test_managed_release_action
[07:31:59] [PASSED] drm_test_managed_run_action
[07:31:59] =================== [PASSED] drm_managed ===================
[07:31:59] =================== drm_mm (6 subtests) ====================
[07:31:59] [PASSED] drm_test_mm_init
[07:31:59] [PASSED] drm_test_mm_debug
[07:31:59] [PASSED] drm_test_mm_align32
[07:31:59] [PASSED] drm_test_mm_align64
[07:31:59] [PASSED] drm_test_mm_lowest
[07:31:59] [PASSED] drm_test_mm_highest
[07:31:59] ===================== [PASSED] drm_mm ======================
[07:31:59] ============= drm_modes_analog_tv (5 subtests) =============
[07:31:59] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:31:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:31:59] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:31:59] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:31:59] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:31:59] =============== [PASSED] drm_modes_analog_tv ===============
[07:31:59] ============== drm_plane_helper (2 subtests) ===============
[07:31:59] =============== drm_test_check_plane_state ================
[07:31:59] [PASSED] clipping_simple
[07:31:59] [PASSED] clipping_rotate_reflect
[07:31:59] [PASSED] positioning_simple
[07:31:59] [PASSED] upscaling
[07:31:59] [PASSED] downscaling
[07:31:59] [PASSED] rounding1
[07:31:59] [PASSED] rounding2
[07:31:59] [PASSED] rounding3
[07:31:59] [PASSED] rounding4
[07:31:59] =========== [PASSED] drm_test_check_plane_state ============
[07:31:59] =========== drm_test_check_invalid_plane_state ============
[07:31:59] [PASSED] positioning_invalid
[07:31:59] [PASSED] upscaling_invalid
[07:31:59] [PASSED] downscaling_invalid
[07:31:59] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:31:59] ================ [PASSED] drm_plane_helper =================
[07:31:59] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:31:59] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:31:59] [PASSED] None
[07:31:59] [PASSED] PAL
[07:31:59] [PASSED] NTSC
[07:31:59] [PASSED] Both, NTSC Default
[07:31:59] [PASSED] Both, PAL Default
[07:31:59] [PASSED] Both, NTSC Default, with PAL on command-line
[07:31:59] [PASSED] Both, PAL Default, with NTSC on command-line
[07:31:59] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:31:59] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:31:59] ================== drm_rect (9 subtests) ===================
[07:31:59] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:31:59] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:31:59] [PASSED] drm_test_rect_clip_scaled_clipped
[07:31:59] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:31:59] ================= drm_test_rect_intersect =================
[07:31:59] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:31:59] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:31:59] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:31:59] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:31:59] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:31:59] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:31:59] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:31:59] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:31:59] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:31:59] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:31:59] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:31:59] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:31:59] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:31:59] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:31:59] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:31:59] ============= [PASSED] drm_test_rect_intersect =============
[07:31:59] ================ drm_test_rect_calc_hscale ================
[07:31:59] [PASSED] normal use
[07:31:59] [PASSED] out of max range
[07:31:59] [PASSED] out of min range
[07:31:59] [PASSED] zero dst
[07:31:59] [PASSED] negative src
[07:31:59] [PASSED] negative dst
[07:31:59] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:31:59] ================ drm_test_rect_calc_vscale ================
[07:31:59] [PASSED] normal use
[07:31:59] [PASSED] out of max range
[07:31:59] [PASSED] out of min range
[07:31:59] [PASSED] zero dst
[07:31:59] [PASSED] negative src
[07:31:59] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[07:31:59] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:31:59] ================== drm_test_rect_rotate ===================
[07:31:59] [PASSED] reflect-x
[07:31:59] [PASSED] reflect-y
[07:31:59] [PASSED] rotate-0
[07:31:59] [PASSED] rotate-90
[07:31:59] [PASSED] rotate-180
[07:31:59] [PASSED] rotate-270
[07:31:59] ============== [PASSED] drm_test_rect_rotate ===============
[07:31:59] ================ drm_test_rect_rotate_inv =================
[07:31:59] [PASSED] reflect-x
[07:31:59] [PASSED] reflect-y
[07:31:59] [PASSED] rotate-0
[07:31:59] [PASSED] rotate-90
[07:31:59] [PASSED] rotate-180
[07:31:59] [PASSED] rotate-270
[07:31:59] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:31:59] ==================== [PASSED] drm_rect =====================
[07:31:59] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:31:59] ============ drm_test_sysfb_build_fourcc_list =============
[07:31:59] [PASSED] no native formats
[07:31:59] [PASSED] XRGB8888 as native format
[07:31:59] [PASSED] remove duplicates
[07:31:59] [PASSED] convert alpha formats
[07:31:59] [PASSED] random formats
[07:31:59] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:31:59] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:31:59] ================== drm_fixp (2 subtests) ===================
[07:31:59] [PASSED] drm_test_int2fixp
[07:31:59] [PASSED] drm_test_sm2fixp
[07:31:59] ==================== [PASSED] drm_fixp =====================
[07:31:59] ============================================================
[07:31:59] Testing complete. Ran 621 tests: passed: 621
[07:31:59] Elapsed time: 26.115s total, 1.690s configuring, 24.257s building, 0.129s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:31:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:32:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:32:10] Starting KUnit Kernel (1/1)...
[07:32:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:32:10] ================= ttm_device (5 subtests) ==================
[07:32:10] [PASSED] ttm_device_init_basic
[07:32:10] [PASSED] ttm_device_init_multiple
[07:32:10] [PASSED] ttm_device_fini_basic
[07:32:10] [PASSED] ttm_device_init_no_vma_man
[07:32:10] ================== ttm_device_init_pools ==================
[07:32:10] [PASSED] No DMA allocations, no DMA32 required
[07:32:10] [PASSED] DMA allocations, DMA32 required
[07:32:10] [PASSED] No DMA allocations, DMA32 required
[07:32:10] [PASSED] DMA allocations, no DMA32 required
[07:32:10] ============== [PASSED] ttm_device_init_pools ==============
[07:32:10] =================== [PASSED] ttm_device ====================
[07:32:10] ================== ttm_pool (8 subtests) ===================
[07:32:10] ================== ttm_pool_alloc_basic ===================
[07:32:10] [PASSED] One page
[07:32:10] [PASSED] More than one page
[07:32:10] [PASSED] Above the allocation limit
[07:32:10] [PASSED] One page, with coherent DMA mappings enabled
[07:32:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:32:10] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:32:10] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:32:10] [PASSED] One page
[07:32:10] [PASSED] More than one page
[07:32:10] [PASSED] Above the allocation limit
[07:32:10] [PASSED] One page, with coherent DMA mappings enabled
[07:32:10] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:32:10] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:32:10] [PASSED] ttm_pool_alloc_order_caching_match
[07:32:10] [PASSED] ttm_pool_alloc_caching_mismatch
[07:32:10] [PASSED] ttm_pool_alloc_order_mismatch
[07:32:10] [PASSED] ttm_pool_free_dma_alloc
[07:32:10] [PASSED] ttm_pool_free_no_dma_alloc
[07:32:10] [PASSED] ttm_pool_fini_basic
[07:32:10] ==================== [PASSED] ttm_pool =====================
[07:32:10] ================ ttm_resource (8 subtests) =================
[07:32:10] ================= ttm_resource_init_basic =================
[07:32:10] [PASSED] Init resource in TTM_PL_SYSTEM
[07:32:10] [PASSED] Init resource in TTM_PL_VRAM
[07:32:10] [PASSED] Init resource in a private placement
[07:32:10] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:32:10] ============= [PASSED] ttm_resource_init_basic =============
[07:32:10] [PASSED] ttm_resource_init_pinned
[07:32:10] [PASSED] ttm_resource_fini_basic
[07:32:10] [PASSED] ttm_resource_manager_init_basic
[07:32:10] [PASSED] ttm_resource_manager_usage_basic
[07:32:10] [PASSED] ttm_resource_manager_set_used_basic
[07:32:10] [PASSED] ttm_sys_man_alloc_basic
[07:32:10] [PASSED] ttm_sys_man_free_basic
[07:32:10] ================== [PASSED] ttm_resource ===================
[07:32:10] =================== ttm_tt (15 subtests) ===================
[07:32:10] ==================== ttm_tt_init_basic ====================
[07:32:10] [PASSED] Page-aligned size
[07:32:10] [PASSED] Extra pages requested
[07:32:10] ================ [PASSED] ttm_tt_init_basic ================
[07:32:10] [PASSED] ttm_tt_init_misaligned
[07:32:10] [PASSED] ttm_tt_fini_basic
[07:32:10] [PASSED] ttm_tt_fini_sg
[07:32:10] [PASSED] ttm_tt_fini_shmem
[07:32:10] [PASSED] ttm_tt_create_basic
[07:32:10] [PASSED] ttm_tt_create_invalid_bo_type
[07:32:10] [PASSED] ttm_tt_create_ttm_exists
[07:32:10] [PASSED] ttm_tt_create_failed
[07:32:10] [PASSED] ttm_tt_destroy_basic
[07:32:10] [PASSED] ttm_tt_populate_null_ttm
[07:32:10] [PASSED] ttm_tt_populate_populated_ttm
[07:32:10] [PASSED] ttm_tt_unpopulate_basic
[07:32:10] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:32:10] [PASSED] ttm_tt_swapin_basic
[07:32:10] ===================== [PASSED] ttm_tt ======================
[07:32:10] =================== ttm_bo (14 subtests) ===================
[07:32:10] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:32:10] [PASSED] Cannot be interrupted and sleeps
[07:32:10] [PASSED] Cannot be interrupted, locks straight away
[07:32:10] [PASSED] Can be interrupted, sleeps
[07:32:10] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:32:10] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:32:10] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:32:10] [PASSED] ttm_bo_reserve_double_resv
[07:32:10] [PASSED] ttm_bo_reserve_interrupted
[07:32:10] [PASSED] ttm_bo_reserve_deadlock
[07:32:10] [PASSED] ttm_bo_unreserve_basic
[07:32:10] [PASSED] ttm_bo_unreserve_pinned
[07:32:10] [PASSED] ttm_bo_unreserve_bulk
[07:32:10] [PASSED] ttm_bo_fini_basic
[07:32:10] [PASSED] ttm_bo_fini_shared_resv
[07:32:10] [PASSED] ttm_bo_pin_basic
[07:32:10] [PASSED] ttm_bo_pin_unpin_resource
[07:32:10] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:32:10] ===================== [PASSED] ttm_bo ======================
[07:32:10] ============== ttm_bo_validate (22 subtests) ===============
[07:32:10] ============== ttm_bo_init_reserved_sys_man ===============
[07:32:10] [PASSED] Buffer object for userspace
[07:32:10] [PASSED] Kernel buffer object
[07:32:10] [PASSED] Shared buffer object
[07:32:10] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:32:10] ============== ttm_bo_init_reserved_mock_man ==============
[07:32:10] [PASSED] Buffer object for userspace
[07:32:10] [PASSED] Kernel buffer object
[07:32:10] [PASSED] Shared buffer object
[07:32:10] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:32:10] [PASSED] ttm_bo_init_reserved_resv
[07:32:10] ================== ttm_bo_validate_basic ==================
[07:32:10] [PASSED] Buffer object for userspace
[07:32:10] [PASSED] Kernel buffer object
[07:32:10] [PASSED] Shared buffer object
[07:32:10] ============== [PASSED] ttm_bo_validate_basic ==============
[07:32:10] [PASSED] ttm_bo_validate_invalid_placement
[07:32:10] ============= ttm_bo_validate_same_placement ==============
[07:32:10] [PASSED] System manager
[07:32:10] [PASSED] VRAM manager
[07:32:10] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:32:10] [PASSED] ttm_bo_validate_failed_alloc
[07:32:10] [PASSED] ttm_bo_validate_pinned
[07:32:10] [PASSED] ttm_bo_validate_busy_placement
[07:32:10] ================ ttm_bo_validate_multihop =================
[07:32:10] [PASSED] Buffer object for userspace
[07:32:10] [PASSED] Kernel buffer object
[07:32:10] [PASSED] Shared buffer object
[07:32:10] ============ [PASSED] ttm_bo_validate_multihop =============
[07:32:10] ========== ttm_bo_validate_no_placement_signaled ==========
[07:32:10] [PASSED] Buffer object in system domain, no page vector
[07:32:10] [PASSED] Buffer object in system domain with an existing page vector
[07:32:10] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:32:10] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:32:10] [PASSED] Buffer object for userspace
[07:32:10] [PASSED] Kernel buffer object
[07:32:10] [PASSED] Shared buffer object
[07:32:10] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:32:10] [PASSED] ttm_bo_validate_move_fence_signaled
[07:32:10] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:32:10] [PASSED] Waits for GPU
[07:32:10] [PASSED] Tries to lock straight away
[07:32:10] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:32:10] [PASSED] ttm_bo_validate_swapout
[07:32:10] [PASSED] ttm_bo_validate_happy_evict
[07:32:10] [PASSED] ttm_bo_validate_all_pinned_evict
[07:32:10] [PASSED] ttm_bo_validate_allowed_only_evict
[07:32:10] [PASSED] ttm_bo_validate_deleted_evict
[07:32:10] [PASSED] ttm_bo_validate_busy_domain_evict
[07:32:10] [PASSED] ttm_bo_validate_evict_gutting
[07:32:10] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[07:32:10] ================= [PASSED] ttm_bo_validate =================
[07:32:10] ============================================================
[07:32:10] Testing complete. Ran 102 tests: passed: 102
[07:32:10] Elapsed time: 11.390s total, 1.702s configuring, 9.472s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread* ✗ CI.checksparse: warning for drm/xe/fwctl: Add FWCTL interface for Xe firmware management
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (6 preceding siblings ...)
2026-03-20 7:32 ` ✓ CI.KUnit: success " Patchwork
@ 2026-03-20 7:46 ` Patchwork
2026-03-20 8:20 ` ✓ Xe.CI.BAT: success " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-03-20 7:46 UTC (permalink / raw)
To: Anoop, Vijay; +Cc: intel-xe
== Series Details ==
Series: drm/xe/fwctl: Add FWCTL interface for Xe firmware management
URL : https://patchwork.freedesktop.org/series/163562/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 4ae9f18564e78a5447be68aa1e9232a4f2c37b5a
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+/kernel/Makefile:1208: C=1 specified, but sparse is not available or not up to date
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread* ✓ Xe.CI.BAT: success for drm/xe/fwctl: Add FWCTL interface for Xe firmware management
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (7 preceding siblings ...)
2026-03-20 7:46 ` ✗ CI.checksparse: warning " Patchwork
@ 2026-03-20 8:20 ` Patchwork
2026-03-21 3:59 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-04-28 0:12 ` [RFC v1 0/5] " Anoop Vijay
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-03-20 8:20 UTC (permalink / raw)
To: Anoop, Vijay; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1112 bytes --]
== Series Details ==
Series: drm/xe/fwctl: Add FWCTL interface for Xe firmware management
URL : https://patchwork.freedesktop.org/series/163562/
State : success
== Summary ==
CI Bug Log - changes from xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a_BAT -> xe-pw-163562v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 14)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8811 -> IGT_8813
* Linux: xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a -> xe-pw-163562v1
IGT_8811: cc3169e72592a56b806ce54a87060519151ad5fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8813: 89e32100ca0e4ca343dd32408dacf1e879e8ed02 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a: 4ae9f18564e78a5447be68aa1e9232a4f2c37b5a
xe-pw-163562v1: 163562v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/index.html
[-- Attachment #2: Type: text/html, Size: 1674 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread* ✗ Xe.CI.FULL: failure for drm/xe/fwctl: Add FWCTL interface for Xe firmware management
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (8 preceding siblings ...)
2026-03-20 8:20 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2026-03-21 3:59 ` Patchwork
2026-04-28 0:12 ` [RFC v1 0/5] " Anoop Vijay
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-03-21 3:59 UTC (permalink / raw)
To: Anoop, Vijay; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 61502 bytes --]
== Series Details ==
Series: drm/xe/fwctl: Add FWCTL interface for Xe firmware management
URL : https://patchwork.freedesktop.org/series/163562/
State : failure
== Summary ==
CI Bug Log - changes from xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a_FULL -> xe-pw-163562v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-163562v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-163562v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-163562v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_legacy@forked-move:
- shard-bmg: [PASS][1] -> [DMESG-FAIL][2] +1 other test dmesg-fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_cursor_legacy@forked-move.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_cursor_legacy@forked-move.html
* igt@kms_cursor_legacy@forked-move@all-pipes:
- shard-bmg: [PASS][3] -> [FAIL][4] +1 other test fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_cursor_legacy@forked-move@all-pipes.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_cursor_legacy@forked-move@all-pipes.html
Known issues
------------
Here are the changes found in xe-pw-163562v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@unplug-rescan:
- shard-bmg: [PASS][5] -> [SKIP][6] ([Intel XE#6779])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@core_hotunplug@unplug-rescan.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@core_hotunplug@unplug-rescan.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#7059] / [Intel XE#7085])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#1124]) +7 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2328] / [Intel XE#7367])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#7621])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_bw@connected-linear-tiling-1-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#367] / [Intel XE#7354]) +4 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2652]) +8 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#3432]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#3432])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2887]) +8 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_cdclk@mode-transition:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2724] / [Intel XE#7449])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@kms_cdclk@mode-transition.html
* igt@kms_chamelium_edid@dp-edid-read:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2252]) +6 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_chamelium_edid@dp-edid-read.html
* igt@kms_content_protection@dp-mst-type-0-suspend-resume:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#6974])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-6/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
* igt@kms_content_protection@srm@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][20] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_content_protection@srm@pipe-a-dp-2.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][21] ([Intel XE#6707] / [Intel XE#7439])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2321] / [Intel XE#7355]) +3 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#2320]) +2 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-bmg: [PASS][24] -> [SKIP][25] ([Intel XE#2291])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [PASS][26] -> [SKIP][27] ([Intel XE#1340])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2244]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-bmg: [PASS][29] -> [SKIP][30] ([Intel XE#2316]) +5 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#2316])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#7178] / [Intel XE#7351]) +4 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2311]) +15 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#7061] / [Intel XE#7356])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#4141]) +8 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#2352] / [Intel XE#7399])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2312]) +6 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2313]) +11 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#1503])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_hdr@static-toggle:
- shard-bmg: [PASS][40] -> [SKIP][41] ([Intel XE#1503])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@kms_hdr@static-toggle.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#6901])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [PASS][43] -> [SKIP][44] ([Intel XE#7086])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@kms_joiner@basic-force-big-joiner.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#7283]) +3 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@kms_plane@pixel-format-y-tiled-ccs-modifier-source-clamping.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2393])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_plane_lowres@tiling-y.html
* igt@kms_pm_dc@dc5-dpms:
- shard-lnl: [PASS][47] -> [FAIL][48] ([Intel XE#7340] / [Intel XE#7504])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-lnl-3/igt@kms_pm_dc@dc5-dpms.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-7/igt@kms_pm_dc@dc5-dpms.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2499])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#1489]) +3 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr@psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2234] / [Intel XE#2850]) +7 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@kms_psr@psr-suspend.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-lnl: [PASS][53] -> [SKIP][54] ([Intel XE#4692] / [Intel XE#7508])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-lnl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#2330] / [Intel XE#5813])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_sharpness_filter@filter-formats:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#6503])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_sharpness_filter@filter-formats.html
* igt@kms_vrr@flip-basic-fastset:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#1499])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@kms_vrr@flip-basic-fastset.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#6599])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_eudebug@basic-vm-bind-vm-destroy:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#4837]) +4 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_eudebug@basic-vm-bind-vm-destroy.html
* igt@xe_eudebug_online@set-breakpoint:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#4837] / [Intel XE#6665]) +5 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@xe_eudebug_online@set-breakpoint.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: [PASS][62] -> [INCOMPLETE][63] ([Intel XE#6321])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-small.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#2322] / [Intel XE#7372]) +5 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_compute_mode@twice-basic:
- shard-bmg: [PASS][65] -> [SKIP][66] ([Intel XE#6557] / [Intel XE#6703]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@xe_exec_compute_mode@twice-basic.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_exec_compute_mode@twice-basic.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-imm:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#7136]) +5 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-imm.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#6874]) +20 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_exec_multi_queue@few-execs-preempt-mode-basic.html
* igt@xe_exec_multi_queue@one-queue-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#6874]) +1 other test skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-2/igt@xe_exec_multi_queue@one-queue-close-fd-smem.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-new-nomemset:
- shard-bmg: [PASS][70] -> [SKIP][71] ([Intel XE#6703]) +109 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@xe_exec_system_allocator@process-many-large-execqueues-new-nomemset.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-large-execqueues-new-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#7138]) +5 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97]) -> ([SKIP][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123]) ([Intel XE#2457] / [Intel XE#7405])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-4/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-9/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-4/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-9/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-7/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-7/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@xe_module_load@load.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-9/igt@xe_module_load@load.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@xe_module_load@load.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@xe_module_load@load.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@xe_module_load@load.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@xe_module_load@load.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@xe_module_load@load.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@xe_module_load@load.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_module_load@load.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@xe_module_load@load.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-6/igt@xe_module_load@load.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@xe_module_load@load.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@xe_module_load@load.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_module_load@load.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_module_load@load.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-6/igt@xe_module_load@load.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@xe_module_load@load.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-10/igt@xe_module_load@load.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-4/igt@xe_module_load@load.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-4/igt@xe_module_load@load.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_module_load@load.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_module_load@load.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_module_load@load.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@xe_module_load@load.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@xe_module_load@load.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@xe_module_load@load.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_module_load@load.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_module_load@load.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_module_load@load.html
* igt@xe_multigpu_svm@mgpu-coherency-conflict:
- shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#6964]) +1 other test skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@xe_multigpu_svm@mgpu-coherency-conflict.html
* igt@xe_pat@pat-index-xehpc:
- shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#1420])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-bmg: NOTRUN -> [SKIP][126] ([Intel XE#2284] / [Intel XE#7370])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@s4-multiple-execs:
- shard-bmg: NOTRUN -> [SKIP][127] ([Intel XE#6703]) +26 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html
* igt@xe_sriov_flr@flr-basic@numvfs-1:
- shard-bmg: [PASS][129] -> [FAIL][130] ([Intel XE#5937]) +1 other test fail
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@xe_sriov_flr@flr-basic@numvfs-1.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@xe_sriov_flr@flr-basic@numvfs-1.html
#### Possible fixes ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [FAIL][131] ([Intel XE#7445]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@intel_hwmon@hwmon-write.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@intel_hwmon@hwmon-write.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: [SKIP][133] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-bmg: [SKIP][135] ([Intel XE#2291]) -> [PASS][136] +2 other tests pass
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-4/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-bmg: [SKIP][137] ([Intel XE#2291] / [Intel XE#7343]) -> [PASS][138] +2 other tests pass
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [SKIP][139] ([Intel XE#2316]) -> [PASS][140] +6 other tests pass
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-4/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][141] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][142] +1 other test pass
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [FAIL][143] ([Intel XE#301]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_plane_cursor@overlay:
- shard-bmg: [FAIL][145] -> [PASS][146] +1 other test pass
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@kms_plane_cursor@overlay.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@kms_plane_cursor@overlay.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
- shard-lnl: [FAIL][147] ([Intel XE#5625]) -> [PASS][148] +1 other test pass
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-lnl-3/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
* igt@xe_exec_threads@threads-hang-shared-vm-userptr-rebind:
- shard-bmg: [ABORT][149] -> [PASS][150]
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@xe_exec_threads@threads-hang-shared-vm-userptr-rebind.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-9/igt@xe_exec_threads@threads-hang-shared-vm-userptr-rebind.html
* igt@xe_pm@s2idle-mocs:
- shard-bmg: [INCOMPLETE][151] -> [PASS][152]
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@xe_pm@s2idle-mocs.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_pm@s2idle-mocs.html
* igt@xe_sriov_auto_provisioning@fair-allocation@numvfs-random:
- shard-bmg: [FAIL][153] ([Intel XE#5937]) -> [PASS][154] +1 other test pass
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@xe_sriov_auto_provisioning@fair-allocation@numvfs-random.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@xe_sriov_auto_provisioning@fair-allocation@numvfs-random.html
#### Warnings ####
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-bmg: [SKIP][155] ([Intel XE#2327]) -> [SKIP][156] ([Intel XE#6703])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-bmg: [SKIP][157] ([Intel XE#1124]) -> [SKIP][158] ([Intel XE#6703]) +1 other test skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_bw@linear-tiling-1-displays-3840x2160p:
- shard-bmg: [SKIP][159] ([Intel XE#367] / [Intel XE#7354]) -> [SKIP][160] ([Intel XE#6703])
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: [SKIP][161] ([Intel XE#3432]) -> [SKIP][162] ([Intel XE#6703])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs:
- shard-bmg: [SKIP][163] ([Intel XE#2887]) -> [SKIP][164] ([Intel XE#6703]) +2 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
- shard-bmg: [SKIP][165] ([Intel XE#2652]) -> [SKIP][166] ([Intel XE#6703])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
* igt@kms_chamelium_color@degamma:
- shard-bmg: [SKIP][167] ([Intel XE#2325] / [Intel XE#7358]) -> [SKIP][168] ([Intel XE#6703])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_chamelium_color@degamma.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_chamelium_color@degamma.html
* igt@kms_content_protection@legacy-hdcp14:
- shard-bmg: [FAIL][169] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [SKIP][170] ([Intel XE#7194])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_content_protection@legacy-hdcp14.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_content_protection@legacy-hdcp14.html
* igt@kms_content_protection@srm:
- shard-bmg: [SKIP][171] ([Intel XE#2341]) -> [FAIL][172] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_content_protection@srm.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_content_protection@srm.html
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][173] ([Intel XE#2341]) -> [FAIL][174] ([Intel XE#6707] / [Intel XE#7439])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_content_protection@uevent.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_content_protection@uevent.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-bmg: [SKIP][175] ([Intel XE#2291]) -> [SKIP][176] ([Intel XE#6703])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-bmg: [SKIP][177] ([Intel XE#1508]) -> [SKIP][178] ([Intel XE#6703])
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-4/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-bmg: [SKIP][179] ([Intel XE#7178] / [Intel XE#7351]) -> [SKIP][180] ([Intel XE#6703])
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move:
- shard-bmg: [SKIP][181] ([Intel XE#2312]) -> [SKIP][182] ([Intel XE#2311]) +14 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][183] ([Intel XE#2311]) -> [SKIP][184] ([Intel XE#2312]) +17 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-rgb565-draw-mmap-wc:
- shard-bmg: [SKIP][185] ([Intel XE#2311]) -> [SKIP][186] ([Intel XE#6703]) +4 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-mmap-wc.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][187] ([Intel XE#4141]) -> [SKIP][188] ([Intel XE#6703]) +4 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][189] ([Intel XE#4141]) -> [SKIP][190] ([Intel XE#2312]) +10 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][191] ([Intel XE#2312]) -> [SKIP][192] ([Intel XE#4141]) +10 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][193] ([Intel XE#2313]) -> [SKIP][194] ([Intel XE#6703]) +5 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][195] ([Intel XE#2312]) -> [SKIP][196] ([Intel XE#2313]) +12 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][197] ([Intel XE#2313]) -> [SKIP][198] ([Intel XE#2312]) +10 other tests skip
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: [SKIP][199] ([Intel XE#4090] / [Intel XE#7443]) -> [SKIP][200] ([Intel XE#6703])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_panel_fitting@legacy:
- shard-bmg: [SKIP][201] ([Intel XE#2486]) -> [SKIP][202] ([Intel XE#6703])
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-4/igt@kms_panel_fitting@legacy.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_panel_fitting@legacy.html
* igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping:
- shard-bmg: [SKIP][203] ([Intel XE#7283]) -> [SKIP][204] ([Intel XE#6703])
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier-source-clamping.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
- shard-bmg: [SKIP][205] ([Intel XE#2763] / [Intel XE#6886]) -> [SKIP][206] ([Intel XE#6703])
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-4/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-bmg: [SKIP][207] ([Intel XE#3309] / [Intel XE#7368]) -> [SKIP][208] ([Intel XE#6703])
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-9/igt@kms_pm_dc@dc5-retention-flops.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-bmg: [SKIP][209] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) -> [SKIP][210] ([Intel XE#6703])
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
- shard-bmg: [SKIP][211] ([Intel XE#1489]) -> [SKIP][212] ([Intel XE#6703]) +1 other test skip
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-bmg: [SKIP][213] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][214] ([Intel XE#6703]) +2 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-6/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-bmg: [SKIP][215] ([Intel XE#3904] / [Intel XE#7342]) -> [SKIP][216] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-bmg: [SKIP][217] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) -> [SKIP][218] ([Intel XE#3904] / [Intel XE#7342]) +3 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-90.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-7/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@xe_eudebug@discovery-race-sigint:
- shard-bmg: [SKIP][219] ([Intel XE#4837]) -> [SKIP][220] ([Intel XE#6703])
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-1/igt@xe_eudebug@discovery-race-sigint.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_eudebug@discovery-race-sigint.html
* igt@xe_eudebug_online@tdctl-parameters:
- shard-bmg: [SKIP][221] ([Intel XE#4837] / [Intel XE#6665]) -> [SKIP][222] ([Intel XE#6703])
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@xe_eudebug_online@tdctl-parameters.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_eudebug_online@tdctl-parameters.html
* igt@xe_evict@evict-small-external-multi-queue-cm:
- shard-bmg: [SKIP][223] ([Intel XE#7140]) -> [SKIP][224] ([Intel XE#6703]) +1 other test skip
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-9/igt@xe_evict@evict-small-external-multi-queue-cm.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_evict@evict-small-external-multi-queue-cm.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap:
- shard-bmg: [SKIP][225] ([Intel XE#2322] / [Intel XE#7372]) -> [SKIP][226] ([Intel XE#6703]) +2 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
* igt@xe_exec_fault_mode@many-multi-queue-rebind-imm:
- shard-bmg: [SKIP][227] ([Intel XE#7136]) -> [SKIP][228] ([Intel XE#6703]) +1 other test skip
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@xe_exec_fault_mode@many-multi-queue-rebind-imm.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_exec_fault_mode@many-multi-queue-rebind-imm.html
* igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-dyn-priority-smem:
- shard-bmg: [SKIP][229] ([Intel XE#6874]) -> [SKIP][230] ([Intel XE#6703]) +2 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-9/igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-dyn-priority-smem.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-dyn-priority-smem.html
* igt@xe_exec_threads@threads-multi-queue-rebind-err:
- shard-bmg: [SKIP][231] ([Intel XE#7138]) -> [SKIP][232] ([Intel XE#6703])
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-4/igt@xe_exec_threads@threads-multi-queue-rebind-err.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-rebind-err.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-bmg: [SKIP][233] ([Intel XE#2284] / [Intel XE#7370]) -> [SKIP][234] ([Intel XE#6703])
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@xe_pm@d3cold-multiple-execs.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-bmg: [SKIP][235] ([Intel XE#4733] / [Intel XE#7417]) -> [SKIP][236] ([Intel XE#6703])
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-8/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_query@multigpu-query-invalid-size:
- shard-bmg: [SKIP][237] ([Intel XE#944]) -> [SKIP][238] ([Intel XE#6703])
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-10/igt@xe_query@multigpu-query-invalid-size.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_query@multigpu-query-invalid-size.html
* igt@xe_wedged@wedged-at-any-timeout:
- shard-bmg: [DMESG-WARN][239] ([Intel XE#5545]) -> [SKIP][240] ([Intel XE#6703])
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a/shard-bmg-5/igt@xe_wedged@wedged-at-any-timeout.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/shard-bmg-2/igt@xe_wedged@wedged-at-any-timeout.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6779
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7086]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7086
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7194]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7194
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7367
[Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
[Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
[Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
[Intel XE#7504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7504
[Intel XE#7508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7508
[Intel XE#7621]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7621
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8811 -> IGT_8813
* Linux: xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a -> xe-pw-163562v1
IGT_8811: cc3169e72592a56b806ce54a87060519151ad5fe @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8813: 89e32100ca0e4ca343dd32408dacf1e879e8ed02 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4749-4ae9f18564e78a5447be68aa1e9232a4f2c37b5a: 4ae9f18564e78a5447be68aa1e9232a4f2c37b5a
xe-pw-163562v1: 163562v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163562v1/index.html
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management
2026-03-20 7:25 [RFC v1 0/5] drm/xe/fwctl: Add FWCTL interface for Xe firmware management Anoop, Vijay
` (9 preceding siblings ...)
2026-03-21 3:59 ` ✗ Xe.CI.FULL: failure " Patchwork
@ 2026-04-28 0:12 ` Anoop Vijay
10 siblings, 0 replies; 15+ messages in thread
From: Anoop Vijay @ 2026-04-28 0:12 UTC (permalink / raw)
To: intel-xe
Cc: umesh.nerlige.ramappa, badal.nilawar, rodrigo.vivi,
aravind.iddamsetty, riana.tauro, anshuman.gupta, matthew.d.roper,
michael.j.ruhl, paul.e.luse, mohamed.mansoor.v, kam.nasim
[-- Attachment #1: Type: text/plain, Size: 3460 bytes --]
Hi,
Bumping this RFC series and requesting a review.
Feedback on the proposed interface and overall approach would be greatly
appreciated before I proceed to the next revision.
Thanks,
Anoop
On 20-03-2026 12:55, Anoop, Vijay wrote:
> From: Anoop Vijay<anoop.c.vijay@intel.com>
>
> This series builds on top of System Controller series[1] and adds FWCTL
> framework support for System Controller firmware access on Intel Xe discrete
> GPUs.
>
> Patches introduce generic FWCTL infrastructure with pluggable firmware
> backend support, implementing initial System Controller backend to enable
> userspace firmware management through standard FWCTL device interfaces.
>
> Key features introduced:
> - Generic xe_fw_ops interface for firmware backend implementations
> - FWCTL device registration and ioctl handlers (info, rpc)
> - System Controller FWCTL backend with scope validation and RPC execution
> - Userspace-accessible firmware RPCs through /dev/fwctl/fwctl<N>
>
> [1]https://patchwork.freedesktop.org/series/163196/
>
> Anoop Vijay (5):
> drm/xe/xe_sysctrl: Add System Controller support
> drm/xe/fwctl: Add uAPI definitions for Xe FWCTL support
> drm/xe/fwctl: Add Xe FWCTL type definitions
> drm/xe/fwctl: Add Xe FWCTL infrastructure support
> drm/xe/fwctl: Add System Controller FWCTL RPC handler
>
> Documentation/userspace-api/fwctl/index.rst | 1 +
> drivers/gpu/drm/xe/Kconfig | 1 +
> drivers/gpu/drm/xe/Makefile | 4 +
> drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h | 94 ++++
> drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h | 36 ++
> drivers/gpu/drm/xe/xe_device.c | 10 +
> drivers/gpu/drm/xe/xe_device_types.h | 10 +
> drivers/gpu/drm/xe/xe_fwctl.c | 206 +++++++++
> drivers/gpu/drm/xe/xe_fwctl.h | 15 +
> drivers/gpu/drm/xe/xe_fwctl_types.h | 52 +++
> drivers/gpu/drm/xe/xe_pci.c | 2 +
> drivers/gpu/drm/xe/xe_pci_types.h | 1 +
> drivers/gpu/drm/xe/xe_pm.c | 11 +
> drivers/gpu/drm/xe/xe_sysctrl.c | 128 ++++++
> drivers/gpu/drm/xe/xe_sysctrl.h | 23 +
> drivers/gpu/drm/xe/xe_sysctrl_fwctl.c | 136 ++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 400 ++++++++++++++++++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.h | 33 ++
> drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 40 ++
> drivers/gpu/drm/xe/xe_sysctrl_types.h | 32 ++
> include/uapi/fwctl/fwctl.h | 1 +
> include/uapi/fwctl/xe.h | 65 +++
> 22 files changed, 1301 insertions(+)
> create mode 100644 drivers/gpu/drm/xe/abi/xe_sysctrl_abi.h
> create mode 100644 drivers/gpu/drm/xe/regs/xe_sysctrl_regs.h
> create mode 100644 drivers/gpu/drm/xe/xe_fwctl.c
> create mode 100644 drivers/gpu/drm/xe/xe_fwctl.h
> create mode 100644 drivers/gpu/drm/xe/xe_fwctl_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.c
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_fwctl.c
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> create mode 100644 drivers/gpu/drm/xe/xe_sysctrl_types.h
> create mode 100644 include/uapi/fwctl/xe.h
>
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^ permalink raw reply [flat|nested] 15+ messages in thread